Method for manufacturing and optimizing feed-forward equalizer for clock data recovery circuit

Abstract

The invention discloses a feed-forward equalizer manufacturing optimization method for a clock data recovery circuit, which relates to the field of high-speed serial communication, and comprises the following steps: based on a short-tap feed-forward equalizer, setting a tap coefficient, and outputting a normalized output discrete signal amplitude; taking the normalized output discrete signal amplitude of the short-tap feed-forward equalizer as an input signal in a constant modulus algorithm updating process, correcting a tap coefficient based on a constant modulus criterion, and optimizing the short-tap feed-forward equalizer under the constant modulus algorithm; based on a short-tap feed-forward equalizer under an optimized constant modulus algorithm, a normalized expected signal amplitude judged by a receiving end judgment device and an instantaneous error between a normalized output discrete signal amplitude and the normalized expected signal amplitude are calculated, and a tap coefficient is further corrected through a minimum mean square algorithm; and optimizing the short-tap feed-forward equalizer under the minimum mean square algorithm.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of high-speed serial communication, and particularly to a feedforward equalizer optimization method for a clock data recovery circuit. BACKGROUND

[0002] High-speed serializer technology is a high-speed serial data transmission method widely used in chip-to-chip and board-level interconnections, and the receiving end usually relies on a clock data recovery circuit to extract the optimal sampling point. Due to the existence of intersymbol interference and amplitude attenuation in the transmission channel, the receiving end needs to combine an analog-to-digital converter, a phase interpolator, and a phase-locked loop circuit to realize signal recovery, wherein the feedforward equalizer, as an important part of suppressing intersymbol interference, filters the input discrete signal by setting the tap coefficient to improve the output signal amplitude and provide a stable input for the decision logic.

[0003] Conventional feedforward equalizers mostly use fixed tap structures or single algorithm optimization, which has two shortcomings: first, the tap coefficient is difficult to adaptively correct under complex channel conditions, resulting in unstable equalization output; second, the equalization performance determination relies on static threshold setting, and cannot dynamically optimize the real-time signal-to-noise ratio and error change trend, affecting the convergence speed and decision accuracy. SUMMARY

[0004] In view of the above existing problems, the present application is proposed.

[0005] Therefore, the present application provides a feedforward equalizer optimization method for a clock data recovery circuit to solve the problems of lack of adaptive correction of tap coefficients and reliance on static threshold for equalization performance determination.

[0006] To solve the above technical problems, the present application provides the following technical solutions: The present application provides a feedforward equalizer optimization method for a clock data recovery circuit, which includes setting a tap coefficient based on a short-tap feedforward equalizer and outputting a normalized output discrete signal amplitude. The normalized output discrete signal amplitude of the short-tap feedforward equalizer is used as the input signal of the constant modulus algorithm update process, the tap coefficient is corrected based on the constant modulus criterion, and the short-tap feedforward equalizer under the constant modulus algorithm is optimized. Based on the short-tap feedforward equalizer under the optimized constant modulus algorithm, the normalized expected signal amplitude determined by the receiver decision device, the normalized output discrete signal amplitude, and the normalized expected signal amplitude are calculated, the tap coefficient is further corrected by the least mean square algorithm, and the short-tap feedforward equalizer under the least mean square algorithm is optimized. Based on the constant modulus algorithm and the least mean square algorithm, the output signal-to-noise ratio is detected, and when the output signal-to-noise ratio exceeds the output signal-to-noise ratio threshold, the short tap feedforward equalizer is switched from the constant modulus algorithm to the least mean square algorithm; Based on the switching and modification of the tap coefficient based on the constant modulus algorithm and the least mean square algorithm, the final tap coefficient set is obtained, and the production optimization of the short tap feedforward equalizer based on the tap coefficient set is completed.

[0007] As a preferred scheme of the feedforward equalizer production optimization method for the clock data recovery circuit, wherein: the short tap feedforward equalizer is provided with a tap coefficient, and the specific steps are, The short tap feedforward equalizer is constructed by using the fast finite impulse response algorithm, the tap coefficient is set, the digital receiving signal output by the analog-to-digital converter is normalized and then input into the short tap feedforward equalizer, and the tap multiplication operation is reorganized under the fast finite impulse response algorithm.

[0008] As a preferred scheme of the feedforward equalizer production optimization method for the clock data recovery circuit, wherein: the output normalized output discrete signal amplitude is output, and the specific steps are, The maximum amplitude of the parallelized digital receiving signal output by the analog-to-digital converter is measured, and all sample point amplitudes are divided by the maximum amplitude to obtain the normalized input discrete signal; The short tap feedforward equalizer performs finite impulse response filtering operation on the normalized input discrete signal based on the fast finite impulse response algorithm to obtain the normalized output discrete signal amplitude.

[0009] As a preferred scheme of the feedforward equalizer production optimization method for the clock data recovery circuit, wherein: the normalized output discrete signal amplitude of the short tap feedforward equalizer is taken as the input signal of the constant modulus algorithm update process, the tap coefficient is modified based on the constant modulus criterion, and the short tap feedforward equalizer under the constant modulus algorithm is optimized, and the specific steps are, The reference level set is set according to the modulation mode PAM4, the reference modulus value is calculated, the difference between the modulus square of the output discrete signal amplitude and the reference modulus value is taken as the constant modulus error, and the tap coefficient is modified point by point based on the constant modulus error to complete the update.

[0010] As a preferred scheme of the feedforward equalizer production optimization method for the clock data recovery circuit, wherein: based on the short tap feedforward equalizer under the optimized constant modulus algorithm, the normalized expected signal amplitude determined by the receiver decision and the instantaneous error between the normalized output discrete signal amplitude and the normalized expected signal amplitude are calculated, and the specific steps are, The midpoint between the two adjacent reference levels is taken as the decision threshold, the output discrete signal amplitude of the short-tap feedforward equalizer is compared with the decision threshold to obtain an expected signal amplitude, and the difference between the output discrete signal amplitude and the expected signal amplitude is taken as the instantaneous error.

[0011] As a preferred solution of the feedforward equalizer manufacturing optimization method for a clock data recovery circuit, the tap coefficient is further corrected based on the instantaneous error and the normalized input discrete signal, and the correction amplitude is controlled by the step size. As a preferred solution of the feedforward equalizer manufacturing optimization method for a clock data recovery circuit, the tap coefficient is further corrected based on the instantaneous error and the normalized input discrete signal, and the correction amplitude is controlled by the step size.

[0012] As a preferred solution of the feedforward equalizer manufacturing optimization method for a clock data recovery circuit, the tap coefficient is further corrected based on the instantaneous error and the normalized input discrete signal, and the correction amplitude is controlled by the step size. The average power of the expected signal amplitude and the mean square error power between the output discrete signal amplitude and the expected signal amplitude are calculated through a sliding observation window, and the output signal-to-noise ratio is calculated based on the average power of the expected signal amplitude and the mean square error power between the output discrete signal amplitude and the expected signal amplitude.

[0013] As a preferred solution of the feedforward equalizer manufacturing optimization method for a clock data recovery circuit, the tap coefficient is further corrected based on the instantaneous error and the normalized input discrete signal, and the correction amplitude is controlled by the step size. The inflection point value of the output signal-to-noise ratio improvement curve with the convergence process is extracted as the output signal-to-noise ratio threshold, and when the actual output signal-to-noise ratio is detected to be greater than the output signal-to-noise ratio threshold, the constant modulus algorithm is switched to the least mean square algorithm.

[0014] As a preferred solution of the feedforward equalizer manufacturing optimization method for a clock data recovery circuit, the tap coefficient is further corrected based on the instantaneous error and the normalized input discrete signal, and the correction amplitude is controlled by the step size. The output signal-to-noise ratio and the change trend of the instantaneous error are combined, and when the output signal-to-noise ratio change amount in a plurality of consecutive observation windows is lower than the output signal-to-noise ratio improvement value threshold, it is confirmed that the tap coefficient of the short-tap feedforward equalizer converges to a stable state.

[0015] As a preferred solution of the feedforward equalizer manufacturing optimization method for a clock data recovery circuit, the tap coefficient is further corrected based on the instantaneous error and the normalized input discrete signal, and the correction amplitude is controlled by the step size. After the short-tap feedforward equalizer switches and converges optimization of constant modulus algorithm and least mean square algorithm, the tap coefficient set converging to a stable state is extracted, loaded to the short-tap feedforward equalizer, and the input signal is processed through the tap coefficient to output the equalized discrete signal amplitude; The equalized discrete signal amplitude is input to the decision logic of the clock data recovery circuit, the optimal sampling point is determined by the symbol interval of the expected signal amplitude, and the clock phase information is extracted.

[0016] The present application has the beneficial effects that: by inputting the normalized output discrete signal amplitude of the short-tap feedforward equalizer into the constant modulus algorithm and correcting the tap coefficient, fast convergence and stable output are realized; in combination with the instantaneous error of the normalized expected signal amplitude and the output discrete signal amplitude obtained by the receiver decision device, the tap coefficient is gradually optimized through the least mean square algorithm to realize fine correction; finally, through algorithm switching and convergence determination, the clock data recovery circuit extracts stable clock information at the optimal sampling point, and the reliability and applicability are improved. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creating laborious work.

[0018] Fig. 1 The flowchart for the optimization method of the feedforward equalizer for the clock data recovery circuit.

[0019] Fig. 2 The flowchart for the short-tap feedforward equalizer construction and normalized output.

[0020] Fig. 3 The flowchart for the constant modulus algorithm and the least mean square algorithm to correct the tap coefficient.

[0021] Fig. 4 The flowchart for the output signal-to-noise ratio detection and algorithm switching and convergence determination. DETAILED DESCRIPTION

[0022] In order to make the above-mentioned purposes, features and advantages of the present application more apparent and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the drawings of the specification.

[0023] In the following description, many specific details are set forth in order to provide a thorough understanding of the present application, but the present application can also be implemented in other ways different from those described herein, and those skilled in the art can make similar generalizations without departing from the connotation of the present application, therefore the present application is not limited to the specific embodiments disclosed below.

[0024] Second, the "one embodiment" or "an embodiment" referred to herein means a specific feature, structure, characteristic, or combination of features and / or characteristics described herein that can be included in at least one implementation of the present application. The various appearances of "in one embodiment" or "an embodiment" in the specification are not necessarily all referring to the same embodiment.

[0025] Reference Figs. 1-4 For one embodiment of the present application, the embodiment provides a feedforward equalizer manufacturing optimization method for a clock data recovery circuit, comprising the following steps: S1, a short-tap feedforward equalizer is constructed based on a fast finite impulse response method to reduce the number of multiplication operations to reduce the power consumption of the circuit, and a normalized output discrete signal amplitude is output; The short-tap feedforward equalizer is constructed using the fast finite impulse response algorithm, and the analog signal output by the transmission channel at the receiving end is converted into a parallel digital receiving signal by the phase difference device, so as to weaken the inter-symbol interference. The short-tap feedforward equalizer uses the fast finite impulse response algorithm to reduce the number of multipliers, thereby reducing the overall power consumption of the short-tap feedforward equalizer circuit; The structure parameters of the short-tap feedforward equalizer are determined, the tap coefficients are set, and the parallel output is output. The parallel digital receiving signal output by the analog-to-digital converter is divided into multiple time sequence channels, each time sequence channel corresponds to a phase branch, the output discrete signal amplitude sequence of the short-tap feedforward equalizer is extracted into multiple phase sub-sequences according to the parallel structure of the tap filtering, each phase sub-sequence can be updated under independent tap coefficients, avoiding single path overload, ensuring that the constant modulus constraint is still met under the parallel structure, reducing the complexity of hardware implementation, and after the phase sub-sequences complete tap coefficient updating, the complete output sequence is reorganized on the time axis to obtain fast and stable tap coefficient adjustment. The short-tap feedforward equalizer is a finite impulse response filter, the number of filter coefficients must be a positive integer, and the parallel degree is set to 2 or 4 to correspond to even, odd or four-phase processing modes. The input signal is the parallel digital receiving signal output by the analog-to-digital converter. The digital receiving signal is normalized, and the tap coefficient must work in the same amplitude domain to avoid multiplication overflow. The value range of the tap coefficient is At the same time, the tap coefficient is stored in a signed fixed-point format with bits of decimal, and the maximum positive value can only be represented to , and the minimum value is -1, so the final value range of the tap coefficient is ; The parallelized digital received signal output from the analog-to-digital converter is used as the input discrete signal sequence. The maximum amplitude of the input discrete signal is measured, and the amplitudes of all input discrete signals are normalized to obtain the normalized input discrete signal, such that the amplitude range of the normalized signal is [value missing]. The dual constraints ensure that the tap coefficients satisfy both numerical stability and hardware implementation feasibility. Furthermore, after the normalized input discrete signal sequence is processed by a short-tap feedforward equalizer, the normalized output discrete signal amplitude is expressed as: ; in, It is a short-tap feedforward equalizer at time... The normalized output discrete signal amplitude, It is the total number of taps, i.e., the length of the fast finite impulse response filter. It is the tap factor. It is the normalized input discrete signal after delay. The amplitude after each sampling point It is the time index of the output sampling point. It is a tap index; Under the premise of the same number of taps and parallelism, the Fast Finite Impulse Response (FPI) algorithm is adopted. By reorganizing the tap multiplication operations, the number of multipliers and adders used in the hardware is reduced, thereby reducing the dynamic power consumption of the short-tap feedforward equalizer circuit. According to the number of taps and parallelism, the weighted summation operation of the tap coefficients is realized. Under the same number of taps and parallelism, the FPI reduces the repeated calculation of common multiplication terms and reduces the number of multipliers used. For example, when the parallelism is 2 and the number of taps is 5, the FPI structure requires 8 multiplications and 9 additions. When the parallelism is 4 and the number of taps is 5, the number of multiplications and additions required is 13 and 22. The FPI algorithm is adopted to reduce the number of multipliers, thereby reducing the overall power consumption of the short-tap feedforward equalizer circuit.

[0026] S2. The normalized output discrete signal amplitude of the short-tap feedforward equalizer is used as the input signal for the constant modulus algorithm update process, and the tap coefficients are quickly corrected based on the constant modulus criterion. The discrete output signal of the short-tap feedforward equalizer is used as the input signal for the constant modulus algorithm update process. According to the constant modulus criterion, the tap coefficients are updated quickly during the startup phase of the short-tap feedforward equalizer to reduce inter-symbol interference and provide a stable initial tap coefficient state. Based on the modulation mode PAM4, the reference level of the decision maker at the receiving end in the ideal case has 4, the reference level in the ideal case is set according to the nominal level of the sending end and the full scale range of the analog to digital converter in the power on initialization or link calibration stage, and the same dimension as the normalized signal amplitude, then the decision threshold can be calculated, that is, the midpoint of the adjacent levels in the ideal reference level set determined according to the channel modulation mode, for example, the four reference levels of PAM4 are-3, -1, +1, +3, and the decision threshold is-2, 0, +2. After obtaining the reference level in the ideal case, the reference level set in the ideal case is determined according to the nominal level of the sending end and the full scale range of the analog to digital converter, the average square value of all amplitude values in the reference amplitude set is calculated as the reference modulus value used by the constant modulus algorithm, which ensures the stability of the constant modulus algorithm update, the reference modulus value is calculated only once in the initialization stage of the constant modulus algorithm, and remains unchanged throughout the stage, and will not be updated with the adjustment of the phase difference value, which ensures that the amplitude of each sampling point is stable at a reasonable energy level during the update process to avoid error propagation phenomenon; Further, the constant modulus error is calculated, based on the constant modulus criterion, the modulus square of the short tap feedforward equalizer output discrete signal is compared with the reference modulus value for all output sampling points, if the modulus square of the short tap feedforward equalizer output signal is greater than the reference modulus value, the constant modulus error is positive, indicating that the output energy needs to be reduced, if the modulus square of the short tap feedforward equalizer output discrete signal is less than the reference modulus value, the constant modulus error is negative, indicating that the output energy needs to be increased, the constant modulus error of all output sampling points is obtained, and the size of the constant modulus error reflects the strength required for tap coefficient update; Further, based on the constant modulus error of all sampling output points, all tap coefficients are corrected point by point, and the tap coefficients are updated, the constant modulus error of the output sampling point is positive, then the contribution direction of the tap coefficient will increase the output energy, and the tap coefficient will be reduced, the error signal of the output sampling point is negative, then the contribution direction of the tap coefficient will reduce the output energy, and the tap coefficient will be increased. In order to balance between convergence speed and stability, the amplitude of tap coefficient update is limited by the control factor, the upper limit of the control factor depends on the input signal power and the reference modulus value, in order to avoid error amplification, the value range According to the energy distribution of the normalized output discrete signal amplitude in the constant modulus algorithm update process, each correction can effectively change the output without causing divergence due to excessive adjustment, a tap coefficient judgment constraint is set, if the tap coefficient exceeds , it will be immediately clipped back to to avoid overflow and ensure that the output always meets the amplitude constraint; After the fast update by the constant modulus algorithm, the tap coefficients of the short tap feedforward equalizer are gradually adjusted to a more reasonable initial value without relying on the training sequence, and the normalized output discrete signal amplitude is basically gathered around the reference level set under the ideal condition, tends to be stable and reduces the intersymbol interference.

[0027] S3, calculating the instantaneous error between the normalized expected signal amplitude determined by the receiving end decision device and the normalized output discrete signal amplitude, and further correcting the tap coefficients by the least mean square algorithm; After the initial convergence of the constant modulus algorithm, the short tap feedforward equalizer has corrected the tap coefficients using the constant modulus criterion, so that the normalized output discrete signal amplitude is basically stable around the reference modulus value, and the intersymbol interference is reduced, avoiding the divergence of the tap coefficients caused by the excessively large normalized output discrete signal amplitude or the convergence stagnation caused by the excessively small normalized output discrete signal amplitude; To further improve the decision accuracy and stability of the normalized output discrete signal amplitude, the normalized expected signal amplitude is determined by the receiving end decision device on the basis of the convergence of the constant modulus algorithm; The receiving end decision device compares the normalized output discrete signal amplitude with the decision threshold, and selects the reference level closest to the decision result. The reference levels corresponding to the decision results are arranged in sequence according to the sampling time, and the normalized expected signal amplitude sequence is obtained. The normalized expected signal amplitude sequence is determined by the decision threshold based on the reference level under the ideal condition, and the receiving end signal is determined point by point. There is a certain difference between the normalized output discrete signal amplitude of the short tap feedforward equalizer and the normalized expected signal amplitude, i.e. the instantaneous error. If the instantaneous error keeps decreasing in a continuous multiple sampling period, it means that the correction direction of the tap coefficients of the short tap feedforward equalizer is correct. If the instantaneous error fluctuates sharply or continuously, it means that the adjustment of the tap coefficients is unreasonable. The size of the instantaneous error reflects the deviation between the output of a single sampling point and the expected signal, while the trend of the instantaneous error reflects the stability and convergence direction of the equalization process in the time dimension; The least mean square algorithm is used as the further correction method. The least mean square algorithm aims to minimize the mean of the square of the instantaneous error, and makes a small incremental adjustment to the tap coefficients at each sampling time according to the current instantaneous error, so that the corrected normalized output discrete signal amplitude is closer to the normalized expected signal amplitude. The instantaneous error is continuously observed and accumulated for analysis, and the mean of the square of the instantaneous error is used to measure the average deviation between the normalized output discrete signal amplitude and the normalized expected signal amplitude. Through continuous iteration and update, the tap coefficients gradually converge, and the overall error level is reduced to a stable and controllable range. In the process of modifying the tap coefficient, a step factor is used to control the update amplitude to balance the convergence speed and stability, so that the short tap feedforward equalizer converges to a stable state within a number of iterations, and the input signal energy normalization processing is determined based on the tap coefficient judgment constraint to avoid overflow and ensure that the output always meets the amplitude constraint, which ensures that the tap coefficient always maintains numerical stability during the update process, avoids divergence caused by excessive adjustment, and ensures that the equalizer normalized output discrete signal amplitude is within a controllable range, i.e., the tap coefficient does not exceed ; The step factor is obtained by statistically tracking the tap coefficient update in historical convergence experiments, selecting experimental samples that can ensure stable convergence of the short tap feedforward equalizer under different signal-to-noise ratios, normalizing the update amplitude of the experimental samples to obtain a normalized update amplitude sequence of the experimental samples in each iteration, and then averaging the normalized update amplitude sequence by dimension to obtain a mean vector. The normalized mean vector obtained by normalizing the mean vector is used as the value range of the step factor reference; The tap coefficient updated based on the least mean square algorithm is substituted into the weighted summation operation of the short tap feedforward equalizer to calculate the updated normalized output discrete signal amplitude sequence, which more accurately reflects the input symbol level distribution, and significantly improves the decision accuracy of the receiver decision device.

[0028] S4, based on the constant modulus algorithm and the least mean square algorithm, the output signal-to-noise ratio is detected, and when the output signal-to-noise ratio exceeds the output signal-to-noise ratio threshold, the short tap feedforward equalizer is switched from the constant modulus algorithm to the least mean square algorithm; A dual-mode blind equalization mechanism is adopted to switch between the constant modulus algorithm and the least mean square algorithm, and the switching criterion is based on the output signal-to-noise ratio improvement value. The constant modulus algorithm and the least mean square algorithm are suitable for different working stages, the constant modulus algorithm does not depend on the normalized expected signal amplitude input of the receiver decision device, and can start the equalization process under the condition that the receiver decision device is not stable or the signal-to-noise ratio is low, has strong convergence ability for poor channels, and ensures the stability of convergence, the least mean square algorithm needs the receiver decision device to provide reliable normalized expected signal amplitude input, and is used under the condition that the receiver decision device has high enough reliability, the single-point instantaneous error of the equalizer normalized output discrete signal amplitude is small after the equalizer normalized output discrete signal amplitude is basically stable around the reference modulus value, and the short tap feedforward equalizer needs to be switched between the constant modulus algorithm mode and the least mean square algorithm mode, so as to ensure convergence to a stable state while improving the decision accuracy and stability of the normalized output discrete signal amplitude; The constant modulus algorithm is used as the starting equalization algorithm of the short tap feedforward equalizer, the output signal-to-noise ratio is detected, and when the output signal-to-noise ratio exceeds the output signal-to-noise ratio decision threshold, the least mean square algorithm is switched, and the expression is: ; ; ; wherein, is a signal power metric, is an energy metric value obtained by weighted average of the average power of the normalized expected signal amplitude in the first sampling moment, is a signal power, is an error signal power, is an error signal power metric, is an energy metric value obtained by weighted average of the mean square error power between the normalized output discrete signal amplitude and the normalized expected signal amplitude in the first sampling moment, is a sliding window length, which limits the statistical range of the signal power and the error power, and is used to smooth short-term fluctuations, is the normalized output discrete signal amplitude of the first sampling point, is the normalized expected signal amplitude of the first sampling point, is the sampling index within the window, is the output signal-to-noise ratio of the first sampling moment; Further, the output signal-to-noise ratio threshold is calculated, in the constant modulus algorithm stage, the output signal-to-noise ratio will gradually converge with the tap coefficient and improve, when the improvement amplitude gradually decreases and tends to be stable, it is indicated that the constant modulus algorithm has completed the preliminary convergence, based on the change of the output signal-to-noise ratio, the output signal-to-noise ratio improvement curve representing the output signal-to-noise ratio improvement value is drawn, the output signal-to-noise ratio when the output signal-to-noise ratio improvement curve approaches 0 is extracted as the output signal-to-noise ratio threshold, when the output signal-to-noise ratio is greater than the output signal-to-noise ratio threshold, the minimum mean square algorithm is switched, the switching method based on the output signal-to-noise ratio threshold avoids the complex calculation of the error function tolerance threshold in the traditional method, and can directly reflect whether the equalization performance meets the switchable condition; The short-tap feedforward equalizer can maintain the stability of blind equalization in the starting stage, and realize automatic switching when the output signal-to-noise ratio reaches the reliable decision condition, which ensures fast convergence to a stable state and realizes fine optimization.

[0029] S5, the convergence state of the short-tap feedforward equalizer is determined, the final tap coefficient set is obtained, and the production optimization of the short-tap feedforward equalizer based on the tap coefficient set is completed; After the equalization initialization and the minimum mean square error convergence optimization of the constant modulus algorithm are completed, and the mode switching based on the output signal-to-noise ratio is combined, the short tap feedforward equalizer gradually converges to a stable state, the error between the normalized output discrete signal amplitude sequence of the short tap feedforward equalizer and the normalized expected signal amplitude sequence gradually decreases, and the output signal-to-noise ratio is verified. Further, the output signal-to-noise ratio is verified, in the convergence stage, the improvement of the output signal-to-noise ratio tends to be stable, and the improvement value of the output signal-to-noise ratio in a plurality of consecutive observation windows is lower than the output signal-to-noise ratio threshold, which indicates that the equalization process has reached the output signal-to-noise ratio threshold, and the minimum mean square algorithm is switched. The final tap coefficient set is obtained when the instantaneous error is stable at a low level and the equalization process has reached a steady state, the tap coefficient set obtained through convergence is applied to the short tap feedforward equalizer, the normalized input discrete signal sequence is weighted and summed, the final output discrete signal sequence is obtained, the final output discrete signal sequence is close to the four clustering points of the ideal PAM4 level in the waveform, the waveform distortion is weakened, the intersymbol interference is reduced, the noise influence is weakened, the symbol clustering points are more concentrated, the signal level interval is clearer, the best sampling point range is wider, the normalized output discrete signal amplitude sequence of the short tap feedforward equalizer is more stable, the clock data recovery circuit can extract stable clock information at the best sampling point, and reliable data recovery of the high-speed serial link is realized.

[0030] The embodiment also provides a computer device suitable for the feedforward equalizer manufacturing optimization method for a clock data recovery circuit, which comprises a memory and a processor.

[0031] The computer device can be a terminal, and the computer device comprises a processor, a memory, a communication interface, a display screen and an input device connected through a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device comprises a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operating system and the computer program in the non-volatile storage medium. The communication interface of the computer device is used to perform wired or wireless communication with external terminals. The wireless communication can be achieved through WIFI, an operator network, NFC (near field communication) or other technologies. The display screen of the computer device can be a liquid crystal display screen or an electronic ink display screen. The input device of the computer device can be a touch layer overlaid on the display screen, or a key, trackball or touchpad arranged on the shell of the computer device. The input device of the computer device can also be an external keyboard, touchpad or mouse, etc.

[0032] The embodiment also provides a storage medium, which stores a computer program, and the computer program is executed by a processor to implement the method for optimizing the feedforward equalizer manufacturing of the clock data recovery circuit as proposed in the above embodiment; the storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic memory, a flash memory, a magnetic disk or an optical disk.

[0033] To sum up, the present application realizes fast convergence and stable output by inputting the normalized output discrete signal amplitude of the short-tap feedforward equalizer into the constant modulus algorithm and correcting the tap coefficients; then, the present application realizes fine correction by gradually optimizing the tap coefficients through the least mean square algorithm in combination with the instantaneous error between the normalized expected signal amplitude and the normalized output discrete signal amplitude obtained by the receiver decision device; finally, the present application guarantees the clock data recovery circuit to extract stable clock information at the optimal sampling point and improves the reliability and applicability through algorithm switching and convergence determination.

[0034] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present application but not limit the present application, and although the present application has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present application can be modified or replaced equivalently without departing from the spirit and scope of the present application, and all of them should be covered in the scope of the claims of the present application.

Claims

1. A method for optimizing the fabrication of a feedforward equalizer for a clock data recovery circuit, characterized in that: include, Based on a short-tap feedforward equalizer, the tap coefficients are set to output a normalized discrete signal amplitude. The normalized output discrete signal amplitude of the short-tap feedforward equalizer is used as the input signal for the constant modulus algorithm update process. The tap coefficients are corrected based on the constant modulus criterion to optimize the short-tap feedforward equalizer under the constant modulus algorithm. Based on the short-tap feedforward equalizer under the optimized constant modulus algorithm, the instantaneous error between the normalized expected signal amplitude determined by the receiver decision device and the normalized output discrete signal amplitude and the normalized expected signal amplitude is calculated. The tap coefficients are further corrected by the least mean square algorithm to optimize the short-tap feedforward equalizer under the least mean square algorithm. Based on the constant modulus algorithm and the least mean square algorithm, the output signal-to-noise ratio is detected. When the output signal-to-noise ratio exceeds the output signal-to-noise ratio threshold, the short tap feedforward equalizer is controlled to switch from the constant modulus algorithm to the least mean square algorithm. By switching between the constant modulus algorithm and the least mean square algorithm and correcting the tap coefficients, the final set of tap coefficients is obtained, and the production and optimization of the short tap feedforward equalizer based on the set of tap coefficients is completed.

2. The method for manufacturing and optimizing a feedforward equalizer for a clock data recovery circuit as described in claim 1, characterized in that: The specific steps for setting the tap coefficients in the short-tap feedforward equalizer are as follows. A short-tap feedforward equalizer is constructed using the Fast Finite Impulse Response (FIR) algorithm. The tap coefficients are set, and the normalized digital received signal output from the analog-to-digital converter is input into the short-tap feedforward equalizer. The tap multiplication operations are then recombined under the FIR algorithm.

3. The method for manufacturing and optimizing a feedforward equalizer for a clock data recovery circuit as described in claim 2, characterized in that: The specific steps for normalizing the amplitude of the output discrete signal are as follows: The maximum amplitude of the parallelized digital received signal output by the analog-to-digital converter is measured, and the amplitude of all sampling points is divided by the maximum amplitude to obtain the normalized input discrete signal. The short-tap feedforward equalizer is based on the fast finite impulse response algorithm. It performs finite impulse response filtering on the normalized input discrete signal to obtain the normalized output discrete signal amplitude.

4. The method for manufacturing and optimizing a feedforward equalizer for a clock data recovery circuit as described in claim 3, characterized in that: The process involves using the normalized output discrete signal amplitude of the short-tap feedforward equalizer as the input signal for the constant modulus algorithm update process. Based on the constant modulus criterion, the tap coefficients are corrected to optimize the short-tap feedforward equalizer under the constant modulus algorithm. Specific steps include: Based on the PAM4 modulation scheme, a reference level set is set, the reference modulus is calculated, and the difference between the normalized output discrete signal amplitude modulus square and the reference modulus is used as the constant modulus error. The tap coefficients are then corrected point by point based on the constant modulus error to complete the update.

5. The method for manufacturing and optimizing a feedforward equalizer for a clock data recovery circuit as described in claim 4, characterized in that: The short-tap feedforward equalizer based on the optimized constant modulus algorithm calculates the instantaneous error between the normalized expected signal amplitude determined by the receiver decision unit and the normalized output discrete signal amplitude and the normalized expected signal amplitude. Specific steps are as follows: The midpoint between two adjacent reference levels is used as the decision threshold. The normalized output discrete signal amplitude of the short-tap feedforward equalizer is compared with the decision threshold to obtain the normalized expected signal amplitude. The difference between the normalized output discrete signal amplitude and the normalized expected signal amplitude is then calculated as the instantaneous error.

6. The method for manufacturing and optimizing a feedforward equalizer for a clock data recovery circuit as described in claim 5, characterized in that: The step involves further refining the tap coefficients using the least mean square algorithm to optimize the short-tap feedforward equalizer under the least mean square algorithm. The tap coefficients are further corrected based on the instantaneous error and the normalized discrete input signal, with the correction magnitude controlled by the step size.

7. The method for manufacturing and optimizing a feedforward equalizer for a clock data recovery circuit as described in claim 6, characterized in that: The specific steps for detecting the output signal-to-noise ratio based on the constant modulus algorithm and the least mean square algorithm are as follows: The average power of the normalized expected signal amplitude and the mean square error power between the normalized output discrete signal amplitude and the normalized expected signal amplitude are calculated by using a sliding observation window. The output signal-to-noise ratio is then calculated based on the average power of the normalized expected signal amplitude and the mean square error power between the normalized output discrete signal amplitude and the normalized expected signal amplitude.

8. The method for manufacturing and optimizing a feedforward equalizer for a clock data recovery circuit as described in claim 7, characterized in that: When the output signal-to-noise ratio exceeds the output signal-to-noise ratio threshold, the short-tap feedforward equalizer is switched from the constant modulus algorithm to the least mean square algorithm. Specific steps are as follows: The inflection point value of the curve of output signal-to-noise ratio improvement during the convergence process is extracted as the output signal-to-noise ratio threshold. When the actual output signal-to-noise ratio is detected to be greater than the output signal-to-noise ratio threshold, the constant modulus algorithm is switched to the least mean square algorithm.

9. The method for manufacturing and optimizing a feedforward equalizer for a clock data recovery circuit as described in claim 8, characterized in that: The process of switching between the constant modulus algorithm and the least mean square algorithm, and optimizing the tap coefficients, to obtain the final set of tap coefficients involves the following steps: By combining the trends of output signal-to-noise ratio and instantaneous error of the constant modulus algorithm and the least mean square algorithm, when the change in output signal-to-noise ratio is lower than the threshold of output signal-to-noise ratio improvement within several consecutive observation windows, it is confirmed that the tap coefficients of the short-tap feedforward equalizer have converged to a stable state. After the short-tap feedforward equalizer has undergone switching and convergence optimization of the constant modulus algorithm and the least mean square algorithm, the set of tap coefficients that have converged to a stable state is extracted.

10. The method for manufacturing and optimizing a feedforward equalizer for a clock data recovery circuit as described in claim 9, characterized in that: The specific steps for completing the production and optimization of a short-tap feedforward equalizer based on the tap coefficient set are as follows. The set of tap coefficients that converge to a steady state is loaded into a short-tap feedforward equalizer, and the input signal is processed by the tap coefficients to output the discrete signal amplitude for decision sampling. The amplitude of the discrete signal after equalization is input to the decision logic of the clock data recovery circuit. The optimal sampling point is determined by the symbol interval of the normalized expected signal amplitude, and the clock phase information is extracted.

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