Asymmetric stacked PCB, construction method, single-side electroplating method and PCB

Abstract

The invention discloses an asymmetrically stacked PCB, a construction method, a single-side electroplating method and a PCB, and relates to the technical field of symmetrically stacked PCBs. The method comprises the following steps: preparing two daughter boards; carrying out back-to-back bonding on the two sub-boards through a bonding piece to form a first substrate; pressing a plurality of stacked structures on the upper surface and the lower surface of the first substrate to form a second substrate; the stacked structure comprises prepregs and copper foils which are arranged in a stacked manner; carrying out board milling on the second substrate, removing the region provided with the bonding piece, separating the two sub-boards, and obtaining two PCBs (Printed Circuit Board); the two PCBs are both of an asymmetric stacked structure. According to the method provided by the embodiment of the invention, the two sub-boards are bonded back to back through the bonding piece to form the first substrate, so that single-sided lamination can be simultaneously carried out on the two sub-boards on the upper and lower surfaces of the first substrate, the warping problem caused by single-sided lamination on a single sub-board is avoided, and the production efficiency can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of asymmetrically stacked PCBs, and in particular to an asymmetrically stackable PCB, a construction method, a single-sided plating method and a PCB. BACKGROUND

[0002] Due to special applications such as cavities, the design of asymmetrically stacked PCBs is becoming more and more common. The cavity depth is usually comparable to the thickness of SMT (Surface Mount Technology) components, which is about 0.5-1.0 mm, and the PCB is usually a double-sided or low-layer PCB. In the area below the cavity, the PCB usually adopts a multi-layer, HDI (High Density Interconnect) or ELIC (Every Layer Interconnection) design to adapt to complex wiring. Warping becomes more and more serious after each lamination on a double-sided PCB. Severe warping has a great impact on horizontal processes such as drilling, plating, dry film lamination and etching. SUMMARY

[0003] The present application aims to at least solve one of the technical problems existing in the prior art. To this end, the present application proposes an asymmetrically stackable PCB, a construction method, a single-sided plating method and a PCB, which can avoid the warping problem caused by single-sided lamination of the PCB.

[0004] In a first aspect, the construction method of the asymmetrically stackable PCB according to the embodiments of the present application comprises the following steps:

[0005] Preparation of two sub-boards;

[0006] Back-to-back bonding of the two sub-boards by an adhesive to form a first base plate;

[0007] Pressing a plurality of stack structures on the upper and lower surfaces of the first base plate to form a second base plate; the stack structure comprises a prepreg and a copper foil arranged in layers;

[0008] Milling the second base plate to remove the area provided with the adhesive, so as to separate the two sub-boards and obtain two PCBs; both of the two PCBs are asymmetrically stacked structures.

[0009] According to some embodiments of the present application, the back-to-back bonding of the two sub-boards by the adhesive to form the first base plate comprises:

[0010] On the back of the two sub-boards, an adhesive sheet or a prepreg is arranged around the periphery;

[0011] The two sub-panels are adhered back to back by the adhesive sheet or the prepreg.

[0012] According to some embodiments of the present application, a plurality of stack structures are laminated on the upper and lower surfaces of the first substrate to form a second substrate, comprising:

[0013] The prepreg and the copper foil are sequentially laminated on the upper and lower surfaces of the first substrate, and the first substrate, the prepreg and the copper foil are laminated.

[0014] Returning to the step of laminating the prepreg and the copper foil on the upper and lower surfaces of the first substrate, and laminating the first substrate, the prepreg and the copper foil, until the number of laminations reaches a preset number, to obtain the second substrate.

[0015] According to some embodiments of the present application, the second substrate is drilled to remove the area provided with the adhesive member, so that the two sub-panels are separated to obtain two PCBs, comprising:

[0016] The drilling position is determined according to the area where the adhesive member is located.

[0017] The second substrate is drilled according to the drilling position, so that the two sub-panels are separated to obtain two PCBs.

[0018] In a second aspect, a single-sided electroplating method of a PCB according to an embodiment of the present application, comprising:

[0019] Two PCB sub-panels are prepared; the surface of the PCB sub-panels is provided with a first copper layer, and the interior of the PCB sub-panels is provided with a second copper layer;

[0020] The two PCB sub-panels are adhered back to back by an adhesive member to form a third substrate;

[0021] The upper and lower surfaces of the third substrate are drilled to form blind holes in communication with the second copper layer;

[0022] The blind holes are filled and electroplated to form conductive blind holes;

[0023] Circuitry is electroplated on the surface of the conductive blind holes;

[0024] The third substrate is drilled to remove the area provided with the adhesive member, so that the two PCB sub-panels are separated to obtain two single-sided electroplated PCBs.

[0025] According to some embodiments of the present application, the PCB sub-plate comprises an inner layer core plate, the upper and lower surfaces of the inner layer core plate are provided with an insulating medium layer, the second copper layer is arranged in the insulating medium layer, and the surface of the insulating medium layer is provided with the first copper layer.

[0026] According to some embodiments of the present application, the upper and lower surfaces of the third substrate are drilled to form blind holes in communication with the second copper layer, comprising:

[0027] The surface of the third substrate is browned;

[0028] The third substrate after being browned is laser drilled to form blind holes in communication with the second copper layer.

[0029] According to some embodiments of the present application, the blind holes are filled and electroplated to form conductive blind holes, comprising:

[0030] The blind holes are deslagged, copper-deposited and flash-plated;

[0031] The blind holes after being flash-plated are filled and electroplated to form the conductive blind holes.

[0032] In a third aspect, the asymmetrically stacked PCB structure according to the embodiments of the present application is made by the construction method of the asymmetrically stacked PCB as described in the first aspect.

[0033] In a fourth aspect, the single-sided electroplated PCB plate according to the embodiments of the present application is made by the single-sided electroplating method of the PCB plate as described in the second aspect.

[0034] The asymmetrically stacked PCB and the construction method, the single-sided electroplating method and the PCB plate according to the embodiments of the present application have at least the following beneficial effects: two sub-plates are adhered back to back by the adhesive to form a first substrate, so that the two sub-plates can be simultaneously single-sided laminated on the upper and lower surfaces of the first substrate, avoiding the warping problem caused by single-sided lamination of a single sub-plate, and the production of two PCB plates can be completed at the same time, improving the production efficiency.

[0035] Additional aspects and advantages of the present application will be in part apparent and in part pointed out hereinafter. BRIEF DESCRIPTION OF DRAWINGS

[0036] The above and / or additional aspects and advantages of the present application will become apparent and be readily appreciated from the following description, including the appended drawings.

[0037] Figure 1 Flow chart of the construction method of the asymmetrically stacked PCB according to the embodiments of the present application;

[0038] Figure 2 Structure diagram of a first substrate of an embodiment of the present application;

[0039] Figure 3 Structure diagram of the first substrate after one-time pressing of both sides of the first substrate of an embodiment of the present application;

[0040] Figure 4 Structure diagram of the first substrate after two-time pressing of both sides of the first substrate of an embodiment of the present application;

[0041] Figure 5 Structure diagram of the second substrate after milling of an embodiment of the present application;

[0042] Figure 6 Structure diagram of two PCBs of an embodiment of the present application;

[0043] Figure 7 Flow chart of a single-sided electroplating method of a PCB of an embodiment of the present application;

[0044] Figure 8 Structure diagram of a third substrate of an embodiment of the present application;

[0045] Figure 9 Structure diagram of the third substrate after drilling of an embodiment of the present application;

[0046] Figure 10 Structure diagram of the blind hole after desmearing, copper deposition and flash plating of an embodiment of the present application;

[0047] Figure 11 Structure diagram of the blind hole after hole-filling electroplating and circuit electroplating of an embodiment of the present application;

[0048] Figure 12 Structure diagram of two single-sided electroplated PCBs of an embodiment of the present application;

[0049] Reference signs:

[0050] Substrate 100, adhesive 200, prepreg 300, copper foil 400, first PCB 500, second PCB 600, PCB substrate 700, inner layer core board 710, insulating dielectric layer 720, second copper layer 730, first copper layer 740, blind hole 800, flash-plated copper 810, conductive blind hole 900, circuit 1000. DETAILED DESCRIPTION

[0051] Embodiments of the present application are described below in the context of a method of manufacturing a semiconductor device. Those of ordinary skill in the art, and the attendant drawings, will readily recognize that the embodiments described herein can be applied to other types of devices and methods without departing from the scope of the present application. Accordingly, the following description is set forth in the context of a method of manufacturing a semiconductor device, but it will be appreciated that the application is applicable to other types of devices and methods as well. Embodiments of the present application are described below in detail with reference to the attached drawing figures, wherein like reference numerals identify like elements in the figures, and wherein the figures are not necessarily drawn to scale. Embodiments described below are examples for purposes of explanation and are not intended to limit the application. The steps in the following embodiments are presented in an exemplary order for ease of explanation, and no limitation is made on the order between the steps. The order of execution of the steps in the embodiments can be adapted according to the understanding of those skilled in the art.

[0052] In the description of the present application, it is to be understood that all bravity or positional relationships, such as up, down, front, back, left, right, etc., are based on the drawings shown, and are only for the purpose of facilitating the description of the present application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application.

[0053] The terms "first", "second", "third", and "fourth" and the like in the description and in the claims of the present application and the accompanying drawings are used to distinguish between similar objects, and are not necessarily used to describe a particular sequential or chronological order. Also, the terms "comprises", "comprising", "includes", "including", and the like are intended to cover a non-exclusive inclusion, such that processes, methods, articles, or apparatuses that comprise, include, or are including elements not listed are still within the scope of such processes, methods, articles, or apparatuses. The terms "comprises", "comprising", "includes", "including", and the like are used herein to mean, and are used interchangeably with, the term "including" or "comprising" and are intended to cover a non-exclusive inclusion such that a process, method, article, or apparatus that comprises, includes, or is including an element or a plurality of elements not listed is still within the scope of the process, method, article, or apparatus.

[0054] Reference in the specification to "an embodiment", "another embodiment", "an example", or "an example embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily mutually exclusive or alternative embodiments. Those skilled in the art will appreciate from the present description that embodiments described herein can be combined with other embodiments in various ways.

[0055] Due to special applications such as cavities, more and more asymmetric stacked PCBs are designed. The cavity depth is usually comparable to the thickness of SMT (Surface Mount Technology) components, which is about 0.5-1.0mm, and the PCB is usually a double-sided or low-layer PCB. In the area below the cavity, the PCB usually adopts a multi-layer, HDI (High Density Interconnect) or ELIC (Every Layer Interconnection) design to adapt to complex wiring. Warpage becomes more and more serious after each lamination on a single-sided laminated double-sided PCB. Severe warpage has a great impact on horizontal processes such as drilling, plating, dry film lamination, etching, etc.

[0056] To solve the above problems, the embodiment of the present application provides an asymmetric stacked PCB and a construction method, a single-sided plating method and a PCB board. The four sides of the upper and lower two sub-boards are bonded together by the bonding member to form a first substrate with a symmetrical structure, so that the first substrate can be double-sided pressed when the two sub-boards are single-sided pressed, solving the warpage problem in the PCB processing process. Moreover, the method can simultaneously manufacture two asymmetric stacked structure PCB boards, thereby improving production efficiency.

[0057] The asymmetric stacked PCB and the construction method, the single-sided plating method and the PCB board of the embodiment of the present application will be described in detail below with reference to the accompanying drawings.

[0058] On the one hand, as shown in Figure 1 The construction method of the asymmetric stacked PCB according to the embodiment of the present application includes but is not limited to steps S10-S40:

[0059] Step S10: preparing two sub-boards 100;

[0060] In this example, the sub-boards 100 can adopt core boards as the carrier substrate for subsequent construction of the asymmetric stacked structure PCB board. The sub-boards 100 can be double-sided boards or multi-layer boards, and the two sub-boards 100 have the same size.

[0061] Step S20: bonding the two sub-boards 100 back to back by the bonding member 200 to form a first substrate;

[0062] Specifically, as shown in Figure 2 After bonding the two sub-boards 100 back to back, a thick board, i.e. the first substrate, can be formed. At this time, the side of the two sub-boards 100 that needs to be single-sided laminated is located on the upper surface and the lower surface of the first substrate, respectively.

[0063] Step S30: A plurality of stacked structures are pressed onto the upper and lower surfaces of the first substrate to form a second substrate; the stacked structure includes a prepreg 300 and a copper foil 400 stacked together.

[0064] Specifically, such as Figure 3 and Figure 4 As shown, the second substrate can be formed by multiple laminations on the upper and lower surfaces of the first substrate according to actual needs. When the upper and lower surfaces of the first substrate are laminated once, the second substrate is as follows: Figure 3 As shown, when the upper and lower surfaces of the first substrate are laminated twice, the second substrate is as follows: Figure 4 As shown, in addition, it can also be found in Figure 4 Based on this, the pressing process continues. During each pressing, the prepreg 300 and copper foil 400 form a stacked structure. By pressing the upper and lower surfaces of the first substrate multiple times, the two sub-boards 100 can be pressed on one side multiple times. Since the two sub-boards 100 are bonded back to back, when the two sub-boards 100 are pressed on one side, the first substrate is actually pressed on both sides, which avoids the warping problem that occurs with single-side pressing.

[0065] Step S40: The second substrate is routerd to remove the area where the adhesive 200 is provided, so that the two sub-boards 100 are separated to obtain two PCB boards; both PCB boards are asymmetrical stacked structures.

[0066] Specifically, such as Figure 5 As shown, the area where the second substrate is routerd is the area circled in the box. This area is exactly where the adhesive 200 is located. By routerding the second substrate, the adhesive 200 can be removed, allowing the two sub-boards 100 to be separated, resulting in two PCB boards. Figure 6 As shown, the two PCB boards are the first PCB board 500 and the second PCB board 600, respectively. After multiple single-sided laminations, both PCB boards have an asymmetrical stacked structure.

[0067] Traditional asymmetric stacked PCBs require multiple single-sided laminations, which can lead to severe warping due to the shrinkage of the prepreg during curing. However, the asymmetric stacked PCB construction method of this application uses an adhesive 200 to bond the perimeters of two sub-boards 100 together, forming a symmetrical first substrate. This allows for double-sided lamination of the first substrate while the two sub-boards 100 are being laminated on one side, thus solving the warping problem during PCB manufacturing. Furthermore, this method can simultaneously fabricate two asymmetric stacked PCBs, improving production efficiency.

[0068] Further, in some embodiments of the present application, the step S20 of bonding the two sub-panels 100 back to back through the adhesive 200 to form the first substrate includes the following two sub-steps:

[0069] The step S21 of arranging the adhesive sheet or the prepreg around the periphery of the back surface of the two sub-panels 100;

[0070] The step S22 of bonding the two sub-panels 100 back to back through the adhesive sheet or the prepreg.

[0071] Specifically, in the present example, the adhesive 200 can be an adhesive sheet or a prepreg or the like having certain adhesion to bond the two sub-panels 100 to form the first substrate with a symmetrical structure. When bonding, only the periphery around the two sub-panels 100 is bonded, which facilitates subsequent separation of the two sub-panels 100 by removing the adhesive 200 through milling and avoids affecting the normal function of the sub-panels 100 when milling.

[0072] Further, in some embodiments of the present application, the step S30 of laminating a plurality of stack structures on the upper and lower surfaces of the first substrate to form the second substrate includes the following two sub-steps:

[0073] The step S31 of laminating the prepreg 300 and the copper foil 400 on the upper and lower surfaces of the first substrate, respectively, and laminating the first substrate, the prepreg 300 and the copper foil 400;

[0074] The step S32 of returning to the step S310 until the number of laminations reaches a preset number to obtain the second substrate.

[0075] Specifically, as shown in Figure 3 and Figure 4 , the upper and lower surfaces of the first substrate can be laminated multiple times to form the second substrate according to actual needs. When the upper and lower surfaces of the first substrate are laminated once, the second substrate is as shown in Figure 3 , when the upper and lower surfaces of the first substrate are laminated twice, the second substrate is as shown in Figure 4 , and in addition, the lamination can be continued on the basis of Figure 4 . The prepreg 300 and the copper foil 400 are placed on the upper and lower surfaces of the first substrate, respectively, to form a stack structure, and then laminated each time. By laminating the upper and lower surfaces of the first substrate multiple times, the two sub-panels 100 can be laminated on one side multiple times, and since the two sub-panels 100 are bonded back to back, laminating the two sub-panels 100 on one side is equivalent to laminating the first substrate on both sides, which can avoid the warping problem that occurs when laminating on one side.

[0076] Further, in some embodiments of the present application, the step S40 of milling the second substrate to remove the area where the adhesive 200 is arranged to separate the two sub-boards 100 and obtain two PCBs includes the following two sub-steps:

[0077] Step S41: determining the milling position according to the area where the adhesive is arranged;

[0078] Step S42: milling the second substrate according to the milling position to separate the two sub-boards 100 and obtain two PCBs.

[0079] Specifically, the milling position is determined according to the area where the adhesive is arranged to ensure that the adhesive 200 is removed when the second substrate is milled, the two sub-boards 100 are separated, and the normal function of the sub-boards 100 is not affected when milling. When milling, a numerical control milling machine is used to mill around the inner edge of the adhesive 200, and the outer frame with the adhesive 200 is milled off and removed.

[0080] According to the method for constructing the asymmetrically stacked PCBs, the four edges of the upper and lower sub-boards 100 are adhered together by the adhesive 200 to form a first substrate with a symmetrical structure, so that the first substrate can be double-sidedly laminated when the two sub-boards 100 are single-sidedly laminated, ensuring that there is no board warping problem in multiple single-sided lamination processes, and all horizontal processes can be smoothly performed, thereby solving the warping problem in the PCB processing process. Moreover, the method can simultaneously manufacture two PCBs with an asymmetrically stacked structure, thereby improving the production efficiency.

[0081] On the other hand, based on the same method, the present application also provides a single-sided electroplating method for a PCB, as shown in Figure 7 The method includes but is not limited to steps S100-S600:

[0082] Step S100: preparing two PCB sub-boards 700; the surface of the PCB sub-board 700 is provided with a first copper layer 740, and the interior of the PCB sub-board 700 is provided with a second copper layer 730;

[0083] As shown in Figure 8 The two PCB sub-boards 700 are completely identical, and the surface of the PCB sub-board 700 is provided with the first copper layer 740, which needs to be drilled later to facilitate the connection between the second copper layer 730 and external devices / circuits. Since the first copper layer 740 needs to be drilled later, the thickness of the first copper layer 740 should not be too thick.

[0084] Step S200: back-to-back adhering the two PCB sub-boards 700 by the adhesive 200 to form a third substrate;

[0085] AsFigure 8 As shown, bonding two PCB sub-boards 700 back-to-back forms a thick board, the third substrate, which facilitates simultaneous single-sided electroplating of both PCB sub-boards 700, improving production efficiency. In this example, the adhesive 200 can be an adhesive sheet or prepreg, or other adhesive material, to bond the two PCB sub-boards 700 together to form a symmetrical third substrate. During bonding, the adhesive is only applied around the perimeter of the two PCB sub-boards 700, making it easier to remove the adhesive 200 using a router to separate the two PCB sub-boards 700 and avoiding any impact on the normal function of the PCB sub-boards 700 during router installation.

[0086] Step S300: Drill holes on the upper and lower surfaces of the third substrate to form blind holes 800 that communicate with the second copper layer 730;

[0087] like Figure 9 As shown, by drilling holes on the upper and lower surfaces of the third substrate, blind vias 800 are formed, which facilitates the subsequent connection of the second copper layer 730 with external circuits / devices, thus forming a connection between the internal and external circuits.

[0088] Step S400: Fill the blind hole 800 with electroplating to form a conductive blind hole 900;

[0089] like Figure 10 and Figure 11 As shown, after the blind via 800 is filled by electroplating, it is convenient to connect the second copper layer 730 to external circuits / devices through the conductive blind via 900.

[0090] Step S500: Electroplating the line 1000 on the surface of the conductive blind via 900;

[0091] like Figure 11 As shown, after electroplating the line 1000 on the surface of the conductive blind via 900, single-sided electroplating of the two PCB sub-boards 700 is completed. The line 1000 is electrically connected to the second copper layer 730 through the conductive blind via 900.

[0092] Step S600: The third substrate is serrated to remove the area where the adhesive 200 is provided, so that the two PCB sub-boards 700 are separated to obtain two single-sided electroplated PCB boards.

[0093] like Figure 12 As shown, the area where the third substrate is routerd is precisely the area where the adhesive 200 is located. By routerging the third substrate, the adhesive 200 can be removed, allowing the two PCB sub-boards 700 to be separated, resulting in two single-sided electroplated PCB boards. During routerging, a CNC router is used to mill around the inner edge of the adhesive 200, routerting off and removing the outer frame containing the adhesive 200.

[0094] The single-sided electroplating method of the PCB plate according to the embodiments of the present application is mainly aimed at the case that the single side has high-density circuit patterns and strict circuit pattern tolerances. At this time, the thickness and uniformity of the circuit 1000 are required to be relatively high. Therefore, the copper thickness of the circuit 1000 can be controlled by the single-sided electroplating method, and the manufacturing of the single-sided high-density and high-precision pattern circuit board is realized.

[0095] Further, as shown in Figure 8 In some embodiments of the present application, each PCB sub-board 700 includes an inner layer core board 710, the upper and lower surfaces of the inner layer core board 710 are provided with an insulating medium layer 720, the insulating medium layer 720 is provided with a second copper layer 730, and the surface of the insulating medium layer 720 is provided with a first copper layer 740. It should be noted that the structure of the PCB sub-board 700 is not limited to this, and the PCB sub-board 700 can be a double-sided board or a multi-sided board. The first copper layer 740 is used for subsequent auxiliary electroplating of the circuit 1000 on the surface of the PCB sub-board 700, and the insulating medium layer 720 plays a role of supporting and protecting the second copper layer 730.

[0096] Further, in some embodiments of the present application, the step S300 of drilling the upper and lower surfaces of the third substrate to form the blind hole 800 in communication with the second copper layer 730 includes the following two sub-steps:

[0097] Step S310: Brown the surface of the third substrate;

[0098] Step S320: Laser drill the third substrate after brown to form the blind hole 800 in communication with the second copper layer 730.

[0099] Specifically, before laser drilling, the surface of the third substrate is browned first. The brown process can form a uniform honeycomb microstructure on the surface of the copper, which significantly increases the surface area of the copper surface. This rough and increased surface area can more effectively absorb laser energy, providing the necessary physical basis for subsequent high-quality laser drilling. Moreover, the honeycomb structure that optimizes the absorption of laser energy directly promotes the improvement of the laser drilling effect, which helps to form a hole with smaller aperture, more uniform aperture and higher circularity, thereby significantly improving the drilling yield.

[0100] Further, in some embodiments of the present application, the step S400 of filling the hole electroplating of the blind hole 800 to form the conductive blind hole 900 includes the following two sub-steps:

[0101] Step S410: Remove the glue dregs, deposit copper and flash plating of the blind hole 800;

[0102] Step S420: Fill the hole electroplating of the blind hole 800 after flash plating to form the conductive blind hole 900.

[0103] Specifically, by removing the sludge from the blind hole 800, mainly to thoroughly remove the impurity residues generated by drilling, to avoid affecting the subsequent electroplating effect; the role of copper deposition is to form an initial conductive layer on the insulating hole wall of the blind hole 800, as the basis for subsequent electroplating; and flash plating is used to thicken the copper layer, thereby increasing the electroplating reliability. As shown in Figure 9 After flash plating is performed on the blind hole 800, a flash plated copper layer 810 is formed on the inner wall of the blind hole 800. Finally, the blind hole 800 is filled with electroplating to form a conductive blind hole 900, and a circuit 1000 is formed on the surface of the conductive blind hole 900.

[0104] According to the single-sided electroplating method of the PCB plate of the embodiment of the present application, the thickness and uniformity of the circuit 1000 are required to be relatively high in the case of a single-sided high-density circuit pattern and strict circuit pattern tolerance. Therefore, the copper thickness of the circuit 1000 can be controlled by the single-sided electroplating method to realize the manufacturing of a single-sided high-density and high-precision pattern circuit board.

[0105] On the other hand, the embodiment of the present application also provides an asymmetric stacked PCB structure, which is manufactured by the construction method of the asymmetric stacked PCB described in the above aspect embodiment. The asymmetric stacked PCB structure is as shown in Figure 6 .

[0106] On the other hand, the embodiment of the present application also provides a single-sided electroplated PCB plate, which is manufactured by the single-sided electroplating method of the PCB plate described in the above aspect embodiment. The single-sided electroplated PCB plate is as shown in Figure 12 .

[0107] On the other hand, the embodiment of the present application also provides a storage medium, which is a computer readable storage medium, and the storage medium stores a computer program. When the computer program is executed by a processor, the construction method of the asymmetric stacked PCB or the single-sided electroplating method of the PCB plate described above is realized.

[0108] Memory, as used in the foregoing description, is a non-transitory computer- readable storage medium used for storage of non-transitory software programs and non- transitory computer-executable programs. In addition, memory can include a high-speed random access memory, and can also include a non-transitory memory such as at least one disk memory device, a flash memory device, or other non-transitory solid-state memory device. In some embodiments, memory can optionally include memory that is remotely located from the processor, which can be connected to the processor through a network. Examples of the network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof. The above-described device embodiments are merely illustrative, in which the units described as separate units can or can not be physically separated, and can be implemented in one location, or can be distributed over a plurality of network units. Some or all of the modules can be selected according to actual needs to achieve the purposes of the present embodiment.

[0109] Although specific embodiments have been described herein, those of ordinary skill in the art will appreciate a variety of other modifications or alternative embodiments that are within the scope of the present disclosure. For example, any of the functions and / or processes described with respect to a particular device or component can be performed by any other device or component. In addition, while a variety of specific example implementations and architectures have been described herein, those of ordinary skill in the art will appreciate a variety of other modifications to the example implementations and architectures described herein that are within the scope of the present disclosure.

[0110] Certain aspects of the present disclosure are described above with reference to block and flow diagrams of systems, methods, apparatuses, and / or computer program products according to example embodiments. It will be understood that one or more blocks of the block diagrams and flow diagrams, and combinations of blocks in the block diagrams and flow diagrams, can be implemented by

[0111] Thus, the blocks in the block diagrams and flow diagrams support combinations of means for performing the specified functions, combinations of elements or steps for performing the specified functions, and program instruction means for performing the specified functions. It will also be understood that each block of the block diagrams and flow diagrams, and combinations of blocks in the block diagrams and flow diagrams, can be implemented by dedicated hardware-based computer systems which perform the specified functions or combinations of special-purpose hardware and computer instructions.

[0112] The program modules, applications, and the like described herein can include one or more software components, including, for example, software objects, methods, data structures, and the like. Each such software component can include computer-executable instructions that, in response to execution by a computer, cause at least a portion of the functionality described herein (e.g., one or more operations of the example methods described herein) to be performed.

[0113] Software components can be encoded in any of a variety of programming languages. One example programming language can be a low-level programming language, such as an assembly language associated with a particular hardware architecture and / or operating system platform. Software components that include assembly language instructions can need to be translated by an assembler into executable machine code before execution by the hardware architecture and / or platform. Another example programming language can be a higher-level programming language that can be portable across multiple architectures. Software components that include a higher-level programming language can need to be translated by an interpreter or compiler into an intermediate representation before execution. Other examples of programming languages include, but are not limited to, a macro language, a shell or command language, a job control language, a script language, a database query or search language, or a report writing language. In one or more example embodiments, a software component that includes instructions in one of the above examples of programming languages can be executed directly by an operating system or other software component without first being translated into another form.

[0114] Software components can be stored as files or other data storage constructs. Software components of a similar type or related function can be stored together in a particular directory, folder, or library. Software components can be static (e.g., preset or fixed) or dynamic (e.g., created or modified at execution time).

[0115] The above embodiments of the present application have been described in detail but not limited to the above examples, within the scope of knowledge of those skilled in the art, various changes can be made without departing from the spirit of the present application.

Claims

1. A method for constructing an asymmetric stacked PCB, characterized in that, Includes the following steps: Prepare two daughterboards; The two sub-boards are bonded back-to-back using an adhesive to form a first substrate. A plurality of stacked structures are laminated on the upper and lower surfaces of the first substrate to form a second substrate; the stacked structures include a prepreg and copper foil stacked together. The second substrate is serrated to remove the area where the adhesive is provided, thereby separating the two sub-boards and obtaining two PCB boards; both PCB boards are asymmetrical stacked structures.

2. The method for constructing an asymmetric stacked PCB according to claim 1, characterized in that, The two sub-boards are bonded back-to-back using an adhesive to form a first substrate, comprising: Adhesive sheets or semi-cured sheets are provided around the back of the two sub-boards; The two sub-boards are bonded back-to-back using the adhesive sheet or the prepreg.

3. The method for constructing an asymmetric stacked PCB according to claim 1, characterized in that, A second substrate is formed by laminating several stacked structures onto the upper and lower surfaces of the first substrate, including: A prepreg and a copper foil are sequentially stacked on the upper and lower surfaces of the first substrate, respectively, and the first substrate, the prepreg, and the copper foil are pressed together. Returning to the step of sequentially stacking a prepreg and a copper foil on the upper and lower surfaces of the first substrate, and pressing the first substrate, the prepreg, and the copper foil together until the preset number of pressing times is reached, the second substrate is obtained.

4. The method for constructing an asymmetric stacked PCB according to claim 2, characterized in that, The second substrate is routerd to remove the area where the adhesive is provided, thereby separating the two sub-boards to obtain two PCB boards, including: Determine the position of the grommets based on the area where the adhesive is located; Based on the location of the router, the second substrate is routerted to separate the two sub-boards and obtain two PCB boards.

5. A single-sided electroplating method for a PCB board, characterized in that, include: Prepare two PCB daughter boards; A first copper layer is provided on the surface of the PCB sub-board, and a second copper layer is provided inside the PCB sub-board; The two PCB sub-boards are bonded back-to-back using an adhesive to form a third substrate. Drill holes on the upper and lower surfaces of the third substrate to form blind holes that communicate with the second copper layer; The blind vias are filled by electroplating to form conductive blind vias; Electroplating of lines on the surface of the conductive blind hole; The third substrate is serrated to remove the area where the adhesive is provided, thereby separating the two PCB sub-boards and obtaining two single-sided electroplated PCB boards.

6. The single-sided electroplating method for a PCB board according to claim 5, characterized in that, The PCB sub-board includes an inner core board, and an insulating dielectric layer is provided on both the upper and lower surfaces of the inner core board. A second copper layer is provided inside the insulating dielectric layer, and a first copper layer is provided on the surface of the insulating dielectric layer.

7. The single-sided electroplating method for a PCB board according to claim 5, characterized in that, Drilling holes on the upper and lower surfaces of the third substrate to form blind vias communicating with the second copper layer includes: The surface of the third substrate is browned; Laser drilling is performed on the browned third substrate to form blind holes that communicate with the second copper layer.

8. The single-sided electroplating method for a PCB board according to claim 7, characterized in that, The blind via is filled by electroplating to form a conductive blind via, including: The blind vias are subjected to descaling, copper plating, and flash plating. The blind vias after flash plating are then filled with electroplating to form the conductive blind vias.

9. An asymmetric stacked PCB structure, characterized in that, It is manufactured using the construction method of the asymmetric stacked PCB as described in any one of claims 1-4.

10. A single-sided electroplated PCB board, characterized in that, It is manufactured by the single-sided electroplating method of the PCB board as described in any one of claims 5-8.

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