Preparation method of solar cell and solar cell

Abstract

The invention provides a solar cell and a preparation method thereof. The preparation method of the solar cell comprises the following steps: providing a cell substrate, and preparing a conductive diffusion barrier layer on the cell substrate by adopting a first sputtering target material; and adopting a second sputtering target material to sputter and deposit a seed metal layer on the diffusion barrier layer, and in the process of sputter and deposition of the seed metal layer, controlling the first sputtering target material and enabling the first sputtering target material to be gradually close to the cell substrate along with the increase of the thickness of the seed metal layer. According to the preparation method, the passivation damage of the cell substrate can be improved and the conversion efficiency of the solar cell can be ensured while the good quality of the seed metal layer subjected to sputtering deposition is ensured.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of photovoltaic technology, and in particular to a solar cell and a preparation method thereof. BACKGROUND

[0002] In addition to the semiconductor structure for receiving light and generating carriers, electrodes for guiding the photo-generated carriers out of the solar cell to the external circuit are also needed. The electrodes in the conventional technology are usually silver electrodes, which are formed by using conductive silver paste as raw material and through processes such as screen printing and curing sintering. The material cost of the conductive silver paste accounts for a high proportion in the overall production cost of the solar cell.

[0003] The use of other metal materials such as copper to prepare electrodes can significantly reduce the material cost of the electrodes. Unlike silver electrodes, the process of using other metal materials to prepare electrodes usually includes the preparation of a seed layer by magnetron sputtering. In actual preparation processes, the sputtering particles generated by magnetron sputtering have a large kinetic energy and will impact the substrate. The continuous deposition of sputtering particles will cause the heating and bond breaking of the substrate surface, affecting the original passivation effect and leading to the deterioration of the performance of the solar cell. SUMMARY

[0004] Therefore, it is necessary to provide a solar cell capable of guaranteeing the quality of the sputtered seed metal layer while improving the cell efficiency.

[0005] According to some embodiments of the present application, a preparation method of a solar cell is provided, which comprises the following steps:

[0006] providing a cell substrate, and preparing a conductive diffusion barrier layer on the cell substrate by using a first sputtering target material;

[0007] sputtering and depositing a seed metal layer on the diffusion barrier layer by using a second sputtering target material, and controlling the second sputtering target material to gradually approach the cell substrate as the thickness of the seed metal layer increases during the sputtering and deposition of the seed metal layer.

[0008] In some embodiments of the present application, the step of sputtering and depositing the seed metal layer comprises sequentially depositing a plurality of metal sub-layers, and the distance between the second sputtering target material and the cell substrate is smaller during the deposition process of the subsequent metal sub-layer than during the deposition process of the previous metal sub-layer.

[0009] In some embodiments of the present application, the maximum distance between the second sputtering target material and the cell substrate is ≤90mm, and the minimum distance between the second sputtering target material and the cell substrate is ≥60mm during the sputtering and deposition of the seed metal layer.

[0010] In some embodiments of the present disclosure, the step of sputter depositing the seed metal layer comprises sequentially depositing a first metal sub-layer, a second metal sub-layer, and a third metal sub-layer; wherein,

[0011] In the process of depositing the first metal sub-layer, the distance between the second sputter target and the battery substrate is 80mm-90mm;

[0012] In the process of depositing the second metal sub-layer, the distance between the second sputter target and the battery substrate is 70mm-80mm;

[0013] In the process of depositing the third metal sub-layer, the distance between the second sputter target and the battery substrate is 60mm-70mm.

[0014] In some embodiments of the present disclosure, in the process of sputter depositing the diffusion barrier layer, the first sputter target is controlled to gradually approach the battery substrate as the thickness of the diffusion barrier layer increases.

[0015] In some embodiments of the present disclosure, the step of sputter depositing the diffusion barrier layer and the step of sputter depositing the seed metal layer are performed in the same sputter chamber, and the distance between the second sputter target and the battery substrate is smaller than the distance between the first sputter target and the battery substrate.

[0016] In some embodiments of the present disclosure, the step of sputter depositing the diffusion barrier layer comprises sequentially depositing a plurality of barrier sub-layers, and the distance between the first sputter target and the battery substrate in the deposition process of a barrier sub-layer is smaller than that in the deposition process of a preceding barrier sub-layer.

[0017] In some embodiments of the present disclosure, the step of sputter depositing the diffusion barrier layer comprises sequentially depositing a first barrier sub-layer, a second barrier sub-layer, and a third barrier sub-layer; wherein,

[0018] In the process of depositing the first barrier sub-layer, the distance between the first sputter target and the battery substrate is 110mm-120mm;

[0019] In the process of depositing the second barrier sub-layer, the distance between the first sputter target and the battery substrate is 100mm-110mm;

[0020] In the process of depositing the third barrier sub-layer, the distance between the first sputter target and the battery substrate is 90mm-100mm.

[0021] In some embodiments of the present disclosure, in the process of sputter depositing the diffusion barrier layer, the sputter power density is controlled to be 2W / cm 28 W / cm 2 controlling the gas pressure in the sputtering chamber to be 0.3 Pa to 0.5 Pa; and / or,

[0022] controlling the sputtering power density to be 2 W / cm 2 8 W / cm 2 controlling the gas pressure in the sputtering chamber to be 0.3 Pa to 0.5 Pa.

[0023] In some embodiments of the present disclosure, further comprising the steps of:

[0024] preparing a patterned mask layer on the seed metal layer; and,

[0025] electrodepositing an electrode metal layer on the seed metal layer exposed in the openings of the mask layer.

[0026] Further, the present disclosure also provides a solar cell, comprising:

[0027] a cell substrate;

[0028] a diffusion barrier layer disposed on the cell substrate, and the diffusion barrier layer being electrically conductive; and,

[0029] a seed metal layer, along a direction away from the cell substrate, the density of the seed metal layer gradually increases.

[0030] In some embodiments of the present disclosure, the seed metal layer comprises a plurality of metal sub-layers sequentially stacked on the cell substrate, and the density of the metal sub-layer closer to the cell substrate is less than the density of the metal sub-layer farther from the cell substrate.

[0031] In some embodiments of the present disclosure, the seed metal layer comprises a first metal sub-layer, a second metal sub-layer and a third metal sub-layer sequentially stacked on the cell substrate; wherein,

[0032] the thickness of the first metal sub-layer is 50 nm to 100 nm; and / or,

[0033] the thickness of the second metal sub-layer is 50 nm to 100 nm; and / or,

[0034] the thickness of the third metal sub-layer is 50 nm to 100 nm.

[0035] In some embodiments of the present disclosure, along a direction away from the cell substrate, the density of the diffusion barrier layer gradually increases.

[0036] In some embodiments of the present disclosure, the diffusion barrier layer comprises a plurality of barrier sub-layers sequentially stacked on the battery substrate, the density of the barrier sub-layer closer to the battery substrate is less than the density of the barrier sub-layer farther from the battery substrate.

[0037] In some embodiments of the present disclosure, the diffusion barrier layer comprises a first barrier sub-layer, a second barrier sub-layer and a third barrier sub-layer sequentially stacked on the battery substrate; wherein,

[0038] the thickness of the first barrier sub-layer is 50nm-100nm; and / or,

[0039] the thickness of the second barrier sub-layer is 50nm-100nm; and / or,

[0040] the thickness of the third barrier sub-layer is 50nm-100nm.

[0041] In some embodiments of the present disclosure, the thickness of the diffusion barrier layer is 10nm-30nm; and / or,

[0042] the thickness of the seed metal layer is 100nm-400nm.

[0043] In some embodiments of the present disclosure, further comprising an electrode metal layer, the electrode metal layer is stacked on the side of the seed metal layer away from the battery substrate.

[0044] In some embodiments of the present disclosure, the electrode metal layer comprises a copper metal layer and a tin metal layer sequentially stacked on the seed metal layer.

[0045] In some embodiments of the present disclosure, the battery substrate comprises a semiconductor substrate, a first dielectric layer, a first doped layer, a second dielectric layer and a second doped layer, the doping type of the first doped layer and the second doped layer is opposite;

[0046] the first dielectric layer and the first doped layer are sequentially stacked on the back surface of the semiconductor substrate, the second dielectric layer and the second doped layer are sequentially stacked on the back surface of the semiconductor substrate, the diffusion barrier layer has a plurality of diffusion barrier layers, part of the diffusion barrier layers are electrically connected to the first doped layer, and the other part of the diffusion barrier layers are electrically connected to the second doped layer.

[0047] In some embodiments of the present disclosure, the material of the diffusion barrier layer comprises one or more of nickel, chromium, tungsten, titanium, nickel-chromium alloy, nickel-tungsten alloy, titanium-tungsten alloy and nickel-tungsten alloy; and / or,

[0048] the material of the seed metal layer comprises copper.

[0049] The preparation method of the solar cell of the present disclosure comprises the following steps: firstly, a conductive diffusion barrier layer is prepared on the cell substrate, which is used to block the material of the seed metal layer deposited by subsequent sputtering; and then, the first sputtering target is gradually moved close to the cell substrate during the deposition of the seed metal layer by subsequent sputtering. As the target is far away from the cell substrate during the initial sputtering of the seed metal layer, the bombardment of the sputtered particles on the cell substrate is weak, and the passivation damage of the seed metal layer formed by the initial sputtering to the cell substrate is relatively small due to the blocking effect of the diffusion barrier layer. As the seed metal layer thickens, the passivation damage of the seed metal layer to the cell substrate gradually decreases, and the target is gradually moved close to the cell substrate at this time, which can ensure that the deposition rate of the whole seed metal layer is fast, and the seed metal layer deposited later is more dense and has greater adhesion. The preparation method can improve the passivation damage of the cell substrate while ensuring that the seed metal layer deposited by sputtering has good quality, thereby improving the conversion efficiency of the solar cell.

[0050] The above description is only a summary of the technical solutions of the present application. In order to more clearly understand the technical means of the present application, and to implement the content of the description, the following will describe the preferred embodiments of the present application in detail with the help of the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0051] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and other drawings of other embodiments can also be obtained by those skilled in the art without any creative labor on the basis of these drawings.

[0052] Figure 1 The structure diagram of a solar cell preparation method of the present disclosure;

[0053] Figure 2 The structure diagram of a cell substrate provided by the present disclosure;

[0054] Figure 3 The structure diagram of a solar cell preparation method of the present disclosure; Figure 2 The structure diagram of a solar cell preparation method of the present disclosure;

[0055] Figure 4 The structure diagram of a solar cell preparation method of the present disclosure; Figure 3 The structure diagram of a solar cell preparation method of the present disclosure;

[0056] Figure 5 The structure diagram of a solar cell preparation method of the present disclosure; Figure 4 The structure diagram of a solar cell preparation method of the present disclosure;

[0057] Figure 6A schematic diagram of a structure of a solar cell.

[0058] Wherein, each reference sign and its meaning are as follows:

[0059] 100, semiconductor substrate; 111, first dielectric layer; 112, first doped layer; 121, second dielectric layer; 122, second doped layer; 130, surface functional layer; 210, diffusion barrier layer; 211, first barrier sub-layer; 212, second barrier sub-layer; 213, third barrier sub-layer; 220, seed metal layer; 221, first metal sub-layer; 222, second metal sub-layer; 223, third metal sub-layer; 230, electrode metal layer; 231, copper metal layer; 232, tin metal layer; 240, mask layer. DETAILED DESCRIPTION

[0060] For the purpose of the present document, a more complete description of the present document will be presented. Preferred embodiments of the present document are presented herein. However, the present document can be realized in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this document will be thorough and complete.

[0061] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this document belongs. The terminology used in the description of the present document herein is used only to describe specific embodiments of the present document and is not intended to be limiting of the present document.

[0062] It should be understood that when an element or layer is referred to as being "on", "adjacent", "connected to", or "coupled to" another element or layer, it can be directly on, adjacent, connected or coupled to the other element or layer, or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on", "directly adjacent", "directly connected to", or "directly coupled to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section.

[0063] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. For example, if a device in the figures is inverted, then a dependent element or feature described as "below" or "beneath" another element or feature would then be oriented "above" and "over" the other element or feature. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device can be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatial description terminology will be interpreted accordingly.

[0064] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0065] Some conventional techniques employ reducing sputtering power density to achieve the purpose of reducing substrate damage. However, in actual sputtering process, with the reduction of power density, the deposited seed layer also has the problems of sputtering rate reduction, film layer loosening and poor adhesion, affecting the quality of the deposited seed layer.

[0066] The present disclosure provides a method for preparing a solar cell, which comprises the following steps: providing a cell substrate, preparing a conductive diffusion barrier layer on the cell substrate by using a first sputtering target material; and sputtering depositing a seed metal layer on the diffusion barrier layer by using a second sputtering target material, wherein during the sputtering deposition of the seed metal layer, the second target material is controlled to gradually approach the cell substrate as the thickness of the seed metal layer increases.

[0067] In the solar cell fabrication method disclosed herein, a conductive diffusion barrier layer is first prepared on the cell substrate. This diffusion barrier layer is used to block the material of the seed metal layer subsequently sputtered and deposited. During the subsequent sputtering deposition of the seed metal layer, the second sputtering target is controlled to gradually approach the cell substrate. Therefore, when the target is initially sputtered to the seed metal layer, it is farther from the cell substrate, resulting in weaker bombardment of the cell substrate by sputtered particles. Combined with the blocking effect of the diffusion barrier layer, this ensures that the passivation damage to the cell substrate caused by the initially sputtered seed metal layer is relatively small. As the seed metal layer thickens, the passivation damage to the cell substrate caused by the subsequently sputtered seed metal layer gradually decreases. Controlling the target to gradually approach the cell substrate at this point ensures a faster overall deposition rate of the seed metal layer and also makes the subsequently deposited seed metal layer denser and with stronger adhesion. This fabrication method can improve the passivation damage of the cell substrate while ensuring good quality of the sputtered seed metal layer, thus guaranteeing the conversion efficiency of the solar cell.

[0068] Figure 1 This is a schematic diagram illustrating the steps of a method for fabricating a solar cell according to this disclosure. (Refer to...) Figure 1 As shown, the method for preparing this solar cell includes steps S1 to S4, as detailed below.

[0069] Step S1: Provide a battery substrate.

[0070] Figure 2 This is a schematic diagram of the structure of a battery substrate provided in this disclosure. (Refer to...) Figure 2 As shown, the battery substrate includes a semiconductor substrate 100, a first dielectric layer 111, a first doped layer 112, a second dielectric layer 121, and a second doped layer 122. The doping types of the first doped layer 112 and the second doped layer 122 are opposite. The first dielectric layer 111 and the first doped layer 112 are sequentially stacked on the back side of the semiconductor substrate 100, and the second dielectric layer 121 and the second doped layer 122 are sequentially stacked on the back side of the semiconductor substrate 100. There are multiple diffusion barrier layers 210, some of which are in electrical contact with the first doped layer 112, and the remaining portions of which are in electrical contact with the second doped layer 122.

[0071] In this embodiment, the semiconductor substrate 100 is used as a growth substrate for the first dielectric layer 111 and the first doped layer 112, and is used to form the main structure for generating photogenerated carriers.

[0072] As some examples of this embodiment, the material of the semiconductor substrate 100 may be silicon.

[0073] It can be appreciated that the first dielectric layer 111 is configured to space the first doped layer 112 and the semiconductor substrate 100, and the first dielectric layer 111 is configured to allow the carriers to tunnel through. The second dielectric layer 121 is configured to space the second doped layer 122 and the semiconductor substrate 100, and the second dielectric layer 121 is configured to allow the carriers to tunnel through.

[0074] As some examples of this embodiment, the material of the first dielectric layer 111 includes one or more of silicon oxide and aluminum oxide.

[0075] As some examples of this embodiment, the thickness of the first dielectric layer 111 is 0.5 nm to 3 nm.

[0076] As some examples of this embodiment, the material of the second dielectric layer 121 includes one or more of silicon oxide and aluminum oxide.

[0077] As some examples of this embodiment, the thickness of the second dielectric layer 121 is 0.5 nm to 3 nm.

[0078] As some examples of this embodiment, the material of the first doped layer 112 includes doped polysilicon. For example, the material of the first doped layer 112 is N-type doped polysilicon. The doping element in the first doped layer 112 is selected from phosphorus.

[0079] As some examples of this embodiment, the material of the second doped layer 122 includes doped polysilicon. For example, the material of the second doped layer 122 is P-type doped polysilicon. The doping element in the second doped layer 122 is selected from boron.

[0080] Referring to FIG. 1A, Figure 2 As some examples of this embodiment, the first doped layer 112 and the second doped layer 122 are spaced apart to avoid the carriers to recombine at the interface between the two.

[0081] Referring to FIG. 1A, Figure 2 As some examples of this embodiment, the battery substrate can further include a surface functional layer 130, which is stacked on the side of the first doped layer 112 and the second doped layer 122 away from the semiconductor substrate 100. The surface functional layer 130 includes one or more of a passivation film and an anti-reflective film.

[0082] In this example, the material of the surface functional layer 130 can include one or more of silicon nitride and silicon oxynitride.

[0083] Further, referring to FIG. 1A, Figure 2As shown, the surface functional layer 130 has a plurality of electrode openings, some of which are disposed on the first doped layer 112 and some of which are disposed on the second doped layer 122 to expose the first doped layer 112 and the second doped layer 122. It can be understood that the electrode openings are used for subsequent deposition of the diffusion barrier layer 210 and the seed metal layer 220.

[0084] As some examples of this embodiment, the battery substrate can be purchased from the market or prepared by known feasible techniques. Details are not described herein.

[0085] At step S2, the first sputtering target is used to prepare the conductive diffusion barrier layer 210 on the battery substrate.

[0086] Figure 3 To prepare the conductive diffusion barrier layer 210 on the basis of the structure shown in Figure 2 The structure shown in FIG. 2 is a schematic diagram of the preparation of the conductive diffusion barrier layer 210. Details are described with reference to Figure 3 As shown, the diffusion barrier layer 210 is prepared in the electrode openings and contacts the first doped layer 112 and the second doped layer 122.

[0087] As some examples of this embodiment, during the sputtering deposition of the diffusion barrier layer 210, the first sputtering target is controlled to gradually approach the battery substrate as the thickness of the diffusion barrier layer 210 increases.

[0088] It can be understood that, during the sputtering process, the first sputtering target can continuously approach the battery substrate as the sputtering process proceeds. Alternatively, the first sputtering target can intermittently approach the battery substrate as the sputtering process proceeds. By controlling the second sputtering target to gradually approach the battery substrate during the sputtering process, the damage to the battery substrate caused by the initial sputtering deposition of the material can be reduced, and the subsequently deposited diffusion barrier layer 210 is denser, thereby reducing the damage to the battery substrate caused by the sputtering process while achieving a better barrier effect.

[0089] As some examples of this embodiment, the step of sputtering deposition of the diffusion barrier layer 210 includes sequentially depositing a plurality of barrier sub-layers, and the distance between the first sputtering target and the battery substrate during the deposition process of a barrier sub-layer is smaller than that during the deposition process of a previous barrier sub-layer. It can be understood that, during the sputtering deposition of a single barrier sub-layer, the distance between the first sputtering target and the battery substrate can remain constant.

[0090] As some examples of this embodiment, the material of the first sputtering target can include one or more of nickel, chromium, tungsten, titanium, nickel-chromium alloy, nickel-tungsten alloy, titanium-tungsten alloy, and nickel-tungsten alloy. It can be understood that the material of the diffusion barrier layer 210 can be the same as the material of the first sputtering target.

[0091] As some examples of this embodiment, during the sputtering deposition of the seed metal layer 220, the maximum spacing between the first sputtering target and the battery substrate is ≤120mm, and the minimum spacing between the first sputtering target and the battery substrate is ≥90mm.

[0092] Furthermore, referring to Figure 3 As shown, the diffusion barrier layer 210 in this embodiment includes a first barrier sublayer 211, a second barrier sublayer 212, and a third barrier sublayer 213. Accordingly, the sputtering deposition of the diffusion barrier layer 210 includes: sequentially depositing the first barrier sublayer 211, the second barrier sublayer 212, and the third barrier sublayer 213. Specifically, when depositing the first barrier sublayer 211, the distance between the first sputtering target and the battery substrate is 110mm~120mm. When depositing the second barrier sublayer 212, the distance between the first sputtering target and the battery substrate is 100mm~110mm. When depositing the third barrier sublayer 213, the distance between the first sputtering target and the battery substrate is 90mm~100mm. By setting these distances, the physical properties of the first barrier sublayer 211, the second barrier sublayer 212, and the third barrier sublayer 213 can be better continuous, ensuring a more uniform overall texture of the diffusion barrier layer 210 and good adhesion between them.

[0093] As some examples of this embodiment, when depositing the first barrier sublayer 211, the spacing between the first sputtering target and the battery substrate can be 110mm, 111mm, 112mm, 113mm, 114mm, 115mm, 116mm, 117mm, 118mm, 119mm, or 120mm, or the spacing between the first sputtering target and the battery substrate can be within any two of the above spacings.

[0094] As some examples of this embodiment, when depositing the second barrier sublayer 212, the spacing between the first sputtering target and the battery substrate can be 100mm, 101mm, 102mm, 103mm, 104mm, 105mm, 106mm, 107mm, 108mm, 109mm, or 110mm, or the spacing between the first sputtering target and the battery substrate can be within any two of the above spacings.

[0095] As some examples of this embodiment, when depositing the third barrier sublayer 213, the spacing between the first sputtering target and the battery substrate can be 90mm, 91mm, 92mm, 93mm, 94mm, 95mm, 96mm, 97mm, 98mm, 99mm, or 100mm, or the spacing between the first sputtering target and the battery substrate can be within any two of the above spacings.

[0096] As some examples of this embodiment, during sputter deposition of the diffusion barrier layer 210, the sputter power density is controlled to be 2 W / cm 2 8 W / cm 2 For example, the sputter power density can be controlled to be 2 W / cm 2 , 3 W / cm 2 , 4 W / cm 2 , 5 W / cm 2 , 6 W / cm 2 , 7 W / cm 2 , 8 W / cm 2 , or the sputter power density can also be controlled to be within a range between any two of the above. This can ensure a suitable deposition rate during sputter deposition of the diffusion barrier layer 210, so as to form a diffusion barrier layer 210 with high deposition efficiency and good quality.

[0097] As some examples of this embodiment, during sputter deposition of the diffusion barrier layer 210, the pressure in the sputter chamber is controlled to be 0.3 Pa to 0.5 Pa. For example, the pressure in the sputter chamber can be controlled to be 0.3 Pa, 0.35 Pa, 0.4 Pa, 0.45 Pa, or 0.5 Pa, or the pressure in the sputter chamber can also be within a range between any two of the above. This can reduce the interference of gas atoms on the sputter process, and ensure that the diffusion barrier layer 210 formed is more uniform and dense.

[0098] As some examples of this embodiment, during sputter deposition of the diffusion barrier layer 210, a protective gas, such as argon, is introduced into the sputter chamber. Further, the flow rate of the protective gas introduced can be 500 seem to 1000 seem.

[0099] As some examples of this embodiment, during sputter deposition of the diffusion barrier layer 210, the temperature of the battery substrate is controlled to be <200°C.

[0100] It can be understood that the first barrier sub-layer 211, the second barrier sub-layer 212, and the third barrier sub-layer 213 can all be deposited under the above-mentioned sputter power density conditions and sputter chamber pressure conditions. Further, during sputter deposition of the first barrier sub-layer 211, the second barrier sub-layer 212, and the third barrier sub-layer 213, the sputter power density can be kept constant, and the pressure in the sputter chamber can be kept constant.

[0101] As some examples of this embodiment, the thickness of the first barrier sub-layer 211 can be 5 nm to 10 nm. For example, the thickness of the first barrier sub-layer 211 can be 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, or 10 nm, or the thickness of the first barrier sub-layer 211 can also be within a range between any two of the above.

[0102] As some examples of this embodiment, the thickness of the second barrier sub-layer 212 can be 5nm~10nm. For example, the thickness of the second barrier sub-layer 212 can be 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, or the thickness of the second barrier sub-layer 212 can also be between any two of the above thicknesses.

[0103] As some examples of this embodiment, the thickness of the third barrier sub-layer 213 can be 5nm~10nm. For example, the thickness of the third barrier sub-layer 213 can be 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, or the thickness of the third barrier sub-layer 213 can also be between any two of the above thicknesses.

[0104] It can be understood that the deposition time of each barrier sub-layer can be selected according to its thickness and actual deposition process.

[0105] As some examples of this embodiment, the thickness of the diffusion barrier layer 210 as a whole can be 10nm~30nm. To ensure that the diffusion barrier layer 210 as a whole has good barrier performance, and to reduce the negative impact of the diffusion barrier layer 210 on the conductivity and adhesion of the overall electrode structure as much as possible.

[0106] Step S3, using a second sputtering target to sputter and deposit a seed metal layer 220 on the diffusion barrier layer 210.

[0107] Figure 4 To sputter and deposit the seed metal layer 220 on the basis of the structure shown in Figure 3 As shown in FIG. 2B, the seed metal layer 220 is prepared on the side of the diffusion barrier layer 210 away from the battery substrate. Figure 4

[0108] In this embodiment, during the sputtering and deposition of the seed metal layer 220, the second sputtering target is controlled and gradually approaches the battery substrate as the thickness of the seed metal layer 220 increases. It can be understood that during the sputtering process, the second sputtering target and the battery substrate can continuously approach each other as the sputtering process proceeds. Alternatively, it can also approach intermittently as the sputtering process proceeds.

[0109] As some examples of this embodiment, the steps of sputtering and depositing the diffusion barrier layer 210 and the steps of sputtering and depositing the seed metal layer 220 are carried out in the same sputtering chamber, and the distance between the second sputtering target and the battery substrate is less than the distance between the first sputtering target and the battery substrate. This can reduce the damage caused by sputtering and depositing the seed metal layer 220 while allowing the seed metal layer 220 to have a more appropriate and higher quality.

[0110] ​As examples of this embodiment, the step of sputtering and depositing the seed metal layer 220 includes: sequentially depositing multiple metal sublayers, wherein the spacing between the second sputtering target and the battery substrate is smaller in the subsequent metal sublayer deposition process compared to the earlier metal sublayer deposition process. It can be understood that the spacing between the second sputtering target and the battery substrate can remain constant during the sputtering of a single metal sublayer.

[0111] As some examples of this embodiment, the material of the second sputtering target may include a metallic material, such as copper. It is understood that the material of the seed metal layer 220 may be the same as the material of the second sputtering target.

[0112] As some examples of this embodiment, during the sputtering deposition of the seed metal layer 220, the maximum spacing between the second sputtering target and the battery substrate is ≤90mm, and the minimum spacing between the second sputtering target and the battery substrate is ≥60mm.

[0113] Reference Figure 4 As shown, as examples of this embodiment, the seed metal layer 220 includes a first metal sublayer 221, a second metal sublayer 222, and a third metal sublayer 223 stacked sequentially. Accordingly, the step of sputtering and depositing the seed metal layer 220 includes: sequentially depositing the first metal sublayer 221, the second metal sublayer 222, and the third metal sublayer 223. Specifically, when depositing the first metal sublayer 221, the spacing between the second sputtering target and the battery substrate is 80mm~90mm. When depositing the second metal sublayer 222, the spacing between the second sputtering target and the battery substrate is 70mm~80mm. When depositing the third metal sublayer 223, the spacing between the second sputtering target and the battery substrate is 60mm~70mm. By setting the above spacing, the physical properties of the first metal sublayer 221, the second metal sublayer 222, and the third metal sublayer 223 can be better continuous, ensuring a more uniform overall texture of the seed metal layer 220 and good adhesion between them.

[0114] As some examples of this embodiment, when depositing the first metal sublayer 221, the spacing between the second sputtering target and the battery substrate can be 80mm, 81mm, 82mm, 83mm, 84mm, 85mm, 86mm, 87mm, 88mm, 89mm, or 90mm, or the spacing between the first sputtering target and the battery substrate can be within any two of the above spacings.

[0115] As some examples of this embodiment, the distance between the second sputtering target and the battery substrate during deposition of the second metal sub-layer 222 can be 70 mm, 71 mm, 72 mm, 73 mm, 74 mm, 75 mm, 76 mm, 77 mm, 78 mm, 79 mm, 80 mm, or the distance between the second sputtering target and the battery substrate during deposition of the second metal sub-layer 222 can be within a range between any two of the above distances.

[0116] As some examples of this embodiment, the distance between the second sputtering target and the battery substrate during deposition of the third metal sub-layer 223 can be 60 mm, 61 mm, 62 mm, 63 mm, 64 mm, 65 mm, 66 mm, 67 mm, 68 mm, 69 mm, 70 mm, or the distance between the second sputtering target and the battery substrate during deposition of the third metal sub-layer 223 can be within a range between any two of the above distances.

[0117] As some examples of this embodiment, the sputtering power density during sputter deposition of the seed metal layer 220 can be controlled to be 2 W / cm 2 8 W / cm 2 . For example, the sputtering power density can be controlled to be 2 W / cm 2 , 3 W / cm 2 , 4 W / cm 2 , 5 W / cm 2 , 6 W / cm 2 , 7 W / cm 2 , 8 W / cm 2 , or the sputtering power density can be within a range between any two of the above values. This can ensure a suitable deposition rate during sputter deposition of the seed metal layer 220, and thus form a seed metal layer 220 with high deposition efficiency and good quality.

[0118] As some examples of this embodiment, the pressure in the sputter chamber during sputter deposition of the seed metal layer 220 can be controlled to be 0.3 Pa to 0.5 Pa. For example, the pressure in the sputter chamber can be controlled to be 0.3 Pa, 0.35 Pa, 0.4 Pa, 0.45 Pa, 0.5 Pa, or the pressure in the sputter chamber can be within a range between any two of the above values. This can reduce the disturbance of gas atoms to the sputtering process, and ensure that the seed metal layer 220 formed is more uniform and dense.

[0119] As some examples of this embodiment, a protective gas, such as argon, can be introduced into the sputter chamber during sputter deposition of the seed metal layer 220. Further, the flow rate of the protective gas introduced can be 500 sccm to 1000 sccm.

[0120] As some examples of this embodiment, the temperature of the battery substrate is controlled to be <200°C during the sputtering deposition of the seed metal layer 220.

[0121] It is understood that the first metal sublayer 221, the second metal sublayer 222, and the third metal sublayer 223 can all be deposited using the sputtering power density conditions and sputtering chamber pressure conditions described above. Furthermore, during the sputtering deposition of the first metal sublayer 221, the second metal sublayer 222, and the third metal sublayer 223, the sputtering power density and the gas pressure in the sputtering chamber can be kept constant.

[0122] As some examples of this embodiment, the thickness of the first metal sublayer 221 can be 50nm to 100nm. For example, the thickness of the first metal sublayer 221 is 50nm, 60nm, 70nm, 80nm, 90nm, or 100nm, or the thickness of the first metal sublayer 221 can be between any two of the above thicknesses.

[0123] As some examples of this embodiment, the thickness of the second metal sublayer 222 can be 50nm to 100nm. For example, the thickness of the second metal sublayer 222 can be 50nm, 60nm, 70nm, 80nm, 90nm, or 100nm, or the thickness of the second metal sublayer 222 can be between any two of the above thicknesses.

[0124] As some examples of this embodiment, the thickness of the third metal sublayer 223 can be 50nm to 100nm. For example, the thickness of the third metal sublayer 223 is 50nm, 60nm, 70nm, 80nm, 90nm, or 100nm, or the thickness of the third metal sublayer 223 can be between any two of the above thicknesses.

[0125] It is understandable that the deposition time of each metal sublayer can be selected according to its thickness and the actual deposition process.

[0126] As examples of this embodiment, the overall thickness of the seed metal layer 220 can be 100nm to 400nm to ensure that the seed metal layer 220 as a whole has good conductivity.

[0127] Step S4: Electrode metal layer 230 is prepared by electrodeposition on seed metal layer 220.

[0128] Figure 5 In order to be in Figure 4 A schematic diagram of the electrode metal layer 230 fabricated based on the structure shown. (Refer to...) Figure 5 As shown, the electrode metal layer 230 is fabricated on the side of the seed metal layer 220 away from the battery substrate. The electrode metal layer 230 can be nucleated and grown based on the seed metal layer 220.

[0129] Combining Figure 4 and Figure 5 As shown in FIG. 2, in this embodiment, the seed metal layer 220 covers the whole surface of the battery substrate. Therefore, in order to form the electrode metal layer 230 on the first doped layer 112 and the second doped layer 122 respectively, before the electrode metal layer 230 is prepared, it can further comprise: preparing a patterned mask layer 240 on the seed metal layer 220, the openings of the mask layer 240 are located on the seed metal layer 220. Then, the electrode metal layer 230 is prepared by electrodeposition on the seed metal layer 220 exposed in the openings of the mask layer 240. It can be understood that the mask layer 240 is used to limit the deposition area of the electrode metal layer 230, so as to ensure that the electrode metal layer 230 is only deposited in the openings of the mask layer 240. Therefore, the electrode metal layer 230 which is electrically connected to the first doped layer 112 and the second doped layer 122 respectively can be formed.

[0130] As some examples of this embodiment, the material of the mask layer 240 can include photoresist.

[0131] As some examples of this embodiment, the step of preparing the electrode metal layer 230 by electrodeposition on the seed metal layer 220 comprises: preparing a copper metal layer 231 by electrodeposition on the seed metal layer 220, and preparing a tin metal layer 232 by electrodeposition on the copper metal layer 231. Among them, the copper metal layer 231 is used to provide better electrical conductivity, and the tin metal layer 232 is used to provide better soldering performance, so as to facilitate the soldering of the electrode metal layer 230 with workpieces such as solder strips in subsequent processes.

[0132] As some examples of this embodiment, the thickness of the copper metal layer 231 can be 3 μm~5 μm.

[0133] As some examples of this embodiment, the thickness of the tin metal layer 232 can be 1 μm~2 μm.

[0134] As some examples of this embodiment, after the electrode metal layer 230 is prepared by electrodeposition, the mask layer 240 can be removed, and the part of the seed metal layer 220 and the diffusion barrier layer 210 which are shielded by the mask layer 240 can be removed correspondingly, and the electrode metal layer 230 located on the electrode opening can be reserved as the electrode of the solar cell. Among them, the mask layer 240 can be removed by an alkaline solution, and the seed metal layer 220 and the diffusion barrier layer 210 can be removed by an acidic solution and / or an alkaline solution.

[0135] It can be understood that the polarity of the electrode is related to the doped layer to which it is electrically connected. For example, the electrode electrically connected to the first doped layer 112 is used to lead out electrons and thus acts as a negative electrode, and the electrode electrically connected to the second doped layer 122 is used to lead out holes and thus acts as a positive electrode.

[0136] Further, the present disclosure also provides a solar cell.Figure 6 A schematic diagram of a structure of a solar cell according to the present disclosure is shown in FIG. 1. Figure 6 As shown in FIG. 1, the solar cell includes a cell substrate, diffusion barrier layers 210, and a seed metal layer 220. The diffusion barrier layers 210 are disposed on the cell substrate, and the diffusion barrier layers 210 are electrically conductive; the density of the seed metal layer 220 gradually increases in a direction away from the cell substrate.

[0137] As shown in FIG. 2, as some examples of this embodiment, the cell substrate includes a semiconductor substrate 100, a first dielectric layer 111, a first doped layer 112, a second dielectric layer 121, and a second doped layer 122, the first doped layer 112 and the second doped layer 122 being oppositely doped. The first dielectric layer 111 and the first doped layer 112 are sequentially stacked on a back surface of the semiconductor substrate 100, the second dielectric layer 121 and the second doped layer 122 are sequentially stacked on the back surface of the semiconductor substrate 100, the diffusion barrier layers 210 are multiple, and some of the diffusion barrier layers 210 are electrically connected to the first doped layer 112, and some of the diffusion barrier layers 210 are electrically connected to the second doped layer 122. Figure 6 As some examples of this embodiment, the material of the diffusion barrier layers 210 includes one or more of nickel, chromium, tungsten, titanium, nickel-chromium alloy, nickel-tungsten alloy, titanium-tungsten alloy, and nickel-tungsten alloy.

[0138] As some examples of this embodiment, the material of the seed metal layer 220 includes copper.

[0139] As some examples of this embodiment, the seed metal layer 220 includes multiple metal sub-layers sequentially stacked on the cell substrate, and the density of the metal sub-layer closer to the cell substrate is less than the density of the metal sub-layer farther from the cell substrate.

[0140] As shown in FIG. 3, as some examples of this embodiment, the seed metal layer 220 includes a first metal sub-layer 221, a second metal sub-layer 222, and a third metal sub-layer 223 sequentially stacked on the cell substrate.

[0141] Figure 6 In this example, the thickness of the first metal sub-layer 221 is 50 nm to 100 nm.

[0142] In this example, the thickness of the second metal sub-layer 222 is 50 nm to 100 nm.

[0143] In this example, the thickness of the third metal sub-layer 223 is 50 nm to 100 nm.

[0144] As some examples of this embodiment, the density of the diffusion barrier layers 210 gradually increases in a direction away from the cell substrate.

[0145] As some examples of this embodiment, the density of the diffusion barrier layers 210 gradually increases in a direction away from the cell substrate. ​

[0146] Referring to Figure 6 As some examples of this embodiment, the diffusion barrier layer 210 includes a plurality of barrier sub-layers sequentially stacked on the battery substrate, and the density of the barrier sub-layer closer to the battery substrate is less than that of the barrier sub-layer farther from the battery substrate.

[0147] As some examples of this embodiment, the diffusion barrier layer 210 includes a first barrier sub-layer 211, a second barrier sub-layer 212, and a third barrier sub-layer 213 sequentially stacked on the battery substrate.

[0148] In this example, the thickness of the first barrier sub-layer 211 is 50 nm to 100 nm.

[0149] In this example, the thickness of the second barrier sub-layer 212 is 50 nm to 100 nm.

[0150] In this example, the thickness of the third barrier sub-layer 213 is 50 nm to 100 nm.

[0151] As some examples of this embodiment, the thickness of the diffusion barrier layer 210 is 10 nm to 30 nm.

[0152] As some examples of this embodiment, the thickness of the seed metal layer 220 is 100 nm to 400 nm.

[0153] Referring to Figure 6 As some examples of this embodiment, an electrode metal layer 230 is further included, and the electrode metal layer 230 is sequentially stacked on the side of the seed metal layer 220 away from the battery substrate.

[0154] Referring to Figure 6 As some examples of this embodiment, the electrode metal layer 230 includes a copper metal layer 231 and a tin metal layer 232 sequentially stacked on the seed metal layer 220.

[0155] Further, the present disclosure also provides more specific embodiments and comparative examples to further illustrate the specific implementation modes of the present disclosure and the corresponding beneficial effects.

[0156] Embodiment 1

[0157] A silicon substrate is provided, and a silicon dioxide with a thickness of 2 nm is sequentially formed as a first dielectric layer and a second dielectric layer on the back of the silicon substrate. A first doped layer and a second doped layer are formed on the first dielectric layer and the second dielectric layer with a spacing, the material of the first doped layer is phosphorus-doped polysilicon, and the material of the second doped layer is boron-doped polysilicon. A layer of silicon nitride film is deposited as a surface functional layer, and the surface functional layer is grooved by laser to form electrode openings respectively exposing the first doped layer and the second doped layer. This structure serves as a battery substrate.

[0158] Deposition of diffusion barrier layer: the battery substrate was transferred into a magnetron sputtering chamber, a nickel-chromium alloy was used as the first sputtering target, the sputtering power density was controlled at 5 W / cm2, the pressure in the sputtering chamber was controlled at 0.5 Pa, the temperature of the battery substrate was controlled at 150 °C, and argon gas with a flow rate of 800 sccm was introduced. The first sputtering target was adjusted to be 115 mm away from the battery substrate, and a nickel-chromium alloy with a thickness of 7 nm was deposited as a first barrier sub-layer. The first sputtering target was adjusted to be 105 mm away from the battery substrate, and a nickel-chromium alloy with a thickness of 7 nm was deposited as a second barrier sub-layer. The first sputtering target was adjusted to be 95 mm away from the battery substrate, and a nickel-chromium alloy with a thickness of 7 nm was deposited as a third barrier sub-layer. 2 2 Deposition of seed metal layer: copper was used as the second sputtering target, the sputtering conditions were kept unchanged, the second sputtering target was adjusted to be 85 mm away from the battery substrate, and copper with a thickness of 80 nm was deposited as a first metal sub-layer. The second sputtering target was adjusted to be 75 mm away from the battery substrate, and copper with a thickness of 80 nm was deposited as a second metal sub-layer. The second sputtering target was adjusted to be 65 mm away from the battery substrate, and copper with a thickness of 80 nm was deposited as a third metal sub-layer.

[0159] Deposition of seed metal layer: copper was used as the second sputtering target, the sputtering conditions were kept unchanged, the second sputtering target was adjusted to be 85 mm away from the battery substrate, and copper with a thickness of 80 nm was deposited as a first metal sub-layer. The second sputtering target was adjusted to be 75 mm away from the battery substrate, and copper with a thickness of 80 nm was deposited as a second metal sub-layer. The second sputtering target was adjusted to be 65 mm away from the battery substrate, and copper with a thickness of 80 nm was deposited as a third metal sub-layer.

[0160] The battery substrate was taken out, photoresist was coated on the back of the battery substrate and exposed and developed to form a patterned mask layer, exposing the area where the electrode opening was located, and then a copper metal layer with a thickness of 4 μm and a tin metal layer with a thickness of 1 μm were electrodeposited on the surface of the battery substrate. Then the mask layer and the underlying seed metal layer and diffusion barrier layer were removed.

[0161] Example 2

[0162] Example 2 was basically the same as Example 1, except that when depositing the seed metal layer, only the first metal sub-layer with a thickness of 80 nm and the second metal sub-layer with a thickness of 160 nm were deposited, and the third metal sub-layer was not deposited.

[0163] Example 3

[0164] Example 3 was basically the same as Example 1, except that when depositing the seed metal layer, only the first metal sub-layer with a thickness of 80 nm and the third metal sub-layer with a thickness of 160 nm were deposited, and the second metal sub-layer was not deposited.

[0165] Example 4

[0166] Example 4 was basically the same as Example 1, except that when depositing the seed metal layer, only the second metal sub-layer with a thickness of 80 nm and the third metal sub-layer with a thickness of 160 nm were deposited, and the first metal sub-layer was not deposited.

[0167] Example 5

[0168] Example 5 is substantially the same as Example 1, except that in depositing the seed metal layer, the second sputtering target is 95 mm from the cell substrate during deposition of the first metal sublayer, and the conditions for deposition of the second and third metal sublayers are unchanged.

[0169] Example 6

[0170] Example 6 is substantially the same as Example 1, except that in depositing the seed metal layer, the second sputtering target is 55 mm from the cell substrate during deposition of the third metal sublayer, and the conditions for deposition of the first and second metal sublayers are unchanged.

[0171] Example 7

[0172] Example 7 is substantially the same as Example 1, except that in depositing the diffusion barrier layer, the first sputtering target is controlled to be 95 mm from the cell substrate, and a 24 nm thick nickel-chromium alloy is deposited as the diffusion barrier layer.

[0173] Example 8

[0174] Example 8 is substantially the same as Example 1, except that in depositing the diffusion barrier layer, the first sputtering target is controlled to be 85 mm from the cell substrate, and a 24 nm thick nickel-chromium alloy is deposited as the diffusion barrier layer.

[0175] Comparative Example 1

[0176] Comparative Example 1 is substantially the same as Example 1, except that no diffusion barrier layer is deposited, and the first, second, and third metal sublayers are deposited as the seed metal layer.

[0177] Comparative Example 2

[0178] Comparative Example 2 is substantially the same as Example 1, except that no diffusion barrier layer is deposited, and only the first metal sublayer having a thickness of 240 nm is deposited as the seed metal layer when depositing the seed metal layer.

[0179] Comparative Example 3

[0180] Comparative Example 3 is substantially the same as Example 1, except that in depositing the diffusion barrier layer, the first, second, and third barrier sublayers are deposited as the diffusion barrier layer, and in depositing the seed metal layer, only the third metal sublayer having a thickness of 240 nm is deposited as the seed metal layer.

[0181] The first metal sublayer in each of the above examples and comparative examples is intended to mean copper sputtered with the first sputtering target 85 mm from the cell substrate, the second metal sublayer is intended to mean copper sputtered with the first sputtering target 75 mm from the cell substrate, and the third metal sublayer is intended to mean copper sputtered with the first sputtering target 65 mm from the cell substrate.

[0182] Test: The open-circuit voltage, short-circuit current, fill factor and conversion efficiency of each of the above examples were tested, and the specific results can be seen in Table 1.

[0183] Table 1

[0184]

[0185] Referring to Table 1, Comparative Example 1 did not prepare a diffusion barrier layer, and only adjusted the target distance when preparing the seed metal layer according to the thickness, and the conversion efficiency of the solar cell prepared thereby was only 24.23%. Comparative Example 2 did not prepare a diffusion barrier layer, and also did not adjust the target distance when preparing the seed metal layer, and the conversion efficiency of the solar cell prepared thereby reached 24.40%, which was slightly higher than that of Comparative Example 1, which indicates that in the case where no diffusion barrier layer is prepared, the method of adjusting the target distance when preparing the seed metal layer cannot improve the performance of the solar cell, and may even have a certain negative impact on the performance of the solar cell. This is mainly because in Comparative Example 1, the target distance between the second metal sublayer and the third metal sublayer and the cell substrate is relatively close, which causes relatively serious passivation damage to the cell substrate.

[0186] Unlike Comparative Examples 1-2, Examples 1-8 all prepared a diffusion barrier layer and a seed metal layer at the same time, and adjusted the target distance according to the thickness when preparing the seed metal layer. The conversion efficiency of the solar cells of Examples 1-8 can all reach 25.79% or more, which indicates that the preparation method provided by the present disclosure can improve the passivation damage to the cell substrate while ensuring that the sputter-deposited seed metal layer has good quality, thereby improving the conversion efficiency of the solar cell.

[0187] In Embodiment 1-Embodiment 8, Embodiment 2 only prepared the first metal sub-layer and the second metal sub-layer as the seed metal layer, and the conversion efficiency thereof was lower than that of Embodiment 1. This is mainly because the second metal sub-layer has a lower density and a relatively poor film quality compared with the third metal sub-layer, which affects the conductive performance between the metal electrode and the battery substrate. Embodiment 3 only prepared the first metal sub-layer and the third metal sub-layer, and Embodiment 4 only prepared the second metal sub-layer and the third metal sub-layer, and the conversion efficiency of each of them was lower than that of Embodiment 1. This is mainly because the target distance is small when the second metal sub-layer and the third metal sub-layer are prepared, which causes a small amount of damage to the passivation of the battery substrate in the sputtering process. Embodiment 5 used a larger target distance when the first metal sub-layer was prepared, and the conversion efficiency thereof was also lower than that of Embodiment 1. This is mainly because the distance between the target and the battery substrate is too far, the first metal sub-layer is loose and has a poor film quality, which causes the conversion efficiency to decrease. Embodiment 6 used a smaller target distance when the third metal sub-layer was prepared, and the conversion efficiency thereof was also lower than that of Embodiment 1. This is mainly because the distance between the target and the battery substrate is too close, which causes a small amount of damage to the passivation of the battery substrate in the sputtering process. Embodiment 7 and Embodiment 8 both used a closer target distance when the diffusion barrier layer was prepared, and the conversion efficiency thereof was also lower than that of Embodiment 1. This is mainly because the distance between the target and the battery substrate is too close, which causes a small amount of damage to the passivation of the battery substrate in the sputtering process.

[0188] Comparative Example 3 prepared the diffusion barrier layer and only prepared the third metal sub-layer as the seed metal layer, and the conversion efficiency thereof was only 23.90%, which was significantly lower than that of Comparative Example 1 and Comparative Example 2. This shows that the blocking effect of the diffusion barrier layer is limited, and if a smaller distance is directly used to prepare a seed metal layer with a good quality, the sputtered seed metal layer will still cause obvious passivation damage to the battery substrate.

[0189] It should be noted that the above embodiments are only for illustrative purposes and do not mean to limit the present disclosure.

[0190] It should be understood that, unless otherwise explicitly stated herein, the execution of the steps is not strictly limited in sequence, and the steps can be executed in other sequences. Moreover, at least part of the steps in the preparation process can include multiple sub-steps or multiple stages, which do not necessarily be executed at the same time, but can be executed at different times, and the execution sequence of the sub-steps or stages is not necessarily sequential, but can be executed in rotation or alternation with at least part of other steps or sub-steps or stages of other steps.

[0191] Each of the embodiments in the specification is described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same or similar parts between the embodiments can be referred to each other.

[0192] Any technical features in the above embodiments can be combined, and for the sake of brevity, not all possible combinations are described, however, any combination of the technical features is considered to be within the scope of the present specification.

Claims

1. A method for fabricating a solar cell, characterized in that, Includes the following steps: A battery substrate is provided, and a conductive diffusion barrier layer is prepared on the battery substrate using a first sputtering target; A seed metal layer is deposited on the diffusion barrier layer using a second sputtering target. During the sputtering deposition of the seed metal layer, the second sputtering target is controlled and gradually moved closer to the battery substrate as the thickness of the seed metal layer increases.

2. The method for preparing a solar cell according to claim 1, characterized in that, The step of sputtering and depositing the seed metal layer includes: sequentially depositing multiple metal sublayers, wherein the distance between the second sputtering target and the battery substrate is smaller in the subsequent metal sublayer deposition process compared to the earlier metal sublayer deposition process.

3. The method for preparing a solar cell according to claim 2, characterized in that, During the sputtering deposition of the seed metal layer, the maximum distance between the second sputtering target and the battery substrate is ≤90mm, and the minimum distance between the second sputtering target and the battery substrate is ≥60mm.

4. The method for preparing a solar cell according to claim 3, characterized in that, The step of sputtering deposition of the seed metal layer includes: sequentially depositing a first metal sublayer, a second metal sublayer, and a third metal sublayer; wherein, When depositing the first metal sublayer, the distance between the second sputtering target and the battery substrate is 80mm~90mm; When depositing the second metal sublayer, the distance between the second sputtering target and the battery substrate is 70mm~80mm; When depositing the third metal sublayer, the distance between the second sputtering target and the battery substrate is 60mm~70mm.

5. The method for preparing a solar cell according to any one of claims 1 to 4, characterized in that, During the sputtering deposition of the diffusion barrier layer, the first sputtering target is controlled and gradually moved closer to the battery substrate as the thickness of the diffusion barrier layer increases.

6. The method for preparing a solar cell according to claim 5, characterized in that, The steps of sputtering and depositing the diffusion barrier layer and sputtering and depositing the seed metal layer are performed in the same sputtering chamber, and the distance between the second sputtering target and the battery substrate is smaller than the distance between the first sputtering target and the battery substrate.

7. The method for preparing a solar cell according to claim 5, characterized in that, The step of sputtering to deposit the diffusion barrier layer includes: sequentially depositing multiple barrier sublayers, wherein the spacing between the first sputtering target and the battery substrate is smaller in the subsequent deposition process of the barrier sublayers compared to the earlier deposition process of the barrier sublayers.

8. The method for preparing a solar cell according to claim 7, characterized in that, The step of sputtering deposition of the diffusion barrier layer includes: sequentially depositing a first barrier sublayer, a second barrier sublayer, and a third barrier sublayer; wherein, When depositing the first barrier sublayer, the distance between the first sputtering target and the battery substrate is 110mm~120mm; When depositing the second barrier sublayer, the distance between the first sputtering target and the battery substrate is 100mm~110mm; When depositing the third barrier layer, the distance between the first sputtering target and the battery substrate is 90mm~100mm.

9. The method for preparing a solar cell according to any one of claims 1-4 and 6-8, characterized in that, During the sputtering deposition of the diffusion barrier layer, the sputtering power density is controlled to be 2 W / cm². 2 ~8W / cm 2 The gas pressure in the sputtering chamber is controlled to be 0.3 Pa to 0.5 Pa; and / or, During the sputtering deposition of the seed metal layer, the sputtering power density was controlled to be 2 W / cm². 2 ~8W / cm 2 The gas pressure in the sputtering chamber is controlled to be 0.3 Pa to 0.5 Pa.

10. The method for preparing a solar cell according to any one of claims 1-4 and 6-8, characterized in that, It also includes the following steps: A patterned mask layer is prepared on the seed metal layer; and, An electrode metal layer is prepared by electrodeposition on the seed metal layer exposed in the opening of the mask layer.

11. A solar cell, characterized in that, include: Battery substrate; A diffusion barrier layer is disposed on the battery substrate, and the diffusion barrier layer is conductive; as well as, The density of the seed metal layer gradually increases along the direction away from the battery substrate.

12. The solar cell according to claim 11, characterized in that, The seed metal layer includes multiple metal sublayers sequentially stacked on the battery substrate, with the density of the metal sublayers closer to the battery substrate being less than the density of the metal sublayers farther from the battery substrate.

13. The solar cell according to claim 12, characterized in that, The seed metal layer comprises a first metal sublayer, a second metal sublayer, and a third metal sublayer sequentially stacked on the battery substrate; wherein... The thickness of the first metal sublayer is 50 nm to 100 nm; and / or, The thickness of the second metal sublayer is 50 nm to 100 nm; and / or, The thickness of the third metal sublayer is 50nm~100nm.

14. The solar cell according to any one of claims 11 to 13, characterized in that, The density of the diffusion barrier layer gradually increases along the direction away from the battery substrate.

15. The solar cell according to claim 14, characterized in that, The diffusion barrier layer includes a plurality of barrier sublayers sequentially stacked on the battery substrate, wherein the density of the barrier sublayers closer to the battery substrate is less than that of the barrier sublayers farther from the battery substrate.

16. The solar cell according to claim 15, characterized in that, The diffusion barrier layer includes a first barrier sublayer, a second barrier sublayer, and a third barrier sublayer sequentially stacked on the battery substrate; wherein... The thickness of the first barrier sublayer is 50nm~100nm; and / or, The thickness of the second barrier sublayer is 50nm~100nm; and / or, The thickness of the third barrier sublayer is 50nm~100nm.

17. The solar cell according to any one of claims 11-13 and 15-16, characterized in that, The thickness of the diffusion barrier layer is 10 nm to 30 nm; and / or, The thickness of the seed metal layer is 100nm~400nm.

18. The solar cell according to any one of claims 11-13 and 15-16, characterized in that, It also includes an electrode metal layer, which is stacked on the side of the seed metal layer away from the battery substrate.

19. The solar cell according to claim 18, characterized in that, The electrode metal layer includes a copper metal layer and a tin metal layer that are sequentially stacked on the seed metal layer.

20. The solar cell according to any one of claims 11-13, 15-16 and 19, characterized in that, The battery substrate includes a semiconductor substrate, a first dielectric layer, a first doped layer, a second dielectric layer, and a second doped layer, wherein the doping types of the first doped layer and the second doped layer are opposite. The first dielectric layer and the first doped layer are stacked sequentially on the back side of the semiconductor substrate, and the second dielectric layer and the second doped layer are stacked sequentially on the back side of the semiconductor substrate. There are multiple diffusion barrier layers, some of which are electrically contacted with the first doped layer, and others are electrically contacted with the second doped layer.

21. The solar cell according to any one of claims 11-13, 15-16 and 19, characterized in that, The diffusion barrier layer is made of one or more of the following materials: nickel, chromium, tungsten, titanium, nickel-chromium alloy, nickel-tungsten alloy, titanium-tungsten alloy, and nickel-molybdenum alloy; and / or, The seed metal layer is made of copper.

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