Double-side plastic package structure of vertical routing lead PIN and manufacturing method of double-side plastic package structure

Abstract

The invention provides a double-sided plastic package structure of a vertical routing lead PIN, which can lead out more functional signals, reduce the front-end design pressure and improve the package integration level. The present invention comprises: a substrate; a front chip assembly and a device assembly; a back surface FC chip; a front plastic package body; a back surface plastic package body; a plurality of vertical welding wires; and a plurality of bumps; the substrate is a double-sided substrate, a front chip assembly and a device assembly are respectively bonded on the front surface of the substrate and are packaged through a front plastic package body, the height of the front plastic package body completely covers the height of the front chip assembly and the height of the device assembly, a back FC chip is bonded on the back surface of the substrate, and the height of the back FC chip is larger than that of the front plastic package body. A vertical welding wire is welded to each PIN pad on the back face of the substrate, a protruding block is welded to the tail end of the lower portion of each vertical welding wire, the back face plastic package body is packaged on the back face of the substrate, and the protruding blocks protrude out of the lower surface of the back face plastic package body.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip packaging, in particular to a double-side plastic packaging structure for vertical wire bonding PIN, and also provides a manufacturing method of the plastic packaging structure. BACKGROUND

[0002] With the continuous development of the semiconductor industry, electronic information technology gradually approaches the physical limit, the development of Moore's law has gradually slowed down, and the process capability of chips has been greatly limited. However, with the continuous progress of society, electronic products have put forward higher requirements for chip performance. Therefore, the improvement of packaging process capability is of great significance for the future of semiconductors to integrate more functions in smaller sizes, reduce power consumption and delay.

[0003] However, in the same size of the package, multiple chip functions need to be integrated, which will inevitably generate multiple function pins. How to lead a large number of pins out to the back of the substrate becomes a prerequisite for whether the product can be produced. SUMMARY

[0004] In view of the above problems, the present application provides a double-side plastic packaging structure for vertical wire bonding PIN, which can lead out more function signals, reduce the front-end design pressure, and improve the packaging integration.

[0005] A double-side plastic packaging structure for vertical wire bonding PIN, characterized in that it comprises: a substrate; a front chip assembly and a device assembly; a back FC chip; a front plastic package; a back plastic package; a plurality of vertical welding wires; and a plurality of bumps; The substrate is a double-sided substrate, the front surface of the substrate is bonded with a front chip assembly and a device assembly respectively, and is packaged by a front plastic package, the height of the front plastic package completely covers the height of the front chip assembly and the device assembly, the back surface of the substrate is bonded with a back FC chip, each PIN pin pad on the back surface of the substrate is welded with a vertical welding wire, and the lower end of each vertical welding wire is welded with a bump, the back plastic package is packaged on the back surface of the substrate, and the bump is arranged outwardly on the lower surface of the back plastic package.

[0006] Further characterized in that: The front chip assembly comprises at least one front FC chip and a WB chip group, and the device assembly comprises at least one capacitor group. The WB chip set comprises at least two stacked chips, the bottom chip is attached to the front surface of the substrate by bonding glue, and the upper chip and the bottom chip are connected to the corresponding positions of the front surface of the substrate by solder wires to complete electrical connection.

[0007] A manufacturing method of a double-sided plastic packaging structure of a vertical wire-bonding PIN, characterized in that: after corresponding chips and devices are connected to the front surface and the back surface of the substrate, 50 um thick copper wires are used at the positions of the corresponding PIN pad exposed on the back surface of the substrate, a signal is led out to the back surface of the substrate by a vertical wire-bonding method, and tin paste is coated on the surface of the exposed vertical wire by a surface printing technology to form a bump.

[0008] It is further characterized in that it comprises the following steps: S1, a capacitor and a front FC chip are attached to the front surface of the substrate by an SMT process technology; S2, chips are attached to the surface of the substrate by a DA and WB technology, and front-side plastic packaging is performed by using an injection molding machine to form a front-side plastic packaging body, so that the devices and the chips are wrapped in the plastic packaging body; S3, the substrate is turned over, and back FC chips are attached to the back surface of the substrate by a flip chip technology; S4, a vertical wire-bonding process is used to weld a wire on each exposed PIN pad on the back surface of the substrate, and then back-side plastic packaging is performed by using an injection molding machine to obtain a back-side plastic packaging body, so that the back FC chips and the wires are wrapped in the back-side plastic packaging body; S5, the back surface of the back FC chip and the end of the wire are exposed by a grinding process on the back-side plastic packaging body, and then SMT surface printing technology is used to brush tin on the surface of the wire to form a bump.

[0009] After the above technical solution is adopted, compared with the existing substrate surface ball grid array PIN, the use of the vertical wire-bonding process can greatly reduce the distance between the PINs, so that more PINs can be arranged in the same area, and therefore more functional signals can be led out, the front-end design pressure is reduced, and the packaging integration is improved. BRIEF DESCRIPTION OF DRAWINGS

[0010] Figure 1 It is a schematic diagram of a specific embodiment of the double-sided plastic packaging structure corresponding to the present application; Figure 2 It is a schematic diagram of step S1 of the method of the present application; Figure 3 It is a schematic diagram of step S2 of the method of the present application; Figure 4 It is a schematic diagram of step S3 of the method of the present application; Figure 5 It is a schematic diagram of step S4 of the method of the present application; Figure 6 Schematic diagram of step S5 of the method of the present application The names corresponding to the serial numbers in the figure are as follows: Substrate 10, front-chip assembly 20, front FC chip 21, WB chip set 22, bottom chip 221, upper chip 222, solder wire 223, device assembly 30, capacitor 31, back FC chip 40, front plastic package 50, back plastic package 60, vertical solder wire 70, bump 80. DETAILED DESCRIPTION

[0011] A double-sided plastic package structure for vertical wire-bonding PINs, as shown in Figure 1 which comprises: a substrate 10, a front-chip assembly 20, a device assembly 30, a back FC chip 40, a front plastic package 50, a back plastic package 60, a plurality of vertical solder wires 70, and a plurality of bumps 80; The substrate 10 is a double-sided substrate, the front side of the substrate 10 is bonded with the front-chip assembly 20 and the device assembly 30 respectively, and is encapsulated by the front plastic package 50, the height of the front plastic package 50 completely covers the height of the front-chip assembly 20 and the device assembly 30, the back side of the substrate 10 is bonded with the back FC chip 40, each PIN pad on the back side of the substrate 10 is welded with a vertical solder wire 70, and the lower end of each vertical solder wire 70 is welded with a bump 80, the back plastic package 60 is encapsulated on the back side of the substrate 10, and the bumps 80 are arranged outwardly on the lower surface of the back plastic package 60.

[0012] In specific embodiments, the front-chip assembly 20 comprises at least two front FC chips 21 and a WB chip set 22, and the device assembly 30 comprises two groups of capacitors 31. The WB chip set 22 comprises two stacked chips, the bottom chip 221 is attached to the front side of the substrate 10 by bonding glue, and the upper chip 222 is fixed to the upper surface of the bottom chip 221 by bonding glue, and the upper chip 222 and the bottom chip 221 are both connected to the corresponding positions on the front side of the substrate 10 by the solder wire 223 to complete the electrical connection.

[0013] A manufacturing method of a double-sided plastic package structure for vertical wire-bonding PINs, as shown in Figures 2-6 which, after the corresponding chips and devices are connected to the front and back sides of the substrate 10, 50-μm thick copper wires are used at the positions of the corresponding PIN pads 101 exposed on the back side of the substrate 10, vertical solder wires 70 are obtained by vertical wire-bonding to lead out signals to the back side of the substrate 10, and tin paste is coated on the surface of the exposed vertical solder wires 70 by surface printing technology to form bumps 80.

[0014] which comprises the following steps: S1 two groups of capacitors 31 and two groups of front FC chips 21 are attached to the front side of the substrate 10 by SMT process technology; S2 using DA and WB technology, the WB chip set 22 is attached to the surface of the substrate 10, and using injection molding machine for front plastic package, forming a front plastic package 50, the device and the chip are wrapped in the front plastic package 50; S3 turn over the substrate 10, through the flip chip technology, the back FC chip 40 is attached to the back of the substrate 10; S4 using vertical wire bonding process, the vertical wire 70 is welded on each exposed PIN pad 101 on the back of the substrate 10; then using injection molding machine for back plastic package, obtaining a back plastic package 60, the back FC chip 40 and the vertical wire 70 are wrapped in the back plastic package 60; S5 through the grinding process of the back plastic package 60, the back of the back FC chip 40 and the end of the vertical wire 70 are exposed, and then using SMT surface printing process, tin is brushed on the surface of the wire to form a bump 80.

[0015] Compared with the existing substrate surface ball grid PIN, the use of vertical wire bonding process can greatly reduce the distance between PINs, so that more PINs can be arranged in the same area, thereby leading to more functional signals, reducing the front-end design pressure and improving the packaging integration.

[0016] It is apparent for those skilled in the art that the present application is not limited to the details of the above exemplary embodiments, but can be implemented in other concrete forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be considered in all aspects as illustrative and not restrictive, and the scope of the present application is defined by the appended claims rather than the above description, and it is intended to encompass all changes falling within the meaning and range of equivalents of the elements of the claims. Any reference signs in the claims should not be considered as limiting the claims involved.

[0017] In addition, it should be understood that although the present specification is described in terms of embodiments, not every embodiment contains only one independent technical solution, and the description of the specification is only for the sake of clarity, and those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can be combined appropriately to form other embodiments that those skilled in the art can understand.

Claims

1. A double-side plastic package structure for vertical wire-bonding lead PIN, characterized in that, It comprises: a substrate; a front chip assembly and a device assembly; a back FC chip; a front plastic package; a back plastic package; a plurality of vertical wires; and a plurality of bumps; The substrate is a double-sided substrate, the front of the substrate is bonded with the front chip assembly and the device assembly respectively, and is encapsulated by the front plastic package, the height of the front plastic package completely covers the height of the front chip assembly and the device assembly, the back of the substrate is bonded with the back FC chip, each PIN pad on the back of the substrate is welded with a vertical wire, and the lower end of each vertical wire is welded with a bump, the back plastic package is encapsulated on the back of the substrate, and the bump is arranged outwardly on the lower surface of the back plastic package.

2. The double-side plastic package structure for vertical wire-bonding PIN according to claim 1, wherein: The front chip assembly comprises at least one front FC chip and a WB chip group, and the device assembly comprises at least one capacitor group.

3. The double-side plastic package structure for vertical wire-bonding PIN according to claim 2, wherein: The WB chip group comprises at least two stacked chips, the bottom chip is attached to the front of the substrate by bonding glue, and the upper chip and the bottom chip are connected to the corresponding positions on the front of the substrate by wires to complete the electrical connection.

4. A method for manufacturing the vertical wire-bonding double-side plastic package structure of any one of claims 1-3, characterized in that: After the corresponding chips and devices are connected on the front and back of the substrate, 50um thick copper wires are used at the positions of the exposed PIN pads on the back of the substrate, the signals are led out to the back of the substrate by vertical wire bonding, and then the solder paste is coated on the surface of the exposed vertical wire by surface printing technology to form a bump.

5. The method of claim 2, wherein the method further comprises: It comprises the following steps: S1, by SMT process technology, the capacitor and the front FC chip are attached on the front of the substrate; S2, using DA and WB technology, the chip is attached on the surface of the substrate, and the front plastic package is formed by using an injection molding machine to encapsulate the device and the chip in the plastic package; S3, the substrate is turned over, and the back FC chip is attached on the back of the substrate by flip chip technology; S4, using vertical wire bonding process, the wire is welded on each exposed PIN pad on the back of the substrate; then using an injection molding machine for back plastic packaging, a back plastic package is obtained, and the back FC chip and the wire are wrapped in the back plastic package; S5, by the grinding process of the back plastic package, the back of the back FC chip and the end of the wire are exposed, and then the SMT surface printing process is used to brush tin on the surface of the wire to form a bump.

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