Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof. The forming method comprises the following steps: providing a substrate; forming a copper column structure on the substrate, wherein the copper column structure comprises a plurality of layers of copper column sections which are sequentially stacked and connected; the forming method of the copper column structure comprises the steps that a plurality of photoetching electroplating processes are carried out on a substrate, a layer of copper column section is formed in each photoetching electroplating process, and then the thickness of a photoetching layer formed in each photoetching electroplating process can be reduced, so that the technological difficulty of forming the photoetching layer and photoetching development is reduced. And the electroplating time of each layer of copper cylinder section is effectively shortened compared with the time of electroplating the whole copper cylinder at one time, so that the phenomena of swelling, cracking and the like of the photoetching layer in the electroplating operation for a long time can be avoided. The depth-to-width ratio of the single-layer copper column section is small, the exchange efficiency of copper plating liquid medicine can be guaranteed, and then the copper nodule phenomenon is reduced. And the copper column structure is divided into multiple layers of copper column sections, so that the height limitation of electroplating the whole copper column at a time can be broken through, and the copper column structure has higher designability.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular to a semiconductor structure and a forming method thereof. BACKGROUND

[0002] In 2.5D / 3D stacked structures, high aspect ratio copper pillars play a crucial role as an advanced interconnection technology. With the continuous improvement of chip integration, the performance requirements of interconnection structures are increasingly stringent. High aspect ratio copper pillars, due to their excellent electrical performance, low resistivity, and high integration density, have become an ideal choice for efficient interconnection between chips. This structure can significantly improve signal transmission speed, reduce signal delay, and reduce power consumption, meeting the strict requirements of modern high-performance computing and communication devices for chip performance. In addition, high aspect ratio copper pillars can also adapt to smaller chip sizes and more complex stacking architectures, providing strong support for the miniaturization and high performance of future electronic devices.

[0003] However, the formation process of high aspect ratio copper pillars in the prior art still has many problems. SUMMARY

[0004] The technical problem solved by the present application is to provide a semiconductor structure and a forming method thereof, wherein the copper pillar structure is divided into multiple layers, which can break through the height limit of one-time electroplating of the entire copper pillar, and also improve the quality and performance of the copper pillar structure. The process of the forming method can reduce the thickness of the photoresist layer formed by each photoetching and electroplating process, thereby reducing the process difficulty of forming the photoresist layer and photoresist development, and improving the stability and reliability of the process.

[0005] To solve the above problems, an embodiment of the present application provides a semiconductor structure, comprising: a substrate; a copper pillar structure located on the substrate, the copper pillar structure comprising a plurality of layers of copper pillar segments stacked and connected in sequence.

[0006] Optionally, the projection of the adjacent upper layer copper pillar segment towards the substrate direction coincides with the projection of the adjacent lower layer copper pillar segment towards the substrate direction.

[0007] Optionally, the projection of the adjacent upper layer copper pillar segment towards the substrate direction is located within the range of the projection of the adjacent lower layer copper pillar segment towards the substrate direction.

[0008] Correspondingly, the embodiment of the present application also provides a forming method of a semiconductor structure, comprising: providing a substrate; forming a copper column structure on the substrate, the copper column structure comprising a plurality of copper column segments stacked in sequence; wherein the forming method of the copper column structure comprises: performing a plurality of times of photoetching and electroplating processes on the substrate, each time of the photoetching and electroplating process forming a layer of the copper column segment; each time of the photoetching and electroplating process comprising: forming a photoetching layer, the photoetching layer having a copper column through hole therein; and forming the copper column segment in the copper column through hole by using an electroplating process.

[0009] Optionally, the height of the copper column segment formed in each time of the photoetching and electroplating process is less than the height of the copper column through hole.

[0010] Optionally, before performing the next adjacent photoetching and electroplating process, the method further comprises: removing the photoetching layer formed in the last adjacent photoetching and electroplating process; and after removing the photoetching layer formed in the last adjacent photoetching and electroplating process, forming a new photoetching layer, the new photoetching layer covering the sidewall of the copper column segment formed in the last adjacent photoetching and electroplating process, and the height of the new photoetching layer being less than the height of the copper column segment formed in the last adjacent photoetching and electroplating process.

[0011] Optionally, the projection of the copper column segment in the upper adjacent layer towards the substrate direction coincides with the projection of the copper column segment in the lower adjacent layer towards the substrate direction.

[0012] Optionally, the forming method of the copper column segment in the upper adjacent layer and the lower adjacent layer comprises: forming the copper column segment in the lower adjacent layer by using the last adjacent photoetching and electroplating process; and forming the copper column segment in the upper adjacent layer by using the next adjacent photoetching and electroplating process; wherein the projection of the copper column through hole formed in the next adjacent photoetching and electroplating process towards the substrate direction coincides with the projection of the copper column segment formed in the last adjacent photoetching and electroplating process towards the substrate direction.

[0013] Optionally, the projection of the copper column segment in the upper adjacent layer towards the substrate direction is located in the range of the projection of the copper column segment in the lower adjacent layer towards the substrate direction.

[0014] Optionally, the forming method of the copper column segment in the upper adjacent layer and the lower adjacent layer comprises: forming the copper column segment in the lower adjacent layer by using the last adjacent photoetching and electroplating process; and forming the copper column segment in the upper adjacent layer by using the next adjacent photoetching and electroplating process; wherein the projection of the copper column through hole formed in the next adjacent photoetching and electroplating process towards the substrate direction is located in the range of the projection of the copper column segment formed in the last adjacent photoetching and electroplating process towards the substrate direction.

[0015] Optionally, before the first photoetching plating process, the method further comprises: forming a sputtered copper layer on the substrate; and the copper column structure is formed on the sputtered copper layer.

[0016] Optionally, after the copper column structure is formed, the method further comprises: removing the exposed sputtered copper layer as a mask.

[0017] Optionally, the photoetching layer comprises a photoresist layer or a dry film layer.

[0018] Compared with the prior art, the embodiments of the present application have the following advantages:

[0019] In the semiconductor structure of the embodiments of the present application, by dividing the super-high copper column structure into multiple copper column segments, the thickness of the photoresist formed each time can be reduced, thereby reducing the process difficulty of forming the photoresist and photoetching, and further improving the stability and reliability of the process. The plating time of each copper column segment is effectively shortened relative to the time of plating the whole copper column at one time, thereby avoiding swelling and cracking of the photoresist in the plating operation for a long time. The aspect ratio of each copper column segment is small, which can ensure the exchange efficiency of copper plating solution, thereby reducing the copper tumor phenomenon and improving the quality and performance of the copper column structure. In addition, dividing the copper column structure into multiple copper column segments can also break through the height limit of plating the whole copper column at one time, so that the copper column structure is more designable, and can be better applied to the field of advanced packaging.

[0020] In the semiconductor structure of the embodiments of the present application, by dividing the super-high copper column structure into multiple copper column segments, and forming one of the copper column segments each time, the thickness of the photoetching layer formed each time can be reduced, thereby reducing the process difficulty of forming the photoetching layer and photoetching, and further improving the stability and reliability of the process. The plating time of each copper column segment is effectively shortened relative to the time of plating the whole copper column at one time, thereby avoiding swelling and cracking of the photoetching layer in the plating operation for a long time. The aspect ratio of each copper column segment is small, which can ensure the exchange efficiency of copper plating solution, thereby reducing the copper tumor phenomenon and improving the quality and performance of the copper column structure. In addition, dividing the copper column structure into multiple copper column segments can also break through the height limit of plating the whole copper column at one time, so that the copper column structure is more designable, and can be better applied to the field of advanced packaging. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figures 1 to 7 is a structure diagram of each step of the forming method of the semiconductor structure of the embodiments of the present application. DETAILED DESCRIPTION

[0022] As described in the background, the semiconductor structure in the prior art still has many problems. The following will be described in detail.

[0023] In the preparation process of ultra-high copper pillars (>150um), the prior art faces many challenges. On the one hand, the limitations of photoresist technology become a key bottleneck. Currently, photoresist is difficult to achieve a thickness of >170um, which seriously limits the preparation height of ultra-high copper pillars. At the same time, the pressing and developing processes of ultra-thick dry films also have great difficulty, and it is difficult to ensure the stability and reliability of the process. In addition, the photoresist or dry film will swell and crack during long-term electroplating operation, affecting the quality and performance of the copper pillar.

[0024] In addition, in the electroplating operation, the preparation of high aspect ratio copper pillars has high requirements for the machine and copper plating solution. When operating at low current density, the electroplating time is too long, which can easily cause the photoresist to swell, affecting the electroplating effect. When operating at high current density, the exchange efficiency of the copper plating solution is poor, and the copper tumor phenomenon is prone to occur. The copper tumor refers to the abnormal deposition of copper in the local area during the electroplating process due to uneven current density distribution, insufficient exchange of copper plating solution, etc., forming a tumor-like protrusion. The existence of the copper tumor can destroy the surface flatness and size accuracy of the copper pillar, affecting its subsequent processing and application, and reducing the quality and reliability of the product.

[0025] On this basis, the present application provides a semiconductor structure and a forming method thereof. By dividing the ultra-high copper pillar structure into multiple copper pillar segments, and forming one of the copper pillar segments in each photoetching and electroplating process, the thickness of the photoetching layer formed in each photoetching and electroplating process can be reduced, thereby reducing the process difficulty of forming the photoetching layer and photoetching, and further improving the stability and reliability of the process. The electroplating time of each copper pillar segment is effectively shortened relative to the time of electroplating the entire copper pillar at once, thereby avoiding the swelling, cracking, etc. of the photoetching layer during long-term electroplating operation. The aspect ratio of a single copper pillar segment is small, which can ensure the exchange efficiency of the copper plating solution, thereby reducing the copper tumor phenomenon, and improving the quality and performance of the copper pillar structure. In addition, dividing the copper pillar structure into multiple copper pillar segments can also break through the height limitation of electroplating the entire copper pillar at once, making the copper pillar structure more designable, and thereby better applied in the field of advanced packaging.

[0026] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the drawings.

[0027] Figures 1 to 7 is a schematic diagram of each step of the forming method of the semiconductor structure of the embodiment of the present application.

[0028] Please refer to Figure 1 , a substrate 100 is provided.

[0029] In the embodiment, the substrate 100 serves as a basic support structure for the subsequently formed copper pillar structure, and provides physical support and stability for the formation of the copper pillar structure, ensuring that the copper pillar structure can be supported and fixed on the surface thereof.

[0030] In the embodiment, the substrate 100 is a glass substrate, which has good flatness and stability, and can provide an ideal surface for the accurate preparation of the copper pillar structure. Moreover, the glass substrate has strong chemical inertness and is not prone to react with copper or other preparation materials, thereby ensuring the purity and structural integrity of the copper pillar structure.

[0031] Please continue to refer to Figure 1 After the substrate 100 is provided, a sputtered copper layer 101 is formed on the substrate 100.

[0032] Since the subsequently formed copper pillar structure is formed by an electroplating process, the current needs to pass through the existing conductive layer to guide the deposition of copper ions in a specific area during the electroplating process. The sputtered copper layer 101 can serve as a good conductive seed layer to provide the necessary electron transmission path for electroplating, so that the electroplating can proceed smoothly. The sputtered copper layer 101 formed by the sputtering process provides a basis for uniform deposition of copper material during electroplating, thereby reducing problems such as uneven thickness and holes that may occur during electroplating. In addition, the sputtered copper layer 101 can also cover some small defects or uneven places on the surface of the substrate 100, providing a relatively flat and uniform surface for electroplating, thereby reducing defects such as cracks and holes that may occur during the electroplating process, so as to improve the quality of the copper pillar structure.

[0033] After the sputtered copper layer 101 is formed, a copper pillar structure is further formed on the substrate 100, and the copper pillar structure includes a plurality of copper pillar segments stacked and connected in sequence. The formation method of the copper pillar structure includes performing a plurality of times of photolithography and electroplating processes on the substrate 100, and each time of the photolithography and electroplating process forms a layer of the copper pillar segment. Each time of the photolithography and electroplating process includes forming a photoresist layer having a copper pillar via in the photoresist layer, and forming the copper pillar segment in the copper pillar via by an electroplating process. The specific formation process of the copper pillar structure can be referred to in the description of Figures 2 to 6 .

[0034] It should be noted that in the embodiment, the copper pillar structure is specifically formed on the sputtered copper layer 101, and taking the copper pillar structure with two layers of copper pillar segments as an example, the corresponding number of photoetching and electroplating processes is two, which are distinguished as a first photoetching and electroplating process and a second photoetching and electroplating process. In the first photoetching and electroplating process, the photoetching layer is a first photoetching layer, the copper pillar via is a first copper pillar via, and the copper pillar segment is a first copper pillar segment; in the second photoetching and electroplating process, the photoetching layer is a second photoetching layer, the copper pillar via is a second copper pillar via, and the copper pillar segment is a second copper pillar segment.

[0035] In other embodiments, the copper pillar structure can also have more than two layers of copper pillar segments.

[0036] Please refer to Figure 2 The first photoetching layer 102 is formed on the sputtered copper layer 101, and the first copper pillar via 103 is formed in the first photoetching layer 102.

[0037] In the embodiment, the first photoetching layer 102 is a photoresist layer.

[0038] In other embodiments, the first photoetching layer can also be a dry film layer.

[0039] In the embodiment, the first copper pillar via 103 exposes the surface of the sputtered copper layer 101.

[0040] In the embodiment, the forming method of the first photoetching layer 102 includes: coating a first photoresist material layer (not shown) on the sputtered copper layer 101; and performing exposure and development processing on the first photoresist material layer to form the first photoetching layer 102.

[0041] In other embodiments, if the first photoetching layer is a dry film layer, the dry film layer is formed on the substrate by a pressing film process.

[0042] Please refer to Figure 3 The first copper pillar segment 104 is formed in the first copper pillar via 103 by an electroplating process.

[0043] In the embodiment, the first copper pillar segment 104 is formed on the sputtered copper layer 101.

[0044] It should be noted that in the present embodiment, the height of the copper pillar segment formed in each of the photoetching and electroplating processes is less than the height of the copper pillar via. Corresponding to the first photoetching and electroplating process, the height of the first copper pillar segment 104 is less than the height of the first copper pillar via 103, so as to prevent the first copper pillar segment 104 from growing out of the first copper pillar via 103 and forming a mushroom head, which will make the structure and height of the first copper pillar segment 104 uncontrollable and affect the second photoetching and electroplating process.

[0045] From then on, the first photoetching and electroplating process is completed.

[0046] Please refer to Figure 4 Before the next photoetching and electroplating process, the photoetching layer formed in the previous photoetching and electroplating process is removed, and then a new photoetching layer 105 is formed, which covers the sidewall of the copper pillar segment formed in the previous photoetching and electroplating process, and the height of the new photoetching layer 105 is less than the height of the copper pillar segment formed in the previous photoetching and electroplating process.

[0047] It should be noted that in the present embodiment, the photoetching and electroplating process is taken as an example of twice, so the previous photoetching and electroplating process is the first photoetching and electroplating process, and the next photoetching and electroplating process is the second photoetching and electroplating process. Correspondingly, the photoetching layer formed in the previous photoetching and electroplating process is the first photoetching layer 102, and the sidewall of the copper pillar segment formed in the previous photoetching and electroplating process is the sidewall of the first copper pillar segment 104. Correspondingly, the height of the new photoetching layer 105 is less than the height of the copper pillar segment formed in the previous photoetching and electroplating process, that is, the height of the new photoetching layer 105 is less than the height of the first copper pillar segment 104.

[0048] The height of the new photoetching layer 105 is less than the height of the first copper pillar segment 104, so as to prevent the second photoetching layer formed in the second photoetching and electroplating process from being directly stacked on the first photoetching layer 102 with an opening. If the second photoetching layer is directly stacked on the first photoetching layer 102 with an opening, the second photoetching layer will form bubbles when entering the opening, which will make the stack between the second copper pillar segment formed in the second photoetching process and the first copper pillar segment 104 have a poor appearance and affect the electrical connection between them.

[0049] In other embodiments, if more than 2 times of the photoetching electroplating process is taken as an example, such as 3 times of the photoetching electroplating process, wherein the adjacent upper time and the adjacent lower time of the photoetching electroplating process include: the first time of the photoetching electroplating process and the second time of the photoetching electroplating process, and the second time of the photoetching electroplating process and the third time of the photoetching electroplating process. In this way, the objects contained in the adjacent upper time and the adjacent lower time of the photoetching electroplating process can be analogized when 4, 5, 6, … times of the photoetching electroplating process is taken as an example.

[0050] In the present embodiment, since only 2 times of the photoetching electroplating process is taken as an example, only 1 time of the new photoetching layer 105 needs to be formed between 2 times of the photoetching electroplating process, so the new photoetching layer 105 can be referred to as the first new photoetching layer.

[0051] In the embodiments thereof, if the number of times of the photoetching electroplating process exceeds 2 times, 3 times of the photoetching electroplating process is taken as an example, wherein 1 time of the new photoetching layer needs to be re-formed between each adjacent 2 times of the photoetching electroplating process, so the new photoetching layer formed each time can be referred to as the first new photoetching layer and the second new photoetching layer for distinction. In this way, the name distinction of the new photoetching layer formed each time can be analogized when 4, 5, 6, … times of the photoetching electroplating process is taken as an example.

[0052] In the present embodiment, the new photoetching layer 105 adopts a photoresist layer.

[0053] In other embodiments, the new photoetching layer can also adopt a dry film layer.

[0054] In the present embodiment, the forming method of the new photoetching layer 105 includes: coating a new photoresist material layer (not shown) on the sputtered copper layer 101; and performing exposure treatment on the new photoresist material layer to solidify it, so as to form the new photoetching layer 105.

[0055] In other embodiments, if the new photoetching layer adopts a dry film layer, the corresponding dry film layer is formed on the substrate by a pressing film process.

[0056] It should be noted that since the height of the new photoetching layer 105 is less than the height of the first copper pillar segment 104, the new photoresist material layer does not need to be developed and opened, but only needs to be exposed and solidified.

[0057] Please refer to Figure 5 After the new photoetching layer 105 is formed, the second photoetching layer 106 is formed on the new photoetching layer 105, and the second copper pillar through hole 107 is formed in the second photoetching layer 106.

[0058] In the present embodiment, the second copper pillar through hole exposes the surface of the first copper pillar segment 104.

[0059] In the embodiment, the second photoetching layer 106 is a photoresist layer.

[0060] In other embodiments, the second photoetching layer can also be a dry film layer.

[0061] In the embodiment, the forming method of the second photoetching layer 106 includes: coating a second photoresist material layer (not shown) on the new photoetching layer 105; and performing exposure and development processing on the second photoresist material layer to form the second photoetching layer 106.

[0062] In other embodiments, if the second photoetching layer is a dry film layer, the corresponding dry film layer is formed on the new photoetching layer by a pressing film process.

[0063] Please refer to Figure 6 The second copper pillar segment 108 is formed in the second copper pillar via hole 107 by a plating process.

[0064] In the embodiment, the second copper pillar segment 108 is formed on the first copper pillar segment 104.

[0065] It should be noted that in the embodiment, the height of the copper pillar segment formed in each photoetching and plating process is less than the height of the copper pillar via hole. Corresponding to the second photoetching and plating process, that is, the height of the second copper pillar segment 108 is less than the height of the second copper pillar via hole 107, so as to prevent the second copper pillar segment 108 from growing out of the second copper pillar via hole 107 and forming a mushroom head, which will make the structure and height of the second copper pillar segment 108 uncontrollable, thereby affecting the structure and height of the overall copper pillar structure.

[0066] In the embodiment, the projection of the copper pillar segment in the upper layer towards the substrate 100 is located in the projection of the copper pillar segment in the lower layer towards the substrate 100. Corresponding to the two photoetching and plating processes, that is, the copper pillar segment in the lower layer is the first copper pillar segment 104, and the copper pillar segment in the upper layer is the second copper pillar segment 108, that is, the projection of the second copper pillar segment 108 towards the substrate 100 is located in the projection of the first copper pillar segment 104 towards the substrate 100. Since the surface of the device structure electrically connected to the copper pillar structure provides a small electrical connection area, the diameter of the copper pillar segment in the upper layer is reduced to improve the electrical connection between the copper pillar structure and the provided electrical connection area. In addition, the copper pillar segments with different diameters can also make the copper pillar structure have more designability, thereby being better applied to the field of advanced packaging.

[0067] In the present embodiment, the forming method of the copper pillar segments of the adjacent upper layer and the adjacent lower layer comprises: forming the copper pillar segment of the adjacent lower layer by using the photoetching and electroplating process of the adjacent upper time; and forming the copper pillar segment of the adjacent upper layer by using the copper pillar segment of the adjacent lower layer formed by using the photoetching and electroplating process of the adjacent lower time; wherein the copper pillar via formed by using the photoetching and electroplating process of the adjacent lower time is projected towards the substrate 100 and located in the range of the copper pillar segment formed by using the photoetching and electroplating process of the adjacent upper time. Corresponding to the photoetching and electroplating process of the adjacent lower time, the forming method of the first copper pillar segment 104 and the second copper pillar segment 108 comprises: forming the first copper pillar segment 104 by using the photoetching and electroplating process of the first time; and forming the second copper pillar segment 108 by using the photoetching and electroplating process of the second time; wherein the second copper pillar via 107 formed by using the photoetching and electroplating process of the second time is projected towards the substrate 100 and located in the range of the first copper pillar segment 104 formed by using the photoetching and electroplating process of the first time.

[0068] In other embodiments, the projection of the copper pillar segment of the adjacent upper layer towards the substrate direction coincides with the projection of the copper pillar segment of the adjacent lower layer towards the substrate direction. Corresponding to the photoetching and electroplating process of the adjacent lower time, the copper pillar segment of the adjacent lower layer is the first copper pillar segment, and the copper pillar segment of the adjacent upper layer is the second copper pillar segment, i.e. the projection of the second copper pillar segment towards the substrate direction coincides with the projection of the first copper pillar segment towards the substrate direction. The projection of the copper pillar segment of the adjacent upper layer towards the substrate direction coincides with the projection of the copper pillar segment of the adjacent lower layer towards the substrate direction, i.e. the diameter of the copper pillar segment of the adjacent upper layer and the diameter of the copper pillar segment of the adjacent lower layer are the same, so that the photoetching and electroplating process of the adjacent upper time and the photoetching and electroplating process of the adjacent lower time can be reused, thereby improving the manufacturing efficiency and reducing the manufacturing cost.

[0069] In other embodiments, the forming method of the copper pillar segments of the adjacent upper layer and the adjacent lower layer comprises: forming the copper pillar segment of the adjacent lower layer by using the photoetching and electroplating process of the adjacent upper time; and forming the copper pillar segment of the adjacent upper layer by using the copper pillar segment of the adjacent lower layer formed by using the photoetching and electroplating process of the adjacent lower time; wherein the projection of the copper pillar via formed by using the photoetching and electroplating process of the adjacent lower time towards the substrate direction coincides with the projection of the copper pillar segment formed by using the photoetching and electroplating process of the adjacent upper time towards the substrate direction. Corresponding to the photoetching and electroplating process of the adjacent lower time, the forming method of the first copper pillar segment 104 and the second copper pillar segment 108 comprises: forming the first copper pillar segment 104 by using the photoetching and electroplating process of the first time; and forming the second copper pillar segment 108 by using the photoetching and electroplating process of the second time; wherein the projection of the second copper pillar via formed by using the photoetching and electroplating process of the second time towards the substrate direction coincides with the projection of the first copper pillar segment formed by using the photoetching and electroplating process of the first time towards the substrate direction.

[0070] After that, the second photo-etching plating process is completed, and the copper pillar structure is formed correspondingly. The copper pillar structure formed is regarded as an electrically connecting structure formed in a process layer.

[0071] By dividing the ultra-high copper pillar structure into multiple copper pillar segments, and forming one of the copper pillar segments in each photo-etching plating process, the thickness of the photo-etching layer formed in each photo-etching plating process is reduced, so that the process difficulty of forming the photo-etching layer and photo-etching is reduced, and the stability and reliability of the process are improved. The plating time of each copper pillar segment is effectively shortened relative to the time of plating the whole copper pillar at one time, so that the swelling and cracking of the photo-etching layer in the plating operation for a long time can be avoided. The aspect ratio of each copper pillar segment is small, so that the exchange efficiency of copper plating solution is ensured, and the copper tumor phenomenon is reduced, so that the quality and performance of the copper pillar structure are improved. In addition, dividing the copper pillar structure into multiple copper pillar segments can also break through the height limit of plating the whole copper pillar at one time, so that the copper pillar structure is more designable, and can be better applied to the field of advanced packaging.

[0072] Please refer to Figure 7 After the second photo-etching plating process is completed, the second photo-etching layer 106 and the new photo-etching layer 105 are removed, and the sputtered copper layer 101 exposed is removed as a mask.

[0073] In this embodiment, after the sputtered copper layer 101 exposed is removed, the copper pillar structure formed is bonded to a device structure formed, so that the electrical conduction between the copper pillar structure and the device structure is realized, and the substrate 100 (not shown) is removed after bonding.

[0074] It should be noted that no matter how many times the photo-etching plating process is performed, the number of plating processes in the process of forming the copper pillar structure is always N, and the number of photo-etching processes (including the formation of the photo-etching layer in each photo-etching plating process, and the formation of the new photo-etching layer 105 between adjacent photo-etching plating processes) is 2N-1. For example, in the two photo-etching plating processes in this embodiment, two plating processes are performed, i.e. N=2, and the photo-etching process is performed 2N-1=2*2-1=3 times, i.e. the first photo-etching layer 102, the new photo-etching layer 105 and the second photo-etching layer 106 are formed, which meets the above relationship.

[0075] Correspondingly, the present embodiment also provides a semiconductor structure, please continue to refer to Figure 7 , comprising: a substrate 100; a copper pillar structure on the substrate 100, the copper pillar structure comprising a plurality of copper pillar segments stacked and connected in sequence.

[0076] By dividing the ultra-high copper pillar structure into multiple copper pillar segments, the thickness of photoresist formed each time can be reduced, thereby reducing the process difficulty of photoresist formation and photoresist development, and further improving the stability and reliability of the process. The plating time of each copper pillar segment is effectively shortened relative to the time of plating the entire copper pillar at one time, thereby avoiding swelling and cracking of the photoresist in the plating operation for a long time. The aspect ratio of a single copper pillar segment is small, which can ensure the exchange efficiency of copper plating solution and thereby reduce the copper tumor phenomenon, thereby improving the quality and performance of the copper pillar structure. In addition, dividing the copper pillar structure into multiple copper pillar segments can also break through the height limit of plating the entire copper pillar at one time, making the copper pillar structure more designable, and thereby better applied in the field of advanced packaging.

[0077] Please continue to refer to Figure 7 In the embodiment, the copper pillar structure has two copper pillar segments, i.e., the copper pillar structure includes the first copper pillar segment 104 and the second copper pillar segment 108 located on the first copper pillar segment 104. The projection of the adjacent upper copper pillar segment toward the substrate 100 is located in the projection range of the adjacent lower copper pillar segment toward the substrate 100, i.e., the projection of the second copper pillar segment 108 toward the substrate 100 is located in the projection range of the first copper pillar segment 104 toward the substrate 100. Since the electrical connection area provided by the surface of the device structure electrically connected with the copper pillar structure is small, the diameter size of the upper copper pillar segment is reduced, thereby improving the electrical connection adaptation between the copper pillar structure and the provided electrical connection area. In addition, the copper pillar segments with different diameter sizes can also make the copper pillar structure have more designability, and thereby better applied in the field of advanced packaging. In addition, the diameter sizes of the adjacent upper and lower copper pillar segments are different, which can better distinguish the copper pillar formed by one-time integral plating from the prior art in terms of the appearance structure.

[0078] In other embodiments, the projection of the adjacent upper copper pillar segment toward the substrate direction coincides with the projection of the adjacent lower copper pillar segment toward the substrate direction (for example, the copper pillar structure has two copper pillar segments, i.e., the projection of the second copper pillar segment toward the substrate direction coincides with the projection of the first copper pillar segment toward the substrate direction), i.e., the diameter sizes of the adjacent upper and lower copper pillar segments are the same, thereby making the adjacent upper and lower photoetching and plating processes reusable, thereby improving the manufacturing efficiency and reducing the manufacturing cost.

[0079] Although the present application is disclosed as above, the present application is not limited to this. Any person skilled in the art can make various modifications and changes without departing from the spirit and scope of the present application, and the protection scope of the present application should be limited by the scope defined in the claims.

Claims

1. A semiconductor structure, characterized in that, include: Base; A copper pillar structure located on the substrate, the copper pillar structure comprising several layers of copper pillar segments stacked and connected in sequence.

2. The semiconductor structure as described in claim 1, characterized in that, The projection of the adjacent upper copper column segment toward the base coincides with the projection of the adjacent lower copper column segment toward the base.

3. The semiconductor structure as described in claim 1, characterized in that, The projection of the adjacent upper copper column segment toward the base is within the range of the projection of the adjacent lower copper column segment toward the base.

4. A method for forming a semiconductor structure, characterized in that, include: Provide a base; A copper pillar structure is formed on the substrate, the copper pillar structure comprising several layers of copper pillar segments stacked sequentially; wherein, the method for forming the copper pillar structure includes: A series of photolithography and electroplating processes are performed on the substrate, and each photolithography and electroplating process forms a layer of the copper pillar segment; Each of the aforementioned photolithography electroplating processes includes: A photolithographic layer is formed, wherein the photolithographic layer has copper pillar through-holes; The copper column segment is formed inside the through hole of the copper column using an electroplating process.

5. The method for forming a semiconductor structure as described in claim 4, characterized in that, In each of the photolithography electroplating processes, the height of the copper pillar segment formed is less than the height of the copper pillar through-hole.

6. The method for forming a semiconductor structure as described in claim 4, characterized in that, Before performing the next photolithography electroplating process, the method further includes: removing the photolithography layer formed in the previous photolithography electroplating process; after removing the photolithography layer formed in the previous photolithography electroplating process, forming a new photolithography layer that covers the sidewall of the copper pillar segment formed in the previous photolithography electroplating process, and the height of the new photolithography layer is less than the height of the copper pillar segment formed in the previous photolithography electroplating process.

7. The method for forming a semiconductor structure as described in claim 4, characterized in that, The projection of the adjacent upper copper column segment toward the base coincides with the projection of the adjacent lower copper column segment toward the base.

8. The method for forming a semiconductor structure as described in claim 7, characterized in that, The method for forming the copper pillar segments of adjacent upper and lower layers includes: forming the copper pillar segment of the adjacent lower layer using the adjacent previous photolithography electroplating process; forming the copper pillar segment of the adjacent upper layer using the adjacent next photolithography electroplating process; wherein the projection of the copper pillar through-hole formed in the adjacent next photolithography electroplating process toward the substrate coincides with the projection of the copper pillar segment formed in the adjacent previous photolithography electroplating process toward the substrate.

9. The method for forming a semiconductor structure as described in claim 4, characterized in that, The projection of the adjacent upper copper column segment toward the base is within the range of the projection of the adjacent lower copper column segment toward the base.

10. The method for forming a semiconductor structure as described in claim 9, characterized in that, The method for forming the copper pillar segments of adjacent upper and lower layers includes: forming the copper pillar segment of the adjacent lower layer using the adjacent previous photolithography electroplating process; forming the copper pillar segment of the adjacent upper layer using the adjacent next photolithography electroplating process; wherein the projection of the copper pillar via formed in the adjacent next photolithography electroplating process toward the substrate is within the range of the projection of the copper pillar segment formed in the adjacent previous photolithography electroplating process toward the substrate.

11. The method for forming a semiconductor structure as described in claim 4, characterized in that, Prior to the first photolithography electroplating process, the method further includes: forming a sputtered copper layer on the substrate; and forming the copper pillar structure on the sputtered copper layer.

12. The method for forming a semiconductor structure as described in claim 11, characterized in that, After forming the copper pillar structure, the method further includes: using the copper pillar structure as a mask to remove the exposed sputtered copper layer.

13. The method for forming a semiconductor structure as described in claim 11, characterized in that, The photolithography layer includes a photoresist layer or a dry film layer.

Images