Multipath power supply parallel automatic test system and test method

Abstract

The invention relates to a multi-path power supply parallel automatic test system and a test method. The multi-path power supply parallel automatic test system comprises a main control module, an instruction scheduling module, a test instrument group and a plurality of test fixtures, each test fixture is used as an independent test channel with self-defined configuration; a request signal input end of the main control module is connected with a request signal output end of the independent test channel, a test signal input end of the main control module is connected with a test signal output end of the test instrument group, and a control signal output end of the main control module is connected with a control signal input end of the instruction scheduling module; the signal output end of the instruction scheduling module is connected with the signal input end of the test instrument group, and the test instrument group is used for executing corresponding test operation on the to-be-tested power supply according to the control signal; the testing efficiency is remarkably improved, manual operation is reduced, and the basic capability of automatic parallel testing of multiple power supplies is achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of automatic testing of power supplies, and in particular to a multi-channel power supply parallel automatic testing system and testing method. BACKGROUND

[0002] At present, with the wide application of electronic products in the fields of industry, power, consumption, etc., quality testing of products before being put on the market has become a key link to ensure the performance stability and safety of the products. Different types of products usually need to adopt different testing methods and processes, and for the same type of product, especially power supply products, the testing content is often standardized, but the testing process still relies on the one-by-one execution mode. Specifically, in the traditional power supply testing process, the operator needs to connect the to-be-tested power supply into the testing platform one by one, and sequentially complete the processes of power-on, parameter testing, power-off, etc. for each device, and then connect the next device into the testing state. This "single-channel serial testing" mode has many obvious shortcomings in practical application.

[0003] Firstly, since the power supply state needs to be manually switched after each product testing is completed, so as to power on the next to-be-tested product, this process completely relies on manual operation, which not only has low testing efficiency, but also is difficult to meet the high-density testing demand before large quantities of products are delivered. Secondly, manual control of power supply switching action is easy to cause inaccurate time control, which not only may affect the consistency of testing data, but also may disturb the device performance. Thirdly, this process requires the operator to continuously stand by and follow up the testing process, causing great waste of human resources, and being not conducive to the automation upgrade and management optimization of the testing process. Therefore, how to build a parallel testing system capable of supporting multi-channel power supply simultaneous access, realizing automatic scheduling of testing tasks and collection and analysis of testing results, has become a technical problem to be solved in the field. SUMMARY

[0004] In order to solve the problems of low testing efficiency, strong manual dependence and non-parallel capability of the testing process in the prior art, the present application provides a multi-channel power supply parallel automatic testing system and testing method.

[0005] A multi-channel power supply parallel automatic testing system, comprising a master control module, an instruction scheduling module, a testing instrument group and a plurality of testing fixtures; The testing fixture is used for accessing the to-be-tested power supply, and each testing fixture serves as an independently defined testing channel. The request signal input end of the master control module is connected with the request signal output end of the independent testing channel, the testing signal input end of the master control module is connected with the testing signal output end of the testing instrument group, and the control signal output end of the master control module is connected with the control signal input end of the instruction scheduling module. A signal output end of the instruction scheduling module is connected with a signal input end of the test instrument group to receive a corresponding control signal, and the instruction scheduling module schedules test flow working states of the multiple independent test channels according to the control signal; The test instrument group is configured to perform corresponding test operations on the to-be-tested power supply according to the control signal, and output test signals generated in the test operations to the main control module through a test signal output end of the test instrument group; The main control module generates a corresponding test task queue based on the request signal sent by the independent test channel, wherein the test task queue includes multiple structured test tasks with channel identification information, test flow identification information and scheduling priority information, and the test task queue is encapsulated as a corresponding control signal to be sent to the instruction scheduling module.

[0006] By adopting the above technical solution, the parallel test architecture of the main control module, the instruction scheduling module, the test instrument group and the multiple test fixtures is constructed, the simultaneous work of the multiple test channels is realized, the test request is independently initiated by each test fixture, the main control module uniformly generates the test task queue, the instruction scheduling module cooperatively allocates the test flow state, the test efficiency is significantly improved and the manual operation is reduced, and the basic capability of the multi-channel power supply automatic parallel test is realized.

[0007] Preferably, each test instrument in the test instrument group is marked with a corresponding classification identifier according to function, and specifically includes: A power instrument, which is configured to measure power parameters, specifically a power meter and a multimeter; A load instrument, which is configured to control load application, specifically an electronic load; A waveform instrument, which is configured to collect and analyze waveforms, specifically an oscilloscope and a time sequence noise analyzer; A safety instrument, which is configured to perform fault protection tests, specifically a short-circuit tester and an overvoltage tester; A on-off instrument, which is configured to control power-on and power-off of the independent test channel, specifically a switch control instrument; Each test instrument performs corresponding test operations on the response state of the classification identifier based on the control signal.

[0008] By adopting the above technical solution, the test instruments are divided into power, load, waveform, safety and on-off types according to function, and are marked with classification identifiers, which not only facilitates the identification of test resource categories by the task scheduling system, but also enables the accurate calling of different test items, making the test control process more orderly and efficient, and improving the logical clarity and execution reliability of system scheduling.

[0009] Preferably, the test instrument group communicates with the main control module via a GPIB communication bus. The GPIB communication bus is used to support the parallel access of multiple test instruments in the test instrument group. The main control module determines the corresponding classification identifier based on the test task queue to match the test instrument with the corresponding function, and completes the directional transmission of control signals through the address information of the test instrument, realizing non-blocking control signal sending and test signal feedback between multiple independent test channels.

[0010] By adopting the above technical solution, the main control module is connected to multiple test instruments via the GPIB communication bus. While maintaining the stability of the communication structure, it supports the parallel access and control of multiple instruments. At the same time, by combining the instrument address and function classification identifier, it realizes the directional distribution of control signals and data feedback in multi-channel test tasks, and builds a communication scheduling capability with non-blocking characteristics, further ensuring test efficiency and data integrity.

[0011] A test method for a multi-channel power supply parallel automatic test system, applied to a multi-channel power supply parallel automatic test system, the test method for the multi-channel power supply parallel automatic test system includes: Customize one or more test fixtures according to the testing requirements, and set the test fixture with the completed custom configuration as an independent test channel; The system receives request signals from the independent test channel in real time and generates a corresponding test task queue based on the request signals. The identification information mapped to each structured test task in the test task queue includes at least channel identification information, test process identification information, and scheduling priority identification information. Based on the current availability status of each test instrument in the test instrument group, the scheduling priority identification information of each structured test task, and the execution dependency relationship of the test process identification information, a test sequence identifier is dynamically generated to guide the execution order of the structured test tasks, and the test sequence identifier is embedded into the test task queue to complete the test scheduling. Execute the corresponding test operations according to the test task queue after the test scheduling is completed, and generate the corresponding test report according to the test signals generated in the test operations.

[0012] By adopting the above technical solution, and by customizing the configuration of each test fixture and setting it as an independent test channel, the system can flexibly organize test resources according to actual needs, generate a structured test task queue in real time in conjunction with request signals, and thus support dynamic task orchestration and batch processing, realizing modular, parallel and intelligent management of the test process.

[0013] Preferably, the step of customizing the configuration of one or more test fixtures according to test requirements includes: Based on the testing requirements, the corresponding preset power supply test configuration template is invoked, and the interface type, voltage level, channel number requirement parameters and control synchronization requirements contained in the preset power supply test configuration template are parsed. Based on the interface type and voltage level, the test fixture structure library is invoked to select matching interface adapter components and electrical isolation components, and the interface adapter components and electrical isolation components are integrated into the input side of the test fixture to form an access path for the power supply under test. Based on the required number of channels, configure the lead-out test channels connected to the power instruments and waveform instruments in the test instrument group, and assign a unique lead-out port code to each lead-out test channel; Based on the control synchronization requirements, determine whether it is necessary to embed a switching instrument in the test fixture. If so, synchronously configure a signal response unit that is linked to the switching instrument for control. The corresponding request channel identifier is generated based on the port number, and the request channel identifier is registered in the corresponding identifier preset database.

[0014] By adopting the above technical solution, a preset power supply test configuration template and test fixture structure library are introduced. Based on the interface type, voltage level and channel requirements, the matching configuration of the adapter components and lead-out channels is automatically completed. At the same time, necessary on / off instruments and signal response units are connected according to control synchronization requirements, so that the test fixture can adapt to different product specifications and achieve rapid deployment and high compatibility access.

[0015] Preferably, the step of receiving the request signal sent by the independent test channel in real time includes: Upon detecting a request signal from any of the independent test channels, the start time of the time window is set and the time window is started. During the time window, it is continuously monitored whether request signals from other independent test channels are received. If request signals from other independent test channels are received, the request signals are included in the current time window. If no new request signal is received within the duration of the time window and the preset time threshold has been reached, the time window is closed, and all request signals received within the time window are uniformly divided into a test batch for use when generating a test task queue later.

[0016] By adopting the above technical solution, a time window mechanism is introduced to collect and classify request signals from multiple test channels. Within a set time range, multiple requesting channels are merged into a test batch, enabling the system to process the scheduling and generation of multiple test tasks simultaneously, effectively reducing control response time and improving overall concurrent scheduling efficiency.

[0017] Preferably, the step of generating a corresponding test task queue based on the request signal includes: Based on the request channel identifiers registered in the preset database, the corresponding channel identifier information is extracted from the request signal, and the validity of the channel identifier information is verified. The preset test process mapping rule set is invoked, the corresponding test process configuration template is matched according to the channel identification information, and the test items defined in the test process configuration template are extracted to generate the corresponding test process identification information. Based on the test resource status table under maintenance, the test instruments required for the test item are determined. Combined with the preset resource allocation rules, a corresponding scheduling priority is assigned to each test item to generate corresponding scheduling priority identification information. The request channel identifier, the test process identifier, and the scheduling priority identifier are structured and encapsulated to form a structured test task, and multiple structured test tasks are encapsulated into corresponding test task queues.

[0018] By adopting the above technical solution, combined with the registered channel identification information, test process mapping rules and test resource status table, structured test tasks are automatically generated, clarifying the instruments, priorities and control paths required for each test item, thereby constructing a high-precision and highly consistent test task queue, laying the foundation for subsequent task scheduling and test execution.

[0019] Preferably, the step of dynamically generating a test sequence identifier to guide the execution order of structured test tasks based on the current availability status of each test instrument in the test instrument group, the scheduling priority identifier information of each structured test task, and the execution dependency relationship of the test process identifier information, and embedding the test sequence identifier into the test task queue to complete the test scheduling, includes: Obtain the availability status of each test instrument in the test instrument group at the current moment. The availability status only includes whether the corresponding test instrument is idle, the remaining response bandwidth, and the estimated execution time. Construct a corresponding availability weight matrix based on the availability status; The scheduling priority identifier information corresponding to the structured test task is parsed to determine the scheduling priority of each test item. Based on the execution dependency relationship between the scheduling priority and the test process identifier information, a task priority graph is established. Based on the availability weight matrix and the task priority graph, the corresponding test items in the test task queue are labeled with corresponding test order identifiers, so that the test order identifiers are embedded into the test task queue to complete test scheduling.

[0020] By adopting the above technical solution, constructing an instrument availability weight matrix and a task priority graph, and combining the dependency relationship and scheduling priority of test items, a test sequence identifier is dynamically generated to guide the execution order. This enables precise scheduling and control of test operations in a multi-task environment, effectively solves the problems of multi-task competition and resource conflict, and ensures the rationality of scheduling results and execution stability.

[0021] Preferably, the step of labeling the corresponding test items in the test task queue with corresponding test order identifiers based on the availability weight matrix and the task priority graph includes: Based on the availability weight matrix, the availability score is calculated for each node in the task priority graph. Based on the mapped task priority graph, a scheduling sorting algorithm is invoked to sequentially assign corresponding test sequence numbers to the graph nodes, and a corresponding test sequence identifier is constructed based on the test sequence numbers. The test sequence identifier is associated with each test item in the test task queue, and the test sequence identifier is embedded into the test task queue in a field embedding manner.

[0022] By adopting the above technical solution, when scheduling and sorting test tasks, the test order identifier is formed by combining the node scores in the graph structure with the output results of the scheduling algorithm. This identifier is then embedded into the task queue as a field, achieving a tight binding between the scheduling strategy and the task structure. This enables the system to efficiently and orderly execute and distribute test tasks, further optimizing the overall execution rhythm.

[0023] Preferably, before the step of dynamically generating test sequence identifiers to guide the execution order of structured test tasks based on the current availability status of each test instrument in the test instrument group, the scheduling priority identifier information of each structured test task, and the execution dependency relationship of the test process identifier information, the method further includes: The corresponding transmission path is determined according to the channel identification information in the test task queue, the corresponding test process is determined according to the test process identification information, the corresponding preparatory signal is generated based on the test process, and the preparatory signal is sent to the corresponding independent test channel according to the transmission path. Based on preset verification rules, the independent test channel verifies the test process mapped in the preparatory signal. If the verification fails, the preparatory signal is ignored; if the verification succeeds, the corresponding confirmation signal is returned. If the confirmation signal is received, a corresponding control signal is generated based on the verification information mapped by the confirmation signal.

[0024] Preferably, before executing the scheduling, a preparatory signal is first sent to the corresponding test channel, and the test channel verifies the preset test process. The control signal sending process is only started after the confirmation signal is successfully returned. This mechanism enhances the reliability judgment and pre-verification capability of the test process and avoids test failures caused by abnormal channel configuration or data conflicts.

[0025] In summary, this application includes at least one of the following beneficial technical effects: This application constructs a test architecture that supports the parallel operation of multiple independent test channels by introducing a collaborative control mechanism among the main control module, command scheduling module, multiple test fixtures, and test instrument group. The main control module can dynamically generate corresponding test task queues based on the request signals issued by each test fixture, and encapsulate the queue information as control signals to send to the command scheduling module. The scheduling module further coordinates the test process status of multiple channels, enabling multiple test channels to trigger test operations simultaneously within the same time window. This avoids the serial processing method of powering up and measuring power devices one by one in traditional test systems, solving the problems of strong reliance on manual labor, frequent switching, and low efficiency. In addition, the test instrument group, as a shared resource, can execute synchronous test operations of sub-channels based on channel mapping relationships and process association logic after receiving control signals from the scheduling module. The collected test signals are then sent back to the main control module for centralized analysis and processing, thereby realizing the parallelization of the test process, the automation of the control process, and the consistency of data processing. This significantly improves the test efficiency and system resource utilization of multi-power supply products, significantly reduces the number of manual operations and human errors, and provides an efficient and scalable technical path for high-density power supply testing scenarios. Attached Figure Description

[0026] Figure 1 This is a flowchart of a multi-power supply parallel automatic test system according to an embodiment of this application.

[0027] Figure 2 This is a flowchart illustrating the implementation of a test method for a multi-power supply parallel automatic test system according to an embodiment of this application. Detailed Implementation

[0028] The present application will be further described in detail below with reference to the accompanying drawings.

[0029] In one embodiment, such as Figure 1 As shown, this application discloses a multi-power supply parallel automatic test system, which includes a main control module, an instruction scheduling module, a test instrument group, and multiple test fixtures; Test fixtures are used to connect to the power supply under test (DUT). Each test fixture is a custom-configured independent test channel. Multiple test fixtures are configured to connect to different DUT devices in parallel. Each test fixture has an independent access port and control interface, and is set as an independent test channel through custom configuration. When a test task needs to be performed, each independent test channel can send a request signal with its own identification information to the main control module.

[0030] The main control module's request signal input is connected to the request signal output of the independent test channel, its test signal input is connected to the test signal output of the test instrument group, and its control signal output is connected to the control signal input of the instruction scheduling module. The main control module receives request signals from each test channel and generates a structured test task queue based on these requests. Each test task in the generated queue contains corresponding channel identification information, test process identification information, and scheduling priority information to identify the test type, preset process order, and urgency level to be executed by the current channel. The main control module encapsulates this task queue into a data structure containing scheduling information and sends it to the instruction scheduling module via its control signal output.

[0031] The signal output terminal of the instruction scheduling module is connected to the signal input terminal of the test instrument group to receive the corresponding control signals. The instruction scheduling module schedules the test process working status of multiple independent test channels according to the control signals. After receiving the control signals, the instruction scheduling module coordinates and arranges system resource scheduling according to the process requirements and priorities of each task in the task queue, controls the test process working status of each test channel, and sends the specific test execution commands to the test instrument group through the signal output terminal.

[0032] The test instrument group is used to perform corresponding test operations on the power supply under test according to control signals, and outputs the test signals generated during the test operations to the main control module through the test signal output terminal of the test instrument group. The test instrument group consists of multiple test devices with different functions, including power meters, electronic loads, oscilloscopes, overvoltage testers, short-circuit testers, etc. Each test device is connected to the scheduling module through a unified communication interface and can respond to instructions from the scheduling module to perform corresponding test operations on its assigned channel, such as voltage, current, waveform, or safety characteristic tests. During the test, the generated test signals are fed back to the main control module through the test signal output terminal of the test instrument group.

[0033] The main control module generates a corresponding test task queue based on the request signal sent from the independent test channel. The test task queue includes multiple structured test tasks with channel identification information, test process identification information and scheduling priority information. The test task queue is encapsulated into a corresponding control signal and sent to the instruction scheduling module.

[0034] Furthermore, each testing instrument in the testing instrument group is labeled with a corresponding category according to its function, specifically including: Power instruments are used to measure power parameters, specifically wattmeters and multimeters. Load-type instruments are used to apply control to loads, specifically electronic loads; Waveform instruments are used for waveform acquisition and analysis, specifically oscilloscopes and timing noise analyzers. Safety instruments are used for fault protection testing, specifically short-circuit testers and overvoltage testers. Continuity control instruments are used for independent testing channel power-on and power-off control, specifically switch controllers. Each testing instrument performs corresponding testing operations based on the response status of the classification label to the control signal.

[0035] Furthermore, the test instrument group communicates with the main control module via the GPIB communication bus. The GPIB communication bus is used to support the parallel access of multiple test instruments in the test instrument group. The main control module determines the corresponding classification identifier based on the test task queue to match the test instrument with the corresponding function, and completes the directional transmission of control signals through the address information of the test instrument, realizing non-blocking control signal sending and test signal feedback between multiple independent test channels.

[0036] In this embodiment, the multi-power supply parallel automatic test system is built based on the T9010 automatic test system and includes a main control module, an instruction scheduling module, a test instrument group, and multiple configurable dedicated ATS test fixtures. Multiple ATS test fixtures are used to connect multiple groups of power supplies under test in parallel. Each fixture serves as a custom-configured independent test channel, with physical isolation and electrical protection structures between channels. An embedded switch controller enables precise synchronous control of the power-on and power-off operations of each channel, ensuring that multiple channels do not interfere with each other during operation and that the system control logic responds uniformly.

[0037] The main control module of the system is integrated into an industrial computer platform and loads an open-architecture software system, allowing users to customize test items and execution conditions according to different power supply testing needs. Whenever an independent test channel sends a request signal, the main control module parses it and generates a structured test task queue. Each test task in this queue contains channel identification information, test process identification information, and scheduling priority information, which are further encapsulated into control signals and output to the command scheduling module. The command scheduling module, as the core of task scheduling and execution control, connects its output to the test instrument group via a GPIB communication bus to distribute scheduling results and coordinate the test process status of multiple channels.

[0038] The test instrument group includes several specialized test instruments and equipment categorized by function: power instruments include, for example, the E5013 wattmeter and multimeter, used to measure the output voltage, current, power factor, and efficiency of the power supply under test; load instruments include, for example, the Mxx / L28 series DC electronic loads, used to apply dynamic load conditions such as constant current, constant resistance, and constant power; waveform instruments include, for example, oscilloscopes and the E5010 timing / noise measurement card, used to monitor startup waveforms, output ripple, and electrical noise characteristics; safety instruments include, for example, the E5011 short-circuit and OVP measuring instrument, which can simulate abnormal scenarios to verify the equipment protection mechanism; and continuity instruments are mainly the E5012 switch controller, used to precisely control the power supply status of each test channel and realize programmed power-on / power-off process control.

[0039] All testing instruments are connected to the GPIB communication bus via NI-PCI GPIB cards, and unified address allocation and response management are performed according to the IEEE-488 protocol. When generating tasks, the main control module locates the matching testing instruments based on the required functions of the test items, and sends commands precisely by channel in non-blocking mode through the command scheduling module. Test data is returned to the main control module via the GPIB bus, and the software system automatically completes data integration, result comparison, and test report generation. This implementation scheme not only supports simultaneous testing of 6, 8, or 10 power supplies, but can also support concurrent scenarios with higher channel numbers through module expansion, significantly improving testing efficiency and reducing manual intervention costs. It is suitable for the factory testing of power supply products with high batch and high consistency requirements.

[0040] like Figure 2 As shown, a test method for a multi-power supply parallel automatic test system is applied to such a system. The test method for the multi-power supply parallel automatic test system includes: S10. Customize one or more test fixtures according to testing requirements, and set the customized test fixture as an independent test channel. Custom configuration refers to the process by which the user or system, before system operation, parameterizes the structure, electrical interfaces, and channel numbers of the test fixtures according to the specifications, interface types, voltage levels, and control methods of the power supply under test, so that each test fixture is adaptable and can be put into operation as an independent test channel. This configuration process usually involves steps such as selecting hardware interface components, defining signal adaptation paths, enabling isolation protection modules, and setting test content associations to meet the testing requirements of different types of power supplies. For example, if a batch of power supplies under test are dual-output DC power supplies, the system can select a test fixture with dual DC channel interfaces through custom configuration and set it as an independent test channel with the number TCH-003, which is used to independently initiate test task requests and execute the corresponding process. An independent test channel refers to each test fixture channel in the system that has been configured and assigned a unique identifier. This channel has independent test signal paths, power supply control capabilities, instrument mapping relationships, and task scheduling logic, and can serve as a trigger and execution carrier for unit-level parallel tasks. Each independent test channel can proactively send a test request to the main control module and, after obtaining scheduling permission, control the test equipment it is connected to to complete the corresponding task. For example, if there are a total of 8 test fixtures in the system, and each fixture corresponds to a set of power supplies under test, they are registered in the software as independent test channels TCH-001 to TCH-008, and participate in scheduling and testing respectively.

[0041] S20. Receive request signals from independent test channels in real time, and generate corresponding test task queues based on the request signals. The identification information mapped to each structured test task in the test task queue includes at least channel identification information, test process identification information, and scheduling priority identification information. The request signal refers to the data communication content sent by an independent test channel to the main control module after it is ready or receives an external trigger, indicating that the channel needs to enter the test process and request resource allocation. The request signal typically includes data fields such as test channel identification, power supply information under test, and test item summary, used to trigger the main control module to generate test tasks. For example, when the test fixture in the TCH-005 channel completes the power-on detection and is ready to perform efficiency testing, it will send a request signal to the main control module containing its own number, target test item, and power supply model. The test task queue is a set of structured tasks generated by the main control module based on the received request signals, where each task includes necessary scheduling parameters, test content definitions, and resource allocation information. This queue serves as the core reference data for the scheduling module within the system, used to determine the task execution order and the arrangement of instrument control commands. The tasks in the queue can simultaneously cover the testing needs of multiple channels, supporting asynchronous management and priority sorting. For example, after receiving three request signals TCH-001, TCH-004, and TCH-006, the system generates three test tasks, which are arranged into task queue Q1 according to scheduling priority, for the instruction scheduling module to issue and execute sequentially or in parallel.

[0042] A structured test task is the basic unit that makes up the test task queue. Each task consists of multiple fields describing the test channel it is bound to, the target test process, priority requirements, and related resource mappings. Structured tasks are encapsulated in data structure form, facilitating sorting, allocation, and tracking by the scheduling module. For example, a structured test task might include the following fields: channel identifier TCH-002, test process efficiency + standby + short circuit, high priority, and resources called: power meter and electronic load.

[0043] Channel identification information is a core identification field in structured test tasks, used to clearly identify which test channel a test task corresponds to. It typically consists of a unique number or path information, ensuring the system can map test tasks to actual hardware resources one-to-one. For example, TCH-007, as the channel identification information for a specific channel, will be embedded in the task queue, control signals, and data tags throughout the testing process.

[0044] Test procedure identification information describes the specific combination of test steps required for the test task. It can be selected from standard procedure templates or configured by the user to ensure that the correct test instruments and test sequence are called during test task execution. For example, a test procedure identification information defined as "PWR-STD-03" indicates that standby power consumption, dynamic load response, and short circuit protection test steps need to be performed sequentially.

[0045] The scheduling priority identifier is a field used in task priority comparisons. It indicates the task's importance, urgency, or resource contention priority within the current test batch. The system uses this identifier for sorting to determine the task scheduling order. For example, when multiple request signals are received during peak hours, test tasks marked with the "PRIO-HIGH" identifier will be scheduled for execution with priority.

[0046] S30. Based on the current availability of each test instrument in the test instrument group, the scheduling priority identifier information of each structured test task, and the execution dependency relationship of the test process identifier information, a test sequence identifier is dynamically generated to guide the execution order of the structured test tasks. This test sequence identifier is then embedded into the test task queue to complete the test scheduling. The test sequence identifier is calculated by the scheduling module during the scheduling phase based on the dependencies between tasks, resource availability, and priority weights. It is used to clarify the final execution order of the test tasks. It is the core output of the scheduling result and directly affects the pace of instruction issuance and the overall efficiency of the test. For example, in a test batch, three tasks are assigned sequence identifiers SEQ-01, SEQ-02, and SEQ-03, respectively, and the system will strictly execute the corresponding test processes in this order.

[0047] S40. Execute the corresponding test operations according to the test task queue after the test scheduling is completed, and generate corresponding test reports based on the test signals generated during the test operations. The test report is the final result document of the system after completing the test task, processing, archiving, and outputting the test signal feedback data. The test report includes test data, anomaly records, parameter judgments, and channel information, serving as a direct basis for product quality assessment and factory audit. For example, after completing the short-circuit protection test on channel TCH-003, the system automatically generates a test report containing data such as response time, peak current, and action duration, and binds it to the product number.

[0048] Furthermore, the step of customizing one or more test fixtures according to testing requirements includes: S101. Based on the test requirements, the system calls the corresponding preset power supply test configuration template and parses the interface type, voltage level, channel number requirements, and control synchronization requirements contained in the preset power supply test configuration template. The preset power supply test configuration template refers to a standardized set of test configurations pre-established and stored in the system, applicable to different types of power supply products. Each template contains structured parameters such as specific test objectives, typical power supply specifications, interface requirements, number of channels, power supply level, and synchronization mechanism, used to quickly match suitable resources and complete channel settings before executing the test. This template can be derived from historical test experience, product specification analysis, or standard process flow extraction, possessing high reusability and flexible scalability. For example, when the test object is a 48V industrial power supply with dual outputs and fast start-up characteristics, the system can automatically match a template named "IND-48V-DUAL," which records key information such as channel allocation method, the logic of the switching controller used, and the safety test items to be called.

[0049] Interface type refers to the connector type or electrical signal access specification that the power supply under test (DUT) and the test fixture need to match at the physical level. Common types include pin-type, screw-locking type, standard DC connector, and quick-connect terminal block. The interface type directly determines the mechanical port configuration and electrical lead-out method of the test fixture, and has a significant impact on channel adaptation and contact reliability during automated testing. For example, when testing a batch of UAV power modules using the XT60 interface, the system will identify the interface type as "XT60," select an adapter component with this interface structure from the test fixture structure library, and complete the connection.

[0050] Voltage level refers to the standard voltage range of the power supply under test in its normal output state. It is used to determine the required insulation protection, electrical isolation, instrument range configuration, and voltage response characteristics in the test channel. Voltage level affects the selection and connection method of electrical modules in the test fixture, and also determines the configuration of electronic loads and oscilloscope input ranges during system operation. For example, if the output of the current power supply under test is rated at 110VDC, the system will determine the voltage level as "high voltage DC," and the corresponding test fixture will activate lead-out components with high voltage isolation capabilities and select a power meter with a range covering up to 150V.

[0051] The channel number requirement parameter describes the number of channels required for parallel use in the test system based on the test process and product characteristics. It reflects how many electrical outputs the product under test needs to acquire and control within the same time period. This parameter is usually provided by the test template, but can also be calculated in real time according to the user-defined test process. It is used to allocate the structural resources of the test fixture and the control paths of the test instruments. For example, if a four-output communication power supply needs to monitor the current and voltage behavior of the main and backup circuits simultaneously, the channel number requirement parameter is 4. The system will select an ATS fixture that supports at least 4 access channels and configure channel numbers TCH-001 to TCH-004.

[0052] Control synchronization requirements refer to the technical requirements for maintaining temporal synchronization among multiple test operations or power control actions in multi-channel testing. This is used to coordinate the time consistency of operations such as test triggering, data sampling, and power supply switching. Control synchronization requirements are typically applicable to test scenarios where the synchronous behavior of multiple outputs needs to be observed, such as multi-power supply load response consistency assessment and redundancy switching delay measurement. For example, when testing the primary / backup power supply switching performance in a redundant power supply architecture, the system will identify that the scenario has control synchronization requirements, automatically configure an on / off controller supporting synchronous control logic in the test fixture, and set a synchronization sampling flag.

[0053] S102. Based on the interface type and voltage level, call the test fixture structure library to select the matching interface adapter component and electrical isolation component, and integrate the interface adapter component and electrical isolation component into the input side of the test fixture to form an access path for the power supply under test. The test fixture structure library is a database of fixture component combinations used in the system to match different test configuration requirements. It stores a large number of standardized or modular interface components, electrical lead-out modules, isolation devices, and their structural assembly methods to support automated fixture configuration processes. This library can be indexed and accessed by interface type, voltage level, adaptation range, structural compatibility, and other dimensions, enabling rapid configuration and replacement. For example, when the test template specifies three voltage outputs and the interface type is DC5.5×2.1mm, the system will extract a fixture structure combination with three outputs and DC plug terminals from the library for automated assembly and adaptation testing.

[0054] Interface adapter components are specific connector parts selected from the test fixture structure library for connecting the power supply under test (DUT) to the test channel. Their function is to ensure reliable physical connection, stable electrical signal transmission, and compatibility with the power output type of the DUT. They may include a plastic housing, pins, wires, insulating sleeves, and mounting slots. For example, when testing a batch of automotive power supplies using aviation plug connections, an aviation socket of model YYC-4 can be selected as the interface adapter component, equipped with a locking mechanism to prevent plug slippage during testing.

[0055] An electrical isolation module is an electrical isolation unit installed between the input terminal of a test fixture and the internal circuitry of the test system. Its main functions are to suppress high-voltage interference, prevent potential coupling between different test channels, and protect test instruments from surge damage. This module typically includes structures such as an isolation transformer, optocoupler, voltage clamp, or insulating barrier. For example, if a test requires monitoring the startup characteristics of a 380VAC input power supply, the system will automatically configure an electrical isolation module containing a high-voltage isolation transformer and varistor protection circuitry to ensure the safety of the control terminal.

[0056] S103. Based on the channel number requirement parameters, configure the lead-out test channels connected to the power instruments and waveform instruments in the test instrument group, and assign a unique lead-out port code to each lead-out test channel. A lead-out test channel refers to a signal path led out from inside the test fixture and connected to the test instrument or data acquisition system, used to complete the sampling, load connection, or on / off control of the power supply output signal. The number of lead-out channels is consistent with the channel number requirement parameters in the test template and is registered as an independent test unit in the system. For example, when performing efficiency testing on a dual-output switching power supply, lead-out channel 1 in the test fixture is connected to a power meter to measure the main output, and lead-out channel 2 is connected to an electronic load to perform a backup load test.

[0057] The port code is a unique identifier assigned by the system to each test port, used to identify channel ownership during subsequent scheduling control, data return, and report generation. This code is typically a structured string or a number, such as TCH-002-OUT1, used to uniquely locate the corresponding physical test port. For example, if two test ports are configured in channel TCH-005, the system can assign them codes TCH-005-CH1 and TCH-005-CH2 respectively to distinguish between the main output and the auxiliary output.

[0058] S104. Based on the control synchronization requirements, determine whether it is necessary to embed on / off instruments in the test fixture. If so, synchronously configure a signal response unit that is linked with the on / off instruments for control. S105. Generate the corresponding request channel identifier based on the port number and register the request channel identifier to the corresponding identifier preset database. The identifier preset database is a logical database in the system used to store metadata such as various test channel identifiers, interface parameters, and control logic mapping relationships. Its function is to support the rapid query and parsing of identifier data by functional modules such as task generation, process matching, and scheduling control. The system can dynamically register new channel identifiers or configuration data to this database during operation. For example, when a channel completes interface configuration and generates channel identifier TCH-009, the system will automatically write the identifier and its associated information into the identifier preset database for subsequent task calls and identifier verification.

[0059] Furthermore, the step of receiving request signals from the independent test channel in real time includes: S2011. Upon detecting a request signal from any independent test channel, set the start time of the time window and activate the time window. The time window is a temporary period set by the system after detecting a test request signal from an independent test channel to receive more requests. During this period, the system continuously monitors for simultaneous requests from other test channels and aggregates these requests into a single test batch. This mechanism aims to improve scheduling efficiency and reduce the communication and control overhead caused by frequent distributed scheduling. For example, when the system detects a request signal from TCH-002 at T=1.000 seconds, it immediately opens a 200ms time window. If request signals from TCH-004 and TCH-007 are detected at T=1.150 seconds, the system will group these three requests into a single batch for unified scheduling and processing.

[0060] The start time of a time window refers to the time at which the window officially opens, typically determined by the timestamp of the first request signal received by the system. Logically, this time point serves as a reference for window timing, controlling the window's closing time and subsequent batch division. For example, if TCH-003 sends a request signal at T=3.480 seconds, the system will set 3.480 seconds as the start time of the current time window, and whether subsequent requests are included in the same batch will be based on this.

[0061] S2012. During the time window, continuously monitor whether request signals from other independent test channels are received. If request signals from other independent test channels are received, include the request signals in the current time window. S2013. If no new request signal is received within the time window duration and the preset time threshold has been reached, the time window is closed, and all request signals received within the time window are uniformly divided into a test batch for use when generating the test task queue later.

[0062] The time window duration refers to the maximum allowed listening time after the system opens the request receiving time window. After this time, the window automatically closes and the system proceeds to the next stage of task generation logic. This duration can be a fixed value or dynamically adjusted based on system load and custom strategies, typically set in milliseconds. For example, if the time window duration is set to 300ms in the system configuration, other request signals arriving within 0-300ms after TCH-001 initiates the request will be considered as part of the same batch for processing.

[0063] The preset time threshold is a parameter used to determine whether the current time window has reached its maximum duration, and it is one of the logical bases for closing the window. The system can use this threshold to prevent scheduling delays caused by continuous monitoring, and it also ensures a clear boundary between different batches. For example, if the time threshold is 250ms, and no new requests have arrived within that time period since the start of the time window, the system will close the window and group the previously received requests into a test batch to be scheduled.

[0064] A test batch is a set of request signals from multiple independent test channels received by the system within the same time window. It serves as a basic unit for simultaneous scheduling and processing during the test task generation phase. Batch processing effectively improves resource allocation efficiency and avoids scheduling inconsistencies caused by differences in response times between test channels. For example, if the system receives request signals from TCH-002, TCH-005, and TCH-008 within a 300ms window, these three are grouped into the same test batch, and subsequent test task generation will be scheduled, ordered, and controlled based on this batch.

[0065] Furthermore, the step of generating the corresponding test task queue based on the request signal includes: S2021. Based on the registered request channel identifiers in the identifier preset database, extract the corresponding channel identifier information from the request signal and perform validity verification on the channel identifier information. Validity verification is a parameter legality judgment operation performed by the system after extracting the channel identifier information. It is mainly used to confirm whether the identifier has been registered in the system, whether it is bound to a valid configuration template, and whether it is not in a test conflict state, thereby ensuring that the generated test task has the conditions for execution and can be correctly scheduled. Validity verification can be based on multiple dimensions such as identifier format, registration status, and resource conflict rules. For example, when a request signal containing the identifier TCH-011 is received, the system will search the identifier preset database to verify whether the number has been registered. If there is no record or it is currently in an occupied state, the verification is considered to have failed, and the request will be ignored or delayed.

[0066] S2022. The system invokes a pre-defined test process mapping rule set, matches the corresponding test process configuration template based on the channel identification information, extracts the test items defined in the test process configuration template, and generates the corresponding test process identification information. The test process mapping rule set is a predefined set of mapping rules in the system used to determine the corresponding test process template based on the channel identification information. This rule set is typically categorized according to dimensions such as product type, power supply level, and port structure, and supports multiple matching mechanisms, such as rule matching, tag matching, and condition triggering. The mapping rules enable the system to automatically select appropriate test item combinations when faced with different channel requests, thereby constructing structured test tasks. For example, if the product type corresponding to a certain identifier TCH-004 is a high-voltage DC power supply, the rule set will match it to the template "DC-HV-01," which contains three test items: efficiency test, ripple detection, and short-circuit protection. A test item is the smallest functional unit defined in the test process configuration template, used to represent a specific test operation that can be executed independently. Each test item is associated with a test objective and corresponds to at least one test instrument and test signal acquisition method. The execution result is usually presented in the form of numerical parameters or judgment status. For example, in the efficiency evaluation test process, a certain test item is "power efficiency test when the load is full". This item will call the power meter to sample the input and output power and calculate the efficiency percentage.

[0067] S2023. Based on the test resource status table under maintenance, determine the test instruments required for each test item. Combined with preset resource allocation rules, assign corresponding scheduling priorities to each test item to generate corresponding scheduling priority identifiers. The test resource status table is a resource status management structure maintained in real-time during system operation, used to record the current usage, availability status, occupied channels, and remaining bandwidth of all test instruments. This status table is the basis for the task scheduling module to allocate resources, avoiding scheduling conflicts caused by multiple tasks simultaneously competing for the same test equipment. For example, when the scheduling module attempts to allocate an electronic load to TCH-008 to perform a test, it will first query the test resource status table to confirm whether the load is idle. If it is already occupied by TCH-002, the scheduling priority needs to be readjusted. The resource allocation rules are a set of policy rules used by the system to determine how to allocate the resources required for test tasks, including priority judgment, resource mutual exclusion judgment, retry mechanism, and task blocking strategy. These rules are used to allocate executable instrument resources for each test item in conjunction with the test resource status table, and to determine whether queuing is allowed, whether backup equipment is activated, etc. For example, if power meter resources are limited, and the resource allocation rules prioritize efficiency testing over power factor testing, the system will prioritize meeting the resource requirements of efficiency testing.

[0068] S2024. The request channel identifier information, test process identifier information and scheduling priority identifier information are encapsulated in a structured manner to form a structured test task, and multiple structured test tasks are encapsulated into corresponding test task queues.

[0069] Furthermore, based on the current availability status of each test instrument in the test instrument group, the scheduling priority information of each structured test task, and the execution dependency relationship of the test process identification information, a test sequence identifier is dynamically generated to guide the execution order of structured test tasks, and the test sequence identifier is embedded into the test task queue to complete the test scheduling step, including: S301. Obtain the availability status of each test instrument in the test instrument group at the current moment. The availability status only includes whether the corresponding test instrument is idle, the remaining response bandwidth, and the estimated execution time. The availability status refers to the set of working status information collected in real time by the system for all devices in the test instrument group before generating the scheduling plan, used to determine whether each instrument is in a schedulable state. This status includes multiple dimensions such as whether it is idle, whether it is in the cooling or restart process, the remaining bandwidth capacity, and the estimated execution time, and is the basis for resource judgment and task arrangement during the scheduling process. For example, when the system detects that power meter A is running and has a remaining runtime of approximately 12 seconds, while power meter B is idle, then under the current availability status, the system will prioritize scheduling the task to power meter B.

[0070] S302. Construct a corresponding availability weight matrix based on availability status. The availability weight matrix is ​​a multi-dimensional data matrix constructed by the system based on the current status of each test instrument to quantify the availability of test resources. This matrix uses instrument type as rows and key status indicators as columns, such as idle status flags, response bandwidth, and average execution time. By assigning weighting factors to different dimensions, numerical weights are formed to guide the matching process between tasks and instrument resources in the subsequent scheduling priority graph. For example, if a load instrument has a long idle time, high response bandwidth, and high task execution success rate, its weight in the weight matrix will be much higher than other load instruments, making it more likely to be prioritized in scheduling.

[0071] S303. Analyze the scheduling priority information corresponding to the structured test tasks to determine the scheduling priority of each test item. Based on the execution dependencies between the scheduling priorities and test process identifiers, establish a task priority graph. The task priority graph is a directed graph structure constructed by the system based on the execution dependencies and scheduling priorities between structured test tasks. Each graph node represents a test item, and graph edges represent the sequential dependencies or resource exclusivity relationships between tasks. The task priority graph is used to assist in deciding the scheduling order, ensuring that the execution requirements such as task serialization, concurrency, and mutual exclusion are met. It is the core basic structure for scheduling complex test processes. For example, if task A is a power-on test and task B is an output stability test, and B must be executed after A, then a dependency edge will be formed from node A to node B in the task priority graph, and the system will arrange the scheduling order accordingly.

[0072] S304. Based on the availability weight matrix and task priority graph, the corresponding test items in the test task queue are labeled with corresponding test order identifiers, so that the test order identifiers are embedded in the test task queue to complete test scheduling. The test order identifier is an execution order number dynamically assigned to each test item during the task scheduling phase, used to clarify the actual execution order of each task within the same batch. During the generation process, the system comprehensively considers the dependency paths in the task priority graph, instrument availability weights, and overall resource usage strategies, and performs topological sorting or scheduling optimization sorting on the nodes in the graph to obtain the order number, which is then embedded into the test task structure as a scheduling reference. For example, if task B depends on task A to complete, and task C can be executed independently, the system assigns the order identifier A→B, with C executed in parallel, and the final order is SEQ-01(A), SEQ-02(C), SEQ-03(B). After the scheduling module generates the sorting results, the test order number corresponding to each task is appended as a field to the task data structure, so that the scheduling instructions can be executed in an orderly manner according to the identifier during the issuance process, ensuring that each test item starts, coordinates, and completes in the planned order, improving the controllability of scheduling and the consistency of the overall system response. For example, in task queue Q-BATCH-003, five test tasks are labeled SEQ-01 to SEQ-05 respectively. The system issues test instructions and start signals accordingly, so that the entire batch test proceeds smoothly in the defined order.

[0073] Furthermore, the step of labeling the corresponding test items in the test task queue with corresponding test order identifiers based on the availability weight matrix and task priority graph includes: S3041. Based on the availability weight matrix, the system scores the availability of each node in the task priority graph. Building upon the task priority graph, the system uses the current resource availability data of each test instrument in the availability weight matrix to quantitatively evaluate each task node in the graph, determining the scheduling difficulty and execution cost of the task under the current resource environment. Scoring is typically based on indicators such as idle rate, response time, and instrument performance in the weight matrix, combined with the task's dependence on the instrument. For example, if the power instrument that task node A depends on is currently completely idle and has extremely low communication response latency, then this node will receive a higher score and be prioritized in the execution sequence; while the instrument that node B depends on has a high load rate and slow response, its score is relatively low, and it will be scheduled later.

[0074] S3042. Based on the mapped task priority graph, a scheduling and sorting algorithm is invoked to sequentially assign corresponding test sequence numbers to graph nodes, and construct corresponding test sequence identifiers based on these test sequence numbers. Based on the task priority graph, and combining availability scores and scheduling strategies, the graph structure is adjusted by modifying the node structure and edge weights to more accurately describe the task scheduling priority relationships under the current resource environment. This graph structure serves as input during the scheduling and sorting process, supporting the scheduling algorithm in making optimal decisions when multiple dependent paths exist and different scheduling costs exist. For example, in the original task priority graph, A→B→C is a sequential dependent path. However, if resource status makes the dependent instrument C easier to obtain, while resource B is scarce, the weights in the mapped priority graph are reassigned, making path A→C appear earlier in the sorting. The scheduling and sorting algorithm is the algorithm model used by the system to perform sorting operations based on the mapped task priority graph. Common algorithms include topological sorting, greedy sorting, dynamic priority-based sorting, and heuristic task graph traversal, used to assign execution sequence numbers to each task node. This algorithm comprehensively considers node scores, graph dependencies, resource exclusivity, and concurrent execution conditions, ultimately outputting a test sequence that can be directly used for scheduling execution. For example, the system uses a weighted topological sorting algorithm, traversing the graph based on task dependency edges and availability scores, outputting the execution sequence T1, T4, T2, T3, and numbered sequentially from SEQ-01 to SEQ-04. The test sequence number is the position number of each task node in the execution queue, indicating its specific execution order in this test batch. The test sequence number directly determines the order in which instructions are issued and the resource scheduling triggering rhythm, serving as a crucial mechanism to ensure the consistency of the scheduling process and the constraints of dependencies between tasks. For instance, task TCH-007-LOAD1 is assigned the test sequence number SEQ-03, meaning that during execution, the system will initiate the control flow of this task in the third position after receiving feedback from the first two tasks.

[0075] S3043. Associate and bind the test sequence identifier with each test item in the test task queue, and embed the test sequence identifier into the test task queue using field embedding. The system logically connects the generated test sequence number with the test item field in the structured test task, giving each test item a clear execution order attribute, thus forming an executable sequence chain in the task queue. The binding operation is usually completed through field expansion or metadata reference, and this information is retained during the task flow execution and report output stages. For example, a new field "exec_seq: 02" is added to the task structure of task TCH-005-SEQ. This field will serve as the core scheduling identifier for control signal issuance and execution monitoring. The technical method used by the system when injecting the sequence identifier into the structured test task is to embed the test sequence identifier as a data field into the original data structure of the test task, rather than passing it as an external independent parameter. This method helps maintain the integrity and closedness of the task structure and facilitates unified processing of task transmission, scheduling, echoing, and archiving. For example, the original structured test task is in JSON format. After the fields are embedded, the structure is: {“task_id”: “T005-01”, “flow_id”:“EFF”, “exec_seq”: “SEQ-04”}. The system can directly reference the “exec_seq” field as the basis for the order of distribution in the scheduling.

[0076] Furthermore, before the step of dynamically generating test sequence identifiers to guide the execution order of structured test tasks based on the current availability status of each test instrument in the test instrument group, the scheduling priority identifier information of each structured test task, and the execution dependency relationship of the test process identifier information, the following steps are also included: S21. Determine the corresponding transmission path based on the channel identifier information in the test task queue, determine the corresponding test process based on the test process identifier information, generate the corresponding preparatory signal based on the test process, and send the preparatory signal to the corresponding independent test channel according to the transmission path. The transmission path refers to the physical or logical path channel used by the main control system to send control signals or preparatory signals from the software layer to the hardware channel. It usually includes multiple elements such as communication protocol path, device address identifier, and signal control link, and is the basic structure for realizing the directional transmission of instructions between different test channels. In the multi-channel architecture, the transmission path corresponding to each channel is unique to ensure that the control signal is accurately delivered to the target fixture. For example, for channel number CH5, its transmission path is "GPIB::8::INSTR", indicating that the control signal of this channel needs to be sent to the instrument interface with address 8 through the GPIB bus for instruction interaction. The set of test operation sequences for a specific power supply product is usually modularly defined according to engineering requirements or quality standards, including the execution order of test items, execution conditions, test parameters, and the test instruments called. Each test procedure represents a standardized test behavior template, which the main control system can flexibly retrieve and dispatch tasks based on the procedure identifier. For example, a standard test procedure for a type of AC-DC power supply includes multiple stages such as power-on → no-load power consumption test → voltage regulation test → ripple test → overvoltage protection test → power-off test, which are completed automatically in a set order. A preparatory signal is an initialization signal sent by the system to the target channel or test fixture before formally issuing a test task. Its purpose is to notify the target channel of the upcoming test procedure and to allow the channel device to perform compatibility checks or pre-loading actions on the procedure, thereby ensuring the accuracy of task issuance and the safety of execution. The preparatory signal typically carries test procedure identifiers, channel identification identifiers, and verification parameters, and is the first control signal used in the task scheduling system to establish hardware-software linkage.

[0077] S22. Based on preset verification rules, the independent test channel verifies the test process mapped in the preparatory signal. If the verification fails, the preparatory signal is ignored; if the verification succeeds, the corresponding confirmation signal is returned. Preset verification rules refer to a set of standards used by the independent test channel to judge the compliance and feasibility of the preparatory signal based on a predefined set of logical conditions after receiving it. These rules mainly include process support judgment, interface matching judgment, voltage and current level verification, and resource usage confirmation. These rules ensure that the process is executed under the premise of matching hardware and software environments, avoiding system anomalies due to parameter conflicts or process errors. For example, a channel's verification rule might include: "The task reception can only be confirmed when the channel supports FLOWID:V12, the interface type is DC-IN, the voltage is not greater than 48V, and the channel idle state is TRUE." S23. If an acknowledgment signal is received, a corresponding control signal is generated based on the verification information mapped to the acknowledgment signal. An acknowledgment signal is a response signal sent by an independent test channel to the main control system according to the system's defined response format after successfully receiving and verifying the preparatory signal. It indicates that the channel is ready to receive subsequent control signals and execute test tasks. The acknowledgment signal typically includes the echoed channel identifier, acknowledgment status flag, and checksum hash value, forming the handshake process between task channels. For example, after the main control system sends a preparatory signal to channel CH4, it receives the following acknowledgment signal: "ACK|CH4|OK|HASH1234". Based on this, the system confirms that CH4 is ready and can proceed to the test task distribution phase.

[0078] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A multi-channel power supply parallel automatic testing system, characterized in that, The multi-channel power supply parallel automatic test system includes a main control module, an instruction scheduling module, a test instrument group, and multiple test fixtures; The test fixture is used to connect to the power supply under test, and each test fixture is an independent test channel with a custom configuration. The request signal input terminal of the main control module is connected to the request signal output terminal of the independent test channel, the test signal input terminal of the main control module is connected to the test signal output terminal of the test instrument group, and the control signal output terminal of the main control module is connected to the control signal input terminal of the instruction scheduling module. The signal output terminal of the instruction scheduling module is connected to the signal input terminal of the test instrument group to receive the corresponding control signal. The instruction scheduling module schedules the test process working status of multiple independent test channels according to the control signal. The test instrument group is used to perform corresponding test operations on the power supply under test according to the control signal, and output the test signal generated in the test operation to the main control module through the test signal output terminal of the test instrument group. The main control module generates a corresponding test task queue based on the request signal sent by the independent test channel. The test task queue includes multiple structured test tasks with channel identification information, test process identification information and scheduling priority information. The test task queue is encapsulated into a corresponding control signal and sent to the instruction scheduling module.

2. The multi-power supply parallel automatic testing system according to claim 1, characterized in that, Each testing instrument in the testing instrument group is labeled with a corresponding category according to its function, specifically including: Power instruments, specifically power meters and multimeters, are used to measure power parameters. Load-type instruments, specifically electronic loads, are used for load application control. Waveform instruments, specifically oscilloscopes and timing noise analyzers, are used for waveform acquisition and analysis. Safety instruments, specifically short-circuit testers and overvoltage testers, are used for fault protection testing. A switching instrument, specifically a switch controller, is used for power-on and power-off control of the independent test channel. Each testing instrument performs a corresponding test operation based on the response status of the classification identifier to the control signal.

3. The multi-power supply parallel automatic test system according to claim 2, characterized in that, The test instrument group communicates with the main control module via a GPIB communication bus. The GPIB communication bus is used to support the parallel access of multiple test instruments in the test instrument group. The main control module determines the corresponding classification identifier based on the test task queue to match the test instrument with the corresponding function, and completes the directional transmission of control signals through the address information of the test instrument, realizing non-blocking control signal sending and test signal feedback between multiple independent test channels.

4. A test method for a multi-power supply parallel automatic test system, characterized in that, The test method of the multi-channel power supply parallel automatic test system, as described in any one of claims 1-3, comprises: Customize one or more test fixtures according to the testing requirements, and set the test fixture with the completed custom configuration as an independent test channel; The system receives request signals from the independent test channel in real time and generates a corresponding test task queue based on the request signals. The identification information mapped to each structured test task in the test task queue includes at least channel identification information, test process identification information, and scheduling priority identification information. Based on the current availability status of each test instrument in the test instrument group, the scheduling priority identification information of each structured test task, and the execution dependency relationship of the test process identification information, a test sequence identifier is dynamically generated to guide the execution order of the structured test tasks, and the test sequence identifier is embedded into the test task queue to complete the test scheduling. Execute the corresponding test operations according to the test task queue after the test scheduling is completed, and generate the corresponding test report according to the test signals generated in the test operations.

5. The test method of a multi-channel power supply parallel automatic test system according to claim 4, characterized in that, The step of customizing one or more test fixtures according to test requirements includes: Based on the testing requirements, the corresponding preset power supply test configuration template is invoked, and the interface type, voltage level, channel number requirement parameters and control synchronization requirements contained in the preset power supply test configuration template are parsed. Based on the interface type and voltage level, the test fixture structure library is invoked to select matching interface adapter components and electrical isolation components, and the interface adapter components and electrical isolation components are integrated into the input side of the test fixture to form an access path for the power supply under test. Based on the required number of channels, configure the lead-out test channels connected to the power instruments and waveform instruments in the test instrument group, and assign a unique lead-out port code to each lead-out test channel; Based on the control synchronization requirements, determine whether it is necessary to embed a switching instrument in the test fixture. If so, synchronously configure a signal response unit that is linked to the switching instrument for control. The corresponding request channel identifier is generated based on the port number, and the request channel identifier is registered in the corresponding identifier preset database.

6. The test method of a multi-power supply parallel automatic test system according to claim 4, characterized in that, The step of receiving the request signal sent by the independent test channel in real time includes: Upon detecting a request signal from any of the independent test channels, the start time of the time window is set and the time window is started. During the time window, it is continuously monitored whether request signals from other independent test channels are received. If request signals from other independent test channels are received, the request signals are included in the current time window. If no new request signal is received within the duration of the time window and the preset time threshold has been reached, the time window is closed, and all request signals received within the time window are uniformly divided into a test batch for use when generating a test task queue later.

7. The test method for a multi-channel power supply parallel automatic test system according to claim 4, characterized in that, The step of generating a corresponding test task queue based on the request signal includes: Based on the request channel identifiers registered in the preset database, the corresponding channel identifier information is extracted from the request signal, and the validity of the channel identifier information is verified. The preset test process mapping rule set is invoked, the corresponding test process configuration template is matched according to the channel identification information, and the test items defined in the test process configuration template are extracted to generate the corresponding test process identification information. Based on the test resource status table under maintenance, the test instruments required for the test item are determined. Combined with the preset resource allocation rules, a corresponding scheduling priority is assigned to each test item to generate corresponding scheduling priority identification information. The request channel identifier, the test process identifier, and the scheduling priority identifier are structured and encapsulated to form a structured test task, and multiple structured test tasks are encapsulated into corresponding test task queues.

8. The test method for a multi-channel power supply parallel automatic test system according to claim 7, characterized in that, The step of dynamically generating test sequence identifiers to guide the execution order of structured test tasks based on the current availability status of each test instrument in the test instrument group, the scheduling priority identifiers of each structured test task, and the execution dependency relationships of the test process identifiers, and embedding the test sequence identifiers into the test task queue to complete test scheduling, includes: Obtain the availability status of each test instrument in the test instrument group at the current moment. The availability status only includes whether the corresponding test instrument is idle, the remaining response bandwidth, and the estimated execution time. Construct a corresponding availability weight matrix based on the availability status; The scheduling priority identifier information corresponding to the structured test task is parsed to determine the scheduling priority of each test item. Based on the execution dependency relationship between the scheduling priority and the test process identifier information, a task priority graph is established. Based on the availability weight matrix and the task priority graph, the corresponding test items in the test task queue are labeled with corresponding test order identifiers, so that the test order identifiers are embedded into the test task queue to complete test scheduling.

9. The test method of a multi-power supply parallel automatic test system according to claim 8, characterized in that, The step of labeling the corresponding test items in the test task queue with corresponding test order identifiers based on the availability weight matrix and the task priority graph includes: Based on the availability weight matrix, the availability score is calculated for each node in the task priority graph. Based on the mapped task priority graph, a scheduling sorting algorithm is invoked to sequentially assign corresponding test sequence numbers to the graph nodes, and a corresponding test sequence identifier is constructed based on the test sequence numbers. The test sequence identifier is associated with each test item in the test task queue, and the test sequence identifier is embedded into the test task queue in a field embedding manner.

10. The test method of a multi-power supply parallel automatic test system according to claim 7, characterized in that, Before the step of dynamically generating test sequence identifiers to guide the execution order of structured test tasks based on the current availability status of each test instrument in the test instrument group, the scheduling priority identifier information of each structured test task, and the execution dependency relationship of the test process identifier information, the method further includes: The corresponding transmission path is determined according to the channel identification information in the test task queue, the corresponding test process is determined according to the test process identification information, the corresponding preparatory signal is generated based on the test process, and the preparatory signal is sent to the corresponding independent test channel according to the transmission path. Based on preset verification rules, the independent test channel verifies the test process mapped in the preparatory signal. If the verification fails, the preparatory signal is ignored; if the verification succeeds, the corresponding confirmation signal is returned. If the confirmation signal is received, a corresponding control signal is generated based on the verification information mapped by the confirmation signal.

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