High-response small junction capacitance black silicon composite material, preparation method and photoelectric detector

Abstract

The invention discloses a high-response small-junction capacitance black silicon composite material, a preparation method and a photoelectric detector, the high-response small-junction capacitance black silicon composite material comprises a substrate base material, a micro-nano conical B-Si structure is etched on the substrate base material, a PtTe2 film layer is deposited and covered on the surface of the micro-nano conical B-Si structure, the photoelectric detector is a four-quadrant photoelectric detector, and the PtTe2 film layer is deposited and covered on the surface of the micro-nano conical B-Si structure. And an isolation groove is formed in the boundary region of the four quadrants by adopting a P + injection process to realize electrical isolation. According to the invention, PtTe2 with defect passivation capability is adopted to modify the surface of B-Si, and the composite state density of the surface of B-Si can be reduced, so that the photoresponse of a near-infrared band is enhanced, dark current is inhibited, and a device can realize high photoresponsivity in a 1064nm band; meanwhile, the P + injection technology is adopted in the boundary areas of the four quadrants to form highly-doped groove structures, potential barriers can be formed, diffusion and migration of photon-generated carriers among different quadrants are prevented, crosstalk among the quadrants in the four-quadrant detector is reduced, and the device has the characteristics of low noise and high signal-to-noise ratio and is suitable for weak light detection scenes.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of photoelectric detection, in particular to a high-response p-n junction capacitance black silicon composite material, a preparation method and a photoelectric detector. BACKGROUND

[0002] High-response photoelectric detectors have wide application prospects in the fields of optical communication, biomedicine and remote sensing. Silicon-based detectors have become one of the mainstream photoelectric detection solutions due to their low cost, mature preparation process, stable performance and high compatibility with CMOS technology. However, the intrinsic band gap of silicon is 1.12 eV, which limits its photoelectric response capability in the near-infrared band, becoming the main bottleneck restricting the performance improvement of the device.

[0003] In order to enhance the response of silicon-based photoelectric detectors in the near-infrared band, researchers have tried to construct heterostructures with silicon and narrow-bandgap semiconductors such as germanium and III-V compounds in recent years, but hetero-materials have problems of lattice mismatch and complex process. Or by introducing two-dimensional materials such as graphene to improve photoelectric performance, but the absorption capacity of two-dimensional materials is limited, which is difficult to significantly enhance the photoelectric response of the device. Black silicon (B-Si) material can effectively improve the near-infrared absorption capacity due to the light trapping effect caused by its micro-nano structure and the sub-bandgap level introduced by sulfur doping, and has become a key technical path to improve the near-infrared response of silicon-based photoelectric detection. However, defects are easily introduced during the preparation of B-Si, which increases the dark current of the device.

[0004] Therefore, the present application is proposed. SUMMARY

[0005] The existing problem of the prior art is that although the black silicon B-Si material in the prior art can effectively improve the near-infrared absorption capacity and improve the near-infrared response of silicon-based photoelectric detection, defects are easily introduced during the preparation of B-Si, which increases the dark current of the device. Therefore, the present application provides a high-response p-n junction capacitance black silicon composite material, a preparation method and a photoelectric detector. By modifying the surface of B-Si with PtTe2 which has defect passivation ability, the surface recombination state density of B-Si can be reduced, thereby enhancing the light response in the near-infrared band and suppressing the dark current.

[0006] The present application is realized by the following technical scheme: In a first aspect, the present application provides a high-response p-n junction capacitance black silicon composite material, which comprises a substrate base material, the substrate base material is etched with a micro-nano conical B-Si structure, and the surface of the micro-nano conical B-Si structure is covered with a PtTe2 film layer.

[0007] The application can reduce the recombination state density of the B-Si surface by modifying the B-Si surface with PtTe2 having a defect passivation capability, thereby enhancing the light response in the near-infrared band and inhibiting the dark current, so that the device realizes high light responsivity at the 1064 nm band.

[0008] In a specific embodiment, the thickness of the PtTe2 film layer is 5-15 nm.

[0009] In a specific embodiment, a PIN junction is constructed on the substrate base material, and the micro-nano tapered B-Si structure is etched in the light-sensitive region of the PIN junction.

[0010] In a specific embodiment, the substrate base material is an intrinsic silicon wafer with a resistivity >6000 Ω·cm.

[0011] In a specific embodiment, the thickness of the P region of the PIN junction is 5-8 μm, the thickness of the I region is 300-350 μm, and the thickness of the N region is 3-5 μm.

[0012] The application uses an epitaxial intrinsic substrate structure to widen the width of the depletion layer, and the increased width of the depletion layer can effectively enhance the near-infrared light absorption. Since the junction capacitance is inversely proportional to the thickness of the device, the design of the wide depletion region helps to reduce the junction capacitance of the device, thereby further enhancing the response of the device and reducing the junction capacitance of the device.

[0013] In a second aspect, the application provides a preparation method of a high-response small-junction-capacitance black silicon composite material, comprising the following steps: (1) constructing a PIN junction in the active region of a silicon substrate by photolithography and ion implantation, and depositing a metal on the back of the silicon substrate to form a back electrode; (2) placing the sample with the PIN junction obtained in step (1) into SF6 gas, and etching a micro-nano tapered B-Si structure in the light-sensitive region of the PIN junction by using a femtosecond laser; (3) placing the sample with the micro-nano tapered B-Si structure into an electron beam evaporation system, depositing a Pt thin film on the B-Si surface in a vacuum environment, and then introducing Te powder in an Ar / H2 atmosphere to perform annealing reaction at 600-900°C, thereby generating a PtTe2 thin film on the B-Si surface.

[0014] In a specific embodiment, in step (2), the parameters of the femtosecond laser are as follows: wavelength 750-850 nm, pulse width 100 fs, power density 3.0-6.0 kJ / m 2 , scanning speed 0.5-2 mm / s.

[0015] In a specific embodiment, in step (3), the deposition rate of the Pt thin film is 0.5 Å / s, and the ratio of Ar to H2 in the Ar / H2 atmosphere is 9:1.

[0016] In a third aspect, the application further provides a high-response small-junction-capacitance four-quadrant photodetector comprising the composite material or the composite material prepared by the method. The boundary region of the four quadrants is electrically isolated by forming an isolation groove by P+ implantation process.

[0017] In the application, a high-doped trench structure is formed in the boundary region of each quadrant by P+ implantation process, a potential barrier is formed, and the diffusion and migration of photo-generated carriers between different quadrants are prevented, thereby reducing the cross talk between quadrants in the four-quadrant photodetector.

[0018] In a specific embodiment, the depth of the P+ implantation region is 8-10 μm, and the doping concentration of the P+ implantation region is 2×10 14 ~2×10 16 cm -3 .

[0019] Compared with the prior art, the application has the following advantages and beneficial effects: 1. The high-response small-junction-capacitance black silicon composite material, the preparation method and the photodetector provided by the application can reduce the surface recombination state density of B-Si by modifying the surface of B-Si with PtTe2 having a defect passivation capability, thereby enhancing the light response in the near-infrared band and suppressing the dark current, and enabling the device to achieve high light responsivity at a wavelength of 1064 nm. 2. The high-response small-junction-capacitance black silicon composite material, the preparation method and the photodetector provided by the application can effectively enhance the near-infrared light absorption by widening the width of the depletion layer, and the device junction capacitance can be reduced by designing a wide depletion layer, thereby further enhancing the response of the device and reducing the junction capacitance of the device. 3. The high-response small-junction-capacitance black silicon composite material, the preparation method and the photodetector provided by the application adopt a four-quadrant structure design, which can adapt to angle detection and positioning functions, a high-doped trench structure is formed in the boundary region of the four quadrants by P+ implantation process, a potential barrier is formed, the diffusion and migration of photo-generated carriers between different quadrants are prevented, thereby reducing the cross talk between quadrants in the four-quadrant photodetector, the device has low noise and high signal-to-noise ratio characteristics, and is suitable for weak light detection scenarios. 4. The high-response small-junction-capacitance black silicon composite material, the preparation method and the photodetector provided by the application are compatible with standard semiconductor processes and have potential for large-scale integration. BRIEF DESCRIPTION OF DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be considered as limiting the scope. For those skilled in the art, other related drawings can also be obtained without creative labor.

[0021] Figure 1 Structure schematic diagram of the black silicon composite platinum telluride material provided for the embodiment 1 of the present application; Figure 2 Structure schematic diagram of the photoelectric detector provided for the embodiment 1 of the present application; Figure 3 Responsivity comparison results of the photoelectric detector provided for the embodiment 1 and the comparative example 1 of the present application; Figure 4 Cross talk rate comparison results of the photoelectric detector provided for the embodiment 1 and the comparative example 2 of the present application; Figure 5 Junction capacitance comparison results of the photoelectric detector provided for the embodiment 1 and the comparative example 3 of the present application. DETAILED DESCRIPTION In order to make the objectives, technical solutions and advantages of the present application more clear, the following will further describe the present application in combination with the embodiments and drawings. The exemplary embodiments of the present application and the descriptions thereof are only used to explain the present application, and should not be considered as limiting the present application.

[0022] In the following description, a large number of specific details are set forth in order to provide a thorough understanding of the present application. However, it will be apparent to one of ordinary skill in the art that the present application can be practiced without these specific details. In other instances, well-known materials or methods have not been described in detail in order to avoid obscuring the present application.

[0023] Throughout the specification, the mention of “one embodiment”, “an embodiment”, “one example” or “an example” means that a particular feature, structure or characteristic described in connection with the embodiment or example is included in at least one embodiment of the present application. Therefore, the phrases “one embodiment”, “an embodiment”, “one example” or “an example” appearing in various places throughout the specification are not necessarily all referring to the same embodiment or example. In addition, specific features, structures or characteristics can be combined in any appropriate combination and / or sub-combination in one or more embodiments or examples. The term “and / or” used herein includes any and all combinations of one or more of the associated listed items.

[0024] "RANGES" disclosed herein are defined by the form of the lower and upper limits, with a given range being defined by selecting a lower limit and an upper limit, the selected lower and upper limits defining the boundaries of the particular range. Ranges defined by the form of the lower and upper limits can be inclusive or exclusive of the end values, and can be arbitrarily combinable, i.e., any lower limit can be combined with any upper limit to form a range. For example, if ranges of 60-120 and 80-110 are listed, it is understood that ranges of 60-110 and 80-120 are also contemplated. In addition, if minimum range values of 1 and 2 are listed, and if maximum range values of 3, 4, and 5 are listed, then the following ranges are all contemplated: 1-3, 1-4, 1-5, 2-3, 2-4, and 2-5. In this application, unless otherwise indicated, a numerical range "a-b" means a range of any combination of the numbers between a and b, in which a and b are both real numbers. For example, the numerical range "0-5" means that all real numbers between "0-5" have been listed herein, "0-5" is just a shorthand for these combinations of numbers. Also, when a parameter is stated to be an integer > 2, it is equivalent to disclose that the parameter is, for example, integer 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, etc. Unless otherwise specified, all steps of the methods of the present application can be performed in sequence or randomly, preferably in sequence. For example, the method comprising steps (a) and (b) means that the method can comprise steps (a) and (b) in sequence, or steps (b) and (a) in sequence. For example, the method further comprising step (c) means that step (c) can be added to the method in any order, for example, the method can comprise steps (a), (b) and (c), or steps (a), (c) and (b), or steps (c), (a) and (b), etc.

[0025] In order to enhance the response of the silicon-based photodetector in the near-infrared wave band, in recent years, researchers have tried to construct a heterojunction structure with silicon and narrow-bandgap semiconductors such as germanium and III-V compounds, but the heterojunction material has the problems of lattice mismatch and complex process. Or by introducing two-dimensional materials such as graphene to improve the photoelectric performance, but the two-dimensional material has limited absorption capacity, and it is difficult to significantly enhance the photoelectric response of the device. Black silicon (B-Si) material can effectively improve the near-infrared absorption capacity due to the light trapping effect caused by its micro-nano structure and the sub-bandgap level introduced by sulfur doping, and has become a key technical path to improve the near-infrared response of silicon-based photodetectors. However, defects are easily introduced during the preparation of B-Si, which increases the dark current of the device.

[0026] To solve the above technical problems, the present application provides the following technical solutions: In a first aspect, the present application provides a high-response small-junction-capacitance black silicon composite material, comprising a substrate base material, wherein a micro-nano conical B-Si structure is etched on the substrate base material, and a PtTe2 film layer is deposited on the surface of the micro-nano conical B-Si structure.

[0027] According to the present application, the PtTe2 with defect passivation capability is used to modify the surface of the B-Si, so as to reduce the recombination state density of the B-Si surface, thereby enhancing the light response in the near-infrared wave band and inhibiting the dark current, and enabling the device to achieve high light responsivity in the 1064 nm wave band.

[0028] In a specific embodiment, the thickness of the PtTe2 film layer is 5-15 nm.

[0029] In a specific embodiment, a PIN junction is constructed on the substrate base material, and the micro-nano conical B-Si structure is etched in the light-sensitive region of the PIN junction.

[0030] In a specific embodiment, the substrate base material is an intrinsic silicon wafer with a resistivity of >6000 Ω·cm.

[0031] In a specific embodiment, the thickness of the P region of the PIN junction is 5-8 μm, the thickness of the I region is 300-350 μm, and the thickness of the N region is 3-5 μm.

[0032] According to the present application, the epitaxial intrinsic substrate structure is used to widen the width of the depletion layer, and the increase in the width of the depletion layer can effectively enhance the near-infrared light absorption, and since the junction capacitance is inversely proportional to the thickness of the device, the design of the wide depletion region helps to reduce the junction capacitance of the device, thereby further enhancing the response of the device and reducing the junction capacitance of the device.

[0033] In a second aspect, the present application provides a preparation method of a high-response small-junction-capacitance black silicon composite material, comprising the following steps: (1) constructing a PIN junction in the active region of a silicon substrate by photolithography and ion implantation, and depositing a metal on the back of the silicon substrate to form a back electrode; (2) placing the sample with the PIN junction obtained in step (1) into SF6 gas, and etching a micro-nano conical B-Si structure in the light-sensitive region of the PIN junction by using a femtosecond laser; (3) placing the sample with the micro-nano conical B-Si structure into an electron beam evaporation system, depositing a Pt thin film on the surface of the B-Si in a vacuum environment, and then introducing Te powder in an Ar / H2 atmosphere to perform annealing reaction at 600-900°C, so as to generate a PtTe2 thin film on the surface of the B-Si.

[0034] In a specific implementation, in step (2), the parameters of the femtosecond laser are as follows: wavelength 750~850 nm, pulse width 100 fs, power density 3.0~6.0 kJ / m². 2 The scanning speed is 0.5~2 mm / s.

[0035] In a specific embodiment, in step (3), the deposition rate of the Pt film is 0.5 Å / s, and the ratio of Ar to H2 in the Ar / H2 atmosphere is 9:1.

[0036] Thirdly, the present invention also provides a high-response junction capacitance four-quadrant photodetector, comprising the composite material or the composite material prepared by the method; Electrical isolation is achieved by forming isolation trenches in the boundary regions of the four quadrants using the P+ injection process.

[0037] This invention uses a P+ injection process to form a highly doped trench structure in the boundary regions of each quadrant, which can form a potential barrier to prevent photogenerated carriers from diffusing and migrating between different quadrants, thereby reducing crosstalk between quadrants in a four-quadrant detector.

[0038] In one specific embodiment, the depth of the P+ implantation region is 8~10 μm, and the doping concentration of the P+ implantation region is 2×10⁻⁶. 14 ~2×10 16 cm -3 .

[0039] Example 1 This invention provides a method for fabricating a high-response junction capacitance black silicon composite platinum telluride four-quadrant photodetector, comprising the following steps: (1) Intrinsic silicon wafers with resistivity > 6000 Ω·cm were selected as the substrate material for device fabrication. The silicon wafers were cleaned using the RCA standard process, then immersed in 5% hydrofluoric acid for 1 minute to remove the surface oxide layer, and then ultrasonically rinsed with deionized water for 10 minutes and dried with 99.99% high-purity nitrogen. (2) A PIN junction is constructed in the active region of the silicon substrate by photolithography and ion implantation, wherein the P region is 5 μm thick, the I region is 300 μm thick, the N region is 3 μm thick, and the back side is polished and aluminum is deposited to form the back electrode. (3) Place the sample with PIN junction obtained in step (2) into a container filled with SF6 gas (pressure 8.5 × 10⁻⁶). 4 In the reaction cavity of Pa), a femtosecond laser (wavelength 800 nm, pulse width 100 fs, power density 4.5 kJ / m²) is used. 2 Scanning at a speed of 1 mm / s, a micro-nano cone-shaped B-Si structure is etched in the photosensitive region of the PIN junction; (4) The etched sample with the obtained micro / nano cone-shaped B-Si structure was cleaned in 5% hydrofluoric acid for 5 minutes, ultrasonically cleaned for 10 minutes to remove surface oxidation residues, and finally dried with high-purity nitrogen gas. It was then placed in an electron beam evaporation system and heated in a vacuum (approximately 10... - 3 Pt thin films were deposited on B-Si surfaces at a rate of 0.5 Å / s under an Ar / H2 (9:1) atmosphere, followed by annealing at 600°C for 60 minutes with Te powder introduced, resulting in a 10 nm thick PtTe2 thin film on the surface. (5) On the completed area, a 150 nm SiO2 layer was deposited as a protective layer using PECVD; the inter-quadrant isolation trench pattern was defined on the protective layer using photolithography; P+ trenches were realized in the isolation trench area by boron ion implantation, with a P+ implantation depth of 8 μm and the doping concentration in the P+ implantation area controlled to be 2 × 10⁻⁶. 15 cm -3 This yields a photoelectric detector.

[0040] Example 2 This invention provides a method for fabricating a high-response junction capacitance black silicon composite platinum telluride four-quadrant photodetector, comprising the following steps: (1) Intrinsic silicon wafers with resistivity > 6000 Ω·cm were selected as the substrate material for device fabrication. The silicon wafers were cleaned using the RCA standard process, then immersed in 5% hydrofluoric acid for 1 minute to remove the surface oxide layer, and then ultrasonically rinsed with deionized water for 10 minutes and dried with 99.99% high-purity nitrogen. (2) A PIN junction is constructed in the active region of the silicon substrate by photolithography and ion implantation, wherein the P region is 8 μm thick, the I region is 350 μm thick, the N region is 5 μm thick, and the back side is polished, while aluminum is deposited to form the back electrode. (3) Place the sample with PIN junction obtained in step (2) into a container filled with SF6 gas (pressure 8.5 × 10⁻⁶). 4 In a reaction cavity containing Pa, a femtosecond laser (wavelength 850 nm, pulse width 100 fs, power density 6 kJ / m²) is used to... 2 A micro / nano cone-shaped B-Si structure was etched in the photosensitive region of the PIN junction by scanning at a speed of 2 mm / s. (4) The etched sample with the obtained micro / nano cone-shaped B-Si structure was cleaned in 5% hydrofluoric acid for 5 minutes, ultrasonically cleaned for 10 minutes to remove surface oxidation residues, and finally dried with high-purity nitrogen gas. It was then placed in an electron beam evaporation system and heated in a vacuum (approximately 10... - 3Pt thin films were deposited on B-Si surfaces at a rate of 0.5 Å / s under an Ar / H2 (9:1) atmosphere, followed by annealing at 900°C for 60 minutes with Te powder introduced under an Ar / H2 (9:1) atmosphere, resulting in a 15 nm thick PtTe2 thin film on the surface. (5) On the completed area, a 200 nm SiO2 layer was deposited as a protective layer using PECVD; the inter-quadrant isolation trench pattern was defined on the protective layer using photolithography; P+ trenches were realized in the isolation trench region by boron ion implantation with a P+ implantation depth of 10 μm, and the doping concentration in the P+ implantation region was controlled to be 2 × 10⁻⁶. 16 cm -3 This yields a photoelectric detector.

[0041] Example 3 This invention provides a method for fabricating a high-response junction capacitance black silicon composite platinum telluride four-quadrant photodetector, comprising the following steps: (1) Intrinsic silicon wafers with resistivity > 6000 Ω·cm were selected as the substrate material for device fabrication. The silicon wafers were cleaned using the RCA standard process, then immersed in 5% hydrofluoric acid for 1 minute to remove the surface oxide layer, and then ultrasonically rinsed with deionized water for 10 minutes and dried with 99.99% high-purity nitrogen. (2) A PIN junction is constructed in the active region of the silicon substrate by photolithography and ion implantation, wherein the P region is 7 μm thick, the I region is 325 μm thick, the N region is 4 μm thick, and the back side is polished and aluminum is deposited to form the back electrode. (3) Place the sample with PIN junction obtained in step (2) into a container filled with SF6 gas (pressure 8.5 × 10⁻⁶). 4 In a reaction cavity containing Pa, a femtosecond laser (wavelength 750 nm, pulse width 100 fs, power density 3 kJ / m²) is used to... 2 Scanning at a speed of 0.5 mm / s, a micro-nano cone-shaped B-Si structure is etched in the photosensitive region of the PIN junction; (4) The etched sample with the obtained micro / nano cone-shaped B-Si structure was cleaned in 5% hydrofluoric acid for 5 minutes, ultrasonically cleaned for 10 minutes to remove surface oxidation residues, and finally dried with high-purity nitrogen gas. It was then placed in an electron beam evaporation system and heated in a vacuum (approximately 10... - 3 Pt thin films were deposited on B-Si surfaces at a rate of 0.5 Å / s under an Ar / H2 (9:1) atmosphere, followed by annealing at 800°C for 60 minutes with Te powder introduced, resulting in a 5 nm thick PtTe2 thin film on the surface. (5) On the completed area, a 150 nm SiO2 layer was deposited as a protective layer using PECVD; the inter-quadrant isolation trench pattern was defined on the protective layer using photolithography; P+ trenches were realized in the isolation trench area by boron ion implantation, with a P+ implantation depth of 9 μm, and the doping concentration in the P+ implantation area was controlled to be 2 × 10⁻⁶. 14 cm -3 This yields a photoelectric detector.

[0042] Comparative Example 1 The difference between this comparative example and Example 1 is that step (4) is not included, that is, no PtTe2 film is deposited on the B-Si surface.

[0043] Comparative Example 2 The difference between this comparative example and Example 1 is that in step (5), the P+ injection process was not used in the boundary region between the four quadrants, but instead, a physical isolation trench was formed by deep trench etching.

[0044] Comparative Example 3 The difference between this comparative example and Example 1 is that in step (2), the thickness of region I is 250 μm.

[0045] Comparative Example 4 The difference between this comparative example and Example 1 is that the thickness of the PtTe2 film is 20 nm. Performance testing The relevant performance of the photodetectors prepared in Examples 1-3 and Comparative Examples 1-4 was tested.

[0046] Table 1

[0047] As can be seen from Table 1, the integration of black silicon composite PtTe2 thin film layers in the photosensitive region of the PIN devices in Examples 1-3 enables the device unit responsivity to reach above 0.60 A / W (@1064 nm); at the same time, the P+ implantation process is used to achieve quadrant isolation of the device, and the crosstalk rate of each quadrant is less than 1%; the depletion region width is designed to be greater than 300 μm, so that the junction capacitance of the device is less than 1 pF, and finally the fabrication of a high-response, small-junction-capacitance, low-crosstalk four-quadrant photodetector is achieved.

[0048] from Figure 3 As can be seen, the device of Embodiment 1 of the present invention, which deposits a PtTe2 thin film, can improve the optical responsivity of the device in the 1064nm band. The responsivity of the ordinary black silicon device in Comparative Example 1 is less than 0.5 A / W, while the responsivity of the device of Embodiment 1 with PtTe2 thin film deposited is greater than 0.6 A / W.

[0049] from Figure 4As can be seen from the data, the device in Embodiment 1 of the present invention uses the P+ injection process for quadrant isolation, and the crosstalk rate of the device is less than 1%, while the crosstalk rate of the ordinary four-quadrant detector in Comparative Example 2 is greater than 5%.

[0050] from Figure 5 As can be seen from the above, the device in Embodiment 1 of the present invention adopts a wide depletion region design with a junction capacitance of less than 1 pF, while the junction capacitance of the ordinary PIN device in Comparative Example 3 is greater than 5 pF.

[0051] The thickness of the PtTe2 thin film in the devices of Embodiments 1-3 of the present invention is controlled between 5 and 15 nm. If the PtTe2 thin film is too thin (3-5 nm), it will not be able to form a complete coverage on the black silicon surface, which is not conducive to the collection and transport of photogenerated carriers. If the PtTe2 thin film is too thick, it is not conducive to the light entering the black silicon layer of the device for collection. The light is absorbed in the PtTe2 layer, which leads to a decrease in device response, and the device responsivity is less than 0.6 A / W.

[0052] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A high-response junction capacitor black silicon composite material, characterized in that, The invention includes a substrate on which a micro / nano conical B-Si structure is etched, and a PtTe2 film is deposited and coated on the surface of the micro / nano conical B-Si structure.

2. The high-response junction capacitor black silicon composite material according to claim 1, characterized in that, The thickness of the PtTe2 film is 5~15 nm.

3. The high-response junction capacitor black silicon composite material according to claim 1, characterized in that, A PIN junction is constructed on the substrate, and the micro / nano tapered B-Si structure is etched in the photosensitive region of the PIN junction.

4. The high-response junction capacitor black silicon composite material according to claim 1, characterized in that, The PIN junction has a P-region thickness of 5-8 μm, an I-region thickness of 300-350 μm, and an N-region thickness of 3-5 μm.

5. The high-response junction capacitor black silicon composite material according to claim 1, characterized in that, The substrate is an intrinsic silicon wafer with a resistivity > 6000 Ω·cm.

6. The method for preparing the high-response junction capacitor black silicon composite material according to any one of claims 1-5, characterized in that, Includes the following steps: (1) A PIN junction is constructed in the active region of the silicon substrate by photolithography and ion implantation, and a back electrode is formed by depositing metal on the back side of the silicon substrate; (2) The sample with PIN junction obtained in step (1) is placed in SF6 gas, and a micro-nano cone-shaped B-Si structure is formed by etching the photosensitive area of ​​the PIN junction using a femtosecond laser. (3) The sample with the obtained micro-nano cone-shaped B-Si structure is placed in an electron beam evaporation system, and a Pt film is deposited on the B-Si surface under vacuum. Then, under an Ar / H2 atmosphere, Te powder is introduced to carry out an annealing reaction at 600~900°C to generate a PtTe2 film on the B-Si surface.

7. The method for preparing the high-response junction capacitor black silicon composite material according to claim 6, characterized in that, In step (2), the parameters of the femtosecond laser are as follows: wavelength 750~850 nm, pulse width 100 fs, power density 3.0~6.0 kJ / m². 2 The scanning speed is 0.5~2 mm / s.

8. The method for preparing the high-response junction capacitor black silicon composite material according to claim 6, characterized in that, In step (3), the deposition rate of the Pt film is 0.5 Å / s, and the ratio of Ar to H2 in the Ar / H2 atmosphere is 9:

1.

9. A high-response, junction capacitance, four-quadrant photodetector, characterized in that, Includes the composite material according to any one of claims 1 to 5 or the composite material obtained by the method according to any one of claims 6 to 8; Electrical isolation is achieved by forming isolation trenches in the boundary regions of the four quadrants using the P+ injection process.

10. The high-response junction capacitance four-quadrant photodetector according to claim 9, characterized in that, The depth of the P+ implantation region is 8~10 μm, and the doping concentration of the P+ implantation region is 2×10⁻⁶. 14 ~2×10 16 cm -3 .

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