Standard unit position pre-distribution method, computer equipment, storage medium and product

Abstract

The invention relates to a standard cell position pre-distribution method, computer equipment, a storage medium and a product. The standard cell position pre-allocation method is applied to a legalization stage of integrated circuit design and comprises the following steps that a global layout of the integrated circuit design is input, an integrated circuit layout corresponding to the global layout is obtained, and the integrated circuit layout is provided with a plurality of rectangular standard cells; obtaining a standard unit and an original position thereof in the integrated circuit layout; transversely dividing the integrated circuit layout into a plurality of rows and longitudinally dividing the integrated circuit layout into a plurality of sites, determining the nearest row of the standard unit according to the original position, and embedding the standard unit into the site of the nearest row; a plurality of rounds of iteration are carried out, overlapping removal is carried out on the standard unit in an evolution mode, and the optimal placement line of the standard unit and the optimal position on the optimal placement line are obtained; and outputting an optimal position as a final layout of all the standard units, and performing a subsequent legalization process.

Description

Technical Field

[0001] This invention relates to the field of electronic design automation technology, and in particular to a standard cell location pre-allocation method, computer equipment, storage medium, and product. Background Technology

[0002] With the continuous development of integrated circuit technology, chip size and complexity are increasing, placing higher demands on global placement and subsequent legalization in integrated circuit design. In traditional integrated circuit design flows, global placement aims to initially place all component instances on the chip layout to meet certain design rules and performance indicators, such as minimizing line length and balancing chip power consumption. However, due to the complexity of chip design and the limitations of the placement algorithm itself, the result of global placement often suffers from overlapping component instances, necessitating legalization to address this issue. As a crucial step after global placement, the core objective of legalization is to accurately locate standard cells to specified row positions, completely eliminating spatial overlap between standard cells, while ensuring that the positions of the standard cells obtained after legalization pre-allocation are as close as possible to the initial positions passed in from the global placement.

[0003] Traditional legalization processes directly find the nearest routing row for a component instance and use an algorithm to remove overlaps on that row. This can efficiently complete the legalization task when faced with an ideal global layout result. However, in practical applications, due to the diversity and complexity of chip design, the global layout result is often not ideal, and there are often cases of high overlap or even stacking in some areas. In such cases, traditional legalization processes are difficult to deal with effectively, which can easily lead to unreasonable legalization results and affect subsequent chip design processes.

[0004] Currently, some research attempts to introduce more complex algorithms and constraints during the global layout stage in an effort to reduce component instance overlap from the source. However, this approach often increases the complexity and computational load of the global layout algorithm, leading to a significant increase in layout time, and has limited effectiveness in improving situations where high overlap already exists. Other solutions employ more complex mathematical models and optimization algorithms during the legalization stage to perform more precise calculations and adjustments on the placement of component instances on routing rows. However, these solutions do not fully consider the special cases of high local overlap of component instances, and are not effective in solving the problem of reasonable placement of component instances in stacked areas. Summary of the Invention

[0005] To address the technical problems of existing legalization methods in effectively allocating standard cell positions when faced with high-density overlap or stacking in the global layout result, which easily leads to the standard cell position deviating too far from the global layout result, making it difficult to predict row overflow, and affecting the standard cell layout in non-stacked areas due to local position adjustments, this invention provides a standard cell position pre-allocation method, computer equipment, storage medium, and product.

[0006] The present invention provides a standard cell location pre-allocation method for the legalization stage of integrated circuit design, comprising the following steps: inputting the global layout of the integrated circuit design; obtaining the integrated circuit layout corresponding to the global layout, wherein the integrated circuit layout has several standard cells of rectangular shape; obtaining the standard cells and their original positions within the integrated circuit layout; dividing the integrated circuit layout horizontally into several rows and vertically into several points, wherein the width of the standard cell is an integer multiple of the width of the point and the height is the same as the height of the row; determining the nearest row of the standard cell based on the original position; embedding the standard cell into the point of the nearest row; performing several iterations to eliminate overlap of the standard cells in an evolutionary manner to obtain the optimal placement row of the standard cell and the optimal position on the optimal placement row; outputting the optimal position as the final layout of all standard cells for subsequent legalization processes.

[0007] Preferably, determining the nearest row of the standard unit based on the original position and embedding the standard unit into the position of the nearest row includes the following steps: obtaining rows around the standard unit, defining the nearest row as the row closest to the standard unit, determining the nearest row among the rows around the standard unit based on the original position, and obtaining the position of the nearest row; moving the standard unit to the nearest row in a horizontal and / or vertical direction based on the position of the nearest row, determining the position closest to the standard unit in the nearest row, and obtaining the position of the position; moving the standard unit in a horizontal direction based on the position of the position until the standard unit is completely embedded into the position closest to the standard unit, and obtaining the standard position of the standard unit embedded into the position.

[0008] Preferably, several iterations are performed to eliminate overlap of the standard cells in an evolutionary manner, obtaining the optimal placement row of the standard cells and the optimal position on the optimal placement row, including the following steps: obtaining the number of iterations. n ,1≤ n ≤12 and n It is an integer; based on the number of rounds. n The traversal direction of the standard unit in this iteration is determined, and the number of iterations is... nWhen the number of elements is odd or even, the traversal direction is from left to right and from right to left, respectively. Before each iteration, the placement position of the standard unit is initialized to the position of the previous iteration, and the placement position of the standard unit in the first iteration is the standard position where the standard unit is embedded into the site. The integrated circuit layout is vertically divided into several intervals, and the step size of the interval is the width of a single site. Several linked lists corresponding to the intervals are provided. According to the standard position, standard units whose standard positions are in the same interval are stored in the same linked list. The linked list is traversed according to the traversal direction, and the optimal placement row and the optimal position are selected for the standard unit based on a greedy algorithm.

[0009] Preferably, traversing the linked list according to the traversal direction and selecting the optimal placement row and the optimal position for the standard unit based on a greedy algorithm includes the following steps: obtaining the linked list and the standard unit it stores according to the traversal direction; and selecting the optimal placement row and the optimal position for the standard unit based on the number of rounds. n Perform the corresponding traversal process to determine the target position of each standard unit in a different row and define the corresponding loss function; after completing the traversal process, compare all the loss functions of the same standard unit, determine the row corresponding to the smallest loss function as the optimal placement row, and determine the target position corresponding to it as the optimal position.

[0010] Preferably, based on the number of rounds n The corresponding traversal process includes the following steps: obtaining the nearest row corresponding to the standard unit, and obtaining the round number during the iteration process. n When 1≤ n When ≤4, in each round of the iteration, the nearest row is traversed; when n When 5 = 5, traverse the nearest row and its preceding and following rows to determine the optimal placement row for the standard unit; when 5 < 5, traverse the nearest row and its preceding and following rows to determine the optimal placement row for the standard unit. n When ≤8, in each iteration, the optimal placement row and its preceding and following rows are traversed, and the optimal placement row is updated according to the loss function of the standard unit in different rows; when 9≤ n When the value is ≤12, in each iteration, the optimal placement row and its two rows above and two rows below are traversed, and the optimal placement row is updated according to the loss function of the standard unit being in different rows; in each iteration, the number of iterations is used as a reference. n Update the placement position of the standard unit on the row, the number of rounds. n When the number is odd, the placement position is the leftmost position of the row or the rightmost position of the previous standard unit that determined the optimal position, and the number of rounds... nWhen the number is even, the placement position is the rightmost position of the row or the leftmost position of the previous standard cell that determined the optimal position.

[0011] Preferably, determining the target position of each standard unit in a different row and defining the corresponding loss function includes the following steps: based on the number of rounds... n The standard unit is vertically embedded into a position in the nearby row or the preferred placement row, which is taken as the current position of the standard unit in that row. Based on the remaining space available in the row, the current position, the placement position of the standard unit, and the original position, and according to a preset placement rule, the optimal position of the standard unit in that row and the corresponding loss function for placing the standard unit in that row are determined. In each iteration, it is determined whether the loss function is 0. If it is, the iteration process is stopped, and the optimal placement row and its optimal position corresponding to the case where the loss function is 0 are determined. If the loss function is not 0, when the traversal process is completed, the loss functions corresponding to different positions of the same standard unit in the row are compared, and the row with the smallest value of the loss function is taken as the optimal placement row, and its corresponding optimal position is obtained.

[0012] Preferably, the time taken by the greedy algorithm is related to the number of standard units. m Proportional, and with a time complexity of O(n log n). O (m) .

[0013] The present invention also provides a computer device, including a storage device, a processor, and a computer program stored on the storage device, wherein the processor executes the computer program to implement the steps of the above-described standard cell location pre-allocation method.

[0014] The present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the above-described standard cell location pre-allocation method.

[0015] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the above-described standard cell location pre-allocation method.

[0016] Compared with the prior art, the standard cell location pre-allocation method, computer device, storage medium, and product provided by the present invention have the following advantages: 1. This invention provides a standard cell location pre-allocation method, applied to the legalization stage of integrated circuit design, particularly relating to legalization processing technology after global layout. This method pre-places standard cells in suitable positions before the legalization process, ensuring that these positions are as close as possible to the standard cells' positions in the global layout without overlap. The standard cell location pre-allocation method iteratively explores suitable positions in surrounding rows and compares the allocation effects of the same standard cell across different rows to avoid standard cells being stacked and concentrated in the same row. This removes overlap while maximizing the proximity of standard cells to the global layout position, improving the adaptability of subsequent legalization processing to extreme layout conditions, and ensuring the quality of the legalization result and the stability of the subsequent legalization process. By obtaining the original position of the standard cell, horizontally dividing rows and vertically dividing points and embedding the nearest row, and then undergoing multiple rounds of iterative evolution to remove overlap and obtain the optimal placement row and its optimal position, this method ensures that the position of the standard cell is as close as possible to the original position of the global layout during the subsequent legalization process. This provides a precise positional basis for the subsequent legalization process and can also efficiently solve the problem of high-density overlap or stacking of standard cells, improving the efficiency and accuracy of the legalization stage.

[0017] 2. In the standard unit position pre-allocation method provided in the embodiments of the present invention, by clarifying the screening logic of the nearest row, the standard unit is moved to the nearest row in the horizontal and / or vertical directions, and the standard unit is completely embedded in the nearest position in the nearest row, reducing the deviation between the standard position and the original position, maximizing the design intent of retaining the original position, avoiding the need for significant adjustments to the subsequent legalization process due to excessive movement of the standard unit, and the complete embedding of the standard unit into the position can make the focus of subsequent position pre-allocation on the overlap between standard units, significantly reducing the iteration complexity and improving the efficiency of de-overlapping.

[0018] 3. In the standard cell position pre-allocation method provided in the embodiments of the present invention, the number of iteration rounds is controlled. n The collaborative design of dynamically adjusting the traversal direction, dividing the traversal into intervals and grouping them into traversals, and greedy optimization avoids wasting computing resources and increasing time costs, reduces invalid calculations and lowers computational complexity, improves the balance of global layout position allocation, and ensures the rationality of the selection of the optimal placement row and its optimal position, so that the final output of the optimal placement row and optimal position not only meets the requirements of de-overlapping, but also closely matches the intention of the global layout.

[0019] 4. In the standard cell position pre-allocation method provided in the embodiments of the present invention, the greedy algorithm needs to obtain standard cells according to the traversal direction and according to the number of rounds. nThe execution traversal ensures that the execution logic of the greedy algorithm remains consistent regardless of the scale of the integrated circuit design or the global layout at input. This avoids non-standard operations from affecting the pre-allocation results of standard cell positions. The standardized process reduces the space for human intervention. The determination of the optimal placement row and optimal position relies on the result of the loss function rather than subjective operation to avoid subjective bias. This ensures the stability and reliability of the pre-allocation results and lays a good foundation for the subsequent legalization process.

[0020] 5. In the standard cell position pre-allocation method provided in the embodiments of the present invention, the traversal range is dynamically adjusted in stages according to the number of iteration rounds to ensure that the iteration process always proceeds along the path of close global layout, gradual optimization and global optimization. This can not only avoid the standard cell from deviating from its original position in the first few iterations, but also prevent it from getting stuck in local optima in the last few iterations, thereby increasing the probability of finding the globally optimal placement row and optimizing the effect of iteration to remove overlap.

[0021] 6. In the standard cell position pre-allocation method provided in this embodiment of the invention, a loss function is defined by combining the remaining placeable space in the row, the current position, the placement position of the standard cell, and the original position. This ensures that the loss function can fully reflect the rationality of the placement of the standard cell. If the loss function is 0, the iteration stops to save computation time. Otherwise, the row with the smallest loss function value is selected as the optimal placement row, and its corresponding optimal position is obtained. This ensures that the iteration process moves in a better direction, further improving the efficiency of de-overlapping and the accuracy of the optimal position.

[0022] 7. In the standard cell location pre-allocation method provided in the embodiments of the present invention, the number of standard cells in the integrated circuit design... m Typically, the time complexity of the greedy algorithm directly determines the overall time spent on pre-allocation of positions; the greedy strategy of the algorithm maintains low computational complexity while ensuring optimization effect; by clearly defining the time taken by the greedy algorithm and the number of standard units... m Proportional, linear time complexity O(m) It can ensure that the efficiency of the greedy algorithm increases gradually with the number of standard cells, which is suitable for the legal processing requirements of large-scale integrated circuit design.

[0023] 8. The present invention also provides a computer device that has the same beneficial effects as the above-described standard unit position pre-allocation method, which will not be described in detail here.

[0024] 9. The present invention also provides a computer-readable storage medium that has the same beneficial effects as the above-described standard cell location pre-allocation method, which will not be described in detail here.

[0025] 10. The present invention also provides a computer program product that has the same beneficial effects as the above-described standard cell position pre-allocation method, which will not be described in detail here. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a flowchart illustrating steps S1 to S5 in a standard cell position pre-allocation method provided in an embodiment of the present invention.

[0028] Figure 2 This is a flowchart illustrating steps S31 to S33 in a standard cell position pre-allocation method provided in an embodiment of the present invention.

[0029] Figure 3 This is a flowchart illustrating steps S41 to S46 of a standard cell position pre-allocation method provided in an embodiment of the present invention.

[0030] Figure 4 This is a flowchart illustrating steps S461 to S463 in a standard cell location pre-allocation method provided in an embodiment of the present invention.

[0031] Figure 5 This is a flowchart illustrating steps S4621 to S4624 in a standard cell position pre-allocation method provided in an embodiment of the present invention.

[0032] Figure 6 This is a flowchart illustrating steps S4625 to S4628 in a standard cell position pre-allocation method provided in an embodiment of the present invention.

[0033] Figure 7 This is the integrated circuit layout corresponding to the case of low overlap in the embodiments of the present invention.

[0034] Figure 8 This is an integrated circuit layout obtained after pre-allocating positions for cases with low overlap, according to an embodiment of the present invention.

[0035] Figure 9 This is an embodiment of the present invention. Figure 7 A magnified view of the upper right corner.

[0036] Figure 10 This is an embodiment of the present invention. Figure 8 A magnified view of the upper right corner.

[0037] Figure 11 This is the integrated circuit layout corresponding to the highly overlapping situation in the embodiments of the present invention.

[0038] Figure 12 This is an integrated circuit layout obtained after pre-allocating positions for highly overlapping situations according to an embodiment of the present invention.

[0039] Figure 13 This is a schematic diagram of the framework of a computer device provided in an embodiment of the present invention.

[0040] Figure 14 This is a schematic diagram of the framework of a computer-readable storage medium provided in an embodiment of the present invention.

[0041] Figure 15 This is a schematic diagram of the framework of a computer program product provided in an embodiment of the present invention.

[0042] Explanation of reference numerals in the attached diagram: 1. Computer equipment; 11. Storage; 12. Processor; 2. Computer-readable storage medium; 3. Computer program products; 100. Computer program. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0044] In the embodiments provided by this invention, it should be understood that "B corresponding to A" means that B is associated with A, and B can be determined based on A. However, it should also be understood that determining B based on A does not mean determining B solely based on A; B can also be determined based on A and / or other information.

[0045] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of the invention. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Those skilled in the art should also recognize that the embodiments described in the specification are optional embodiments, and the actions and modules involved are not necessarily essential to the invention.

[0046] In various embodiments of the present invention, it should be understood that the sequence number of each process does not necessarily imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0047] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, or they may sometimes be executed in reverse order, depending on the functions involved. It is particularly important to note that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0048] During the legalization phase of integrated circuit design, standard cells need to be precisely positioned to the specified row location to completely eliminate the spatial overlap problem between standard cells, while ensuring that the position of the standard cell obtained after the legalization process is as close as possible to the initial position passed in by the global layout.

[0049] However, the shortcomings of existing technologies are mainly reflected in the following aspects: It has insufficient ability to handle local stacking cases smaller than the density diffusion granularity during the global layout stage, and it is difficult to predict the risk of row overflow when high-density overlap occurs. Direct row-finding and single-row optimization can lead to excessive compression of standard cells in the stacked area, causing their positions to deviate from the global layout result and affecting the subsequent design process of the integrated circuit. Adjustments to local locations may trigger a chain reaction, adversely affecting the standard cell layout in non-stacked areas and disrupting the overall coordination of integrated circuit layout.

[0050] In view of this, embodiments of the present invention provide a standard cell location pre-allocation method, a computer device, a storage medium, and a product. The technical solution of the present invention will be described in detail below.

[0051] Please see Figure 1 This invention provides a standard cell location pre-allocation method, applied to the legalization stage of integrated circuit design, comprising the following steps: S1: Input the global layout of the integrated circuit design and obtain the integrated circuit layout corresponding to the global layout. The integrated circuit layout has several standard cells with a rectangular shape. S2: Obtain standard cells and their original locations within the integrated circuit layout; S3: Divide the integrated circuit layout into several rows horizontally and several sites vertically. The width of the standard cell is an integer multiple of the site width, and the height is the same as the height of the row. Determine the nearest row of the standard cell based on the original position, and embed the standard cell into the site of the nearest row. S4: Perform several rounds of iterations to eliminate overlap of standard cells in an evolutionary manner, and obtain the optimal placement row of standard cells and the optimal position on the optimal placement row; S5: Output the optimal position as the final layout of all standard cells, and proceed with the subsequent legalization process.

[0052] The standard cell location pre-allocation method provided in this invention is applied to the legalization stage of integrated circuit design, particularly relating to legalization processing technology after global layout. It pre-places standard cells in suitable positions before the legalization process, ensuring that the pre-placed positions are as close as possible to the standard cell positions in the global layout without overlap. This addresses the technical problems of existing legalization methods, which struggle to effectively allocate standard cell positions when faced with high-density overlap or stacking in the global layout results. These problems often lead to standard cell positions deviating too far from the global layout results, difficulty in predicting row overflow, and the impact of local position adjustments on the standard cell layout in non-stacked areas. The standard cell location pre-allocation method iteratively explores suitable positions in surrounding rows and compares the allocation effect of the same standard cell across different rows to avoid standard cells being concentrated in the same row. This removes overlap while maximizing the proximity of standard cells to the global layout positions, improving the adaptability of subsequent legalization processing to extreme layout conditions, and ensuring the quality of the legalization results and the stability of subsequent legalization processes.

[0053] Specifically, in step S1, by inputting the global layout of the integrated circuit design, the corresponding integrated circuit layout and several standard cells are obtained. This ensures that the pre-allocation of the location in the embodiment of the present invention is not an independent operation detached from the actual design, but is based entirely on the real global layout of the integrated circuit. This can guarantee the consistency between the pre-allocation result and the overall circuit design from the source, and avoid conflicts between the subsequent location allocation and the global layout planning.

[0054] In step S2, standard cells and their original positions are obtained within the integrated circuit layout. The original positions correspond to the center points of the standard cells. By using center point positioning to lock the original position of each standard cell in the global layout, subsequent position adjustments can always be based on the original design intent. This avoids the standard cells deviating from the core area of ​​the initial plan due to pre-allocation of positions, reduces the disruption to the original design logic of the global layout, and ensures the overall stability of the integrated circuit design.

[0055] In step S3, standard units are embedded into the positions of the nearest row. A relatively regular position allocation grid is constructed by dividing rows horizontally and positions vertically, solving the problem of disorder in the pre-allocation of standard unit positions and providing a clear and orderly placement space for standard units. Simultaneously, when standard units are embedded into the positions of the nearest row, the nearest row is determined by the original position obtained in step S2. This logic makes the initial placement of standard units in this step closer to the original position, minimizing deviation from the original design and reducing the cost of adjusting the position of standard units in subsequent de-overlap optimization steps. Understandably, the standard unit is rectangular in shape, with its center point being the intersection of the diagonals of the rectangle. Its width is an integer multiple of the position width, and its height is consistent with the height of the row. In this embodiment of the invention, the rows and positions are determined by a standard file, and the division of positions can be considered as equal division of the row horizontally. Therefore, the standard unit can be completely embedded into the position of the nearest row.

[0056] In step S4, compared to the method of removing overlaps from standard cells in a one-time and crude manner, this embodiment of the invention performs several rounds of iteration in an evolutionary manner. As a process of dynamically adjusting the position of standard cells, several rounds of iteration can gradually and gently eliminate the overlaps between standard cells, avoiding the standard cell position disorder or new layout problems caused by a single large adjustment. This not only ensures that the final position of each standard cell meets the requirement of no overlap, but also ensures that the final position of each standard cell maintains the minimum difference from its original position in the global layout.

[0057] Minimizing the difference means that the final position of the standard cell after implementing the pre-assignment method should be as close as possible to the position of the standard cell in the global layout stage in step S1; minimizing the difference requires ensuring that the formula The value should be as small as possible. This indicates the original position of the standard cell in step S1. This indicates the optimal position of the standard element in step S4. It represents the distance between two spatial locations, such as Euclidean distance or Manhattan distance.

[0058] In step S5, by outputting the optimal position as the final layout of all standard cells, the standard cell position input that is non-overlapping and maintains minimal differences can be directly provided for the subsequent legalization environment of integrated circuit design. Through this design, the subsequent legalization process avoids repeated adjustments due to problems such as overlapping or unreasonable positions of standard cells, so as to significantly reduce the amount of invalid work in the legalization stage, while ensuring the consistency between the pre-allocation method and the legalization process, thereby improving the efficiency of the legalization stage and the final design quality in integrated circuit design as a whole.

[0059] The standard cell location pre-allocation method provided in this invention can ensure the accuracy and rationality of standard cell location pre-allocation, and can also efficiently support the subsequent work in the legalization stage of integrated circuit design, effectively solving the core problems in the legalization stage such as "chaotic or unreasonable standard cell locations, difficulty in removing overlaps, and disconnection from global layout design".

[0060] Please see Figure 2 The process involves determining the nearest row of standard cells based on their original positions and embedding the standard cells into the positions of the nearest rows, including the following steps: S31: Obtain the rows surrounding the standard cell, define the nearest row as the row that is closest to the standard cell, determine the nearest row among the rows surrounding the standard cell based on the original position, and obtain the position of the nearest row; S32: Based on the position of the nearest row, move the standard cell to the nearest row in the horizontal and / or vertical directions, determine the position of the nearest point to the standard cell in the nearest row, and obtain the position of the point; S33: Based on the location of the site, move the standard unit horizontally until the standard unit is completely embedded in the site closest to the standard unit, thus obtaining the standard position of the standard unit embedded in the site.

[0061] In the standard unit position pre-allocation method provided by the embodiments of the present invention, by clarifying the screening logic of the nearest row, the standard unit is moved to the nearest row in the horizontal and / or vertical directions, and the standard unit is completely embedded in the nearest position in the nearest row. This reduces the deviation between the standard position and the original position, maximizes the design intent of preserving the original position, and avoids the need for significant adjustments to the subsequent legalization process due to excessive movement of the standard unit. The complete embedding of the standard unit into the position allows the focus of subsequent position pre-allocation to be on the overlap between standard units, significantly reducing the iteration complexity and improving the efficiency of de-overlapping.

[0062] Specifically, in step S31, since the original position corresponds to the center point of the standard unit, it is necessary to find the row with the shortest straight-line distance to the center point of the standard unit and determine it as the nearest row to prevent excessive movement relative to the original position. In step S32, when moving the standard unit to the nearest row in the horizontal and / or vertical directions, the following situations apply: the height of the standard unit is the same as the height of the row, and it is usually not placed regularly in the same row but occupies two rows at the same time. Under normal circumstances, the standard unit can be moved to the nearest row directly in the vertical direction. However, during the layout process, since there are many macro units on the layout, the width and height of which are integer multiples of the position width and height, and the positions of these macro units are fixed, it is necessary to divide the row according to the position of the macro units when pre-allocating the standard unit position. The divided part on the same row represents the blocking area occupied by the macro units. At this time, the standard unit needs to move vertically or by a combination of horizontal and vertical directions to avoid the blocking area so that the standard unit moves to the nearest row. In step S33, when embedding the standard unit into the standard position on the site, the standard units can be placed overlappingly. Therefore, it is not necessary to consider whether the standard units overlap. It is only necessary to ensure that the travel distance of each standard unit from the original position to the standard position is minimized.

[0063] Please see Figure 3 The standard cells are iterated through several rounds to eliminate overlap in an evolutionary manner, resulting in the optimal placement row of the standard cells and their optimal positions within that row. This process includes the following steps: S41: Get the number of iterations n ,1≤ n ≤12 and n It is an integer; S42: Based on the number of rounds n Determine the traversal direction of the standard cells in this iteration, and the number of iterations. n When the number is odd or even, the traversal direction is from left to right and from right to left, respectively. S43: Before each iteration, the placement of the standard unit is initialized to the position of the previous iteration. The placement of the standard unit in the first iteration is the standard position of the standard unit embedded into the site. S44: Divide the integrated circuit layout vertically into several intervals, with the step size of each interval being the width of a single point. S45: Provide several linked lists corresponding to the interval, and store the standard units whose standard positions are in the same interval into the same linked list according to the standard position; S46: Traverse the linked list according to the traversal direction, and select the optimal placement row and optimal position for the standard unit based on a greedy algorithm.

[0064] In the standard cell position pre-allocation method provided in this embodiment of the invention, the number of iteration rounds is controlled. n The collaborative design of dynamically adjusting the traversal direction, dividing the traversal into intervals and grouping them into traversals, and greedy optimization avoids wasting computing resources and increasing time costs, reduces invalid calculations and lowers computational complexity, improves the balance of global layout position allocation, and ensures the rationality of the selection of the optimal placement row and its optimal position, so that the final output of the optimal placement row and optimal position not only meets the requirements of de-overlapping, but also closely matches the intention of the global layout.

[0065] Specifically, in step S41, the number of iterations... n The maximum number of iterations is 12, which is a fixed number of iterations based on integrated circuit design experience. This can prevent excessive iterations from wasting computing resources. For example, if repeated adjustments still cannot significantly optimize the design, it can increase time costs. This is especially important for large-scale integrated circuits with a large number of standard cells. It can effectively control the overall computation time and achieve a balance between achieving the optimization target and keeping efficiency under control. If the number of iterations is too small, the overlap between standard cells may not be completely eliminated, or the optimal placement row and its optimal position may not be fully explored.

[0066] In step S42, the number of rounds is set. n When the number of iterations is odd or even, the traversal direction of the standard units in this round of iterations is from left to right and from right to left, respectively, breaking through the limitation of traversal in a single direction. It can be understood that if the traversal direction is only fixed from left to right, it is easy to cause one-sided problems such as excessive compression of standard units on the right side and priority placement of standard units on the left side, but insufficient optimization of standard units on the right side. For example, standard units on the left side occupy their optimal placement row and optimal position first, while standard units on the right side are forced to move away from their original positions. In this embodiment of the invention, the direction is dynamically switched during each round of iterations, so that each standard unit can be selected in the opposite direction in different rounds. This ensures the rationality of the position of standard units on the left side, while also ensuring that standard units on the right side are kept as close as possible to their original positions, reducing local optimum traps and improving the balance of global layout position allocation.

[0067] This invention uses multiple iterations to remove positional overlaps between standard cells, obtaining the optimal placement row of standard cells and the optimal position of the standard cells on the optimal placement row. If the number of iterations is small, or even only one or two iterations, the number of standard cell positional overlaps that can be resolved may be relatively small. Even if the overlap can be removed, it may require some standard cells to be forced to move away from their original positions. Therefore, performing multiple iterations in an evolutionary manner to remove overlaps is a process of dynamically adjusting the position of standard cells. Its core objective is to ensure that the standard cells are as close as possible to their original positions without overlap.

[0068] In steps S44 and S45, the standard position is the x-coordinate of the center point of the standard unit embedded in the nearest row, and the number of rounds... n When =1, each standard unit is assigned to a specified interval based on its standard position. Standard units within the same interval are stored in the same linked list. If no standard unit's center point aligns with a given interval, that interval corresponds to a null pointer linked list. (Iteration rounds) n When the value is greater than 1, the corresponding interval needs to be determined based on the horizontal coordinate of the center point of the standard unit at the beginning of each iteration, and then the standard units in the same interval are stored in the same linked list. The step size of the vertical division interval in the integrated circuit layout is consistent with the width of the position, indicating that the standard units in the same linked list are located in the same interval and are vertically similar. The mutual influence between standard units in the same linked list is stronger, such as the risk of overlap and positional correlation. This makes it possible to significantly reduce the number of invalid traversals when traversing the linked list according to the traversal direction in step S46, avoid mutual influence between standard units with similar vertical positions, and transform the global traversal into multiple groups of local traversals by grouping the linked list, thereby reducing the computational complexity and avoiding excessive traversal time due to the large number of standard units, thus improving the processing speed of the subsequent greedy algorithm.

[0069] In step S46, the local optimum orientation of the greedy algorithm is adapted to the iteration requirements. Each iteration only needs to select the optimal placement row and optimal position for each standard unit based on all standard units in the current linked list, without having to search all possibilities globally. While ensuring the optimization effect, it can significantly reduce the computational amount of each iteration. The vertical positions of standard units in the same linked list are relatively close. The greedy algorithm can more accurately determine the optimal placement logic of standard units in the interval, avoid standard units in the same interval being too scattered or overlapping, improve the rationality of the selection of the optimal position, and ensure that the optimal placement row and optimal position of the final output not only meet the requirements of de-overlapping, but also closely follow the intention of the global layout.

[0070] Please see Figure 4 The linked list is traversed according to the traversal direction. Based on a greedy algorithm, the optimal row and optimal position are selected as the standard unit. The steps include: S461: Based on the traversal direction, obtain the linked list and its standard unit; S462: Based on the number of rounds n Execute the corresponding traversal process to determine the target position of each standard unit in a different row and define the corresponding loss function; S463: After completing the traversal process, compare all the loss functions of the same standard unit, determine the row corresponding to the smallest loss function as the optimal placement row, and determine the target position corresponding to it as the optimal position.

[0071] In the standard cell position pre-allocation method provided in this embodiment of the invention, the greedy algorithm needs to obtain standard cells according to the traversal direction and according to the number of rounds. n The execution traversal ensures that the execution logic of the greedy algorithm remains consistent regardless of the scale of the integrated circuit design or the global layout at input. This avoids non-standard operations from affecting the pre-allocation results of standard cell positions. The standardized process reduces the space for human intervention. The determination of the optimal placement row and optimal position relies on the result of the loss function rather than subjective operation, ensuring the stability and reliability of the pre-allocation results and laying a good foundation for the subsequent legalization process.

[0072] Specifically, in step S461, the traversal direction determines the range of standard units that need to be processed first. When the traversal direction is from left to right, the linked list corresponding to the left interval is obtained first, and the standard units are traversed within the linked list according to the traversal direction. Since the vertical positions of the standard units in the same linked list are relatively close, after obtaining them in the traversal direction, it can be ensured that when determining the optimal placement row and optimal position, the focus is on "standard units with high positional correlation under the current traversal direction". This avoids other standard units with large interval spans and no correlation from interfering with the optimization decision of the greedy algorithm, and improves the targeting of traversal and subsequent loss function calculation.

[0073] In step S462, the target position refers to the appropriate position of the standard unit when it is placed in different rows, based on the number of rounds. n Executing the corresponding traversal process allows for the adoption of traversal strategies matching the current iteration stage. The overlap of standard units in the earlier iterations is more severe than in the later iterations. The number of iterations... n As the number of standard units gradually increases, some standard units determine their optimal placement rows and positions, thus gradually reducing overlap. However, determining the target position within a smaller range becomes increasingly difficult. This embodiment of the invention expands the range of rows where standard units can be placed, thereby obtaining the target positions of standard units in different rows and the corresponding loss functions. This ensures that in step S463, when comparing loss functions, the minimum loss function is obtained and the optimal placement row is determined, avoiding getting trapped in local optima. In step S463, when several standard units within the same linked list are in a state of high local overlap or stacking, the greedy algorithm does not directly assign the standard units to the nearest row. Instead, it automatically iteratively explores surrounding rows, comparing factors such as the degree of overlap of standard units in each row and their deviation from their original positions. A greedy strategy is used to select the optimal placement row for pre-allocation of positions, gradually optimizing the position of each standard unit.

[0074] It should be noted that, compared with existing direct row-finding combined with single-row optimization techniques, the standard cell position pre-allocation method provided in this embodiment of the invention significantly improves the prediction and avoidance of row overflow risk by iteratively and greedily exploring the allocation strategy of surrounding rows when dealing with extreme stacking situations. This avoids the row overflow problem caused by the allocation of standard cells in a single row in traditional methods. This method can dynamically adapt to density fluctuations in the global layout, making the standard cells closer to their original positions in the global layout when pre-allocating their legalization positions, reducing the impact of standard cell position offsets on subsequent legalization processes. This method replaces traditional single-row forced adjustment with local iterative optimization, reducing interference with the standard cell layout in non-stacked areas and ensuring the overall stability of the global layout.

[0075] Please see Figure 5 According to the number of rounds n The corresponding traversal process includes the following steps: S4621: Obtain the nearest row corresponding to the standard cell and obtain the round number during the iteration process. n When 1≤ n When the value is ≤4, the nearest row is traversed in each iteration. S4622: When n When the value is 5, traverse the nearest row and its previous and next rows to determine the optimal placement row for the standard cell; S4623: When 5 < n When the value is ≤8, in each iteration, the better placement row and its previous and next rows are traversed, and the better placement row is updated according to the loss function of the standard cell being in different rows; S4624: When 9≤ n When the value is ≤12, in each iteration, the optimal placement row and its two rows above and two rows below are traversed, and the optimal placement row is updated according to the loss function of the standard unit being in different rows.

[0076] In each of the above iterations, based on the round number n Update the placement of standard cells in rows, number of rounds. n When the number is odd, the placement position is the leftmost position of the row or the rightmost position of the previous standard cell that determined the optimal position, number of rounds. n When the number is even, the placement position is the rightmost position of the row or the leftmost position of the previous standard cell that has determined the optimal position.

[0077] Understandably, the placement position perfectly matches the traversal direction, with an odd number of rounds. n For example, the traversal direction is from left to right, and the corresponding placement position is either the leftmost position of the row or the rightmost position of the previous standard cell whose optimal position was determined. The significance of the placement position is to determine the leftmost position that subsequent standard cells can be placed in during the process of placing standard cells from left to right; number of roundsn When =1, the placement position is the leftmost position of the row, and the number of rounds is... n When the value is 3, 5, 7, 9, or 11, the placement position is determined by the previous iteration and is not affected by the iteration number. n Due to the influence of this, since there may be several standard cells whose optimal placement row and position have already been determined, the placement position is updated to the rightmost boundary of the previous standard cell whose optimal position was determined. This means that subsequent standard cells should be placed as close to the rightmost boundary of the placement position as possible when they move as far to the left as possible. Similarly, the number of rounds... n When the number is even, the traversal direction is from right to left, and the corresponding placement position is either the rightmost position of the row or the leftmost position of the previous standard cell that determines the optimal position. This can be understood as the rule from right to left actually following the rule from left to right. Y Since it is a mirror image of the axis, it will not be discussed further here.

[0078] It should be noted that the traversal direction differs in each iteration of this embodiment of the invention. The traversal direction alternates between left-to-right and right-to-left. The significance of this is that if the traversal is only from left to right, the standard unit located on the far right may not be able to obtain more position selections and may be forced to shrink to the far right of its optimal placement row, or even overlap with other standard units. The traversal direction depends on the number of iterations. n Alternating between them can improve the de-overlapping effect of the rightmost standard unit.

[0079] In the standard cell position pre-allocation method provided in this embodiment of the invention, the traversal range is dynamically adjusted in stages according to the number of iteration rounds to ensure that the iteration process always proceeds along the path of close global layout, gradual optimization and global optimization. This can not only prevent the standard cell from deviating from its original position in the first few iterations, but also prevent it from getting stuck in local optima in the last few iterations, increase the probability of finding the global optimal placement row, and optimize the effect of iteration to remove overlap.

[0080] Specifically, in step S4621, the first four iterations serve as the initial stage. By traversing only the nearest row, the stability of the initial optimization can be ensured, preventing the standard unit from deviating too early from the original position of the global layout and the standard position determined based on the original position, thus reducing the adjustment cost of the subsequent legalization process. Placing the standard unit in the nearest row first can prioritize solving the overlap problem within this range, ensuring the consistency between the optimization direction in the early stage of the iteration and the global layout planning.

[0081] In step S4622, the traversal range is expanded from the nearest row to the nearest row and the rows above and below it. When there is insufficient space in the nearest row and overlap is difficult to eliminate, if the adjacent row has more space and the deviation of the standard cell from its original position is smaller, the standard cell can be preferentially placed in the adjacent row as a better placement row for the standard cell. This design avoids falling into the trap of "locally feasible but not globally optimal". The traversal range is controllable, which can initially explore the placement possibilities of adjacent rows without causing a surge in computation due to an excessively large traversal range. The traversal range of step S4623 is the same, and the logic for determining the better placement row is also the same. The only difference between step S4623 and step S4622 is that the better placement row is updated step by step according to the loss function of the standard cell in different rows. The better placement row is dynamically updated in each iteration until the optimal solution of the better placement row is found in the 5th to 8th iterations, so as to improve the iteration efficiency.

[0082] In step S4624, with the optimal placement row determined in the first 8 iterations as the baseline, the traversal range is expanded to the better placement row and the two rows above and below it. Even if the traversal range covers the two rows above and below, the better placement row dynamically updated after 12 iterations will not deviate too far from the original position. This is because the better placement row obtained in the first 8 iterations is close to the original position. By expanding the traversal range, the loss function of the standard unit placed on more candidate rows can be compared to ensure that the final optimal placement row and optimal position are in the global optimal solution.

[0083] Please see Figure 6 Determine the target position of each standard cell in a different row and define the corresponding loss function, including the following steps: S4625: Based on the number of rounds n The standard unit is vertically embedded into a position in a nearby or preferred row, which serves as the current position of the standard unit in that row. S4626: Based on the remaining available space in the row, the current position, and the placement and original positions of the standard cells, and based on the preset placement rules, determine the optimal position of the standard cells in the row and the corresponding loss function for placing the standard cells in the row. S4627: In each iteration, determine whether there is a case where the loss function is 0. If so, stop the iteration process and determine the optimal placement row and its optimal position corresponding to the case where the loss function is 0. S4628: If the loss function does not have a value of 0, then when the traversal process is completed, compare the loss functions corresponding to different positions of the same standard unit in the row, and take the row with the smallest loss function value as the optimal placement row to obtain its corresponding optimal position.

[0084] In the standard cell position pre-allocation method provided in this embodiment of the invention, a loss function is defined by combining the remaining placeable space in the row, the placement position, the original position, and the current position of the standard cell in the row. This ensures that the loss function can fully reflect the rationality of the placement of the standard cell. If the loss function is 0, the iteration stops to save computation time; otherwise, the row with the smallest loss function value is selected as the optimal placement row, and its corresponding optimal position is obtained. This ensures that the iteration process moves in a better direction, further improving the efficiency of de-overlapping and the accuracy of the optimal position.

[0085] In step S4625, during each iteration, determining the current position of the standard cell in the row can prevent the standard cell from partially exceeding the position or deviating from the horizontal boundary of the row, ensuring that the current position of the standard cell is fully adapted to the position of the row, and providing accurate data for subsequent loss function calculation.

[0086] Table 1. Various possible scenarios in the preset placement rules and their corresponding loss functions

[0087] In step S4626, the placement position is determined by translating the standard cell from its initial position in this iteration to this row. The various possible placement rules and the definition of the loss function are detailed in Table 1: the rightmost black area corresponds to the current position of the standard cell in this row, the dark gray rectangle corresponds to the original position P0 of the current standard cell, the light gray rectangle corresponds to the placement position P1 of the standard cell in this iteration, and the white rectangle corresponds to the final appropriate placement position P2; definitions dx It is the absolute value of the difference between the x-coordinates of P2 and P0. dy This is the absolute value of the difference between the ordinates of P2 and P0. Specifically, Table 1 uses a left-to-right traversal direction as an example (the right-to-left rule is actually a left-to-right rule along...). Y (Mirroring the axis), Figure (a) shows that if P1 is to the left of P0, then P2 is placed directly behind the current position of the row; Figure (b) shows that if P0 is to the left of P1, then P2 should be aligned with the horizontal coordinate of P0, in order to leave more space on the right side of the row and to keep P2 as close to P0 as possible; Figure (c) is a special case of Figure (b), that is, if the left side of P0 is to the left of the current position of the row, then P2 is placed directly behind the current position; Figure (d) is a special case of Figure (a), that is, if the left side of P1 is to the left of the current position of the row, then P2 is placed directly behind the current position of the row; In particular, Figure (e) refers to the horizontal movement distance based on the preset placement rules. dx' Exceed R In this situation, it is necessary to move horizontally in the corresponding direction. R ,at this time dx = dx' -R Figure (f) illustrates the case where there are insufficient sites remaining in the row to place the standard cell. In this case, the standard cell needs to be placed at the end of the row, overlapping with the standard cell adjacent to it on the left, with an overlap length of [missing information]. olp .

[0088] Table 2. Parameters for Preset Placement Rules w y , α and R With the number of iterations n Changes

[0089] Understandably, Table 2 R In terms of site width, w y and α Unitless; w y yes Y Weight of distance along the axis, w y Except for the last two iterations, the value is greater than 1. The purpose is to keep the standard cell on a certain line as much as possible. If the standard cell moves a relatively small distance or overlaps on that line, it will try not to wrap to another line. α This is the correction term function for the loss function when there is overlap, corresponding to the case in Figure (f) of Table 1. α As the number of iterations increases, the degree of overlap should decrease or even be completely non-overlapping; R Defined as the maximum horizontal distance moved by the standard unit in each iteration. Wherein, the 2nd... k +1 round and 2 k The parameters for the +2 iterations are exactly the same (0≤ k <6 and k (where the integer is used) can make the iteration process from left to right and from right to left as symmetrical as possible.

[0090] It should be noted that the loss function defines the weighted distance between the placement position of the standard cell in the row and its original position. The corresponding layout congestion level and row resource margin are also determined by parameters. α Entering the loss function, minimizing the loss function, to a certain extent, ensures that the standard cell positions determined in this iteration are placed as close as possible to their original positions, while simultaneously alleviating layout congestion and increasing the row resource margin for each row. In Figure (f) of Table 1, if the current position of the row is already close to the rightmost side of the row, placing an additional standard cell will result in overlap with the current position. The horizontal overlap is treated as a variable. olp Entering the loss function, as shown in Table 2: with the number of iterations... nWhen the number of rounds is increased to 11 or 12, the overlap of one site is equivalent to the horizontal movement of 16 sites. As a result, the increase in the loss function caused by the vertical movement of standard cells into other rows is relatively small, so as to effectively allocate row resource margins, alleviate layout congestion, and increase the row resource margin of each row.

[0091] In step S4627, when the loss function of the standard cell in the row is 0, it means that the optimal position of the standard cell in the row coincides with the original position, which satisfies the ideal state of no spatial overlap, conforming to the original position and adapting to the preset placement rules. No further iterative adjustment is needed, which can save resources, avoid wasting time and computing resources, and significantly shorten the overall iteration time and improve the efficiency of position pre-allocation.

[0092] In step S4628, if the loss function does not have a value of 0 during the iteration process, then the required number of rounds needs to be completed. n For all iterations of the maximum value, the same cell obtained in step S4626 is placed in different rows with corresponding loss functions, and compared. The row with the smallest loss function value is taken as the optimal placement row, and its corresponding optimal position is obtained. It can be understood that when the ideal state cannot be achieved, the optimal solution is determined by comparing the loss functions, ensuring that the selected optimal placement row is the most reasonable solution in the current iteration stage, avoiding reliance on subjective experience judgment, and ensuring the objectivity and accuracy of the position pre-allocation result.

[0093] In some embodiments, the time taken by the greedy algorithm is related to the number of standard units. m Proportional, and with a time complexity of O(n log n). O (m) .

[0094] In the standard cell location pre-allocation method provided in this embodiment of the invention, the number of standard cells in integrated circuit design... m Typically, the time complexity of the greedy algorithm directly determines the overall time spent on pre-allocation of positions; the greedy strategy of the algorithm maintains low computational complexity while ensuring optimization effect; by clearly defining the time taken by the greedy algorithm and the number of standard units... m Proportional, linear time complexity O(m) It can ensure that the efficiency of the greedy algorithm increases gradually with the number of standard cells, which is suitable for the legal processing requirements of large-scale integrated circuit design.

[0095] Understandably, the embodiments of the present invention select the optimal placement row and optimal position for standard cells based on a greedy algorithm. This ensures controllable computation time even when processing large numbers of standard cells, guaranteeing the efficient progress of the position pre-allocation process and preventing a sharp drop in algorithm computational efficiency due to the large number of standard cells. This improves the universality of the method in large-scale design scenarios. It should be noted that the time complexity is linear. O(m) It also allows the computational resource requirements of the greedy algorithm to gradually increase with the number of standard units. Computational resources generally include the processor's computing power and memory overhead. On the one hand, it can reduce the processor's computing power, eliminating the need to configure more powerful hardware to process large-scale standard units, thus lowering the hardware threshold of this method. On the other hand, it can control the processor's memory overhead, eliminating the need to store a large amount of intermediate computational data. Memory usage generally increases linearly with the number of standard units, avoiding computational crashes due to insufficient memory, and further improving the stability and feasibility of implementing this method.

[0096] The following will describe the effect of position pre-allocation with reference to exemplary embodiments, and further explain the technical solution and technical effect of the above standard cell position pre-allocation method. The exemplary embodiments are only used to explain the present invention and do not limit the scope of application of the present invention.

[0097] This invention has been approved. C++ Implement the code and compile it into a binary file, then apply the global layout. def Documents and standard units corresponding to lef By importing the file into the binary file, the position, size, and relative distance of the standard cells to the rows can be obtained. This allows for the execution of the standard cell position pre-allocation method according to this embodiment of the invention. After the steps are executed, the output is... def The file can be used to obtain the actual location of each standard unit after location pre-assignment.

[0098] Please see Figures 7 to 12 The present invention verifies the effectiveness of the location pre-allocation process in the embodiments of the present invention through three sets of tests, as follows: The first set of tests targets cases with low overlap, such as... Figure 7 As shown, there is no overlap between each standard cell and its adjacent standard cells. The effect after using the standard cell position pre-allocation method of this embodiment is as follows. Figure 8 As shown, almost all the standard units are placed near their original positions; in addition, Figure 9 Enlarged Figure 7 upper right corner Figure 10 Enlarged Figure 8 The top right corner displays the positions and rows in the layout, showing that standard units are embedded at the positions in the rows, which meets the expected requirements of position pre-assignment.

[0099] The second set of tests targets highly overlapping scenarios, such as... Figure 11 As shown, 73 standard cells with widths ranging from 0.18 micrometers to 2.25 micrometers and heights of 0.576 micrometers are overlapped and placed in the same spatial position. After using the standard cell position pre-allocation method of this embodiment of the invention, the standard cells are laid out into a near-rhomboid shape, as shown. Figure 12 As shown, the total displacement of all standard cells is 157.979 micrometers, which means that each standard cell moves an average of 2.164 micrometers. The maximum displacement of a single standard cell is 3.824 micrometers. Overall, the standard cells are laid out relatively neatly near the location of the global layout input.

[0100] Table 3. Comparison of the effects of using location pre-assignment versus not using location pre-assignment (unit: micrometers)

[0101] The third set of tests targets a design with 1,709,636 standard cells, obtained after pre-assignment of positions. def After the file and global layout def The files were input into the legalization tool, and the layout results after legalization were compared between the two. Statistical data is detailed in Table 3. Specifically, for each standard cell, its... x The directional movement amount is the absolute value of the difference between the x-coordinate of the legally determined position and the x-coordinate of the global layout position. y The directional movement is the absolute value of the difference between the ordinate of the legally determined position and the ordinate of the global layout position. The total movement of all standard elements is... x direction and y The sum of directional movements, with the maximum movement of a single standard cell corresponding to the maximum value among all standard cell movements. As shown in Table 3, the standard cell position pre-allocation method of this embodiment slightly increases the standard cell's position by selecting a more suitable row, i.e., the optimal placement row. y At the cost of directional shift, the standard cell size is significantly reduced. x The directional movement amount reduces the total movement of all standard units.

[0102] Please see Figure 13 The present invention also provides a computer device 1, including a storage 11, a processor 12, and a computer program 100 stored on the storage 11. The processor 12 executes the computer program 100 to implement the steps of the above-described standard cell location pre-allocation method.

[0103] It is understood that when the computer device 1 provided in the embodiments of the present invention is running, the standard cell position pre-allocation method described in the above embodiments can be implemented when the processor 12 executes the computer program 100. The computer device 1 provided in the embodiments of the present invention has the same beneficial effects as the standard cell position pre-allocation method provided in the above embodiments.

[0104] In some embodiments, computer device 1 is a computer device applied in the field of electronic design automation technology, including but not limited to de-overlapping standard cells in an evolutionary manner, storing standard cells whose standard positions are in the same interval into the same linked list, and comparing all loss functions of the same standard cell, determining the row corresponding to the smallest loss function as the optimal placement row, and determining the target position corresponding to it as the optimal position. These will not be elaborated here. Theoretically, the method steps involved in the technical solution of this invention can all be implemented by computer device 1, and the relevant parameters involved can also be adjusted by computer device 1. The relevant parameters include but are not limited to the optimal placement row of the standard cell, the optimal position of the standard cell on the optimal placement row, and the better placement row determined in each iteration.

[0105] In some embodiments of the present invention, the processor 12 provided is a general-purpose processor, which is a microprocessor or any conventional processor, such as a central processing unit (CPU), digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, which can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of this application.

[0106] In some embodiments, the method steps disclosed in this application may be executed by a hardware processor, or by a combination of hardware and software modules in the processor.

[0107] Please see Figure 14 The present invention also provides a computer-readable storage medium 2, on which a computer program 100 is stored, and the computer program 100 implements the steps of the above-described standard cell location pre-allocation method when executed by a processor.

[0108] It is understood that the computer-readable storage medium 2 provided in the embodiments of the present invention stores a computer program 100, and the computer program 100 can be called by a processor to execute the standard cell location pre-allocation method described in the above embodiments. The computer-readable storage medium 2 provided in the embodiments of the present invention has the same beneficial effects as the standard cell location pre-allocation method provided in the above embodiments.

[0109] Specifically, the computer-readable storage medium 2 may include at least one type of storage medium, such as flash memory, hard disk, multimedia card, card-type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), magnetic memory, disk, optical disk, etc.

[0110] In some embodiments, the computer-readable storage medium 2 includes a non-volatile computer-readable storage medium that can be used to store non-volatile software programs, non-volatile computer executable programs, and modules.

[0111] Specifically, the computer-readable storage medium 2 provided in this embodiment of the invention has storage space for computer programs 100 that perform any of the method steps of the above-described standard cell location pre-allocation method. These programs can be read from or written to one or more computer program products.

[0112] In some embodiments, the computer program 100 is capable of compression in an appropriate form.

[0113] Please see Figure 15 The present invention also provides a computer program product 3, including a computer program 100, which implements the steps of the above-described standard cell location pre-allocation method when executed by a processor.

[0114] It is understood that the computer program product 3 provided in the embodiments of the present invention includes a computer program 100, and the computer program 100 can be called by a processor to execute the standard cell location pre-allocation method described in the above embodiments, which will not be repeated here.

[0115] The foregoing provides a detailed description of a standard cell location pre-allocation method, computer device, storage medium, and product disclosed in the embodiments of the present invention. Specific examples are used to illustrate the principles and implementation methods of the present invention. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of the present invention. Furthermore, those skilled in the art will recognize that, based on the ideas of the present invention, there will be changes in specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of the present invention. Any modifications, equivalent substitutions, and improvements made within the principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A standard cell location pre-allocation method, applied to the legitimization stage of integrated circuit design, characterized in that, Includes the following steps: Input the global layout of the integrated circuit design, and obtain the integrated circuit layout corresponding to the global layout. The integrated circuit layout has a number of standard cells with a rectangular shape. Obtain the standard cell and its original location within the integrated circuit layout; The integrated circuit layout is divided into several rows horizontally and several sites vertically. The width of the standard cell is an integer multiple of the width of the site, and the height is the same as the height of the row. The nearest row of the standard cell is determined based on the original position, and the standard cell is embedded into the site of the nearest row. Perform several rounds of iterations to eliminate overlap of the standard cells in an evolutionary manner, thereby obtaining the optimal placement row of the standard cells and the optimal position on the optimal placement row; The optimal position is output as the final layout of all standard units, and then the subsequent legalization process is carried out.

2. The standard cell position pre-allocation method as described in claim 1, characterized in that, Determining the nearest row of the standard unit based on the original position, and embedding the standard unit into the position of the nearest row, includes the following steps: Obtain the rows surrounding the standard unit, define the nearest row as the row closest to the standard unit, determine the nearest row among the rows surrounding the standard unit based on the original position, and obtain the position of the nearest row; Based on the position of the nearest row, the standard unit is moved to the nearest row in a horizontal and / or vertical direction, and the position of the nearest point to the standard unit is determined on the nearest row. Based on the location of the site, the standard unit is moved horizontally until the standard unit is completely embedded in the site closest to the standard unit, thus obtaining the standard position in which the standard unit is embedded in the site.

3. The standard cell position pre-allocation method as described in claim 2, characterized in that, Performing several iterations to eliminate overlap of the standard cells in an evolutionary manner, obtaining the optimal placement row of the standard cells and the optimal position on the optimal placement row, includes the following steps: Get the number of iterations n ,1≤ n ≤12 and n It is an integer; Based on the number of rounds n The traversal direction of the standard unit in this iteration is determined, and the number of iterations is... n When the number is odd or even, the traversal direction is from left to right and from right to left, respectively. Before each iteration, the placement of the standard unit is initialized to the position of the previous iteration, and the placement position of the standard unit in the first iteration is the standard position where the standard unit is embedded into the site. The integrated circuit layout is vertically divided into several intervals, and the step size of the interval is the width of a single point. Provide several linked lists corresponding to the interval, and store standard units whose standard positions are in the same interval into the same linked list according to the standard position; The linked list is traversed according to the traversal direction, and the optimal placement row and the optimal position are selected for the standard unit based on a greedy algorithm.

4. The standard cell position pre-allocation method as described in claim 3, characterized in that, The linked list is traversed according to the traversal direction, and the optimal placement row and optimal position are selected for the standard unit based on a greedy algorithm, including the following steps: Based on the traversal direction, obtain the linked list and the standard unit it stores; Based on the number of rounds n Execute the corresponding traversal process to determine the target position of each standard unit in a different row and define the corresponding loss function; After completing the traversal process, the loss functions of all the same standard unit are compared, and the row corresponding to the smallest loss function is determined as the optimal placement row, and the target position corresponding to it is determined as the optimal position.

5. The standard cell position pre-allocation method as described in claim 4, characterized in that, Based on the number of rounds n The corresponding traversal process includes the following steps: Obtain the nearest row corresponding to the standard unit, and obtain the round number during the iteration process. n When 1≤ n When ≤4, in each round of the aforementioned iteration, the nearest row is traversed; when n When the value is 5, traverse the nearest row and its previous and next rows to determine the optimal placement row for the standard unit; When 5 < n When the value is ≤8, in each round of the iteration, the better placement row and its previous and next rows are traversed, and the better placement row is updated according to the loss function of the standard unit in different rows; When 9≤ n When the value is ≤12, in each round of the iteration, the optimal placement row and its two rows above and two rows below are traversed, and the optimal placement row is updated according to the loss function of the standard unit in different rows; In each of the above iterations, based on the stated round number... n Update the placement position of the standard unit on the row, the number of rounds. n When the number is odd, the placement position is the leftmost position of the row or the rightmost position of the previous standard unit that determined the optimal position, and the number of rounds... n When the number is even, the placement position is the rightmost position of the row or the leftmost position of the previous standard cell that determined the optimal position.

6. The standard cell position pre-allocation method as described in claim 5, characterized in that, Determining the target position of each of the standard units in different rows and defining the corresponding loss function includes the following steps: Based on the number of rounds n The standard unit is embedded vertically into the location of the nearby row or the preferred placement row, which serves as the current position of the standard unit in that row. Based on the remaining available space in the row, the current position, the placement position of the standard unit, and the original position, and based on preset placement rules, the optimal position of the standard unit in the row and the corresponding loss function for placing the standard unit in the row are determined. In each iteration, it is determined whether the loss function is 0. If it is, the iteration process is stopped, and the optimal placement row and its optimal position corresponding to the case where the loss function is 0 are determined. If the loss function does not have a value of 0, then when the traversal process is completed, the loss functions corresponding to different positions of the same standard unit in the row are compared, and the row with the smallest value of the loss function is taken as the optimal placement row, thus obtaining its corresponding optimal position.

7. The standard cell position pre-allocation method as described in any one of claims 3-6, characterized in that: The time taken by the greedy algorithm is related to the number of standard units. m Proportional, and with a time complexity of O(n log n). O(m) .

8. A computer device, characterized in that, It includes a storage device, a processor, and a computer program stored on the storage device, the processor executing the computer program to implement the steps of the standard cell location pre-allocation method as described in any one of claims 1-7.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the standard cell location pre-allocation method as described in any one of claims 1-7.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the standard cell location pre-allocation method as described in any one of claims 1-7.

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