Voltage difference monitoring device and method for bootstrap switching power supply, and switching power supply

Abstract

The invention provides a voltage difference monitoring device and method for a bootstrap switching power supply and the switching power supply. The device comprises a voltage difference detection module which is configured to detect the voltage difference between the two ends of a bootstrap capacitor and generate a lower tube conduction indication signal if the voltage difference does not reach a set threshold value; the lower tube forced conduction module is configured to generate a plurality of continuous pulse signals according to the lower tube conduction indication signal so as to conduct a lower transistor when the pulse signals are in high level, so that the bootstrap capacitor is charged through the first power supply voltage until the voltage difference reaches a set threshold value; and the negative current detection module is configured to send a forced turn-off signal to the lower transistor forced turn-on module and end the turn-on period, corresponding to the current pulse signal, of the lower transistor if a negative current greater than a threshold value is detected during the period of turning on the lower transistor through the pulse signal. According to the invention, high differential pressure detection precision is realized through a simple circuit structure.

Description

TECHNICAL FIELD

[0001] The present disclosure belongs to the technical field of switching power supply, and relates to a differential voltage monitoring device and method for booting switching power supply and a switching power supply. BACKGROUND

[0002] With the rapid development of various portable devices, higher requirements are put forward for the performance of switching converters. Since NMOS (Negative Channel Metal-Oxide-Semiconductor) tubes have smaller on-resistance than PMOS (Positive Channel Metal-Oxide-Semiconductor) tubes, in high-voltage switching power supplies, the main switching tube generally uses an NMOS tube.

[0003] The source end of the NMOS tube is connected to one end of the switching node of the switching power supply. When the MOS tube is turned on, the voltage at one end of the switching node approaches the input voltage. In order to ensure that the NMOS tube can be fully turned on, a voltage higher than the power supply voltage is needed to power the driving circuit of the main switching tube. In order to ensure that the main switching tube can be normally turned on and turned off, a boot capacitor needs to be added to the circuit, which uses the feature that the voltage across the capacitor cannot be suddenly changed to obtain a voltage higher than the driving circuit power supply voltage. At the same time, the driving of the main switching tube is done between this voltage and the switching node voltage, and the main switching tube is turned on by using the charge stored on the boot capacitor. SUMMARY

[0004] The present disclosure provides a differential voltage monitoring device and method for booting switching power supply and a switching power supply, which is used to achieve higher differential voltage detection circuit accuracy with smaller circuit layout area, and can ensure that the size of the negative current is within a controllable range.

[0005] In a first aspect, the present disclosure provides a differential voltage monitoring device for booting switching power supply. The differential voltage monitoring device comprises: a differential voltage detection module configured to detect a voltage difference across a boot capacitor, and generate a lower tube turn-on indication signal if the voltage difference does not reach a set threshold; a lower tube forced turn-on module configured to generate a plurality of continuous pulse signals according to the lower tube turn-on indication signal, so as to turn on a lower transistor when the pulse signal is high, so that the boot capacitor is charged by a first power supply voltage until the voltage difference reaches the set threshold; and a negative current detection module configured to, during the turn-on of the lower transistor by the pulse signal, if a negative current greater than a threshold is detected, send a forced turn-off signal to the lower tube forced turn-on module, so that the lower tube forced turn-on module controls the end of the turn-on period of the lower transistor corresponding to the current pulse signal.

[0006] In an implementation form of the first aspect, the voltage difference detection module is further configured to output a high level of the voltage difference detection signal in response to the voltage difference reaching the set threshold, and output a low level of the voltage difference detection signal in response to the voltage difference not reaching the set threshold, wherein the system starts to work normally when the voltage difference detection signal has the high level, and the lower transistor is controlled by a lower transistor control signal, wherein an or operation result of the pulse signal and the lower transistor control signal is electrically coupled to a control terminal of the lower transistor.

[0007] In an implementation form of the first aspect, the voltage difference detection module comprises a voltage difference detection unit configured to sample the voltage difference and convert the sampled voltage difference into a current signal; a low voltage domain conversion unit configured to convert the current signal into a current signal in a low voltage domain through current mirror; a buffer driving unit configured to buffer drive the set threshold and output a reference current through current mirror; a comparison unit configured to compare the current signal in the low voltage domain with the reference current to generate a comparison result; a device protection unit electrically coupled between the low voltage domain conversion unit and the comparison unit, and configured to withstand high voltage between a charging terminal and ground to protect low voltage devices of the voltage difference detection module; and a logic output unit configured to output the lower transistor on indication signal and the voltage difference detection signal according to an enable signal and the comparison result.

[0008] In an implementation form of the first aspect, the buffer driving unit comprises a buffer P-type transistor and a resistor connected in series with the buffer P-type transistor to form a first series structure.

[0009] In an implementation form of the first aspect, the voltage difference detection unit comprises a sampling P-type transistor and a resistor connected in series with the sampling P-type transistor to form a second series structure, wherein device types of the first series structure and the second series structure are matched.

[0010] In an implementation form of the first aspect, the negative current detection module multiplexes a zero current detection module of the bootstrap switching power supply, and the negative current detection module is configured to output a high level of the forced off signal when detecting a negative current greater than a threshold.

[0011] In an implementation form of the first aspect, the first power voltage is provided by a linear voltage regulator inside the bootstrap switching power supply, and a peak voltage to which the bootstrap capacitor can be charged varies with an output of the linear voltage regulator.

[0012] In an implementation form of the first aspect, a reference voltage in the differential voltage detection module corresponding to the set threshold is configured to be proportionally shifted with the output of the linear voltage regulator.

[0013] In a second aspect, the disclosure provides a differential voltage monitoring method. The differential voltage monitoring method is applied to the differential voltage monitoring device, and the differential voltage monitoring method comprises: detecting a voltage difference across a bootstrap capacitor, and generating a lower transistor turn-on indication signal if the voltage difference does not reach a set threshold; generating a plurality of continuous pulse signals according to the lower transistor turn-on indication signal to turn on a lower transistor when the pulse signal is high, so that the bootstrap capacitor is charged by a power supply voltage until the voltage difference reaches the set threshold; and during the turn-on of the lower transistor by the pulse signal, if a negative current greater than a threshold is detected, a forced turn-off signal is generated to control the end of the turn-on period of the lower transistor corresponding to the current pulse signal.

[0014] In a third aspect, the disclosure provides a bootstrap switching power supply. The bootstrap switching power supply comprises the differential voltage monitoring device and an upper transistor, a lower transistor, an upper transistor drive circuit, a lower transistor drive circuit, a bootstrap capacitor, and a bootstrap diode, wherein the first power supply voltage charges the bootstrap capacitor through the bootstrap diode, and the bootstrap capacitor is electrically coupled between the first power supply voltage and a switching node, wherein the upper transistor and the lower transistor are electrically coupled in series between a second power supply voltage and ground, the source of the upper transistor and the drain of the lower transistor are both electrically coupled to the switching node, and the upper transistor drive circuit generates an upper transistor control signal to control the gate of the upper transistor, and the lower transistor drive circuit generates a lower transistor control signal to control the gate of the lower transistor, wherein when the lower transistor is turned on and the upper transistor is turned off, the voltage of the switching node is pulled to ground, the first power supply voltage charges the bootstrap capacitor through the bootstrap diode, and when the lower transistor is turned off and the upper transistor is turned on, the voltage of the switching node is raised to the second power supply voltage, and the voltage of the node electrically coupled between the bootstrap capacitor and the bootstrap diode is higher than the voltage of the switching node, thereby achieving voltage bootstrap.

[0015] The differential pressure monitoring device and method for bootstrap switching power supply, and the switching power supply according to the present disclosure provide a simple differential pressure detection circuit with a small layout area and high detection accuracy, which can ensure normal operation of the circuit in the starting stage and the light load working stage, and solve the problem of low upper tube driving voltage in the starting stage or light load working stage of the circuit. Further, based on the constant on time (COT) control mode, the related detection circuit and logic circuit are designed for the bootstrap switching power supply, and through a small circuit layout area, high detection accuracy is achieved, which can ensure normal operation of the circuit in various situations. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 A block diagram of the differential pressure monitoring device according to the embodiment of the present disclosure is shown.

[0017] Figure 2 A signal schematic diagram of the differential pressure monitoring device according to the embodiment of the present disclosure is shown.

[0018] Figure 3 A schematic diagram of the differential pressure detection circuit according to the embodiment of the present disclosure is shown.

[0019] Figure 4 A timing diagram of the system enabling normal differential pressure after the embodiment of the present disclosure is shown.

[0020] Figure 5 A timing diagram of the system enabling abnormal differential pressure after the embodiment of the present disclosure is shown.

[0021] Figure 6 A negative current detection timing diagram according to the embodiment of the present disclosure is shown.

[0022] Figure 7 A signal adjustment timing diagram of the bootstrap capacitor under-voltage according to the embodiment of the present disclosure is shown.

[0023] Figure 8 A flowchart of the differential pressure monitoring method according to the embodiment of the present disclosure is shown.

[0024] Figure 9 A schematic diagram of the switching power supply according to the embodiment of the present disclosure is shown.

[0025] Figure 10 A schematic diagram of the switching power supply according to the embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0026] The following specific examples illustrate the implementation of this disclosure. Those skilled in the art can easily understand other advantages and effects of this disclosure from the content disclosed in this specification. This disclosure can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this disclosure. It should be noted that, unless otherwise specified, the following embodiments and features in the embodiments can be combined with each other.

[0027] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this disclosure. Therefore, the drawings only show the components related to this disclosure and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0028] The applicant recognizes that when the switching power supply circuit operates under heavy load, the charge on the bootstrap capacitor is replenished promptly, preventing a low drive voltage on the upper transistor. However, when the switching power supply circuit operates under light load, both the upper and lower transistors are turned off for an extended period. Due to leakage current in the circuit, the charge on the bootstrap capacitor gradually decreases and cannot be replenished in time, resulting in a low drive voltage on the upper transistor, which may affect the normal conduction of the main switching transistor. Furthermore, when the output is powered on during startup, there may be a problem with the bootstrap capacitor not being able to charge, preventing the upper transistor from conducting. Currently, there is no good solution in the technical field that can achieve high differential voltage detection circuit accuracy with a small circuit layout area while ensuring that the magnitude of the negative current remains within a controllable range.

[0029] The technical solutions in the embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0030] Figure 1 The diagram shown is a block diagram of the differential pressure monitoring device according to an embodiment of this disclosure. Figure 1 As shown, this disclosure provides a differential pressure monitoring device 1 for a bootstrap switching power supply, which includes: a differential pressure detection module 11, a lower tube forced conduction module 12, and a negative current detection module 13.

[0031] The differential pressure detection module 11 is configured to detect the voltage difference across the bootstrap capacitor, and generate a lower transistor conduction indication signal if the voltage difference does not reach a set threshold. For example, in response to the voltage difference not reaching the set threshold, a high-level lower transistor conduction indication signal is output.

[0032] The lower transistor forced conduction module 12 is configured to generate a plurality of consecutive pulse signals according to the lower transistor conduction indication signal, so as to turn on the lower transistor when the pulse signal is high, thereby charging the bootstrap capacitor through the first power supply voltage until the voltage difference reaches the set threshold. The pulse signals and the lower transistor control signal are ORed together to drive the lower transistor.

[0033] The negative current detection module 13 is configured to, during the period when the lower transistor is turned on by the pulse signal, if a negative current greater than a threshold is detected, send a forced turn-off signal to the lower transistor forced turn-on module, causing the lower transistor forced turn-on module to control the end of the conduction cycle of the lower transistor corresponding to the current pulse signal. In this embodiment, a negative current greater than a threshold refers to a large negative current; that is, if a large negative current is detected, a forced turn-off signal is sent to the lower transistor forced turn-on module. The threshold value is determined based on the actual application scenario requirements and the definition of "large" in that scenario.

[0034] In one embodiment, the differential pressure detection module is further configured to: output a differential pressure detection signal with a high level in response to the voltage difference reaching the set threshold; and output the differential pressure detection signal with a low level in response to the voltage difference not reaching the set threshold. When the differential pressure detection signal is high, the system begins normal operation, and the lower transistor is controlled by a lower transistor control signal. The result of the OR operation between the pulse signal and the lower transistor control signal is electrically coupled to the control terminal of the lower transistor.

[0035] Figure 2 The diagram shown is a signal schematic of the differential pressure monitoring device according to an embodiment of this disclosure. Figure 2 As shown, the differential pressure detection module 11 is also configured to output a differential pressure detection signal BS_OK. After being enabled by the EN signal, the differential pressure detection module 11 outputs the differential pressure detection signal BS_OK as high in response to the voltage difference (the voltage difference between one end of the bootstrap capacitor voltage BST and the other end of the bootstrap capacitor voltage SW) reaching the set threshold. In response to the voltage difference not reaching the set threshold, the differential pressure detection signal BS_OK is output as low, and the lower tube conduction indication signal BSUV_CHG is output. For example, the lower tube conduction indication signal BSUV_CHG can be at a high level.

[0036] In one embodiment, the differential pressure detection module includes a voltage difference detection unit, a low-voltage domain conversion unit, a buffer drive unit, a comparison unit, a device protection unit, and a logic output unit.

[0037] The voltage difference detection unit is configured to sample the voltage difference and convert the sampled voltage difference into a current signal.

[0038] The low-voltage domain conversion unit is configured to convert the current signal to a low-voltage domain current signal via current mirroring.

[0039] The buffer drive unit is configured to buffer the set threshold and then output a reference current through current mirroring.

[0040] The comparison unit is configured to compare the current signal in the low-voltage domain with the reference current to generate a comparison result.

[0041] The device protection unit is electrically coupled between the low-voltage domain conversion unit and the comparison unit, and is configured to withstand the high voltage between the charging terminal and ground to protect the low-voltage device of the differential pressure detection module.

[0042] The logic output unit is configured to output the lower tube conduction indication signal and the differential pressure detection signal based on the enable signal and the comparison result.

[0043] Figure 3 The diagram shown is a schematic of the differential pressure detection circuit according to an embodiment of this disclosure. Figure 3 As shown, the differential pressure detection module 11 includes a voltage difference detection unit 111, a low voltage domain conversion unit 112, a device protection unit 113, a buffer drive unit 114, a comparison unit 115, and a logic output unit 116.

[0044] The voltage difference detection unit 111 is configured to sample the voltage difference (the voltage difference between BST and SW) and convert the sampled voltage difference into a current signal.

[0045] Specifically, the voltage difference detection unit 111 includes MP6, MP8, R3 and R4. The source of MP6 is electrically coupled to the BST voltage, and its gate is electrically coupled to the gate of MP5 to form a current mirror. The source of MP8 is electrically coupled to the drain of MP6, and its gate is electrically coupled to the gate of MP7 to form a current mirror. The drain of MP8 is electrically coupled to one end of R3, and the other end of R3 is electrically coupled to one end of R4. The other end of R4 is electrically coupled to the SW voltage.

[0046] The low-voltage domain conversion unit 112 is configured to convert the current signal to a low-voltage domain current signal via current mirroring.

[0047] Specifically, the low-voltage domain conversion unit 112 includes MP5 and MP7. The source of MP5 is electrically coupled to the BST voltage, and its gate is electrically coupled to the gate of MP6 to form a current mirror. The drain of MP5 is electrically coupled to the source of MP7, and its gate is electrically coupled to the gate of MP8 to form a current mirror. The drain of MP7 is electrically coupled to the device protection unit 113.

[0048] The device protection unit 113 is electrically coupled between the low-voltage domain conversion unit 112 and the comparison unit 115, and is configured to withstand the high voltage between the charging terminal and ground to protect the low-voltage device of the differential pressure detection module 11.

[0049] Specifically, the device protection unit 113 includes MHP1, the source of which is electrically coupled to the drain of MP7, and the drain of which is electrically coupled to the comparator unit 115. Furthermore, the gate of MHP1 is electrically coupled to SW.

[0050] The buffer drive unit 114 is configured to buffer the set threshold and then output a reference current through current mirroring.

[0051] In one embodiment, the buffer drive unit includes a buffer P-type transistor and a resistor connected in series with the buffer P-type transistor to form a first series structure.

[0052] Specifically, the buffer drive unit 114 includes MP1, MP2, MN1, an operational amplifier, and MP3, MP4, R1, and R2. The operational amplifier and MN1 form a buffer drive, driving the series structure composed of MP3, MP4, R1, and R2. MP1 and MP2 form a current mirror, configured to mirror the current output to the set threshold VREF after buffer drive.

[0053] The comparison unit 115 is configured to compare the current signal of the low-voltage domain with the reference current to generate a comparison result.

[0054] Specifically, the comparison unit 115 includes MN2 and MN3. The drain of MN2 is electrically coupled to the current mirror structure of the buffer drive unit 114, and the drain of MN2 is also configured as the output terminal of the comparison result. The source of MN2 is electrically coupled to ground, the gate of MN2 is electrically coupled to the gate of MN3, the drain of MN3 is electrically coupled to the device protection unit 113, and the source of MN3 is electrically coupled to ground.

[0055] The logic output unit 116 is configured to output the lower tube conduction indication signal and the differential pressure detection signal based on the enable signal and the comparison result.

[0056] Specifically, the logic output unit 116 is configured to receive the enable signal EN and the comparison result, and output the lower tube conduction indication signal BSUV_CHG and the differential pressure detection signal BS_OK based on the enable signal EN and the comparison result.

[0057] In one embodiment, the voltage difference detection unit includes a sampling P-type transistor and a resistor connected in series with the sampling P-type transistor to form a second series structure, wherein the device model of the first series structure matches that of the second series structure.

[0058] Specifically, the first series structure (MP6, MP8, R3 and R4) of the voltage difference detection unit 111 is matched with the device model of the second series structure (MP3, MP4, R1 and R2).

[0059] When the system starts normally, if it starts with a voltage, such as 5V, the VDD voltage is typically 5V, so VDD cannot charge the bootstrap capacitor Cbst. In this case, the system will not be able to turn on the upper transistor MH, and the system will not function properly. To prevent abnormal system operation, the BST differential voltage detection circuit starts working after the system is enabled.

[0060] Therefore, the differential pressure detection module samples the voltage difference between BST and SW in real time, converts the BST-SW voltage difference into a current signal, compares it with a reference current signal, and then outputs a detection comparison signal BS_OK. The voltage of BST-SW is converted into current through V / R and then compared to the low-voltage domain using a P-tube cascode current mirror. The high-voltage transistor MHP1 is mainly used to withstand the high voltage between BST and ground, protecting other low-voltage devices. Since the charging voltage of the bootstrap capacitor Cbst is generally provided by the internal LDO, when the LDO output voltage is too high (or too low), the peak voltage that the corresponding bootstrap capacitor can charge will also be too high (or too low). Therefore, the reference voltage of the differential pressure detection module should be proportionally offset with the LDO output. So, the LDO output is directly divided as the reference for the differential pressure detection circuit. This reference is driven by a buffer through a series of P-tube series resistors, and then the output current is mirrored out and compared with I obtained from high-voltage sampling. It is worth noting that the BUFFER load consists of MP3, MP4, R1, and R2, which needs to be matched with MP6, MP8, R3, and R4 of the high-voltage sampling section. Therefore, this differential pressure detection circuit has relatively high detection accuracy, and because it uses only one high-voltage device, it greatly reduces the layout area.

[0061] Figure 4 The diagram shown illustrates the timing of a normal differential pressure after system enable in an embodiment of this disclosure. Figure 4 As shown, EN_DY is the delayed signal of the system enable signal EN. When EN_DY goes high, if the BS_OK signal is high at this time, it means that the voltage difference between BST and SW is normal, the system is working normally, and the output voltage starts to rise.

[0062] Figure 5The diagram shown is a timing diagram of a voltage difference anomaly after system enable according to an embodiment of this disclosure. Figure 5 As shown, when EN_DY goes high, if the BS_OK signal is low (meaning the voltage difference between BST and SW has not reached the set threshold), the BSUV_CHG signal goes high, enabling the OSC module, which generates continuous pulse signals. When the pulse signal is high, the lower transistor is forcibly turned on, and the VDD voltage charges the bootstrap capacitor Cbst. The pulse width can be designed according to the actual operating conditions of the system to prevent the lower transistor from conducting for a long time and generating a large negative current, which could damage the power transistor. Additionally, when the lower transistor is forcibly turned on, the lower transistor negative current detection module (NCP / ZCD) is simultaneously enabled to further ensure that a large negative current does not occur when the lower transistor is turned on. When the voltage difference between BST and SW is detected to be normal, BSUV_CHG goes low, turning off the OSC module. Simultaneously, BS_OK goes high, and the system begins normal operation, with the output voltage increasing. After the system startup is complete, the BS_OK signal is locked to prevent it from affecting normal system operation.

[0063] In one embodiment, the negative current detection module reuses the zero current detection module of the bootstrap switching power supply, and the negative current detection module is configured to flip its output high when a large negative current is detected.

[0064] In this disclosure, the negative current detection module reuses the zero current detection module, which can reduce chip cost. Figure 6 The diagram shown is a timing diagram for negative current detection according to an embodiment of this disclosure. Figure 6 As shown, if a large negative current (IL) is detected when the lower transistor is turned on, the NCP signal will immediately go high, ending the current conduction cycle and waiting for the next conduction cycle. After the lower transistor ends its forced conduction, the NCP / ZCD module switches to zero current detection mode, which does not affect the system's normal zero current detection.

[0065] Furthermore, when the system is under light load, if the output voltage is high, such as 5V, the circuit between BST and SW has static power consumption and leakage. Since both upper and lower transistors in the power section are off, the voltage at the switching node SW equals the output voltage of 5V. The output voltage VDD of the internal LDO cannot charge the bootstrap capacitor Cbst, causing its voltage to continuously drop. When the capacitor voltage is too low, the drive logic of the upper transistor may malfunction, leading to loop malfunction or the risk of chip burnout. Therefore, when the system is under light load, the differential voltage detection circuit needs to monitor the voltage difference between BST and SW in real time.

[0066] Figure 7 The diagram shown is a timing diagram for signal adjustment during undervoltage of the bootstrap capacitor according to an embodiment of this disclosure. Figure 7As shown, during normal operation of the chip, if an undervoltage of the bootstrap capacitor is detected, the BSUV_CHG signal goes high, enabling the OSC module and generating a continuous pulse signal. This forces the transistor to conduct for a period of time until the voltage on the bootstrap capacitor reaches above the reference value. Then, the BSUV_CHG signal goes low, and the system operates normally.

[0067] In one embodiment, the first power supply voltage is provided by a linear regulator inside the bootstrap switching power supply, and the peak voltage that the bootstrap capacitor can charge to varies with the output of the linear regulator.

[0068] In one embodiment, the reference voltage in the differential pressure detection module corresponding to the set threshold is configured to shift proportionally with the output of the linear regulator.

[0069] Specifically, since the charging voltage of the bootstrap capacitor Cbst is generally provided by the internal LDO (Low-dropout regulator), when the LDO output voltage is too high (or too low), the peak voltage that the corresponding bootstrap capacitor can charge to will also be too high (or too low). Therefore, the reference voltage of the differential voltage detection module is configured to deviate proportionally with the LDO output, so the LDO output is directly divided as the reference for the differential voltage detection circuit.

[0070] Figure 8 The diagram shows a flowchart of the differential pressure monitoring method according to an embodiment of this disclosure. Figure 8 As shown, this disclosure provides a differential pressure monitoring method, applied to the differential pressure monitoring device described in the above embodiment, including steps S81 to S83.

[0071] Step S81: Detect the voltage difference across the bootstrap capacitor, and if the voltage difference does not reach a set threshold, generate a lower transistor conduction indication signal.

[0072] Step S82: Generate a number of consecutive pulse signals according to the lower transistor conduction indication signal, so as to turn on the lower transistor when the pulse signal is high, so that the bootstrap capacitor is charged by the power supply voltage until the voltage difference reaches the set threshold.

[0073] In step S83, if a negative current greater than a threshold is detected during the conduction of the lower transistor by the pulse signal, a forced shutdown signal is generated to control the termination of the conduction cycle of the lower transistor corresponding to the current pulse signal.

[0074] Specifically, step S81 includes: When the system is enabled, the BST differential pressure detection circuit starts working. EN_DY is a delayed signal of the system enable signal. When EN_DY goes high, if the BS_OK signal is high at this time, it means that the differential pressure between BST and SW is normal, the system is working normally, and the output voltage starts to rise. When EN_DY goes high, if the BS_OK signal is low, it means that the differential pressure between BST and SW has not reached the set threshold. At this time, the output lower transistor conduction indication signal BSUV_CHG goes high.

[0075] Specifically, step S82 includes: after the BSUV_CHG signal goes high, the lower transistor forced conduction module, i.e., the OSC module, is enabled. This module can generate continuous pulse signals. When the pulse signal is high, the lower transistor is forced to conduct, and the VDD voltage can charge the bootstrap capacitor Cbst. The pulse width of the pulse signal can be designed according to the actual operating conditions of the system to prevent the lower transistor from conducting for a long time and generating a large negative current, which could damage the power transistor.

[0076] Specifically, step S83 includes: when the lower transistor is forcibly turned on, simultaneously enabling the negative current detection module of the lower transistor to further ensure that no large negative current occurs when the lower transistor is turned on. When the voltage difference between BST and SW is detected to be normal, the lower transistor turn-on indication signal BSUV_CHG goes low, shutting down the OSC module. Simultaneously, BS_OK goes high, and the system begins normal operation, with the output voltage increasing. After the system startup is complete, the BS_OK signal is latched to prevent it from affecting normal system operation.

[0077] In another aspect, this disclosure provides a bootstrap switching power supply, which includes: a differential pressure monitoring device as described in the above embodiments, as well as an upper transistor, a lower transistor, an upper transistor drive circuit, a lower transistor drive circuit, a bootstrap capacitor, and a bootstrap diode.

[0078] The differential pressure monitoring device includes a differential pressure detection module, a lower transistor forced conduction module, and a negative current detection module. The differential pressure detection module is configured to detect the voltage difference across the bootstrap capacitor and generate a lower transistor conduction indication signal if the voltage difference does not reach a set threshold. The lower transistor forced conduction module is configured to generate a series of consecutive pulse signals based on the lower transistor conduction indication signal, so as to conduct the lower transistor when the pulse signal is high, thereby charging the bootstrap capacitor through a first power supply voltage until the voltage difference reaches the set threshold. Furthermore, the negative current detection module is configured to send a forced shutdown signal to the lower transistor forced conduction module if a negative current greater than a threshold is detected during the conduction of the lower transistor by the pulse signal, causing the lower transistor forced conduction module to control the termination of the conduction cycle of the lower transistor corresponding to the current pulse signal.

[0079] The first power supply voltage charges the bootstrap capacitor through the bootstrap diode, and the bootstrap capacitor is electrically coupled between the first power supply voltage and the switching node.

[0080] The upper transistor and the lower transistor are connected in series and electrically coupled between the second power supply voltage and ground. The source of the upper transistor and the drain of the lower transistor are both electrically coupled to the switching node. The upper transistor driving circuit generates an upper transistor control signal to control the gate of the upper transistor, and the lower transistor driving circuit generates a lower transistor control signal to control the gate of the lower transistor.

[0081] When the lower transistor is turned on and the upper transistor is turned off, the voltage of the switching node is pulled to ground, and the first power supply voltage charges the bootstrap capacitor through the bootstrap diode. When the lower transistor is turned off and the upper transistor is turned on, the voltage of the switching node is raised to the second power supply voltage, and the node voltage of the bootstrap capacitor electrically coupled to the bootstrap diode is higher than the voltage of the switching node, thereby realizing voltage bootstrapping.

[0082] Figure 9 This diagram illustrates a switching power supply according to an embodiment of the present disclosure. Figure 9 As shown, this disclosure provides a bootstrap switching power supply, which includes: the differential pressure monitoring device 1, an upper transistor MH, a lower transistor ML, an upper transistor drive circuit (upper transistor Drive), a lower transistor drive circuit (lower transistor Drive), a bootstrap capacitor Cbst, and a bootstrap diode D1.

[0083] like Figure 9 As shown, the connection relationships of the components in the switching power supply are as follows.

[0084] The anode of the bootstrap diode D1 is electrically coupled to the first power supply voltage VDD, and the cathode of the bootstrap diode D1 is electrically coupled to one end of the bootstrap capacitor Cbst. The cathode of the bootstrap diode D1 is configured to be the voltage BST at one end of the bootstrap capacitor Cbst.

[0085] The other end of the bootstrap capacitor Cbst is configured as a switching node SW.

[0086] The drain of the upper transistor MH is electrically coupled to the second power supply voltage VIN, the gate is electrically coupled to the output terminal of the upper transistor drive circuit (upper transistor Drive), and the source is electrically coupled to the drain of the lower transistor ML.

[0087] The gate of the lower transistor ML is electrically coupled to the output of the lower transistor drive circuit (lower transistor Drive), and the source of the lower transistor ML is electrically coupled to ground.

[0088] The input terminal of the lower transistor drive circuit (lower transistor Drive) is electrically coupled to an OR gate. One end of the OR gate is electrically coupled to the lower transistor control signal LS_G, and the other end of the OR gate is electrically coupled to the pulse signal output terminal of the device 1.

[0089] like Figure 9 As shown, the working principles of each component in the switching power supply are as follows.

[0090] The first power supply voltage VDD charges the bootstrap capacitor Cbst through the bootstrap diode D1.

[0091] The upper transistor MH and the lower transistor ML are connected in series between the second power supply voltage VIN and ground. The connection point between the source of the upper transistor MH and the drain of the lower transistor ML is the switching node SW.

[0092] The upper transistor control signal HS_G controls the gate of the upper transistor MH through the upper transistor drive circuit (upper transistor Drive), and the lower transistor control signal LS G controls the gate of the lower transistor ML through the lower transistor drive circuit (lower transistor Drive).

[0093] When the lower transistor ML is turned on and the upper transistor MH is turned off, the voltage of the switching node SW is pulled to ground, and the first power supply voltage VDD charges the bootstrap capacitor Cbst through the bootstrap diode D1; when the lower transistor ML is turned off and the upper transistor MH is turned on, the voltage of the switching node SW is raised to the second power supply voltage VIN, and the cathode voltage BST of the bootstrap diode D1 is higher than the voltage of the switching node SW, thus achieving voltage bootstrapping.

[0094] like Figure 9As shown, the circuit of the switching power supply mainly includes: power switches (MH, ML), upper and lower transistor drive circuits, bootstrap capacitor Cbst, and bootstrap diode D1. VDD is a low-voltage power supply, which charges the bootstrap capacitor Cbst through the bootstrap diode D1. Power transistors MH and ML are connected in series between the high-voltage power supply VIN and ground, and SW is the switching node. The control signal HS_G controls the gate of the upper transistor MH through the upper transistor drive module, and the control signal LS_G controls the gate of the lower transistor ML through the lower transistor drive module. The drive of the upper transistor MH is performed between the BST voltage and the SW voltage, and the drive of the lower transistor ML is performed between the low-voltage power supply VDD and ground. When the current transistor ML is turned on, the SW voltage is pulled to ground, and the low-voltage power supply VDD can charge the bootstrap capacitor Cbst through the bootstrap diode D1. When the current transistor ML is turned off and the upper transistor MH is turned on, the SW voltage is raised to VIN. Since the voltage of capacitor Cbst cannot change abruptly, the BST voltage will be higher than the SW voltage, ensuring that the upper transistor MH can conduct normally. The charge stored on the Cbst capacitor powers the driving circuit of the upper transistor MH.

[0095] Figure 10 The diagram shown is a schematic of a switching power supply according to an embodiment of this disclosure. Figure 10 As shown, the connection relationships of the components in the switching power supply are as follows.

[0096] The anode of the bootstrap diode D1 is electrically coupled to the first power supply voltage VDD, and the cathode of the bootstrap diode D1 is electrically coupled to one end of the bootstrap capacitor Cbst. The cathode of the bootstrap diode D1 is configured to be the voltage BST at one end of the bootstrap capacitor Cbst.

[0097] The other end of the bootstrap capacitor Cbst is configured as a switching node SW.

[0098] The drain of the upper transistor MH is electrically coupled to the second power supply voltage VIN, the gate is electrically coupled to the output terminal of the upper transistor drive circuit (upper transistor Drive), and the source is electrically coupled to the drain of the lower transistor ML.

[0099] The gate of the lower transistor ML is electrically coupled to the output of the lower transistor drive circuit (lower transistor Drive), and the source of the lower transistor ML is electrically coupled to ground.

[0100] The input terminal of the lower transistor drive circuit (lower transistor Drive) is electrically coupled to an OR gate. One end of the OR gate is electrically coupled to the lower transistor control signal LS_G, and the other end of the OR gate is electrically coupled to the pulse signal output terminal of the OSC module of the device 1.

[0101] After the differential pressure detection module 11 of the device 1 is enabled by the EN signal, it responds to the voltage difference (the voltage difference between one end of the bootstrap capacitor voltage BST and the other end of the bootstrap capacitor voltage SW) reaching the set threshold. Figure 3 When the voltage difference does not reach the set threshold, the differential pressure detection signal BS_OK is output as high; when the voltage difference does not reach the set threshold, the differential pressure detection signal BS_OK is output as low, and the lower tube conduction indication signal BSUV_CHG is output.

[0102] like Figure 10 As shown, when the system starts normally, if the output is powered by a voltage, such as 5V, since the VDD voltage is generally 5V, VDD cannot charge the bootstrap capacitor Cbst. At this time, the system will not be able to turn on the upper transistor MH, and the system will not work normally. To avoid abnormal system operation, the BST differential voltage detection circuit starts working after the system is enabled. Therefore, the switching power supply circuit of this disclosure adds the aforementioned differential voltage monitoring device 1, namely, a BST differential voltage detection module, an OSC module (lower transistor forced conduction module), and a negative current detection module (NCP / ZCD). The BST differential voltage detection module detects the difference between the BST voltage and the SW voltage and outputs the BS_OK signal and the BSUV_CHG signal. The BSUV_CHG signal is input to the OSC module, which outputs the FCON_LS signal. The FCON_LS signal is ORed with the lower transistor control signal LS_G and input to the lower transistor drive circuit (lower transistor Drive). In addition, the OSC module is also controlled by the negative current overcurrent signal NCP.

[0103] Reference Figure 4 EN_DY is the delayed signal of the system enable signal. When EN_DY goes high, if the BS_OK signal is high at this time, it means that the voltage difference between BST and SW is normal, the system is working normally, and the output voltage starts to rise.

[0104] Reference Figure 5When EN_DY goes high, if the BS_OK signal is low (meaning the voltage difference between BST and SW has not reached the set threshold), the BSUV_CHG signal goes high, enabling the OSC module, which generates continuous pulse signals. When the pulse signal is high, the lower transistor is forcibly turned on, and the VDD voltage charges the bootstrap capacitor Cbst. The pulse width can be designed according to the actual operating conditions of the system to prevent the lower transistor from conducting for a long time and generating a large negative current, which could damage the power transistor. Additionally, when the lower transistor is forcibly turned on, the lower transistor negative current detection module (NCP / ZCD) is simultaneously enabled to further ensure that a large negative current does not occur when the lower transistor is turned on. When the voltage difference between BST and SW is detected to be normal, BSUV_CHG goes low, turning off the OSC module. Simultaneously, BS_OK goes high, and the system begins normal operation, with the output voltage increasing. After the system startup is complete, the BS_OK signal is latched to prevent it from affecting normal system operation.

[0105] In this embodiment of the disclosure, the negative current detection module reuses the zero current detection module, which can reduce chip cost. (Refer to...) Figure 6 If a large negative current (IL) is detected when the lower transistor is turned on, the NCP signal will immediately go high, ending the current conduction cycle and waiting for the next conduction cycle. After the lower transistor ends its forced conduction, the NCP / ZCD module switches to zero current detection mode, which does not affect the system's normal zero current detection.

[0106] Furthermore, when the system is under light load, if the output voltage is high, such as 5V, the circuit between BST and SW has static power consumption and leakage. Since both upper and lower transistors in the power section are off, the voltage at the switching node SW equals the output voltage of 5V. The output voltage VDD of the internal LDO cannot charge the bootstrap capacitor Cbst, causing its voltage to continuously drop. When the capacitor voltage is too low, the drive logic of the upper transistor may malfunction, leading to loop malfunction or the risk of chip burnout. Therefore, when the system is under light load, the differential voltage detection circuit needs to monitor the voltage difference between BST and SW in real time.

[0107] Reference Figure 7 During normal operation of the chip, if undervoltage of the bootstrap capacitor is detected, the BSUV_CHG signal goes high, enabling the OSC module and generating a continuous pulse signal. This forces the transistor to conduct for a period of time until the voltage on the bootstrap capacitor reaches above the reference value. Then, the BSUV_CHG signal goes low, and the system returns to normal operation.

[0108] The protection scope of the differential pressure monitoring method described in this disclosure is not limited to the execution order of the steps listed in this embodiment. Any solution implemented by adding, subtracting, or replacing steps in the prior art based on the principles of this disclosure is included within the protection scope of this disclosure.

[0109] The differential pressure monitoring device provided in this disclosure can implement the differential pressure monitoring method described in this disclosure. However, the implementation device of the differential pressure monitoring method described in this disclosure includes, but is not limited to, the structure of the differential pressure monitoring device listed in this embodiment. Any structural modifications and substitutions of the prior art made based on the principles of this disclosure are included within the protection scope of this disclosure.

[0110] In the several embodiments provided in this disclosure, it should be understood that the disclosed apparatus or method can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules / units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or units may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection of apparatuses or modules or units may be electrical, mechanical, or other forms.

[0111] The modules / units described as separate components may or may not be physically separate. The components shown as modules / units may or may not be physical modules; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules / units can be selected to achieve the objectives of the embodiments of this disclosure, depending on actual needs. For example, the functional modules / units in the various embodiments of this disclosure may be integrated into one processing module, or each module / unit may exist physically separately, or two or more modules / units may be integrated into one module / unit.

[0112] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this disclosure.

[0113] The descriptions of the processes or structures corresponding to the above figures each have their own emphasis. For parts of a process or structure that are not described in detail, please refer to the relevant descriptions of other processes or structures.

[0114] The above embodiments are merely illustrative of the principles and effects of this disclosure and are not intended to limit this disclosure. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this disclosure. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this disclosure should still be covered by the claims of this disclosure.

Claims

1. A differential pressure monitoring device for a bootstrap switching power supply, characterized by The differential voltage monitoring device comprises: a differential voltage detection module configured to detect a voltage difference across a bootstrap capacitor and generate a down-tube conduction instruction signal if the voltage difference does not reach a set threshold value; a down-tube forced conduction module configured to generate a plurality of continuous pulse signals according to the down-tube conduction instruction signal to turn on a down transistor when the pulse signal is high, so that the bootstrap capacitor is charged by a first power supply voltage until the voltage difference reaches the set threshold value; and a negative current detection module configured to send a forced-off signal to the down-tube forced conduction module if a negative current greater than a threshold value is detected during the turning on of the down transistor by the pulse signal, so that the down-tube forced conduction module controls the end of the conduction period of the down transistor corresponding to the current pulse signal. The differential voltage detection module is further configured to:

2. The differential pressure monitoring device of claim 1, wherein, output a differential voltage detection signal with a high level in response to the voltage difference reaching the set threshold value; and output the differential voltage detection signal with a low level in response to the voltage difference not reaching the set threshold value, wherein the system starts normal operation when the differential voltage detection signal has a high level, and the down transistor is controlled by a down-tube control signal, wherein the or operation result of the pulse signal and the down-tube control signal is electrically coupled to the control end of the down transistor. The differential voltage detection module comprises:

3. The differential pressure monitoring device of claim 1, wherein, a voltage difference detection unit configured to sample the voltage difference and convert the sampled voltage difference into a current signal; a low-voltage domain conversion unit configured to convert the current signal to a current signal in a low-voltage domain by current mirroring; a buffer driving unit configured to output a reference current by current mirroring after buffer driving the set threshold value; a comparison unit configured to compare the current signal in the low-voltage domain with the reference current to generate a comparison result; a device protection unit electrically coupled between the low-voltage domain conversion unit and the comparison unit and configured to withstand high voltage between a charging end and ground to protect low-voltage devices of the differential voltage detection module; and a logic output unit configured to output the down-tube conduction instruction signal and the differential voltage detection signal according to an enable signal and the comparison result.

4. The differential voltage monitoring device according to claim 3, wherein the buffer driving unit comprises a buffer P-type transistor and a resistor connected in series with the buffer P-type transistor to form a first series structure.

5. The differential voltage monitoring device according to claim 4, wherein the voltage difference detection unit comprises a sampling P-type transistor and a resistor connected in series with the sampling P-type transistor to form a second series structure, wherein the device types of the first series structure and the second series structure are matched.

6. The differential voltage monitoring device according to claim 1, wherein the negative current detection module reuses a zero current detection module of the bootstrap switching power supply, and the negative current detection module is configured to output the forced-off signal with a high level when a negative current greater than a threshold value is detected.

7. The differential voltage monitoring device according to claim 1, wherein ​ The first supply voltage is provided by a linear regulator inside the bootstrap switching power supply, and the peak voltage to which the bootstrap capacitor can be charged varies proportionally with the output of the linear regulator.

8. The differential pressure monitoring device of claim 7, wherein, The reference voltage corresponding to the set threshold in the differential pressure detection module is configured to be proportionally shifted with the output of the linear regulator.

9. A differential pressure monitoring method, characterized by, The differential pressure monitoring method is applied to the differential pressure monitoring device of any one of claims 1 to 8, and comprises: detecting a voltage difference across the bootstrap capacitor, and generating a lower transistor on indication signal if the voltage difference does not reach a set threshold; generating a number of consecutive pulse signals according to the lower transistor on indication signal to turn on the lower transistor when the pulse signal is high, so that the bootstrap capacitor is charged by the supply voltage until the voltage difference reaches the set threshold; and during the period of turning on the lower transistor by the pulse signal, if a negative current greater than a threshold is detected, a forced off signal is generated to control the end of the on period of the lower transistor corresponding to the current pulse signal.

10. A bootstrapped switching power supply, characterized by comprises: the differential pressure monitoring device of any one of claims 1 to 8; and the upper transistor, the lower transistor, the upper transistor drive circuit, the lower transistor drive circuit, the bootstrap capacitor and the bootstrap diode, wherein the first supply voltage charges the bootstrap capacitor through the bootstrap diode, and the bootstrap capacitor is electrically coupled between the first supply voltage and a switching node, wherein the upper transistor and the lower transistor are electrically coupled in series between a second supply voltage and ground, the source of the upper transistor and the drain of the lower transistor are both electrically coupled to the switching node, and the upper transistor drive circuit generates an upper transistor control signal to control the gate of the upper transistor, and the lower transistor drive circuit generates a lower transistor control signal to control the gate of the lower transistor, wherein when the lower transistor is on and the upper transistor is off, the voltage of the switching node is pulled to ground, the first supply voltage charges the bootstrap capacitor through the bootstrap diode, and when the lower transistor is off and the upper transistor is on, the voltage of the switching node is lifted to the second supply voltage, and the voltage of the node to which the bootstrap capacitor and the bootstrap diode are electrically coupled is higher than the voltage of the switching node, thereby achieving voltage bootstrap.

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