Multistage feedback broadband low noise amplifier

Abstract

The invention discloses a multi-stage feedback broadband low-noise amplifier which comprises a first-stage amplifier, a second-stage amplifier and an output-stage buffer amplifier. The first-stage amplifier is composed of a cascode structure and a current multiplexing structure; the second-stage amplification electric appliance is composed of a complementary common-source structure and a current multiplexing structure. The output stage buffer amplification circuit is composed of a common source buffer structure and a current multiplexing structure. According to the invention, the cascade structure and the complementary common-source structure are connected in parallel, and inter-stage capacitance offset, source inductance and current multiplexing are adopted. By means of the mode, the use efficiency of current in the circuit is improved, the circuit gain and noise performance and the like are improved, on the other hand, the Miller effect is effectively restrained, a dominant pole is pushed to high frequency, and therefore the circuit bandwidth is greatly expanded.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit design technology, and more specifically to a multi-stage feedback broadband low-noise amplifier. Background Technology

[0002] With the rapid development of high-speed wireless communication technology, high-precision short-range sensing, and satellite internet, modern radio frequency (RF) front-ends have placed a core demand on the ability of a single chip to achieve multi-band, multi-standard fusion reception. The application of highly integrated RF transceiver chips has significantly improved the performance of mobile communication devices. The RF receiver front-end module is one of the high-power modules in a communication system. To cope with the rapid development of high-speed wireless communication technology, high-precision short-range sensing, satellite internet, 5G mobile communication, and next-generation wireless LANs, RF receiver front-end chips are required to have characteristics such as wide coverage, low power consumption, low noise, and high gain.

[0003] As the first-stage active module in an RF receiver, the performance of a low-noise amplifier (LNO) directly determines the upper limit of the entire communication system's performance. Its core function is to amplify weak RF signals while minimizing its own noise introduction and maintaining sufficient linearity to prevent signal distortion. Its fundamental design goal is to provide amplified signals with high signal-to-noise ratio and low distortion characteristics for subsequent signal processing links, thus laying the foundation for high receiver sensitivity. Furthermore, wide bandwidth is also a key performance indicator for LNOs, requiring the circuit to maintain stable performance over a wide frequency range. However, extending the amplifier's operating bandwidth inevitably degrades the circuit's gain flatness and noise figure performance.

[0004] Wideband design of low-noise amplifiers is mainly achieved by extending impedance matching bandwidth and optimizing frequency response. Key technologies include parallel negative feedback, inductor peaking, and cascode structures. Parallel negative feedback introduces resistive elements between amplification stages, sacrificing some gain in exchange for a significant extension of input-output matching bandwidth. Inductor peaking utilizes the resonant effect of inductors and parasitic capacitances to boost gain at specific high-frequency points, thereby compensating for high-frequency roll-off; however, this technique increases chip area. Cascode structures, with their inherent wide input impedance characteristics, easily achieve wideband matching; however, this architecture typically faces optimization bottlenecks in terms of noise figure and power consumption. Therefore, the design of wideband low-noise amplifiers is essentially a process of seeking trade-offs among performance indicators such as bandwidth, gain, noise, and power consumption.

[0005] Common topologies for broadband low-noise amplifiers (LNAs) mainly include common-source and common-gate structures. Common-source structures offer high gain and excellent noise performance, but their input impedance exhibits a high Q-value characteristic. Achieving broadband matching often requires the introduction of multi-order passive networks, which significantly increases chip area and introduces additional losses. Common-gate structures, with their inherently low input impedance, easily achieve broadband matching, but this architecture is typically limited by lower gain and a relatively poor noise figure. In applications such as ultra-wideband communications, satellite links, and radar sensing, broadband LNAs capable of covering multiple frequency bands are crucial for improving system spectral efficiency. However, expanding amplifier bandwidth is often closely coupled with performance characteristics such as gain flatness, noise figure, and linearity, resulting in inherent trade-offs. Therefore, researching how to synergistically optimize gain, noise, and linearity within an ultra-wideband environment is a core challenge in overcoming the performance bottlenecks of next-generation broadband receivers. Summary of the Invention

[0006] The purpose of this invention is to provide a low-power broadband low-noise amplifier that can improve the efficiency of current utilization in each circuit path, effectively improve circuit gain and noise performance without increasing additional current, and optimize the feedback branch to improve gain flatness and expand bandwidth.

[0007] To address the shortcomings of existing technologies and the aforementioned deficiencies, this invention is achieved through the following design:

[0008] A low-power, wideband, low-noise amplifier includes a first-stage amplifier, a second-stage amplifier, and an output-stage buffer amplifier. The first-stage amplifier includes a common-source, common-gate amplification structure composed of a first transistor and a second transistor. The second-stage amplifier includes a complementary common-source amplification structure composed of a third transistor and a fourth transistor. An input matching network is formed by a first capacitor and a first inductor, with a second inductor serving as the load for the input-stage amplifier circuit. A third inductor serves as the input matching inductor for the amplifier circuit, and a fourth inductor serves as a peaking inductor to extend the bandwidth. A resistor, the third transistor, and the fourth transistor form a parallel negative feedback structure. The output-stage buffer amplifier consists of a buffer circuit structure with amplification, composed of a fifth transistor in a current-source common-source amplification structure and a sixth common-drain buffer transistor. The fifth and fourth inductors form an inter-stage matching network between the input and output stages. The sixth inductor forms the matching network between the fifth and sixth transistors. A circuit parallel negative feedback structure is formed by a third capacitor and a second resistor. An isolation DC signal structure is formed by a fourth capacitor. The DC currents of the first and second transistors are multiplexed; the DC currents of the third and fourth transistors are multiplexed; and the DC currents of the fifth and sixth transistors are multiplexed.

[0009] Furthermore, in the input stage amplifier circuit, one end of the first capacitor is connected to the input signal terminal, and the other end is connected to the first inductor; one end of the first inductor is connected to the first capacitor, and the other end is connected to the gate of the first transistor, the third inductor, and the third capacitor; one end of the second inductor is connected to the power supply, and the other end is connected to the drain of the second transistor as a load of the input stage amplifier circuit; one end of the second capacitor is connected to the drain of the first transistor and the source of the second transistor, and the other end is connected to the drain of the third transistor and the fourth transistor; one end of the third inductor is connected to the first inductor and the gate of the first transistor, and the other end is connected to one end of the first resistor, the gate of the third transistor, and the gate of the fourth transistor; one end of the fourth inductor is connected to the source of the fourth transistor, and the other end is connected to the power supply.

[0010] Furthermore, in the output stage buffer circuit, one end of the fifth inductor is connected to the second transistor, and the other end is connected to the sixth transistor for interstage matching; one end of the sixth inductor is connected to the source of the fifth transistor, and the other end is connected to the drain of the sixth transistor, forming an interstage matching between the fifth and sixth transistors; one end of the seventh inductor is connected to the source of the fifth transistor, and the other end is grounded; one end of the third capacitor is connected to the gate of the first transistor, and the other end is connected to the second resistor; one end of the fourth capacitor is connected to the source of the sixth transistor and the sixth inductor, and the other end is connected to the signal output terminal; one end of the second resistor is connected to the third capacitor to form a parallel negative feedback structure, and the other end is connected to the fourth capacitor.

[0011] Furthermore, in the input stage amplifier circuit, the drain of the first transistor and the source of the second transistor are connected to form a common-source, common-gate amplifier structure; the gates and drains of the third and fourth transistors are connected to form a complementary common-source amplifier structure.

[0012] Furthermore, the substrates and sources of the first and third transistors are connected to the ground signal terminal, and the substrates and sources of the second, fourth, fifth, and sixth transistors are connected.

[0013] The beneficial effects of this invention are as follows: The low-power broadband low-noise amplifier of this invention has the following advantages: First, this invention proposes a current multiplexing structure, which uses current multiplexing technology three times in the circuit, thereby improving the circuit gain and reducing the circuit noise figure without increasing the additional current; Second, this invention innovatively connects the common source cascode structure and the complementary common source structure in parallel, effectively suppressing the Miller effect and pushing the dominant pole to the high frequency, thereby greatly expanding the circuit bandwidth. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. The drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 This is a schematic diagram of the circuit structure of a low-power broadband low-noise amplifier according to the present invention.

[0016] Figure 2 The simulation results show the gain of a low-power broadband low-noise amplifier according to the present invention.

[0017] Figure 3 The simulation results show the noise figure of a low-power broadband low-noise amplifier according to the present invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the present invention clearer, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings. Examples of these preferred embodiments are illustrated in the drawings. The embodiments of the present invention described according to the accompanying drawings are merely exemplary and are not limited to these embodiments.

[0019] Furthermore, it should be noted that, in order to avoid obscuring the invention with unnecessary details, only structures and / or processing steps closely related to the solution according to the invention are shown in the accompanying drawings, while other details that are not closely related to the invention are omitted.

[0020] Furthermore, in the description of this invention, the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used solely for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0021] Please see Figures 1 to 3 The embodiments of the present invention include:

[0022] like Figure 1 As shown, the embodiments of the present invention include: a low-power broadband low-noise amplifier provided by the present invention includes a first-stage amplifier circuit 100, a second-stage amplifier circuit 200, and an output-stage buffer amplifier 300.

[0023] This invention consists of two amplifier stages, where the first stage amplifier circuit 100 is a common-source cascode amplifier, and the second stage amplifier circuit 200 is a complementary common-source structure. The output stage buffer amplifier 300 is an amplifier that combines the output buffer of a common-drain amplifier structure with a common-source amplifier.

[0024] The first-stage amplifier circuit 100 of this invention is a common-source cascode amplifier structure, consisting of a first transistor (101) and a second transistor (102). The common-source cascode amplifier structure is a current-reused structure, achieving high gain and good isolation performance without increasing the current path, thus reducing the influence of the subsequent stage circuit on the preceding stage circuit. One end of the third capacitor (106) is connected to the drain of the third transistor (201), and the other end is connected to the drain of the first transistor (101), canceling the inherent parasitic capacitance of the transistor and effectively reducing the input reflection coefficient.

[0025] The second-stage amplifier circuit 200 of this invention is a complementary common-source structure, consisting of a third transistor (201) and a fourth transistor (202) connected in parallel. A first resistor (205) serves as a feedback resistor, forming a parallel negative feedback structure with the third and fourth transistors. A third inductor (203) serves as an input matching inductor, and a fourth inductor (204) serves as a peaking inductor, improving the matching network performance and thus increasing the circuit bandwidth. The input signal flows into the first transistor (101) through the first capacitor (105) for amplification, and then is input to the second transistor (102) through the source of the first transistor (101) to achieve common-gate amplification. Simultaneously, the input signal flows into the third transistor (201) and the fourth transistor (202) through the first capacitor (105) for amplification, and then is input to the second transistor (102) through the second capacitor (106) to achieve common-gate amplification. The first inductor (103) and the third inductor (203) are mainly used to improve the matching network performance, which is beneficial for increasing the circuit bandwidth. The first capacitor (105) is mainly used to isolate the influence of DC voltage on the input signal, and at the same time, it forms an input matching network with the first inductor (103). The second inductor (104) serves as the load of the input stage amplifier and the circuit peaking inductor. It introduces zero-point and pole cancellation, which helps to suppress the gain roll-off at high frequencies and achieve the effect of expanding the circuit bandwidth.

[0026] The output buffer amplifier 300 of the present invention adopts a common-source amplifier and an output buffer, and is composed of a fifth transistor (301) and a sixth transistor (302). The fifth transistor (301) is a common-source amplifier structure, and the sixth transistor (302) is a common-drain amplifier structure. The drain of the fifth transistor (301) is connected to the source of the sixth transistor (302) through a sixth inductor (304). The third capacitor (306) and the second resistor (308) form a parallel resistor-capacitor negative feedback. The parallel feedback adjusts the circuit stability and widens the bandwidth by increasing the real part of the input impedance by introducing resistance, making the gain within the operating frequency band flatter. The fifth inductor (303) serves as the matching inductor between the input and output stages, improving the performance of the matching network; the sixth inductor (304) serves as the interstage matching between the fifth and sixth transistors, improving the performance of the output matching network; the seventh inductor (305) serves as the source inductor, optimizing the output matching while expanding the bandwidth; the fifth capacitor (306) serves as part of the output matching network, achieving the effect of isolating the DC power supply and reducing the impact on the next stage circuit.

[0027] This invention is used in the UWB standard frequency band (3.1~10.6GHz), with an operating frequency band of 3.3GHz~11GHz. It should be noted that the operating frequency band of this embodiment is merely an example and is not intended to limit the specific operating frequency. In actual design, this invention can be applied to different frequency bands.

[0028] This invention discloses a low-power broadband low-noise amplifier applicable to fields including high-speed wireless communication technology, high-precision short-range sensing, satellite internet, 5G mobile communication, and next-generation wireless local area networks. The invention proposes a current multiplexing structure, using current multiplexing technology three times in the circuit to improve circuit gain and reduce circuit noise figure without increasing additional current. The invention innovatively combines a common-source cascode structure with a complementary common-source structure in parallel, improving gain and expanding bandwidth. Within a bandwidth of 3.3GHz to 11GHz, the minimum gain is 17.5dB and the maximum gain is 21.8dB. The circuit employs parallel feedback technology, current multiplexing technology, source inductors, and peaking inductors to reduce equivalent input impedance, improve circuit gain flatness, and expand bandwidth. This invention ultimately achieves a low-noise amplifier with wide bandwidth, low noise figure, and high gain.

[0029] The low-power broadband low-noise amplifier has a power supply voltage of 1.2V and consumes 17.5mW of power.

[0030] Figure 2 These are simulation results for the gain of a low-power broadband low-noise amplifier. The gain S21 of this low-noise amplifier ranges from a minimum of 17.5 dB to a maximum of 21.8 dB in the 3.3 GHz to 11 GHz frequency band.

[0031] Figure 3 These are simulation results of the noise figure of a low-power broadband low-noise amplifier. The noise figure NF of this low-noise amplifier is less than 3.2dB in the 3.3GHz~11GHz frequency band, and the minimum noise figure in the band is 1.9dB.

[0032] The low-power broadband low-noise amplifier of the present invention has the following advantages:

[0033] First, the present invention proposes a current multiplexing structure that uses current multiplexing technology three times in the circuit to improve circuit gain and reduce circuit noise figure without increasing additional current.

[0034] Second, this invention innovatively connects the common source cascode structure and the complementary common source structure in parallel, effectively suppressing the Miller effect and pushing the dominant pole to a higher frequency, thereby greatly expanding the circuit bandwidth.

[0035] Furthermore, it should be noted that in this specification, "comprising," "including," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0036] It should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A broadband low-noise amplifier with multi-stage feedback, characterized in that, It includes a first-stage common-source common-gate amplifier circuit, a second-stage complementary common-source amplifier circuit, and an output stage buffer circuit; The first-stage common-source common-gate amplifier circuit includes a common-source common-gate amplifier structure composed of a first transistor (101) and a second transistor (102); an input matching network composed of a first capacitor (105) and a first inductor (103); a second inductor (104) as the load of the input stage amplifier circuit; and a capacitor cancellation feedback structure composed of a second capacitor (106). The second-stage complementary common-source amplifier circuit uses a third inductor (203) as the input matching inductor of the input amplifier circuit (200), a fourth inductor (204) as the peaking inductor to extend the bandwidth, and a resistor parallel negative feedback structure composed of a first resistor (205), a third transistor (201), and a fourth transistor (202). The output stage buffer amplifier consists of a common-source amplifier structure with current source connection, a common-source amplifier structure, a common-drain buffer circuit structure consisting of a fifth transistor (301) and a common-drain buffer sixth transistor (302), an interstage matching network between the input stage and the output stage consisting of a fifth inductor (303) and a second inductor (104), a matching network between the fifth transistor (301) and the sixth transistor (302) consisting of a sixth inductor (304), a circuit parallel negative feedback structure consisting of a third capacitor (306) and a second resistor (308), and an isolated DC signal structure consisting of a fourth capacitor (307). The substrate and source of the first transistor (101) and the third transistor (201) are connected to the ground signal terminal, and the substrate and source of the second transistor (102), the fourth transistor (202), the fifth transistor (301), and the sixth transistor (302) are connected. The first transistor (101) and the second transistor (102) have their DC current multiplexed; the third transistor (201) and the fourth transistor (202) have their DC current multiplexed; and the fifth transistor (301) and the sixth transistor (302) have their DC current multiplexed.

2. The low-power broadband low-noise amplifier according to claim 1, characterized in that: In the first stage amplifier circuit (100), one end of the first capacitor (105) is connected to the input signal terminal, and the other end is connected to the first inductor; one end of the first inductor (103) is connected to the first capacitor (105), and the other end is connected to the gate of the first transistor (101), the third inductor (203), and the third capacitor (306); one end of the second inductor (104) is connected to the power supply, and the other end is connected to the drain of the second transistor (102) as the load of the input stage amplifier circuit; the drain of the first transistor (101) and the source of the second transistor (102) are connected to form a common source common gate amplifier structure; In the second-stage amplifier circuit (200), one end of the third inductor (203) is connected to the gate of the second capacitor (106) and the first transistor (101), and the other end is connected to one end of the first resistor (205), the gate of the third transistor (201), and the gate of the fourth transistor (202); one end of the fourth inductor (204) is connected to the source of the fourth transistor (202), and the other end is connected to the power supply; the gates and drains of the third transistor (201) and the fourth transistor (202) are connected to form a complementary common-source amplifier structure; In the output stage buffer circuit, one end of the fifth inductor (303) is connected to the second transistor (102), and the other end is connected to the sixth transistor (302) as interstage matching; one end of the sixth inductor (304) is connected to the source of the fifth transistor (301), and the other end is connected to the drain of the sixth transistor (302), forming an interstage matching between the fifth transistor (301) and the sixth transistor (302); one end of the seventh inductor (305) is connected to the source of the fifth transistor (301), and the other end is grounded; one end of the third capacitor (306) is connected to the gate of the third transistor (201), and the other end is connected to the second resistor (308); one end of the fourth capacitor (307) is connected to the source of the sixth transistor (302) and the sixth inductor (304), and the other end is connected to the signal output terminal; one end of the second resistor (308) is connected to the third capacitor (306) to form a parallel negative feedback structure, and the other end is connected to the fifth capacitor (307).

3. The low-power broadband low-noise amplifier according to claim 1, characterized in that: The substrate and source of the first transistor (101) and the third transistor (201) are connected to the ground signal terminal, and the substrate and source of the second transistor (102), the fourth transistor (202), the fifth transistor (301), and the sixth transistor (302) are connected.

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