A low-damage etching method using SiO2 / SiOxNy composite mask
The low-damage etching method using SiO2/SiOxNy composite masks solves the high aspect ratio etching problem of InAs/GaSb superlattice infrared detectors in the prior art, achieving high selectivity and low-damage etching effect, and improving device performance and process stability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BEIJING UNIV OF TECH
- Filing Date
- 2026-01-26
- Publication Date
- 2026-05-29
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Figure CN121586454B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor fabrication technology, and particularly relates to a method using SiO2 / SiO2. x N y Low-damage etching method for composite masks. Background Technology
[0002] For small-pixel-pitch area array devices, the selection of mask materials and the optimization of etching processes are two core technological challenges. Commonly used masks can be divided into photoresist masks and hard masks. As the scale of focal plane arrays continues to increase and the pixel pitch continues to decrease, traditional photoresist masks, due to insufficient etching selectivity, can no longer meet the requirements for fabricating high aspect ratio mesa. Masks need to maintain high selectivity during long-term etching. Although commonly used SiO2 hard masks have been extensively studied, problems such as lateral drilling and bottom drilling still exist when achieving extremely high aspect ratio etching. To address this, current methods mainly focus on improving lateral drilling by increasing mask thickness and optimizing etching gases (such as reducing argon flow rate). Research on the etching selectivity and deformation resistance of the mask itself still needs to be conducted. The composition, power, pressure, and other etching process parameters of the etching gas have a complex influence on the morphology after etching. For example, increasing the Cl2 content in the etching gas can improve the etching rate, but it will lead to a deterioration of the surface morphology; introducing an inert gas during the etching process can improve the sidewall steepness, but it may reduce the etching rate and lead to surface roughness and pit formation. In order to balance morphology and low damage, complex processes such as variable power step-by-step etching are often required.
[0003] Based on this, existing technologies often face the following prominent problems in the fabrication of high-performance InAs / GaSb superlattice infrared detectors: wet etching is difficult to meet the patterning requirements of high-integration devices for high aspect ratios and steep sidewalls, while mainstream dry etching techniques, in pursuing high aspect ratios, are limited by the etching selectivity and anti-drilling ability of the mask itself, as well as unavoidable plasma physical damage, making it difficult to guarantee the quality of the mesa sidewalls and bottom, thus leading to a reduction in the electrical performance of the device. Therefore, there is an urgent need to propose an etching method that can achieve low-damage deep mesa to meet the manufacturing requirements of infrared focal plane array chips in high-performance infrared detectors. Summary of the Invention
[0004] In view of this, the present invention provides a method using SiO2 / SiO x N yThis invention presents a low-damage etching method using composite masks to achieve low-damage, deep mesa etching of antimony superlattices. The method precisely transfers patterns to a composite mask via photolithography and sequential etching, using the mask as a protective layer for high-selectivity dry etching of the superlattice material. This process yields mesa structures with steep sidewalls and an aspect ratio greater than 2, providing a key technology for manufacturing high-performance infrared detectors and ultimately reducing dark current and improving device performance.
[0005] To achieve the above objectives, the technical solution of the present invention is implemented as follows:
[0006] In a first aspect, the present invention discloses a method using SiO2 / SiO x N y A low-damage etching method for composite masks, characterized by comprising the following steps:
[0007] S1. Deposition composite mask
[0008] SiO2 and SiO2 were deposited on the surface of a superlattice material by plasma-enhanced chemical vapor deposition. x N y Composite mask;
[0009] S2. Applying the photoresist layer
[0010] Photoresist is coated on the surface of a composite mask, and after exposure and development, a patterned photoresist layer is formed on the mask surface.
[0011] S3. Etching composite mask
[0012] Inductively coupled plasma etching of the composite mask was performed using a CHF3 / Ar mixed gas.
[0013] S4. Etched Superlattice Materials
[0014] Inductively coupled plasma etching of exposed superlattice materials was performed using a BCl3 / Ar mixed gas to obtain superlattice devices with high aspect ratio mesa structures.
[0015] Further, in step S1, the plasma-enhanced chemical vapor deposition process involves growing a SiO2 mask on the surface of a superlattice material at a precursor SiH4 flow rate of 30-40 sccm and an N2O flow rate of 60-70 sccm, at 200-300°C; and growing SiO2 on the surface of the SiO2 mask at a precursor SiH4 flow rate of 20-30 sccm, an NH4 flow rate of 20-30 sccm, and an N2O flow rate of 20-30 sccm, at 200-300°C. x N y Mask.
[0016] Furthermore, in step S3, the inductively coupled plasma etching process involves introducing CHF3 gas with a flow rate of 20-30 sccm and Ar gas with a flow rate of 20-30 sccm into the etching chamber. The inductively coupled plasma power is 300-400W, the radio frequency bias power is 100-150W, and the chamber pressure is 5-10 mTorr.
[0017] Furthermore, after completing step S3, the residual photoresist layer on the surface of the superlattice material is removed to obtain a patterned composite mask.
[0018] Furthermore, in step S4, the inductively coupled plasma etching process involves introducing BCl3 gas at a flow rate of 5-20 sccm and Ar gas at a flow rate of 20-30 sccm into the etching chamber. The inductively coupled plasma power is 600-800W, the radio frequency bias power is 100-200W, and the chamber pressure is 5-10 mTorr.
[0019] Furthermore, in step S4, after inductively coupled plasma etching for a certain period of time, protective gas N2 is introduced into the chamber under plasma conditions. The nitrogen flow rate is 50~60 sccm. After a certain period of time, the N2 is turned off to reduce damage to the sidewalls of the mesa.
[0020] Furthermore, in step S4, the processes of inductively coupled plasma etching and the introduction of protective gas N2 are alternately cycled until the mesa structure of the required depth is obtained.
[0021] Furthermore, after completing step S4, the composite mask remaining on the surface of the superlattice material is removed.
[0022] Furthermore, the superlattice material is an antimonide superlattice material.
[0023] Secondly, the present invention also discloses a mid-to-long-wave dual-color infrared photodetector, wherein the infrared photodetector comprises a superlattice device with a high aspect ratio mesa structure prepared by the low-damage etching method of the first aspect of the present invention.
[0024] This invention provides a method using SiO2 / SiO x N y A low-damage etching method for composite masks. Compared with the prior art, the present invention has at least the following advantages:
[0025] (1) This invention can significantly improve the mask forming quality and achieve high-precision pattern transfer. Traditional single masks (such as pure SiO2) are excessively consumed during long-term ICP etching of antimony superlattices due to limited selectivity, thus limiting mesa depth. This invention utilizes SiO2 / SiO2... x N yThe stacked structure allows for independent optimization of the mask etching process during the transfer of photolithographic patterns to the mask layer. When etching composite masks, CHF3 achieves a selectivity significantly higher than that of photoresist, resulting in a hard mask with extremely slow degradation and precise pattern boundaries. In subsequent deep etching of the superlattice, the composite mask persistently maintains its initial pattern size, achieving a selectivity greater than 10.
[0026] (2) This invention can effectively suppress lateral drilling and mask deformation, resulting in a steep sidewall. Due to SiO₂ x N y The layer has superior resistance to plasma erosion compared to SiO2. As the top layer of the mask, it directly bears most of the plasma action, significantly slowing down the rate of lateral erosion. This optimizes the stress matching of the mask and reduces mask warping caused by stress. As a result, the composite mask can always maintain the verticality of the sidewalls, thus accurately transmitting the pattern downwards. Ultimately, a mesa structure with steep sidewalls (angle greater than 80°) and regular shape is obtained, which effectively reduces crosstalk between pixels.
[0027] (3) This invention can effectively reduce mesa sidewall damage and improve device electrical performance. The plasma in dry etching can cause lattice damage to the mesa sidewalls, forming recombination centers and leading to a sharp increase in device dark current. The composite mask of this invention can achieve the same etching depth with shorter etching time and lower bias power, reducing the plasma bombardment time on the sidewalls and mitigating etching-induced sidewall damage from the source. The resulting sidewall surface state density is lower, which can effectively suppress surface leakage current generated by sidewall leakage paths in mesa junction devices, thereby improving the detectivity and operating temperature of infrared detectors.
[0028] (4) This invention expands the process window and improves process stability and repeatability. A single mask is extremely sensitive to etching process parameters (such as gas ratio, power, etc.), has a narrow process window, and results in large yield fluctuations. This invention decomposes the pattern transfer process into multiple steps by introducing SiO2. x N y This layer adds an independently controllable process dimension. For example, by adjusting the SiO layer... x N y The thickness or composition is adjusted to compensate for and accommodate minor fluctuations in the etching process between steps. This design relaxes the stringent requirements for individual etching steps, making the entire etching process more tolerant. The repeatability and uniformity of process results (such as depth and morphology) are significantly improved across different batches or equipment conditions, making it suitable for large-scale commercial production. Attached Figure Description
[0029] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0030] Figure 1 This is a schematic diagram of the InAs / GaSb superlattice material of the present invention;
[0031] Figure 2 For the deposition of SiO2 / SiO on the surface of the superlattice material of this invention x N y Schematic diagram of the structure after composite masking;
[0032] Figure 3 This is a schematic diagram of the structure after a patterned photoresist layer is coated on the surface of the composite mask of the present invention.
[0033] Figure 4 This is a schematic diagram of the structure after etching the composite mask on the surface of the superlattice material of the present invention;
[0034] Figure 5 This is a schematic diagram of the mesa structure after mesa etching is completed on the surface of the superlattice material of the present invention;
[0035] Figure 6 This is a microscopic morphology image of the superlattice material surface after mesa etching according to the present invention;
[0036] Figure 7 This is a schematic diagram of the superlattice device obtained after removing the mask according to the present invention;
[0037] Figure 8 The diagram shows the IV and RV characteristics of the 640×512 medium-long wave dual-color focal plane array of the present invention.
[0038] Figure 9 This is a response spectrum curve of the infrared detector of the present invention. Detailed Implementation
[0039] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0040] Unless otherwise specified, all temperatures mentioned herein are in degrees Celsius, and the preferred embodiments can be freely combined as needed. Those skilled in the art will understand that the data and parameters described in the examples are merely exemplary and do not constitute a limitation of the invention. All components used in the following examples and comparative examples are compounds known in the art, and all equipment used is equipment publicly known in the art. All components and equipment used in this invention can be obtained commercially or prepared using known techniques.
[0041] This invention provides a method using SiO2 / SiO x N y A low-damage etching method for composite masks includes the following steps:
[0042] S0. Cleaning material sheet
[0043] Clean the superlattice epitaxial material sheet; in order to prepare a mid-to-long-wavelength dual-color infrared photodetector, the superlattice material used in this invention is an antimony superlattice material, such as InAs / GaSb.
[0044] S1. Deposition composite mask
[0045] SiO2 and SiO2 were deposited on the surface of a superlattice material using plasma-enhanced chemical vapor deposition (PECVD). x N y Composite mask;
[0046] The PECVD process of this invention includes: heating the superlattice material to a deposition temperature of 200~300℃, introducing SiH4 gas with a flow rate of 30~40 sccm and N2O gas with a flow rate of 60~70 sccm into the deposition chamber, simultaneously turning on the plasma, adjusting the plasma parameters according to whether ignition is performed, with an initial plasma power of 5~15W, a frequency of 50~150kHz, and controlling the chamber pressure to 5~15mbar, maintaining these process conditions for a certain time, and growing a SiO2 mask of the required thickness on the surface of the superlattice material;
[0047] Then, SiH4 gas, NH4 gas, and N2O gas at flow rates of 20-30 sccm are introduced into the deposition chamber. While maintaining the deposition temperature and chamber pressure, the plasma power is increased to 15-30 W, and the frequency is kept constant at 50-150 kHz. This process is maintained for a certain time, resulting in the growth of SiO2 of the desired thickness on the SiO2 mask surface. x N y Masking; after growth is complete, while maintaining constant chamber pressure, the plasma and gas sources are turned off, and the superlattice material sheet is removed after cooling to room temperature.
[0048] The SiO2 layer of this invention serves as a buffer layer and etching barrier layer in contact with the superlattice substrate, and its high etching selectivity is the basis for ensuring final stopping. x N y This layer serves as both the pattern carrier and durability layer. By adjusting the x and y values, it achieves superior resistance to plasma erosion and moderate stress compared to SiO2. The interface between the two layers is clear, and the pattern is formed from photoresist to SiO2 through sequential etching. x N y Then, the high-fidelity transfer of SiO2, SiO x N y The layer acts as the top layer to protect the dimensions of the pattern throughout the deep etching process.
[0049] This invention applies to SiO2 and SiO x N y There is no specific limitation on the growth and deposition time of the mask. The deposition time can be adjusted appropriately according to the required thickness of the composite mask. Increasing the deposition time will result in a thicker mask, while decreasing the deposition time will result in a thinner mask. The thickness of SiO2 masks can be 50~500nm, and SiO2 masks can be thinner. x N y The mask thickness can be 1000~3000nm.
[0050] S2. Coating the photoresist layer
[0051] A layer of photoresist with a thickness of 0.5~10μm is uniformly spin-coated onto the surface of the composite mask of the material wafer using a spin coater, and then baked on a hot plate. After the material wafer is exposed in a photolithography machine, it is developed in a developing solution, and then baked in an oven to harden the film before being removed, thereby forming a patterned photoresist layer on the mask surface.
[0052] S3. Etching composite mask
[0053] Pump oil is dropped onto the surface of an aluminum disk, and the back side of the superlattice material wafer is adhered to the aluminum disk through the pump oil. The wafer is then placed in an ICP etching machine. The etching chamber is evacuated and the chamber pressure is maintained at 5~10 mTorr. CHF3 gas and Ar gas with a flow rate of 20~30 sccm are introduced into the chamber. The plasma is turned on, the ICP power is 300~400W, and the RF bias power is 100~150W. The composite mask is etched using a mixture of CHF3 and Ar gas. After etching is completed, the gas source and plasma are turned off, and the superlattice material wafer is removed. The residual photoresist layer on the surface of the material wafer is removed to obtain a patterned composite mask.
[0054] The present invention does not have a special limitation on the etching time in step S3. The etching time can be determined according to the thickness of the composite mask. When the composite mask is thicker, the etching time can be increased appropriately, and when the composite mask is thinner, the etching time can be reduced appropriately. The etching time is sufficient to completely remove the composite mask exposed after development.
[0055] S4. Etched Superlattice Materials
[0056] Pump oil is dropped onto the surface of an aluminum disk, and the back side of the superlattice material sheet is adhered to the aluminum disk through the pump oil. The disk is then placed in an ICP etching machine. The etching chamber is evacuated and the chamber pressure is maintained at 5~10 mTorr. BCl3 gas with a flow rate of 5~20 sccm and Ar with a flow rate of 20~30 sccm are introduced into the chamber. The plasma is turned on, the ICP power is 600~800W, and the radio frequency bias power is 100~200W. The exposed superlattice material sheet is etched using a mixture of BCl3 and Ar gas.
[0057] After ICP etching for a certain period of time, BCl3 and Ar are turned off; while maintaining plasma conditions, protective gas N2 is introduced into the chamber at a flow rate of 50~60 sccm; after a certain period of time, the nitrogen is turned off.
[0058] The process of alternating ICP etching and introducing protective gas N2 is repeated until a low-damage deep mesa structure of the required depth is obtained.
[0059] After shutting off the gas source and plasma, the superlattice material wafer is removed. Acid is used to remove the residual composite mask on the surface of the superlattice material wafer, yielding an antimony superlattice device with a high aspect ratio mesa structure. The acid used in this invention can be hydrofluoric acid or buffered oxide etchant (BOE). BOE is a mixture of ammonium fluoride (NH4F) and hydrofluoric acid (HF) in a mass ratio of 1:10, and is widely used in etching processes in semiconductor manufacturing.
[0060] During the ICP etching process in step S4, the ICP radio frequency source used in this invention should be able to fully ionize the introduced reactive gas to avoid excessive unionized gas in the chamber, which would affect the etching rate. By controlling the radio frequency bias power, the ionized ions can be able to bombard the surface of the superlattice material perpendicularly. At the same time, increasing the ICP power increases the plasma content generated by the ionization of BCl3 gas, thereby improving the superlattice etching rate and the etching selectivity between the mask layer and the superlattice material. Using a low radio frequency bias power reduces the content and energy of the downward-bombarding Ar ions, reducing the longitudinal etching consumption of the mask layer. Thus, by adjusting the ratio of ICP ionized gas to radio frequency vertically bombarded ionized ions, the longitudinal and lateral etching resistance of the mask layer is improved, and the etching selectivity between the mask layer and the superlattice material is increased, achieving high aspect ratio mesa etching and ultimately obtaining a deep mesa junction with smooth sidewall morphology and controllable tilt angle. This invention uses a BCl3 / Ar mixed gas for etching under low radio frequency bias power conditions. The purpose of using low radio frequency bias power is to reduce the bombardment damage of high-energy ions. BCl3 is used to remove the oxide layer of the superlattice material and promote anisotropy.
[0061] This invention introduces a protective gas, N2, into the cavity without interrupting the plasma. The nitrogen gas is activated in the plasma and forms an extremely thin nitride passivation film on the newly etched sidewall surface, thus protecting the sidewall from lateral erosion in the next etching cycle. The two-step process of ICP etching and introducing the protective gas N2 is repeated multiple times until the target etching depth is reached, at which point the mesa etching is terminated. This invention allows for precise control of the mesa etching depth by adjusting the number of cycles in these two steps.
[0062] This invention does not impose specific limitations on the ICP etching time, N2 shielding gas introduction time, and number of cycles in step S4. Reducing the ICP etching time, increasing the N2 shielding gas introduction time, and increasing the number of cycles can effectively prevent lateral erosion of the sidewalls, but the etching process becomes more complex, time-consuming, and costly. Conversely, increasing the ICP etching time, reducing the N2 shielding gas introduction time, and reducing the number of cycles can lower the process cost, but the degree of lateral erosion of the sidewalls will definitely be more pronounced. Therefore, in actual production, the ICP etching time, N2 shielding gas introduction time, and number of cycles can be determined by balancing the etching process cost and the required mesa etching quality. Typically, the etching time can be 1–20 min, the N2 shielding gas introduction time can be 1–5 min, and the number of cycles can be ≥4.
[0063] This invention creatively proposes a composite mask composed of silicon dioxide and silicon oxynitride stacked together, consisting of materials with high etch selectivity and high corrosion resistance. This achieves high aspect ratio and low-damage etching with low bias power. Of course, the composite mask structure proposed in this invention is not limited to silicon dioxide and silicon oxynitride stacked materials; similar material combinations are also possible. As long as a top layer of material with high plasma erosion resistance is deposited on the bottom material with high etch selectivity, low-damage, deep mesa etching can be achieved. This invention provides a new approach to mask design for low-damage, deep etching of antimony compound superlattice materials.
[0064] Furthermore, this invention creatively proposes an alternating cyclic process of "main etching - in-situ surface treatment." This process, after etching the superlattice material using low-power plasma, immediately introduces nitrogen-containing gas for in-situ sidewall optimization. This cyclic mechanism fundamentally controls etching damage. By using a silicon dioxide / silicon oxynitride composite mask and introducing nitrogen gas for in-situ surface treatment after ICP etching, this invention achieves deep etching without the need for extremely high bias power, avoids continuous plasma bombardment, and simultaneously achieves sidewall protection and damage suppression during deep etching, thereby obtaining a steep and smooth sidewall morphology.
[0065] Secondly, the present invention also provides a mid-to-long-wave dual-color infrared photodetector, wherein the infrared photodetector comprises a superlattice device with a high aspect ratio mesa structure prepared by the low-damage etching method of the present invention.
[0066] The present invention will now be described in more detail with reference to exemplary embodiments. The following embodiments or experimental data are intended to illustrate the present invention by way of example, and those skilled in the art should understand that the present invention is not limited to these embodiments or experimental data.
[0067] Example 1
[0068] Using SiO2 / SiO x N y Low-damage etching using a composite mask to fabricate antimonide superlattice devices with high aspect ratio mesa structures includes the following steps:
[0069] S0. Cleaning material sheet
[0070] Using a spray gun station, the InAs / GaSb superlattice epitaxial material wafer was sprayed with acetone and alcohol, then dried with a nitrogen gun. The cleaned material wafer looks like... Figure 1 As shown.
[0071] S1. Deposition composite mask
[0072] S11. Clean the sedimentation chamber
[0073] Place the material sheet into the PECVD equipment, turn on the equipment and the main gas switch, and continuously introduce argon gas into the deposition chamber at a gas flow rate of 100 sccm for 1 minute; after turning off the argon gas, evacuate the chamber pressure to below 0.5 mbar; repeat the above process of introducing argon gas and evacuating the chamber three times to remove residual air from the chamber.
[0074] S12. Growth of SiO2
[0075] The material sheet was heated to 230℃ at a heating rate of 100℃ / min. SiH4 gas with a flow rate of 33 sccm and N2O gas with a flow rate of 66 sccm were introduced into the deposition chamber, and the chamber pressure was maintained at 10 mbar. The plasma was turned on simultaneously with a plasma power of 10 W and a frequency of 100 kHz. SiO2 mask growth was carried out under these process conditions for 5 min. The SiH4 and N2O gases were then turned off, resulting in a SiO2 mask layer with a thickness of approximately 200 nm.
[0076] S13. Growth of SiO x N y
[0077] While maintaining constant material temperature and chamber pressure, SiH4 gas, NH4 gas, and N2O gas at flow rates of 20 sccm and 20 sccm respectively were introduced into the deposition chamber. The plasma power was increased to 20 W, and the frequency was maintained at 100 kHz. Under these process conditions, SiO2 deposition was carried out for 120 minutes. x N y Mask growth; SiH4, NH4, and N2O gases are turned off, and the plasma is shut off to obtain SiO2 with a thickness of approximately 1800 nm. x N y Mask layer;
[0078] S14. Remove the film after cooling.
[0079] Maintaining constant chamber pressure, the material was cooled at a rate of 100°C / min until it reached room temperature. The superlattice material sheet with the composite mask was then removed; the total thickness of the composite mask was approximately 2 μm. The superlattice material sheet with the composite mask is shown below. Figure 2 As shown.
[0080] S2. Applying the photoresist layer
[0081] A 4μm thick layer of positive AZ6130 photoresist was uniformly spin-coated onto the composite mask surface of the material wafer using a spin coater at 2200 rpm, and then baked on an 85℃ heating plate for 5 min. The material wafer was then subjected to 50mW / cm² heat in a photolithography machine. 2After exposure to light intensity for 3.2 seconds, the film is immersed in the developer for 90 seconds. After inspection, it is baked in an oven for 40 minutes to harden the film, and then removed to form a patterned photoresist layer on the mask surface, such as... Figure 3 As shown.
[0082] S3. Etching composite mask
[0083] S31. Etching
[0084] A drop of pump oil is placed on the surface of an aluminum disk. The back side of the superlattice material wafer is then adhered to the aluminum disk via the pump oil. After purging with a nitrogen gun, the wafer is placed into the etching chamber of an ICP etching machine. The chamber pressure is evacuated to below 10 mTorr. CHF3 gas at a flow rate of 28 sccm and Ar at a flow rate of 22 sccm are introduced into the chamber, maintaining the chamber pressure at 7 mTorr. The plasma is turned on, with an ICP power of 350 W and an RF bias power of 120 W. Under these process conditions, the composite mask is etched using a CHF3 and Ar mixed gas for 20 minutes. After completion, CHF3 and Ar are turned off, the plasma RF is turned off, and Ar at a flow rate of 100 sccm is introduced to purge the remaining gas in the gas path. The material wafer is then removed. Figure 4 As shown.
[0085] S32. Remove photoresist
[0086] The material wafer was immersed in an acetone solution at 85°C for 20 minutes to remove the residual photoresist layer on the surface of the superlattice material wafer. After removal, the superlattice epitaxial material wafer was sprayed with acetone and alcohol using a spray gun and dried with a nitrogen gun to obtain a patterned composite mask.
[0087] S4. Etched Superlattice Materials
[0088] S41. Tabletop Etching
[0089] A drop of pump oil was placed on the surface of an aluminum disk, and the back side of the superlattice material wafer was adhered to the aluminum disk through the pump oil. After purging with a nitrogen gun, the wafer was placed in the etching chamber of an ICP etching machine. The chamber pressure was pumped down to below 10 mTorr, and BCl3 gas at a flow rate of 10 sccm and Ar at a flow rate of 25 sccm were introduced into the chamber, while maintaining the chamber pressure at 7 mTorr. The plasma was turned on, with an ICP power of 700W and an RF bias power of 150W. Under these process conditions, the exposed superlattice material wafer was ICP etched for 10 minutes using a mixture of BCl3 and Ar gas. After the process was completed, the BCl3 and Ar gas were turned off.
[0090] S42. In-situ surface treatment
[0091] Under plasma conditions, a protective gas N2 with a flow rate of 55 sccm was introduced into the chamber for 200 seconds and then the nitrogen gas was turned off to reduce sidewall damage.
[0092] S43. Circulation process
[0093] The process involves alternating between steps S41 and S42 six times, with the gas source and plasma shut off, to obtain a low-damage deep mesa structure of the desired depth. A schematic diagram of the mesa structure is shown below. Figure 5 As shown in the figure, the microstructure of the platform is as follows: Figure 6 As shown;
[0094] S44. Remove mask
[0095] The residual composite mask on the surface of the superlattice material was removed using a buffered oxide etchant (BOE) consisting of ammonium fluoride (NH4F) and hydrofluoric acid (HF) in a mass ratio of 1:10, resulting in an antimonybide superlattice device with a high aspect ratio mesa structure. Figure 7 As shown.
[0096] Electrical and optical performance testing
[0097] The antimony superlattice device with a high aspect ratio mesa structure prepared in Example 1 was assembled into a complete 640×512 InAs / GaSb T2SL mid-to-long-wavelength dual-color focal plane array. The array was then interconnected with the readout circuit via indium pillars and packaged in a Dewar for testing of its electrical and optical performance.
[0098] The IV and RV characteristics of a long-wavelength dual-color focal plane array in InAs / GaSb T2SL were tested using a Keithley B1500 semiconductor analyzer at liquid nitrogen temperature. The test results are as follows: Figure 8 As shown. By Figure 8 It can be seen that at a temperature of 77K, the RA of the mid-wave infrared (MW) diode is 5.71 × 10⁻⁶. 4 Ω·cm 2 The long-wave infrared (LW) diode has an Ω·cm resistance of 594.7 Ω·cm. 2 The dark current density is 4.13 × 10⁻⁶ m / s. -5 A·cm -2 The dark current density of LW is 6.28 × 10⁻⁶. -3 A·cm -2Even with narrower band gaps and greater susceptibility to leakage at longer wavelengths, the device still exhibits good electrical characteristics. The extremely high dynamic impedance RA and extremely low dark current density directly stem from the low-damage mesa sidewalls achieved through the etching process of this invention, verifying the effectiveness of reducing mesa sidewall damage. The high selectivity etching provided by the composite mask minimizes lattice defects and surface states caused by plasma bombardment, thereby significantly suppressing sidewall leakage channels and enabling the device to maintain superior PN junction characteristics even at a low temperature of 77K.
[0099] From the detector's response spectrum curve Figure 9 As can be seen, this device achieves dual-color detection, with 50% cutoff wavelengths of 4.34 μm and 9.51 μm in the mid-wave and long-wave bands, respectively. The clear spectral localization demonstrates that the intrinsic optical properties of the two detector layer materials are well preserved. Steep and regularly shaped deep mesa are a prerequisite for ensuring that photogenerated carriers are correctly collected by the corresponding PN junction and achieving spectral differentiation. The low-damage etching method using composite masks in this invention successfully achieves high aspect ratio pattern transfer and obtains steep sidewalls.
[0100] from Figure 9 It can also be seen that the two-color device exhibits a certain degree of spectral crosstalk. When the LW-band detector is operating, the response in the MW-band is not completely eliminated. Calculations show that the crosstalk from the long-wave band to the mid-wave band is 15.5%, and the crosstalk from the mid-wave band to the long-wave band is 8.4%. Optical crosstalk is closely related to the steepness and smoothness of the mesa sidewalls. Sloping or rough sidewalls reflect or scatter stray light, causing optical signals to crosstalk into adjacent pixels. The current level of crosstalk indicates that the mesa sidewall morphology (steepness > 80°) obtained in this invention can provide fairly good optical isolation.
[0101] All materials used in this invention are commercially available and can be purchased from retail sources.
[0102] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A method using SiO2 / SiO x N y The low-damage etching method for composite masks is characterized by, Includes the following steps: S1. Deposition composite mask SiO2 and SiO2 were deposited on the surface of a superlattice material by plasma-enhanced chemical vapor deposition. x N y Composite mask; the superlattice material is an antimony superlattice material; S2. Applying the photoresist layer Photoresist is coated on the surface of a composite mask, and after exposure and development, a patterned photoresist layer is formed on the mask surface. S3. Etching composite mask Inductively coupled plasma etching of the composite mask was performed using a CHF3 / Ar mixed gas, wherein the inductively coupled plasma power was 300~400W and the radio frequency bias power was 100~150W. S4. Etched Superlattice Materials Inductively coupled plasma etching of exposed superlattice materials was performed using a BCl3 / Ar mixed gas, wherein the inductively coupled plasma power was 600~800W and the radio frequency bias power was 100~200W. After inductively coupled plasma etching for a certain period of time, BCl3 and Ar are turned off. Under plasma conditions, protective gas N2 is introduced and then turned off after a certain period of time to reduce damage to the mesa sidewalls. The process of alternating inductively coupled plasma etching and the introduction of protective gas N2 is repeated until the mesa structure of the required depth is obtained, thereby obtaining a superlattice device with a mesa structure of the required depth.
2. The low-damage etching method according to claim 1, characterized in that, In step S1, the plasma-enhanced chemical vapor deposition process involves growing a SiO2 mask on the surface of a superlattice material at 200-300°C using a SiH4 precursor flow rate of 30-40 sccm and an N2O flow rate of 60-70 sccm. Alternatively, a SiO2 mask can be grown on the surface of the SiO2 mask at 200-300°C using a SiH4 precursor flow rate of 20-30 sccm, an NH4 flow rate of 20-30 sccm, and an N2O flow rate of 20-30 sccm. x N y Mask.
3. The low-damage etching method according to claim 1, characterized in that, In step S3, the inductively coupled plasma etching process involves introducing CHF3 gas with a flow rate of 20-30 sccm and Ar gas with a flow rate of 20-30 sccm into the etching chamber, with a chamber pressure of 5-10 mTorr.
4. The low-damage etching method according to claim 1, characterized in that, After completing step S3, the residual photoresist layer on the surface of the superlattice material is removed to obtain a patterned composite mask.
5. The low-damage etching method according to claim 1, characterized in that, In step S4, the inductively coupled plasma etching process involves introducing BCl3 gas at a flow rate of 5-20 sccm and Ar gas at a flow rate of 20-30 sccm into the etching chamber, with a chamber pressure of 5-10 mTorr.
6. The low-damage etching method according to claim 5, characterized in that, In step S4, the nitrogen flow rate is 50~60 sccm.
7. The low-damage etching method according to claim 1, characterized in that, After completing step S4, remove the composite mask remaining on the surface of the superlattice material.
8. A medium-to-long-wavelength dual-color infrared photodetector, characterized in that, The infrared photodetector includes a superlattice device with a high aspect ratio mesa structure prepared by the low-damage etching method described in any one of claims 1-7.
Citation Information
Patent Citations
Semiconductor device forming method
CN108807182A