A firmware-controlled peripheral interface power adaptive switching system and method
The peripheral interface power adaptive switching system controlled by firmware automatically identifies the peripheral model and switches the power supply mode, solving the problem of errors in traditional manual configuration and realizing plug-and-play and intelligent management of peripheral power supply.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- GUOGUANG ELECTRONICS INFORMATION TECH
- Filing Date
- 2026-02-07
- Publication Date
- 2026-05-26
AI Technical Summary
Traditional peripheral interface power supply modes require manual configuration, are prone to errors, cannot achieve plug-and-play and intelligent management, and have high operation and maintenance costs.
The firmware control method is adopted to automatically identify the peripheral model through UART serial communication, generate relay control commands, drive the Darlington transistor array chip to switch the relay contact state, monitor power consumption in real time and feed it back to the management software.
It enables plug-and-play power supply for peripheral devices, zero-error configuration, and visual management, reducing production and maintenance costs and improving the level of intelligence.
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Figure CN122086823A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of power switching technology, and specifically relates to a firmware-controlled peripheral interface power adaptive switching system and method. Background Technology
[0002] With the widespread use of PCs in industries such as finance, the variety of peripherals that need to be connected is increasing. Different peripherals have different power requirements; some peripherals require power from the motherboard, while others have independent power supply capabilities. Traditional solutions use hardware jumpers to manually configure the power supply of peripheral interfaces. During mass production, workers need to manually plug and unplug jumpers to select the power supply configuration according to customer orders. This manual operation leads to a high error rate in jumper placement, resulting in quality issues where the power supply mode of the shipped products does not match the actual requirements.
[0003] During product use, when users replace peripherals with different power supply types, they must manually adjust the jumper positions by opening the back cover of the host. This operation not only requires professional skills but also carries the risk of damaging the motherboard circuitry due to misoperation, resulting in high maintenance costs and low efficiency. Furthermore, the jumper configuration method fixes the power supply mode and lacks the ability to dynamically adjust according to the actual type of peripheral connected, failing to meet the needs of plug-and-play peripherals and intelligent management. Summary of the Invention
[0004] The main purpose of this application is to provide a firmware-controlled peripheral interface power adaptive switching system and method. This application transforms power supply configuration from hardware mechanical operation to firmware intelligent control, realizing plug-and-play, zero-error configuration and visual management of peripheral power supply, reducing production costs and maintenance difficulty, and improving the intelligence level of peripheral interface power management.
[0005] To achieve the above objectives, this application provides a firmware-controlled peripheral interface power adaptive switching method, comprising the following steps:
[0006] After detecting the peripheral device connection, the system provides the basic power supply voltage to the peripheral device and initializes the UART serial communication interface.
[0007] The UART serial communication interface is used to send a model query command to the peripheral device and extract the peripheral device model identification string from the response frame. A relay control command is then generated based on the peripheral device model identification string.
[0008] According to the relay control command, the Darlington transistor array driver chip is controlled to drive the coil of the double-pole double-throw relay, switch the connection state of the common terminal contact of the relay, and read the voltage and current measurement values of the peripheral device.
[0009] The power value of the peripheral device is calculated based on the voltage and current measurements, and the power value and power supply mode status are encapsulated into a status data packet and transmitted to the peripheral device management software.
[0010] Optionally, in the first implementation of the first aspect of this application, after detecting the peripheral device's access, providing a basic power supply voltage to the peripheral device and initializing the UART serial communication interface includes:
[0011] When the interface connection status pin of a peripheral device changes from low to high, it is determined that the peripheral device is connected.
[0012] Upon detecting the connection of a peripheral device, the basic power supply voltage is output to the power supply pin of the peripheral device interface;
[0013] Set the parameter values of the baud rate register, data bit register, stop bit register, and parity register of the UART serial communication controller, and activate the transmitter and receiver of the UART serial communication controller to establish a communication channel, thus completing the initialization of the UART serial communication interface.
[0014] Optionally, in the second implementation of the first aspect of this application, sending a model query command to the peripheral device through the UART serial communication interface and extracting the peripheral device model identifier string from the response frame, and generating a relay control command based on the peripheral device model identifier string, includes:
[0015] A model query instruction frame containing a start byte, instruction type byte, data length byte, and checksum byte is encapsulated and sent to the peripheral device through the transmit data register of the UART serial communication interface;
[0016] The peripheral device's response frame is received through the receive data register of the UART serial communication interface. After verifying the start byte, response type byte, and checksum byte of the response frame, the peripheral device model identifier string is extracted from the response frame.
[0017] Based on the peripheral model identifier string, query the peripheral model and power supply requirement mapping configuration table in the firmware memory to generate relay control instructions.
[0018] Optionally, in the third implementation of the first aspect of this application, the peripheral model and power demand mapping configuration table in the firmware memory is queried based on the peripheral model identifier string to generate relay control instructions, including:
[0019] Read the peripheral model identifier string, traverse each entry of the peripheral model and power demand mapping configuration table, compare the peripheral model identifier string with the model field of each entry, and obtain the matching entry.
[0020] The power demand identifier field is read from the matching table entry. When the power demand identifier field is a first preset value, a relay control command is generated as a relay coil energizing control command. When the power demand identifier field is a second preset value, a relay control command is generated as a relay coil de-energizing control command.
[0021] Optionally, in the fourth implementation of the first aspect of this application, the power demand identifier field is read from the matching entry; when the power demand identifier field is a first preset value, a relay control command is generated as a relay coil energizing control command; when the power demand identifier field is a second preset value, a relay control command is generated as a relay coil de-energizing control command, including:
[0022] Read the power demand identifier field from the matching entry and determine whether the power demand identifier field is equal to a first preset value or a second preset value;
[0023] When the power demand identifier field is equal to the first preset value, a relay control instruction is generated as a relay coil energizing control instruction, which is used to switch the relay contacts to the power output mode.
[0024] When the power demand identifier field is equal to the second preset value, a relay control instruction is generated as a relay coil power-off control instruction, which is used to switch the relay contacts to signal transmission mode.
[0025] Optionally, in the fifth implementation of the first aspect of this application, controlling the Darlington transistor array driver chip to drive the coil of the double-pole double-throw relay according to the relay control command, switching the connection state of the common terminal contact of the relay, and reading the voltage and current measurement values of the peripheral device, includes:
[0026] According to the relay control command, a control level signal is output to the input pin of the Darlington transistor array driver chip through the IO interface. The Darlington transistor array driver chip amplifies the control level signal and then outputs the drive current from the output pin of the Darlington transistor array driver chip.
[0027] The driving current flows through the coil of the double-pole double-throw relay to generate a magnetic field that drives the armature to move, causing the common terminal contact of the relay to switch between normally open and normally closed contact states.
[0028] The voltage and current measurements of the peripheral are read from the voltage and current registers of the voltage and current monitoring chip.
[0029] Optionally, in the sixth implementation of the first aspect of this application, a control level signal is output to the input pin of the Darlington transistor array driver chip via an I / O interface according to the relay control instruction, and the Darlington transistor array driver chip amplifies the control level signal and outputs a drive current from the output pin of the Darlington transistor array driver chip, including:
[0030] When the relay control command is a relay coil energizing control command, the output pin of the IO interface is set to a high level to output a control level signal with a preset voltage value.
[0031] When the relay control command is a relay coil de-energization control command, the output pin of the IO interface is set to a low level.
[0032] The internal Darlington transistor circuit connected to the input pin of the Darlington array driver chip receives the control level signal and amplifies the weak control current at the input end to the driving current required for the relay coil to work through the series cascade structure of multi-stage transistors.
[0033] The output pin of the Darlington transistor array driver chip outputs the drive current, which flows through the coil winding of the double-pole double-throw relay to form a current loop.
[0034] Optionally, in the seventh implementation of the first aspect of this application, reading the voltage and current measurement values of the peripheral from the voltage register and current register of the voltage and current monitoring chip includes:
[0035] After sending a start signal through the I2C bus interface, the device address byte of the voltage and current monitoring chip is sent, and the voltage and current monitoring chip returns an acknowledgment signal to establish a communication connection.
[0036] Send the register address byte of the voltage register, read the voltage digital data of the peripheral from the voltage register through the I2C bus interface and store it in the data buffer;
[0037] Send the register address byte of the current register, read the digital current data of the peripheral from the current register through the I2C bus interface and store it in the data buffer;
[0038] The voltage digital data is multiplied by a first conversion factor to obtain the voltage measurement value, and the current digital data is multiplied by a second conversion factor to obtain the current measurement value.
[0039] Optionally, in the eighth implementation of the first aspect of this application, the power value of the peripheral is calculated based on the voltage measurement value and the current measurement value, and the power value and power supply mode status are encapsulated into a status data packet and transmitted to the peripheral management software, including:
[0040] The voltage measurement value and the current measurement value are read from the data buffer, and a floating-point multiplication operation is performed on the voltage measurement value and the current measurement value to obtain the power value;
[0041] The peripheral device model identifier string, power supply mode status, voltage measurement value, current measurement value, power value, and timestamp field are encapsulated into a status data packet;
[0042] The status data packet is transmitted to the peripheral management software through the communication interface between the firmware and the operating system. The peripheral management software parses the status data packet and displays the peripheral model identification string, the power supply mode status, the voltage measurement value, the current measurement value, and the power value in the graphical interface window.
[0043] This application also provides a firmware-controlled peripheral interface power adaptive switching system, including:
[0044] An initialization module is used to provide a basic power supply voltage to the peripheral device and initialize the UART serial communication interface after detecting the peripheral device connection.
[0045] The instruction generation module is used to send a model query instruction to the peripheral device through the UART serial communication interface and extract the peripheral device model identifier string from the response frame, and generate a relay control instruction based on the peripheral device model identifier string.
[0046] The control switching module is used to control the Darlington transistor array driver chip to drive the coil of the double-pole double-throw relay according to the relay control command, switch the connection state of the common terminal contact of the relay, and read the voltage and current measurement values of the peripheral device.
[0047] The calculation module is used to calculate the power value of the peripheral device based on the voltage measurement value and the current measurement value, and encapsulate the power value and power supply mode status into a status data packet and transmit it to the peripheral device management software.
[0048] In summary, when a peripheral device is connected, the firmware program automatically reads the peripheral model information via the UART serial port, queries the preset configuration table to obtain the power supply requirements of that peripheral model, autonomously generates relay control commands, and drives the Darlington transistor array chip to control the double-pole double-throw relay to switch the common terminal contact state, automatically completing the selection of power output mode or signal transmission mode. The entire process requires no manual intervention in the jumper configuration, eliminating the risk of human configuration errors during production and user operation. Simultaneously, the peripheral power consumption parameters are collected in real time from a dedicated voltage and current monitoring chip via the I2C interface, and the power value is calculated. Complete operating status data is fed back to the peripheral management software interface, allowing users to intuitively understand the peripheral's power supply mode and real-time power consumption status without disassembling the device. Compared to traditional jumper configurations, this application transforms power supply configuration from hardware mechanical operation to firmware intelligent control, achieving plug-and-play, zero-error configuration, and visualized management of peripheral power supply, reducing production costs and maintenance difficulty, and improving the intelligence level of peripheral interface power management. Attached Figure Description
[0049] Figure 1 This is a schematic diagram of the steps of a firmware-controlled peripheral interface power adaptive switching method in one embodiment of this application;
[0050] Figure 2 This is a flowchart illustrating the firmware-controlled adaptive switching of peripheral interface power in this application embodiment.
[0051] Figure 3 This is a schematic diagram of the UART serial communication module circuit in the embodiments of this application;
[0052] Figure 4 This is a schematic diagram of the relay drive and power supply switching control circuit in the embodiments of this application;
[0053] Figure 5 This is a schematic diagram of the voltage and current monitoring and I2C communication circuit in the embodiments of this application;
[0054] Figure 6 This is a block diagram of the firmware-controlled peripheral interface power adaptive switching system in this application embodiment.
[0055] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0056] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0057] Reference Figure 1This embodiment provides a firmware-controlled peripheral interface power adaptive switching method, including the following steps:
[0058] S1, after detecting the peripheral device connection, provides the basic power supply voltage to the peripheral device and initializes the UART serial communication interface;
[0059] S2 sends a model query command to the peripheral device through the UART serial communication interface and extracts the peripheral device model identifier string from the response frame, and generates a relay control command based on the peripheral device model identifier string.
[0060] S3 controls the Darlington transistor array driver chip to drive the coil of the double-pole double-throw relay according to the relay control command, switches the connection state of the common terminal contact of the relay, and reads the voltage and current measurement values of the peripheral device.
[0061] S4 calculates the power value of the peripheral device based on the voltage and current measurements, and encapsulates the power value and power supply mode status into a status data packet and transmits it to the peripheral device management software.
[0062] Figure 2 This application presents a flowchart of the peripheral interface power adaptive switching process controlled by the firmware. It includes establishing a connection between the BIOS and the CPU. The CPU, as the system control core, interacts with three functional modules via three independent communication buses and ultimately connects to the peripherals. The first path is the I / O control path, where the CPU sends control signals to the relay module through the I / O interface. The relay module executes power mode switching according to the control instructions generated by the firmware, realizing the transformation from firmware decision to hardware execution. The second path is the I2C bus path, where the CPU communicates bidirectionally with the voltage / current testing module through the I2C interface. This module collects the voltage and current parameters of the peripheral port in real time and sends the measurement data back to the CPU, enabling real-time monitoring and feedback of the peripheral's power consumption status. The third path is the UART serial port path, where the CPU connects to the serial communication module through the UART interface. The serial communication module is responsible for establishing a communication channel with the peripheral and reading the peripheral's model identification information, enabling automatic identification of the peripheral. The outputs of the three functional modules converge at the peripheral interface, connecting to the actual peripheral device. This application coordinates the working timing of the three paths through firmware programs to complete a complete closed-loop control process from peripheral access detection, automatic model identification, power demand query, relay switching execution, real-time power consumption monitoring to status data feedback, thereby realizing intelligent adaptive switching management of peripheral interface power supplies.
[0063] In one example, after detecting a peripheral device connection, the system provides the peripheral with a basic power supply voltage and initializes the UART serial communication interface, including:
[0064] When the interface connection status pin of a peripheral device changes from low to high, it is determined that the peripheral device is connected.
[0065] After detecting the connection of a peripheral device, the basic power supply voltage is output to the power supply pin of the peripheral device interface;
[0066] Set the parameter values of the baud rate register, data bit register, stop bit register, and parity register of the UART serial communication controller, and activate the transmitter and receiver of the UART serial communication controller to establish a communication channel, thus completing the initialization of the UART serial communication interface.
[0067] In this example, when the PC motherboard is running continuously, the firmware periodically scans the level of the interface connection status pin. This pin is pulled high after the peripheral is inserted into the interface, changing from the default low level to a high level. This level transition event is received by the GPIO input pin and triggers the first step of the peripheral access process through an interrupt service routine or firmware polling logic. Upon detecting this transition, the firmware determines that the peripheral has completed the physical layer connection and enters the initialization process. The motherboard controls the power switch through the power management module, outputting a 3.3V DC power supply to the VCC pin of the peripheral interface. This basic power supply is used to activate the peripheral's internal minimum system circuitry, enabling the communication control unit to respond upon power-up. After power output is complete, the main control CPU performs register-level configuration of the UART serial communication controller according to the preset communication protocol specifications. This includes setting the baud rate register to 115200bps to ensure the data transmission rate meets the device's responsiveness; configuring the data bit register to 8 bits to support standard byte transmission; setting the stop bit register to 1 bit to form a stable frame boundary; and setting the parity register to no-parity mode to simplify the data verification process. After the basic parameters are configured, the firmware program activates the transmitter (TX) and receiver (RX) modules of the UART serial port controller by setting the transmit enable bit and receive enable bit in the control bit register, respectively, to complete the initialization process of the entire serial communication hardware channel and establish the basic communication link between the motherboard and the peripheral device.
[0068] Figure 3This is a detailed circuit schematic of the UART serial communication module. This circuit enables bidirectional conversion and communication between the CPU and peripherals between TTL and RS232 levels. U1 is a dual-channel TTL-to-RS232 level converter chip (model SP3232E). Its pins C1+, C1-, C2+, and C2- are connected to 100nF decoupling capacitors C1, C2, C3, and C4, respectively, for power supply and filtering of the charge pump circuit during level conversion. The TTL input pins T1OUT and T2OUT of the U1 chip are connected to the CPU side, receiving TTL level signals from the CPU. Internally, the chip converts the TTL level to RS232 level and outputs it from the R1IN and R2IN pins. The converted RS232 signal is protected against current limiting by 22Ω current-limiting resistors R1, R2, R3, and R4. The outputs of these resistors are connected to the signal lines COMBUS_UART1_RX, COMBUS_UART1_TX, RXD2_RS232, and TXD2_RS232, respectively. ED1 is a four-channel ESD protection chip (model SP3014-04UTG), and ED2 is an ESD protection chip (model SP5414-01UTG). Both are connected in series on the RS232 signal transmission path, providing multi-level electrostatic discharge protection for the serial communication line on the peripheral interface side, preventing damage to the communication circuit from electrostatic pulses generated during peripheral insertion and removal. This embodiment ensures the stability and reliability of UART serial communication between the CPU and peripherals through a triple mechanism of level conversion, current limiting protection, and ESD protection, providing a hardware communication foundation for firmware to automatically identify peripheral models.
[0069] While providing a basic power supply voltage to the peripheral device, a hierarchical power supply mechanism is established between the working power supply and the subsequent relay switching. This includes: outputting a basic power supply voltage of 3.3V to the power supply pin of the peripheral interface through the power management control unit. The basic power supply voltage provides working power to the peripheral device's communication control circuit module. The current output capability of the basic power supply voltage is limited to within a preset communication power threshold, ensuring that the peripheral device's communication function works but is insufficient to drive the peripheral device's main function circuit. After completing the peripheral device model identification and generating the relay coil energizing control command, the relay's common terminal contact switches to a normally open contact, and the motherboard power path is connected to the power supply pin of the peripheral interface. The working power supply voltage output by the motherboard power supply is superimposed on the basic power supply voltage. The voltage value and current output capability of the working power supply voltage meet the total power requirements of the peripheral device's main function circuit and communication control circuit. The basic power supply voltage and the working power supply voltage form a parallel power supply structure at the power supply pin of the peripheral interface. The basic power supply voltage continuously supplies power to the peripheral device's communication control circuit to maintain the UART serial communication connection, while the working power supply voltage supplies power to the peripheral device's main function circuit, realizing circuit isolation and functional separation between communication power supply and working power supply.
[0070] In one example, a model query command is sent to a peripheral device via the UART serial communication interface, and the peripheral device model identifier string is extracted from the response frame. A relay control command is then generated based on the peripheral device model identifier string, including:
[0071] The model query instruction frame is encapsulated, containing a start byte, instruction type byte, data length byte, and checksum byte, and sent to the peripheral device through the transmit data register of the UART serial communication interface;
[0072] The peripheral device's response frame is received through the UART serial communication interface's receive data register. After verifying the start byte, response type byte, and checksum byte of the response frame, the peripheral device model identifier string is extracted from the response frame.
[0073] Based on the peripheral model identifier string, query the peripheral model and power supply requirement mapping configuration table in the firmware storage to generate relay control instructions.
[0074] In this example, a model query command frame is constructed, consisting of four fields: a start byte, a command type byte, a data length byte, and a checksum byte. The start byte is set to a fixed value of 0xAA, indicating the beginning of a data frame; the command type byte is set to 0x01, indicating that this frame is a model query command; the data length byte is set to 0x00, indicating that no additional data is included; and the checksum byte is obtained by performing a byte-by-byte XOR operation on the first three bytes to verify data integrity. The firmware writes the constructed command frame as a byte stream into the transmit data register of the UART serial communication controller. With the transmitter module enabled, this command frame is sequentially sent to the peripheral communication controller via the serial port line. After receiving the instruction frame, the peripheral device reads a preset model identifier string from its internal non-volatile memory. The model identifier string is 16 bytes long, uses ASCII encoding, and contains information such as the manufacturer code, series number, and model number. The peripheral device encapsulates the model identifier string into a response frame and sends it back to the motherboard via UART. The response frame consists of a start byte, a response type byte, a data length byte, a data field, and a checksum byte. The start byte is 0xAA, the response type byte is 0x81 indicating a model lookup response, the data length byte is 0x10 (16 bytes), and the checksum is obtained by XORing all the preceding bytes of the response frame. The motherboard firmware receives the response frame byte by byte through the UART receive data register and performs frame structure validity verification after reception. This involves checking if the start byte is 0xAA, if the response type is 0x81, if the data length matches, and if the checksum is consistent. If verification fails, a retry mechanism is executed and a communication error log is recorded. If verification succeeds, the 16-byte peripheral model identifier string is extracted from the data field and temporarily stored in a firmware RAM buffer variable. The firmware program then uses the model string as a key field to query the peripheral model and power requirement mapping configuration table in the firmware read-only memory. The power requirement mapping configuration table is stored in a structured manner, with each entry occupying a fixed number of bytes. The first 16 bytes are the model identification field, and the 17th byte is the power requirement field. The value 0x01 indicates that the motherboard power supply is required, and 0x00 indicates that the peripheral is self-powered. When the firmware program matches an entry with a completely matching model, it reads its power requirement byte and generates a relay control command accordingly. If it is 0x01, a power-on control command is generated to drive the relay to connect the motherboard power path; otherwise, a power-off control command is generated to only keep the signal transmission channel connected.
[0075] It also includes verification and retransmission processing steps for UART serial communication errors: When receiving a response frame through the receive data register of the UART serial communication interface, a hardware timer is started to set a receive timeout period. When the hardware timer count reaches the receive timeout threshold and a complete response frame is still not received, a communication timeout is determined and the retransmission counter is incremented. When a communication timeout is determined and the value of the retransmission counter is less than the preset retransmission count limit, the receive buffer of the UART serial communication interface is cleared, a model query command frame is resent to the peripheral device, and the hardware timer is reset. When the value of the retransmission counter reaches the preset retransmission count limit, the communication process is terminated and a communication error log is recorded. When a response frame is received within the receive timeout period, an XOR operation is performed on each byte of the response frame to obtain the verification result. The verification result is compared with the checksum byte in the response frame. When the comparison matches, the response frame data is determined to be complete and valid, and the peripheral device model identifier string is extracted. When the comparison does not match, the response frame data is determined to be corrupted, and the retransmission process is triggered.
[0076] In one example, the peripheral model identifier string is used to query the peripheral model and power requirement mapping configuration table in the firmware memory to generate relay control instructions, including:
[0077] Read the peripheral model identifier string, traverse each entry in the peripheral model and power demand mapping configuration table, compare the peripheral model identifier string with the model field of each entry, and obtain the matching entry.
[0078] Read the power demand identifier field from the matching table. When the power demand identifier field is the first preset value, generate a relay control command that is a relay coil energizing control command. When the power demand identifier field is the second preset value, generate a relay control command that is a relay coil de-energizing control command.
[0079] In this example, a 16-byte peripheral model identifier string is read from the RAM buffer, and a lookup subroutine is called to traverse each entry in the configuration table. Each entry is 32 bytes long, with the first 16 bytes being the model field, the 17th byte being the power requirement identifier field, and the rest being reserved fields. The lookup subroutine compares the model identifier string with the model field in the entry byte by byte. When all 16 bytes are identical, a match is considered successful, and the firmware records the offset address of the currently matched entry. The firmware reads the 17th byte, the power requirement identifier field, from the matched entry. This field indicates whether the peripheral requires power from the motherboard. If its value is the first preset value 0x01, the firmware generates a relay coil energizing control command to drive the Darlington driver chip to switch the relay to power output mode, enabling the motherboard to supply power to the peripheral. If the field value is the second preset value 0x00, indicating that the peripheral is a self-powered device, the firmware generates a relay coil de-energizing control command to switch the relay to a power-off mode that only maintains signal transmission, avoiding unnecessary power path connections. During the table lookup process, if no entry matching the peripheral model is found, the firmware triggers the default security policy, forcibly generating a relay coil power-off control command to prevent accidental power supply or system security issues caused by unknown peripherals. The generated control command is then written to the I / O control register or command buffer.
[0080] In one example, the power demand identifier field is read from the matching entry. When the power demand identifier field is a first preset value, a relay control command is generated as a relay coil energizing control command; when the power demand identifier field is a second preset value, a relay control command is generated as a relay coil de-energizing control command, including:
[0081] Read the power demand identifier field from the matching table entry and determine whether the power demand identifier field is equal to the first preset value or the second preset value;
[0082] When the power demand identifier field is equal to the first preset value, the relay control instruction is generated as the relay coil energizing control instruction. The relay coil energizing control instruction is used to generate a relay contact that switches to power output mode.
[0083] When the power demand identifier field is equal to the second preset value, a relay control command is generated as a relay coil de-energization control command. The relay coil de-energization control command is used to switch the relay contacts to signal transmission mode.
[0084] In this example, the 17th byte of the power requirement identifier field is read from the matching entry, and logical judgment is performed on the value of the power requirement identifier field. The power requirement identifier field is defined as a single-byte unsigned integer, used to indicate whether the current peripheral needs to be powered by the motherboard. If the value of this field is equal to the first preset value 0x01, it means that the peripheral model is a power-required type, and the firmware program will generate a relay control instruction of the type "relay coil energizing control instruction"; if the power requirement identifier field is equal to the second preset value 0x00, it means that the peripheral is a self-powered device and does not require power from the motherboard, and the firmware will generate a "relay coil de-energizing control instruction". When the relay coil energizing control command is executed, it drives the main control CPU to output a high level through GPIO to the input pin of the Darlington driver chip. The Darlington driver chip outputs a high drive current to energize the relay coil, causing the armature of the double-pole double-throw relay to engage. This completes the physical conversion of the common terminal contact from normally closed to normally open, connecting the motherboard power path and enabling the power output pin to supply power to the peripherals. Conversely, the relay coil de-energizing control command controls the GPIO to output a low level to turn off the relay drive current, de-energizing the coil. The relay contacts return to the default normally closed terminal under the action of the spring reset force, disconnecting the power path and retaining only the serial port signal path as the conducting state. This achieves a signal transmission mode that provides logic signals to the peripherals without providing power.
[0085] In one example, a Darlington transistor array driver chip is used to drive the coil of a double-pole double-throw relay according to relay control instructions, switching the connection state of the relay's common terminal contact and reading the voltage and current measurements of peripherals, including:
[0086] According to the relay control command, the control level signal is output to the input pin of the Darlington array driver chip through the IO interface. The Darlington array driver chip amplifies the control level signal and outputs the drive current from the output pin of the Darlington array driver chip.
[0087] The driving current flows through the coil of the double-pole double-throw relay to generate a magnetic field that drives the armature to move, causing the common terminal contact of the relay to switch between normally open and normally closed contact states.
[0088] Read the voltage and current measurement values of the peripheral device from the voltage and current registers of the voltage and current monitoring chip.
[0089] In this example, the firmware, based on the relay control command, outputs the corresponding control level signal to the input pin of the Darlington transistor array driver chip via the main control CPU's I / O interface. The Darlington transistor array driver chip, such as the ULN2003A, is used. Internally, it consists of multiple cascaded transistors forming a high-gain drive circuit, capable of amplifying the weak I / O level signal at the input. When the relay control command is a coil energization control command, the firmware configures the bound GPIO pin to output mode and drives it to output a high-level 3.3V signal. This high-level signal is input to the IN1 input pin of the Darlington chip, amplified by the internal cascaded transistors into a drive current of several hundred milliamps, and output from the corresponding OUT1 output pin. The output drive current then flows through the coil winding of the double-pole double-throw relay, generating a stable magnetic field within it. This magnetic field causes a physical displacement of the relay's armature, driving its common terminal contact to open from the default normally closed state and connect to the normally open contact, completing the power output mode circuit closure. If the relay control command is a coil de-energization control command, the firmware pulls the GPIO pin low to 0V. The Darlington chip outputs no current, the relay coil loses its magnetic field, and the armature rebounds under the spring's reset force. The common terminal contact returns to its initial state of being connected to the normally closed terminal, maintaining the signal transmission mode. After the relay contact switches, the operating parameters of the peripheral device under the current power supply state are monitored in real time. For this purpose, the motherboard accesses a voltage and current monitoring chip, such as the VS2660 or an equivalent chip, via the I2C interface. After sending a start signal on the I2C bus, the firmware sequentially reads the contents of the voltage register and current register in the chip. The voltage register stores the digitized voltage measurement value of the peripheral power supply pin after voltage division by the sampling resistor. The current register calculates the current measurement value by detecting the voltage change across the differential detection resistor and combining it with the internal ADC. Both are returned in two-byte format. The CPU temporarily stores the read voltage and current data in a buffer.
[0090] Figure 4This is a detailed schematic diagram of the relay drive and power supply switching control circuit. This circuit realizes the conversion of firmware control commands into physical relay actions and the switching of power supply paths. J2 is a three-pin input connector marked POWER, connected to the CPU, serving as the input port for receiving power signals and I / O control signals sent by the CPU. Q2 is a Darlington transistor array driver chip, model ULN2003A. Its input pins IN1 to IN7 receive control level signals sent from the CPU through the I / O interface, and its output pins OUT1 to OUT7 are connected to the coil control terminal of relay U1. The ULN2003A chip integrates 7 Darlington transistor driver circuits, each Darlington transistor consisting of multiple NPN transistors cascaded in series. This amplifies the weak milliamp-level control current at the input terminal to a drive current of hundreds of milliamps at the output terminal, meeting the current requirements for driving the relay coil. A 10K pull-down resistor R is connected to the input side of the Q2 chip to ensure the stability of the input control signal and prevent false triggering caused by floating I / O pins. U1 is a double-pole double-throw miniature relay, model HFD4 / 12-2R. Its pin 6 is the common terminal COM, which mechanically switches between two sets of contacts depending on the coil's energized or de-energized state. When the drive current from Q2 flows through the coil winding of U1, the coil generates a magnetic field that attracts the armature, and pin 6 switches to the normally open contact, connecting the motherboard power input POWER1 to the power supply pin of peripheral connector J1 (labeled CON2), forming a power supply path from the motherboard to the peripheral. When Q2 stops outputting drive current, the coil loses its magnetism, the armature releases, and pin 6 switches to the normally closed contact, disconnecting the motherboard power supply path while maintaining only signal transmission connectivity. D1 is a freewheeling diode connected in reverse parallel across the relay coil. At the moment the coil is de-energized, it provides a discharge path for the induced electromotive force, absorbs reverse voltage spikes, and protects the internal transistors of the driver chip Q2 from high-voltage breakdown damage. This application utilizes a multi-stage switching mechanism driven by the CPU's IO control signals to amplify Darlington transistors and switch relay contacts, thereby realizing the switching of power paths from the firmware software layer to the hardware physical layer. It is the core execution circuit for firmware-controlled adaptive switching of power supply to peripheral interfaces.
[0091] The common terminal contact of the relay switches between normally open and normally closed contacts to dynamically switch between power and signal paths. This includes: the common terminal pin PIN6 of the double-pole double-throw relay is simultaneously connected to both the power input and the power supply pin of the peripheral interface; the normally open contact of the relay is connected to the motherboard power path; and the normally closed contact of the relay is connected to the serial port signal transmission path. When drive current flows through the relay coil, the magnetic field generated by the coil causes the armature to be attracted downwards, and the common terminal pin PIN6 disconnects from the normally closed contact and closes with the normally open contact, forming a connection from the motherboard power input... The input terminal connects to the power supply pin of the peripheral interface via the common terminal pin PIN6 and the normally open contact, while simultaneously disconnecting the serial signal transmission path from the power supply pin of the peripheral interface. When the drive current stops flowing through the relay coil, the coil magnetic field disappears, the reset spring drives the armature back to the initial position, the common terminal pin PIN6 disconnects from the normally open contact and connects to the normally closed contact, disconnecting the power supply path from the motherboard power supply to the power supply pin of the peripheral interface, thus forming a serial signal transmission path from the serial communication module via the common terminal pin PIN6 and the normally closed contact to the peripheral interface.
[0092] In one example, a control level signal is output to the input pin of the Darlington transistor array driver chip via an I / O interface according to a relay control command. The Darlington transistor array driver chip amplifies the control level signal and then outputs a drive current from its output pin, including:
[0093] When the relay control command is a relay coil energization control command, the output pin of the IO interface is set to a high level to output a control level signal with a preset voltage value;
[0094] When the relay control command is a relay coil de-energization control command, the output pin of the IO interface is set to a low level.
[0095] The input pin of the Darlington array driver chip is connected to an internal Darlington transistor circuit that receives control level signals. Through the series cascade structure of multi-stage transistors, the weak control current at the input end is amplified to the drive current required for the relay coil to work.
[0096] The output pin of the Darlington transistor array driver chip outputs drive current, which flows through the coil winding of the double-pole double-throw relay to form a current loop.
[0097] In this example, the output pins of the IO interface are configured according to the parsed control instruction type. When the relay control instruction is a relay coil energizing control instruction, the GPIO control logic inside the main CPU configures the corresponding IO pin to output mode and sets the output level to a high level, outputting a preset control voltage value, such as 3.3V or 5V. This control voltage value is directly sent to the input pin of the Darlington transistor array driver chip as a control level signal. When the relay control instruction is a relay coil de-energizing control instruction, the firmware configures the IO pin to a low level, with an output voltage of 0V, thereby stopping the application of control signals to the Darlington chip. The input pins of the Darlington transistor array driver chip are directly connected to the CPU's IO output pins. Internally, it uses a multi-stage cascaded transistor structure to form a Darlington transistor structure. Its design principle is to directly use the output current of the first-stage transistor as the input current of the second-stage transistor, forming a high-gain amplification link. This allows the input end to provide only a weak control current in the milliampere range to generate a drive current in the hundreds of milliamperes range at the output end, meeting the operating current requirements of the external relay coil. When a high-level control signal is applied to the input pin of the Darlington chip, the internal transistor cascade structure is triggered and conducts. The chip's output pin outputs a continuous and stable drive current. This drive current flows into the coil winding of the double-pole double-throw relay, forming a complete current loop within it. The current generates a magnetic field through the coil, magnetizing the relay's iron core and causing the armature to engage. This, in turn, switches the common terminal contact from normally closed to normally open, completing the closure of the power supply path. When the control level is low, the Darlington input stage does not conduct, there is no output current, no current flows in the relay coil, the magnetic field disappears, and the armature returns to its original position under the spring's reset force. The contact switches to the normally closed state, disconnecting the motherboard power supply path and maintaining only the signal path connection.
[0098] It also includes a freewheeling protection process when the relay coil is de-energized: when the output pin of the IO interface switches from high level to low level, the Darlington transistor array driver chip stops outputting drive current, and the magnetic field energy stored in the coil of the double-pole double-throw relay generates a reverse induced electromotive force; the freewheeling diode connected in reverse parallel across the coil of the double-pole double-throw relay is turned on, providing a current discharge circuit for the reverse induced electromotive force, and the induced current in the coil forms a closed loop through the freewheeling diode to release energy; the freewheeling diode clamps the voltage peak of the reverse induced electromotive force within a preset threshold, preventing the voltage spike from reversely breaking down the internal transistors of the Darlington transistor array driver chip through the output pin of the Darlington transistor array driver chip.
[0099] In one example, the voltage and current measurements of a peripheral device are read from the voltage and current registers of a voltage and current monitoring chip, including:
[0100] After sending a start signal through the I2C bus interface, the device address byte of the voltage and current monitoring chip is sent, and the voltage and current monitoring chip returns an acknowledgment signal to establish a communication connection.
[0101] Send the register address byte of the voltage register, read the voltage digital data of the peripheral from the voltage register through the I2C bus interface and store it in the data buffer;
[0102] Send the register address byte of the current register, read the digital current data of the peripheral device from the current register through the I2C bus interface and store it in the data buffer;
[0103] The voltage digital data is multiplied by the first conversion factor to obtain the voltage measurement value, and the current digital data is multiplied by the second conversion factor to obtain the current measurement value.
[0104] In this example, after the firmware sends a start signal on the I2C bus, it sends the device address byte of the target monitoring chip. This device address byte consists of a 7-bit device address and a 1-bit read / write flag. The device address is determined by the configuration of the chip's hardware pins A0 and A1, allowing multiple chips to be connected to the same I2C bus without address conflicts. When the voltage and current monitoring chip receives a device address that matches its address, it returns an ACK signal, indicating that a communication connection has been successfully established and it is ready to receive subsequent instructions. The firmware then sends the register address byte of the voltage register, for example, 0x02, specifying that the voltage measurement result stored internally by the chip needs to be read. After receiving the register address, the chip sends the two bytes of digital data stored in the voltage register to the main control CPU via the I2C data line. The firmware receives this data and temporarily stores it in a data buffer. The firmware then sends the register address byte of the current register, for example, 0x04. The chip responds by returning another two bytes of digital data, representing the current sampling result of the current peripheral circuit. This data is also buffered by the firmware. After the reading is complete, the firmware sends a stop signal via the I2C bus to end this data communication cycle. To convert digital voltage and current data into physical unit values, the firmware multiplies the digital voltage data by a first conversion factor, which is determined by the voltage division ratio of the voltage sensing resistor, the ADC reference voltage, and the quantization resolution, to obtain a voltage measurement value in volts. The firmware also multiplies the digital current data by a second conversion factor, which is set based on the resistance value of the current sensing resistor and the gain of the sampling amplifier, to obtain a current measurement value in amperes.
[0105] Figure 5This is a detailed schematic diagram of the voltage and current monitoring and I2C communication circuit. This circuit enables precise acquisition and digital transmission of voltage and current parameters from peripheral ports. It includes U1, a dedicated voltage and current monitoring chip (model VS2660), used for real-time power consumption monitoring of peripheral ports. In the voltage detection path, the V_DET pin is connected to the voltage point being measured through a 100K sampling resistor R6. The power supply voltage of the peripheral port is divided by R6 and input to the 12-bit precision analog-to-digital converter (ADC) inside the U1 chip, converting the analog voltage signal into a digital voltage value and storing it in the chip's internal voltage data register. In the current detection path, the differential current detection pins I_DET+ and I_DET- are connected to the two ends of a current sampling resistor connected in series in the peripheral power supply circuit. The current flowing through the peripheral generates a small voltage difference across the sampling resistor. The I_DET+ and I_DET- pins input this differential voltage difference signal to the chip's internal differential amplifier circuit for amplification. The amplified signal is then converted into a digital current value by the internal ADC and stored in the current data register. The U1 chip's power system employs a dual-power supply architecture. The VS1 pin is connected to a 3V 3A power supply to power the analog circuits, while the VS2 pin is connected to a 5V 5A power supply to power the digital circuits. C1 and C2 are 100nF decoupling capacitors, connected in parallel between the VS1 and VS2 power supply pins and ground, respectively, to filter power supply noise and ensure ADC conversion accuracy. In the I2C communication interface, the SDA and SCL pins are connected to the I2C bus via 4.7K pull-up resistors R1 and R2, respectively. The chip transmits digital voltage and current data from its internal registers to the CPU for power calculation and status analysis via the I2C protocol. A0 and A1 are the chip's I2C device address selection pins, connected to the A0_1 and A1_1 configuration terminals. The chip's I2C bus address can be configured by setting the level combination of these two pins. When the system needs to monitor multiple peripheral ports, multiple VS2660 chips can be connected in parallel on the same I2C bus. Different device addresses are configured on the A0 and A1 pins for differentiation. The CPU accesses each chip sequentially by specifying different device address bytes, achieving concurrent acquisition of multi-channel power consumption parameters. NC represents an unconnected pin of the chip. The entire circuit, through a complete signal link of voltage divider sampling, differential current detection, dual-channel ADC conversion, and I2C digital communication, achieves accurate conversion and reliable transmission from analog physical quantities to digital data, providing accurate underlying data support for firmware-level power calculation and power consumption monitoring management.
[0106] When monitoring the voltage and current parameters of multiple peripheral ports, the process also includes address configuration and polling sampling steps for multiple voltage and current monitoring chips: Multiple voltage and current monitoring chips are connected to the same I2C bus according to the number of peripheral ports. A unique I2C device address is assigned to each chip by configuring the level combination of the address selection pins A0 and A1. The I2C device address consists of a 7-bit base address and a 2-bit address configured by the A0 and A1 pins. A polling queue containing the I2C device addresses of each voltage and current monitoring chip and their corresponding peripheral port numbers is established. The firmware program sends device address bytes and register address bytes to each I2C device address sequentially according to the polling queue, reading the voltage and current digital data of each peripheral port one by one. The voltage and current digital data of each peripheral port are associated with their corresponding peripheral port numbers and stored in a data buffer. The voltage measurement value, current measurement value, and power value of each peripheral port are calculated respectively, enabling concurrent monitoring of power consumption parameters of multiple peripheral ports.
[0107] The voltage and current monitoring chip acquires the voltage and current parameters of peripheral devices through a dedicated sampling circuit and converts them into digital quantities. This includes: the voltage detection pin V_DET of the voltage and current monitoring chip is connected to a 100K ohm voltage sampling resistor. One end of the voltage sampling resistor is connected to the power supply pin of the peripheral interface, and the other end is connected to the V_DET pin. The power supply voltage of the peripheral interface is divided by the voltage sampling resistor and input to the first analog-to-digital converter (ADC) inside the voltage and current monitoring chip. The first ADC quantizes the analog voltage signal on the voltage sampling resistor into a 12-bit precision digital voltage quantity and stores it in the voltage register. The differential current detection pins I_DET+ and I_DET- of the voltage and current monitoring chip are respectively connected to the two ends of a current sampling resistor connected in series in the peripheral power supply circuit, and current flows through... The current from the peripheral device generates a differential voltage signal across the current sampling resistor. The I_DET+ and I_DET- pins input this differential voltage signal to the differential amplifier circuit inside the voltage and current monitoring chip. The differential amplifier circuit amplifies the differential voltage signal and inputs it to the second analog-to-digital converter (ADC). The second ADC quantizes the amplified differential voltage signal into a 12-bit precision digital current value. It calculates the current value flowing through the peripheral device according to Ohm's law and stores it in the current register. The power supply pin VS1 of the voltage and current monitoring chip is connected to a 3.3V power supply to power the internal analog circuit, and the power supply pin VS2 is connected to a 5V power supply to power the internal digital circuit. Decoupling capacitors C1 and C2 are connected in parallel between the VS1 and VS2 pins and ground, respectively, to filter out power supply noise and ensure the conversion accuracy of the first and second ADCs.
[0108] In one example, the power value of the peripheral is calculated based on voltage and current measurements, and the power value and power supply mode status are encapsulated into a status data packet and transmitted to the peripheral management software, including:
[0109] Read the voltage and current measurements from the data buffer, perform floating-point multiplication on the voltage and current measurements, and obtain the power value;
[0110] Encapsulate the peripheral model identifier string, power supply mode status, voltage measurement value, current measurement value, power value, and timestamp field into a status data packet;
[0111] Status data packets are transmitted to peripheral management software via the communication interface between the firmware and the operating system. The peripheral management software parses the status data packets and displays the peripheral model identification string, power supply mode status, voltage measurement value, current measurement value, and power value in the graphical interface window.
[0112] In this example, the main control firmware sequentially reads the voltage and current measurements from the internal data buffer. Both values have been converted to floating-point format using corresponding conversion factors, with units of volts and amperes, respectively. The firmware performs a floating-point multiplication operation, multiplying the voltage and current measurements, and calculates the instantaneous power value of the current peripheral in watts using the standard power formula P = U × I. The calculation process is completed in the firmware's supported soft floating-point algorithm module, and the result is stored in a specific power variable. The firmware program constructs a status data packet to encapsulate complete information about the peripheral's operational status. The packet structure includes multiple fields: a peripheral model identifier string (16-byte ASCII code) obtained from the model identification stage; a power supply mode status field corresponding to the current relay control state (1 byte, 0x01 for motherboard power supply, 0x00 for signal transmission); a 4-byte floating-point voltage measurement value field; a 4-byte floating-point current measurement value field; a 4-byte floating-point power calculation value field; and an 8-byte timestamp field. The timestamp is obtained by the system RTC module and recorded at millisecond resolution as the current data generation time. After construction, the status data packet is 37 bytes long. The firmware reports this to the user-space program through the communication interface established between the motherboard and the operating system. This communication interface includes an extended transmission path based on the Advanced Configuration and Power Interface (ACPI), or a data transmission channel between kernel space and user space built by a custom device driver, used to transmit the status data packet between the firmware layer and the peripheral management software. After receiving the status data packet, the peripheral management software performs data structure parsing, reading parameters such as the peripheral model string, power supply mode status, voltage value, current value, and power value in order of field. This data is then refreshed and displayed in the corresponding positions on the graphical user interface. The interface displays the operating status of multiple peripherals in a table or card format. Voltage is displayed in volts with two decimal places, current in amperes with three decimal places, and power in watts with two decimal places. The power supply status is also indicated by text labels, such as "Motherboard Powered" or "Peripheral Self-Powered," while the peripheral model is listed as a full string.
[0113] Reference Figure 6 This embodiment provides a firmware-controlled peripheral interface power adaptive switching system, including:
[0114] Initialization module 1 is used to provide basic power supply voltage to the peripheral device and initialize the UART serial communication interface after detecting the peripheral device connection.
[0115] Instruction generation module 2 is used to send a model query instruction to the peripheral device through the UART serial communication interface and extract the peripheral device model identifier string from the response frame, and generate a relay control instruction based on the peripheral device model identifier string;
[0116] The control switching module 3 is used to control the Darlington transistor array driver chip to drive the coil of the double-pole double-throw relay according to the relay control command, switch the connection state of the common terminal contact of the relay, and read the voltage and current measurement values of the peripheral device.
[0117] Calculation module 4 is used to calculate the power value of the peripheral device based on the voltage and current measurement values, and encapsulate the power value and power supply mode status into a status data packet and transmit it to the peripheral device management software.
[0118] In this embodiment, the specific implementation of each unit in the above system embodiment is described in the above method embodiment, and will not be repeated here.
[0119] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, system, article, or method that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, system, article, or method. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, system, article, or method that includes that element.
[0120] The above description is only a preferred embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural changes made based on the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.
Claims
1. A firmware-controlled peripheral interface power adaptive switching method, characterized in that, include: After detecting the peripheral device connection, the system provides the basic power supply voltage to the peripheral device and initializes the UART serial communication interface. The UART serial communication interface is used to send a model query command to the peripheral device and extract the peripheral device model identification string from the response frame. A relay control command is then generated based on the peripheral device model identification string. According to the relay control command, the Darlington transistor array driver chip is controlled to drive the coil of the double-pole double-throw relay, switch the connection state of the common terminal contact of the relay, and read the voltage and current measurement values of the peripheral device. The power value of the peripheral device is calculated based on the voltage and current measurements, and the power value and power supply mode status are encapsulated into a status data packet and transmitted to the peripheral device management software.
2. The firmware-controlled peripheral interface power adaptive switching method according to claim 1, characterized in that, Upon detecting the connection of a peripheral device, the system provides a basic power supply voltage to the peripheral device and initializes the UART serial communication interface, including: When the interface connection status pin of a peripheral device changes from low to high, it is determined that the peripheral device is connected. Upon detecting the connection of a peripheral device, the basic power supply voltage is output to the power supply pin of the peripheral device interface; Set the parameter values of the baud rate register, data bit register, stop bit register, and parity register of the UART serial communication controller, and activate the transmitter and receiver of the UART serial communication controller to establish a communication channel, thus completing the initialization of the UART serial communication interface.
3. The firmware-controlled peripheral interface power adaptive switching method according to claim 1, characterized in that, The peripheral device is sent a model query command through the UART serial communication interface, and the peripheral device model identifier string is extracted from the response frame. A relay control command is generated based on the peripheral device model identifier string, including: A model query instruction frame containing a start byte, instruction type byte, data length byte, and checksum byte is encapsulated and sent to the peripheral device through the transmit data register of the UART serial communication interface; The peripheral device's response frame is received through the receive data register of the UART serial communication interface. After verifying the start byte, response type byte, and checksum byte of the response frame, the peripheral device model identifier string is extracted from the response frame. Based on the peripheral model identifier string, query the peripheral model and power supply requirement mapping configuration table in the firmware memory to generate relay control instructions.
4. The firmware-controlled peripheral interface power adaptive switching method according to claim 3, characterized in that, Based on the peripheral model identifier string, the peripheral model and power demand mapping configuration table in the firmware memory is queried to generate relay control instructions, including: Read the peripheral model identifier string, traverse each entry of the peripheral model and power demand mapping configuration table, compare the peripheral model identifier string with the model field of each entry, and obtain the matching entry. The power demand identifier field is read from the matching table entry. When the power demand identifier field is a first preset value, a relay control command is generated as a relay coil energizing control command. When the power demand identifier field is a second preset value, a relay control command is generated as a relay coil de-energizing control command.
5. The firmware-controlled peripheral interface power adaptive switching method according to claim 4, characterized in that, The power demand identifier field is read from the matching entry. When the power demand identifier field is a first preset value, a relay control command is generated as a relay coil energizing control command. When the power demand identifier field is a second preset value, a relay control command is generated as a relay coil de-energizing control command, including: Read the power demand identifier field from the matching entry and determine whether the power demand identifier field is equal to a first preset value or a second preset value; When the power demand identifier field is equal to the first preset value, a relay control instruction is generated as a relay coil energizing control instruction, which is used to switch the relay contacts to the power output mode. When the power demand identifier field is equal to the second preset value, a relay control instruction is generated as a relay coil power-off control instruction, which is used to switch the relay contacts to signal transmission mode.
6. The firmware-controlled peripheral interface power adaptive switching method according to claim 5, characterized in that, According to the relay control command, the Darlington transistor array driver chip is controlled to drive the coil of the double-pole double-throw relay, switch the connection state of the common terminal contact of the relay, and read the voltage and current measurement values of the peripheral device, including: According to the relay control command, a control level signal is output to the input pin of the Darlington transistor array driver chip through the IO interface. The Darlington transistor array driver chip amplifies the control level signal and then outputs the drive current from the output pin of the Darlington transistor array driver chip. The driving current flows through the coil of the double-pole double-throw relay to generate a magnetic field that drives the armature to move, causing the common terminal contact of the relay to switch between normally open and normally closed contact states. The voltage and current measurements of the peripheral are read from the voltage and current registers of the voltage and current monitoring chip.
7. The firmware-controlled peripheral interface power adaptive switching method according to claim 6, characterized in that, According to the relay control command, a control level signal is output to the input pin of the Darlington transistor array driver chip through the I / O interface. The Darlington transistor array driver chip amplifies the control level signal and then outputs a drive current from its output pin, including: When the relay control command is a relay coil energizing control command, the output pin of the IO interface is set to a high level to output a control level signal with a preset voltage value. When the relay control command is a relay coil de-energization control command, the output pin of the IO interface is set to a low level. The internal Darlington transistor circuit connected to the input pin of the Darlington array driver chip receives the control level signal and amplifies the weak control current at the input end to the driving current required for the relay coil to work through the series cascade structure of multi-stage transistors. The output pin of the Darlington transistor array driver chip outputs the drive current, which flows through the coil winding of the double-pole double-throw relay to form a current loop.
8. The firmware-controlled peripheral interface power adaptive switching method according to claim 7, characterized in that, Read the voltage and current measurement values of the peripheral from the voltage and current registers of the voltage and current monitoring chip, including: After sending a start signal through the I2C bus interface, the device address byte of the voltage and current monitoring chip is sent, and the voltage and current monitoring chip returns an acknowledgment signal to establish a communication connection. Send the register address byte of the voltage register, read the voltage digital data of the peripheral from the voltage register through the I2C bus interface and store it in the data buffer; Send the register address byte of the current register, read the digital current data of the peripheral from the current register through the I2C bus interface and store it in the data buffer; The voltage digital data is multiplied by a first conversion factor to obtain the voltage measurement value, and the current digital data is multiplied by a second conversion factor to obtain the current measurement value.
9. The firmware-controlled peripheral interface power adaptive switching method according to claim 8, characterized in that, The power value of the peripheral device is calculated based on the voltage and current measurements, and the power value and power supply mode status are encapsulated into a status data packet and transmitted to the peripheral device management software, including: The voltage measurement value and the current measurement value are read from the data buffer, and a floating-point multiplication operation is performed on the voltage measurement value and the current measurement value to obtain the power value; The peripheral device model identifier string, power supply mode status, voltage measurement value, current measurement value, power value, and timestamp field are encapsulated into a status data packet; The status data packet is transmitted to the peripheral management software through the communication interface between the firmware and the operating system. The peripheral management software parses the status data packet and displays the peripheral model identification string, the power supply mode status, the voltage measurement value, the current measurement value, and the power value in the graphical interface window.
10. A firmware-controlled peripheral interface power adaptive switching system, characterized in that, The steps for implementing the firmware-controlled peripheral interface power adaptive switching method according to any one of claims 1 to 9 include: An initialization module is used to provide a basic power supply voltage to the peripheral device and initialize the UART serial communication interface after detecting the peripheral device connection. The instruction generation module is used to send a model query instruction to the peripheral device through the UART serial communication interface and extract the peripheral device model identifier string from the response frame, and generate a relay control instruction based on the peripheral device model identifier string. The control switching module is used to control the Darlington transistor array driver chip to drive the coil of the double-pole double-throw relay according to the relay control command, switch the connection state of the common terminal contact of the relay, and read the voltage and current measurement values of the peripheral device. The calculation module is used to calculate the power value of the peripheral device based on the voltage measurement value and the current measurement value, and encapsulate the power value and power supply mode status into a status data packet and transmit it to the peripheral device management software.