A centralized wired IoT water meter system for multiple water meters sharing communication.

Abstract

This invention relates to the field of Internet of Things (IoT) technology, and more specifically, to a centralized wired IoT water meter system for multiple water meters sharing communication. The system includes a concentrator at the well site, multiple water meter nodes, and a wired bus connecting the concentrator and each water meter node. Each water meter node includes a flow sensor, a main control microprocessor, a bulk acoustic wave wake-up receiver, a chaotic spread spectrum hardware module, and a bus driver circuit. The bulk acoustic wave wake-up receiver is connected to the wired bus; the chaotic spread spectrum hardware module is connected to the main control microprocessor; the bus driver circuit converts the sparse code modulation output into a differential level signal adapted for wired bus transmission; the concentrator at the well site includes a communication processing module. This invention can significantly reduce the standby power consumption of water meter nodes to extend battery life, support concurrent access of multiple nodes to improve communication efficiency, enhance anti-interference capabilities through spread spectrum gain, and utilize the uniqueness of chaotic sequences to achieve node identity binding and signal isolation at the physical level.

Description

Technical Field

[0001] This invention belongs to the field of data processing technology, specifically relating to a centralized wired Internet of Things (IoT) water meter system for multiple water meters sharing communication on a well surface. Background Technology

[0002] Currently, the communication technologies for smart water meters are mainly divided into two categories: wireless communication and wired communication. Wireless communication solutions, represented by technologies such as narrowband IoT, long-range radio, and Zigbee, offer advantages such as flexible wiring and convenient installation. However, they face challenges in complex electromagnetic environments such as underground wells, including insufficient signal penetration and severe multipath fading. Furthermore, the use of wireless spectrum resources requires obtaining appropriate licenses or complying with power limitation regulations. Wired communication solutions, on the other hand, are mainly based on technologies such as RS485 bus, M-Bus bus, and power line carrier. They offer high transmission reliability and are not subject to radio management regulations, making them particularly suitable for applications involving the centralized deployment of multiple water meters within wells.

[0003] In wired communication solutions, the centralized architecture at the well site is a relatively mature networking mode. This architecture installs a data concentrator near the manhole cover on the surface, extending downwards via a wired bus to each water meter node inside the well. The concentrator centrally handles data aggregation and remote transmission. Compared to a distributed architecture where each water meter has its own independent remote communication unit, the centralized architecture at the well site significantly reduces the communication cost per meter while avoiding the reliability risks associated with deploying complex communication equipment in the humid environment of the well.

[0004] However, existing centralized wired IoT water meter systems still face several technical bottlenecks in practical applications. Firstly, regarding power consumption control, water meter nodes are typically battery-powered to avoid laying power lines within the manholes, requiring extremely low standby power consumption in the node's communication circuitry. Traditional digital communication receiver circuits require continuous power to the analog-to-digital converter, digital filter, and protocol parsing logic even in idle listening mode, resulting in static current consumption often in the hundreds of microamps to several milliamps, making it difficult for battery life to meet the typical requirement of over 6 years for water meters. Some manufacturers use timed wake-up to reduce average power consumption, where the water meter node periodically exits sleep mode at preset time intervals to detect communication requests. However, this method not only introduces additional wake-up latency but also introduces design complexity in communication time slot alignment. Summary of the Invention

[0005] The main objective of this invention is to provide a centralized wired IoT water meter system for multiple water meters to share communication. This invention can significantly reduce the standby power consumption of water meter nodes to extend battery life, support concurrent access of multiple nodes to improve communication efficiency, enhance anti-interference capability through spread spectrum gain, and utilize the uniqueness of chaotic sequences to achieve node identity binding and signal isolation at the physical level.

[0006] To solve the above problems, the technical solution of the present invention is implemented as follows: A centralized wired IoT water meter system with multiple water meters sharing communication includes a concentrator at the wellhead, multiple water meter nodes, and a wired bus connecting the concentrator and each water meter node. Each water meter node includes a flow sensor, a main control microprocessor, a bulk acoustic wave wake-up receiver, a chaotic spread spectrum hardware module, and a bus driver circuit. The bulk acoustic wave wake-up receiver is connected to the wired bus and is used to receive wake-up command frames sent by the concentrator at the wellhead and trigger the main control microprocessor to switch from sleep mode to working mode when the address matches. The chaotic spread spectrum hardware module is connected to the main control microprocessor and is used to... The device identification code of the water meter node generates chaotic spread spectrum codewords, and performs spread spectrum processing and differential encoding on the flow data collected by the flow sensor, outputting a differential encoded frame; the bus driver circuit is used to convert the sparse code modulation output into a differential level signal adapted for wired bus transmission; the well concentrator includes a communication processing module; the communication processing module is used to send a wake-up command frame to the wired bus, and perform iterative detection based on sparse code multiple access on the multi-node superimposed signal formed by the sparse code modulation output simultaneously sent by each water meter node via the wired bus, to recover the flow data of each water meter node.

[0007] Furthermore, the bulk acoustic wave wake-up receiver includes a bulk acoustic wave resonator, an envelope detector, and an address matching circuit. The resonant frequency of the bulk acoustic wave resonator is set to the system-defined wake-up carrier frequency. When a wake-up carrier frequency signal appears on the wired bus, the bulk acoustic wave resonator generates a resonant output. The envelope detector is connected to the bulk acoustic wave resonator and is used to extract the envelope of the resonant output and output the envelope signal. The address matching circuit is connected to the envelope detector and is used to determine whether the address matches based on the envelope signal. If a match is found, the circuit outputs a valid wake-up signal to the main control microprocessor.

[0008] Furthermore, the wake-up instruction frame contains an 8-bit group address field; the address matching circuit contains an 8-bit shift register and an 8-bit address comparator; the 8-bit shift register samples the current envelope level and shifts it into the register on the rising edge of the envelope signal; when the 8-bit shift register is full, the 8-bit address comparator compares the register contents with the pre-stored group address of this water meter node bit by bit; when all 8 bits match, the address matching circuit outputs a wake-up valid signal.

[0009] Furthermore, the chaotic spread spectrum hardware module includes a chaotic sequence generator, a spread spectrum multiplier, and a differential encoder. The chaotic sequence generator is used to generate chaotic spread spectrum codewords based on the device identification code of this water meter node. The spread spectrum multiplier is connected to the chaotic sequence generator and is used to spread each bit of the flow data with the chaotic spread spectrum codewords to output a spread spectrum data sequence. The differential encoder is connected to the spread spectrum multiplier and is used to perform differential chaotic keying encoding on the spread spectrum data sequence to output a differential coded frame.

[0010] Furthermore, the chaotic sequence generator adopts a three-tiered structure to realize the hardware iteration of the Lorentz chaotic map. The three-tiered structure includes a first-level state register, a second-level state register, and a third-level state register, with each level state register having a bit width of 16 bits. The initialization process of the chaotic sequence generator is as follows: the main control microprocessor splits the 32-bit device identification code of this water meter node into high 16 bits and low 16 bits, writes the high 16 bits into the first-level state register, writes the low 16 bits into the second-level state register, and writes the bitwise XOR result of the high 16 bits and low 16 bits into the third-level state register.

[0011] Furthermore, the iterative process of the chaotic sequence generator is as follows: In each system clock cycle, the output of the first-level state register is multiplied by the output of the second-level state register through the first multiplier to obtain the first intermediate value. The first intermediate value is then subtracted from the output of the first-level state register through the first subtractor to obtain the first updated value. The output of the second-level state register is multiplied by the output of the third-level state register through the second multiplier to obtain the second intermediate value. The output of the first-level state register is then subtracted from the second intermediate value through the second subtractor to obtain the second updated value. The output of the first-level state register is multiplied by the output of the second-level state register through the third multiplier to obtain the third intermediate value. The third intermediate value is then subtracted from the output of the third-level state register through the third subtractor to obtain the third updated value. In the next clock cycle, the first, second, and third updated values ​​are written to their respective state registers. The chaotic sequence generator uses the lowest bit of the output of the first-level state register as the chaotic chip output for the current clock cycle, and continuously outputs 64 chaotic chips to form a chaotic spread spectrum codeword.

[0012] Furthermore, the process of the spread spectrum multiplier performing spread spectrum processing on each bit of the traffic data is as follows: when the current bit of the traffic data is logic 1, the spread spectrum multiplier directly outputs all 64 chips of the chaotic spread spectrum codeword; when the current bit of the traffic data is logic 0, the spread spectrum multiplier inverts all 64 chips of the chaotic spread spectrum codeword bit by bit and outputs them; the spread spectrum multiplier processes all bits of the traffic data sequentially and outputs the spread spectrum data sequence.

[0013] Furthermore, the differential encoder includes a 64-level delay buffer; the differential encoder directly outputs the current chaotic spreading codeword as a reference segment, and outputs the current chaotic spreading codeword bitwise XORed with the output of the 64-level delay buffer as an information segment. The reference segment and the information segment are concatenated to form a 128-chip differential coded frame; the differential encoder writes the current chaotic spreading codeword into the 64-level delay buffer for use in the next frame.

[0014] Furthermore, the main control microprocessor of each water meter node pre-stores a sparse codebook. The sparse codebook contains a number of sparse codewords equal to the total number of water meter nodes supported by the system. Each sparse codeword contains 6 position indices and 6 phase values. The 6 position indices point to a specific orthogonal resource unit among the 4 orthogonal resource units, and the 6 phase values ​​are taken from the set 0 degrees, 90 degrees, 180 degrees, and 270 degrees. The main control microprocessor reads the corresponding sparse codeword from the sparse codebook according to the node number of the water meter node, combines every 2 consecutive chips of the differential coded frame into 1 modulation symbol, allocates the modulation symbol to the corresponding orthogonal resource unit according to the 6 position indices of the sparse codeword, and performs phase rotation on the modulation symbol according to the 6 phase values ​​of the sparse codeword to generate a sparse code modulation output.

[0015] Furthermore, the iterative detection process performed by the communication processing module is as follows: the communication processing module establishes one variable node for each water meter node and one resource node for each orthogonal resource unit. It establishes the connection relationship between the variable node and the resource node based on the six position indices of each sparse codeword in the sparse codebook. For each resource node, the communication processing module performs the following processing: extracts the received sample value from the orthogonal resource unit corresponding to the resource node from the multi-node superimposed signal; traverses all candidate symbol combinations of variable nodes connected to the resource node; performs phase rotation on each candidate symbol combination according to the corresponding sparse codeword and sums the results to obtain the reconstructed value; calculates the Euclidean distance between the received sample value and the reconstructed value and converts it into a likelihood metric; the communication processing module collects the likelihood metrics sent by all resource nodes connected to each variable node, and performs processing on the likelihood metrics of the same candidate symbol. The comprehensive metric value is obtained by accumulating the data. After the communication processing module repeatedly performs resource node processing and variable node processing for a total of 5 rounds, it selects the candidate symbol with the largest comprehensive metric value for each variable node as the detection output symbol. The communication processing module performs sparse code inverse mapping and differential correlation demodulation on the detection output symbols of each water meter node, performs phase inverse rotation on the detection output symbols to recover the modulation symbols, splits the modulation symbols into 2 chips to recover the differential coded frame, uses the first 64 chips of the differential coded frame as the reference segment and the last 64 chips as the information segment, and performs bitwise XOR operation between the reference segment and the information segment to obtain the spread spectrum data segment. The spread spectrum data segment is correlated with the chaotic spread spectrum codeword of the corresponding water meter node. When the correlation operation result is greater than 32, the current bit is determined to be logic 1; when the correlation operation result is less than or equal to 32, the current bit is determined to be logic 0. All flow data of each water meter node are recovered in sequence.

[0016] The centralized wired IoT water meter system for multiple water meters sharing communication in wells, as described in this invention, has the following advantages: This invention uses a bulk acoustic wave wake-up receiver instead of a traditional digital monitoring circuit. It utilizes the high-quality factor characteristics of the bulk acoustic wave resonator to achieve narrowband frequency selective detection of a specific wake-up carrier frequency. The entire wake-up receiving link does not require continuous power supply to the analog-to-digital converter and digital signal processing logic, reducing static power consumption to less than one percent of traditional solutions. The water meter nodes are in a deep sleep state for most of the time, and the main control microprocessor is only triggered to enter working state when the bulk acoustic wave wake-up receiver detects a wake-up command frame with a matching address. This significantly extends the lifespan of water meters under battery power conditions and reduces the frequency and labor costs of on-site battery replacement.

[0017] This invention replaces the traditional digital monitoring circuit with a bulk acoustic wave (BAW) wake-up receiver. Utilizing the high-quality factor characteristics of the BAW resonator, it achieves narrowband frequency selective detection of a specific wake-up carrier frequency. The entire wake-up receiving link does not require continuous power to the analog-to-digital converter and digital signal processing logic, reducing static power consumption to less than one percent of traditional solutions. The water meter node remains in deep sleep mode for most of the time, only triggering the main control microprocessor to enter working state when the BAW wake-up receiver detects a wake-up command frame with a matching address. This significantly extends the lifespan of the water meter under battery power conditions and reduces the frequency and labor costs of on-site battery replacement.

[0018] This invention employs a chaotic spread spectrum hardware module to perform spread spectrum processing and differential coding on traffic data, expanding each data bit into a spread spectrum symbol composed of multiple chaotic chips. The spread spectrum gain effectively suppresses narrowband interference and impulse noise in the channel. The differential chaotic keying coding method allows the receiver to complete demodulation without carrier phase synchronization, simplifying the concentrator's receiver circuit design and enhancing the system's robustness under phase-distorted channel conditions. Attached Figure Description

[0019] Figure 1 A schematic diagram of the frequency response characteristic curve of a bulk acoustic resonator provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the correlation characteristic curves of the chaotic spread spectrum sequence provided in an embodiment of the present invention; Figure 3 This is a schematic diagram illustrating the waveform generation principle of differential chaotic shift keying encoding provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the resource mapping matrix structure for the sparse code division multiple access technology provided in an embodiment of the present invention. Detailed Implementation

[0020] A centralized wired IoT water meter system with multiple water meters sharing communication includes a concentrator at the wellhead, multiple water meter nodes, and a wired bus connecting the concentrator and each water meter node. Each water meter node includes a flow sensor, a main control microprocessor, a bulk acoustic wave wake-up receiver, a chaotic spread spectrum hardware module, and a bus driver circuit. The bulk acoustic wave wake-up receiver is connected to the wired bus and is used to receive wake-up command frames sent by the concentrator at the wellhead and trigger the main control microprocessor to switch from sleep mode to working mode when the address matches. The chaotic spread spectrum hardware module is connected to the main control microprocessor and is used to... The device identification code of the water meter node generates chaotic spread spectrum codewords, and performs spread spectrum processing and differential encoding on the flow data collected by the flow sensor, outputting a differential encoded frame; the bus driver circuit is used to convert the sparse code modulation output into a differential level signal adapted for wired bus transmission; the well concentrator includes a communication processing module; the communication processing module is used to send a wake-up command frame to the wired bus, and perform iterative detection based on sparse code multiple access on the multi-node superimposed signal formed by the sparse code modulation output simultaneously sent by each water meter node via the wired bus, to recover the flow data of each water meter node.

[0021] A centralized wired IoT water meter system with multiple water meters sharing a common communication point has significant application value in the intelligent management of urban water supply networks. This system connects multiple water meters, which are distributed and installed in underground manholes, to a concentrator located above the manhole via a wired bus. The concentrator then centrally completes data collection and remote transmission, thus avoiding the safety hazards and labor costs associated with frequent manhole cover opening required for traditional manual meter reading.

[0022] In terms of the overall system architecture, the well-mounted concentrator, as the main node of the entire communication network, undertakes the core functions of coordinating the communication timing of various water meter nodes, aggregating flow data, and interacting with the upper-level management platform. The well-mounted concentrator is typically installed near the manhole cover of a surface inspection well or inside a dedicated equipment box. Its power supply can be either mains power or a combination of solar panels and batteries to adapt to different site conditions. In a typical application scenario, a single well-mounted concentrator can manage 8 to 64 water meter nodes, the specific number depending on the transmission distance and signal attenuation characteristics of the wired bus.

[0023] The wired bus uses twisted-pair cable as the physical transmission medium. One pair of wires is used for differential signal transmission, while the other pair can be selectively used to provide DC power to the water meter nodes. The twist pitch of the twisted pair is typically set to 12 to 18 twist cycles per meter. This structure effectively cancels the common-mode interference voltage induced by external electromagnetic fields on the two wires, allowing the differential-mode component of the effective signal to be preserved. In underground well environments, electromagnetic radiation from power cables, electric valve actuators, and variable frequency water pumps is common, making the anti-interference characteristics of the twisted pair crucial for ensuring communication reliability. The characteristic impedance of the bus is designed to be 120 ohms, with a 120-ohm terminating resistor connected in parallel at each end of the bus to absorb the reflected energy of the signal at the cable end, preventing the reflected wave from superimposing with the incident wave to form a standing wave and causing signal distortion.

[0024] The hardware components of a water meter node include a flow sensor, a main control microprocessor, a bulk acoustic wave wake-up receiver, a chaotic spread spectrum hardware module, and a bus driver circuit. The flow sensor is responsible for sensing the cumulative volume of water flow within the pipe; its output signal is acquired by the main control microprocessor to form flow data to be transmitted. The main control microprocessor remains in deep sleep mode most of the time to reduce power consumption, only waking up to enter working mode when data reporting is required. The bulk acoustic wave wake-up receiver is specifically used to continuously monitor wake-up command frames on the wired bus during the main control microprocessor's sleep period. Once a wake-up signal matching the node's address is detected, the main control microprocessor is triggered to exit sleep mode. The chaotic spread spectrum hardware module performs spread spectrum modulation processing on the flow data, while the bus driver circuit converts the modulated digital signal into a differential level adapted for wired bus transmission.

[0025] The design of the bulk acoustic wave wake-up receiver aims to solve the problem of excessive power consumption in traditional digital wake-up circuits. Conventional digital receiving circuits require continuous power to the analog-to-digital converter, digital filters, and protocol parsing logic. Even in idle listening mode, their current consumption is typically in the hundreds of microamps to several milliamps, which is unacceptable for water meter nodes that rely on long-term battery power. The bulk acoustic wave wake-up receiver utilizes the high-quality factor characteristics of bulk acoustic wave resonators to achieve narrowband filtering and signal detection. The static power consumption of the entire receiving link can be controlled below 1 microamp, allowing the water meter node, when powered by a 19000 mAh lithium thionyl chloride battery, to theoretically have a standby life exceeding 15 years.

[0026] The bulk acoustic wave resonator is the core sensitive component of a bulk acoustic wave wake-up receiver. Its working principle is based on the acoustic resonance effect of piezoelectric materials at specific frequencies. The basic structure of the resonator consists of an upper electrode, a piezoelectric film, a lower electrode, and an acoustic reflective layer stacked sequentially. When an alternating voltage is applied between the upper and lower electrodes, the piezoelectric film vibrates mechanically in the thickness direction due to the inverse piezoelectric effect. This vibration forms a standing wave inside the piezoelectric film. The amplitude of the standing wave reaches its maximum value only when the frequency of the excitation signal is exactly equal to the resonator's natural resonant frequency. At this point, the resonator exhibits extremely low electrical impedance, allowing a large current to pass through. When the excitation frequency deviates from the resonant point, the resonator's impedance increases rapidly, and the current decreases sharply. This frequency selectivity allows the bulk acoustic wave resonator to detect signals at specific carrier frequencies without any active amplifier circuitry.

[0027] refer to Figure 1 In the multi-water meter wired IoT communication system of this invention, the bulk acoustic resonator, as the core component of the ultra-low power wake-up receiver, directly determines the system's wake-up sensitivity and anti-interference capability through its frequency selectivity. The horizontal axis in the figure represents the frequency relative to the center frequency. The frequency offset, in megahertz, ranging from MHz to MHz. The vertical axis represents the amplitude response, measured in decibels, ranging from... dB to dB. The center operating frequency of the bulk acoustic resonator is set to MHz, this frequency falls within the ISM unlicensed band and is suitable for low-power IoT applications. Resonator quality factor The value is approximately 1500, and this parameter reflects the frequency selectivity of the resonator. Based on the relationship between the quality factor and bandwidth, the resonator's... dB bandwidth Approximately 610kHz, calculated using the following formula: The curve in the figure exhibits typical Lorentzian curve characteristics, and its mathematical expression is: After being converted to decibels, it becomes At the center frequency, the amplitude response reaches its maximum value; as the frequency deviates from the center point, the amplitude response decreases rapidly. This is indicated by the dashed line in the figure. The dB reference line is used to determine the effective detection bandwidth. The gray shaded area represents the effective detection region of the envelope detection circuit, covering approximately 400 kHz on both sides of the center frequency. When the received RF signal frequency falls within this region, the bulk acoustic resonator generates a sufficiently strong mechanical vibration response, which is then detected by the subsequent envelope detection circuit and triggers a wake-up signal. The high-quality factor design gives the resonator excellent out-of-band rejection characteristics, effectively filtering out adjacent channel interference and out-of-band noise, thus achieving high-sensitivity frequency-selective wake-up functionality while maintaining ultra-low quiescent power consumption.

[0028] The selection of the resonant frequency requires comprehensive consideration of multiple factors. Too low a frequency will lead to increased signal attenuation on the wired bus, and the physical size of the resonator will also increase accordingly; too high a frequency places more stringent requirements on the resonator's manufacturing process and is more susceptible to signal distortion due to the bus's distributed capacitance. In this system, the wake-up carrier frequency is set to 915 MHz, a frequency within the industrial, scientific, and medical bands, where the supply chain for related RF components is mature and costs are controllable. The quality factor of the bulk acoustic wave resonator... It is a key indicator for measuring its frequency selectivity performance, defined as the resonant frequency. With 3 dB bandwidth The ratio, i.e. ,in This indicates the center resonant frequency of the resonator. This indicates the frequency range corresponding to a 3 dB drop in amplitude on the resonator's amplitude-frequency response curve. The bulk acoustic resonator used in this system typically has a quality factor of 1500, corresponding to a 3 dB bandwidth of approximately 610 kHz. This means that only signals with frequencies falling within the range of 914.695 MHz to 915.305 MHz can effectively excite the resonator to produce a response, while interference signals outside this range will be naturally suppressed.

[0029] The wake-up command frame is generated by the wellhead concentrator and broadcast to all water meter nodes via the wired bus. The physical layer of the command frame uses on-off keying modulation, which represents binary data bits by controlling the presence or absence of a 915 MHz carrier. When a logic "1" is transmitted, the RF power amplifier of the wellhead concentrator outputs a carrier pulse lasting 100 microseconds; when a logic "0" is transmitted, the power amplifier remains silent for the same 100 microsecond time window. A 20 microsecond guard interval is set between adjacent data bits to eliminate inter-symbol interference that may be caused by inconsistent bus transmission delays.

[0030] The wake-up command frame data structure consists of two parts: a preamble sequence and a group address field. The preamble sequence comprises eight consecutive logic "1"s, which allow sufficient time for the bulk acoustic wake-up receivers of each water meter node to complete signal detection and internal state synchronization. The group address field, immediately following the preamble sequence, is a fixed 8-bit field used to specify the target node group for this wake-up operation. The design consideration of using group addresses instead of single node addresses is to improve the system's wake-up efficiency: in actual deployments, multiple water meter nodes within the same well often have similar data reporting cycle requirements. By grouping them into the same address group, the well-mounted concentrator only needs to send one wake-up command frame to simultaneously activate all nodes within that group, significantly shortening the communication cycle compared to waking them up one by one. The 8-bit group address field supports 256 different group address codes, and the number of nodes that can be accommodated within each address group is determined by the codebook capacity of the sparse code multiple access.

[0031] The envelope detector, located at the output of the bulk acoustic wave resonator, is responsible for converting the high-frequency AC signal output by the resonator into a DC envelope level that can be processed by subsequent digital circuits. The core component of the envelope detector is a Schottky barrier diode. This type of diode has a forward voltage drop of only 0.2 to 0.3 volts, far lower than the 0.6 to 0.7 volts of ordinary silicon diodes, thus enabling it to operate with relatively small input signal amplitudes. When the bulk acoustic wave resonator generates a resonant output due to receiving a 915 MHz carrier signal, the AC voltage presented across the resonator is half-wave rectified by the Schottky diode. The rectified pulsating DC is then smoothed and filtered by a 47 picofarad ceramic capacitor, ultimately yielding a DC voltage signal reflecting the carrier envelope variation. The amplitude of this DC voltage signal is approximately logarithmically related to the power of the input carrier. When the input power is -70 dBmW, the output voltage of the envelope detector is approximately 80 millivolts; when the input power increases to -40 dBmW, the output voltage can reach 450 millivolts.

[0032] The address matching circuit receives the envelope signal from the envelope detector and uses digital logic to determine whether the currently received group address matches the pre-stored address of this water meter node. A hysteresis comparator is installed at the front end of the address matching circuit to convert the analog envelope voltage into a standard digital logic level. The hysteresis comparator has two threshold voltages: an upper threshold of 200 millivolts and a lower threshold of 100 millivolts. When the envelope signal rises from below 100 millivolts to above 200 millivolts, the comparator output flips to a high level; thereafter, the comparator output only flips back to a low level when the envelope signal drops below 100 millivolts. This hysteresis characteristic effectively suppresses output jitter caused by fluctuations in the envelope signal near the threshold, preventing subsequent shift registers from missampling due to false edges.

[0033] The 8-bit shift register consists of eight cascaded D flip-flops, all sharing the same clock input. The output signal of the hysteresis comparator is processed by an edge detection circuit to extract the rising edge. Each detected rising edge generates a clock pulse, which is then fed into the shift register. At the rising edge of the clock pulse, the shift register samples the current logic level of the hysteresis comparator output and shifts it into the first stage flip-flop. Simultaneously, the existing data in the first stage flip-flop is shifted into the second stage, and so on, with the data from the seventh stage shifted into the eighth stage, while the existing data in the eighth stage is discarded. After eight clock pulses, the shift register stores the most recently received 8 bits of data, which correspond to the group address field in the wake-up instruction frame.

[0034] The 8-bit address comparator is implemented using combinational logic circuits combining XOR gate arrays and NOR gates. The eight parallel outputs of the shift register and the 8-bit group address pre-stored in the read-only memory of this water meter node are respectively fed into eight XOR gates. Each XOR gate compares the two bits at corresponding positions: if they are the same, it outputs logic "0"; otherwise, it outputs logic "1". The outputs of the eight XOR gates are then fed into an 8-input NOR gate. Only when the outputs of all eight XOR gates are logic "0" will the NOR gate output logic "1", indicating that the group address in the shift register is completely consistent with the pre-stored address of this node; if any bit does not match, the output of the NOR gate is logic "0". The output signal of the NOR gate is the wake-up valid signal, which is led to the external interrupt input pin of the main control microprocessor.

[0035] In sleep mode, the main microprocessor shuts down the power supply to its internal oscillator, analog-to-digital converter, timers, and most digital logic circuits, leaving only the external interrupt detection circuit and a very small number of static memory units used to maintain register contents powered. At this time, the main microprocessor's current consumption can be as low as 0.4 microamps. When a wake-up valid signal generates a low-to-high edge on the external interrupt pin, the interrupt detection circuit is triggered and sends a wake-up request to the power management unit. The power management unit first restores power to the internal high-speed oscillator and waits for it to stabilize, a process that typically takes 2 to 5 microseconds. After the oscillator stabilizes, the power management unit sequentially turns on the power rails of each functional circuit and releases the processor core from the reset state. From the generation of the wake-up valid signal to the main microprocessor starting to execute the first instruction, the entire wake-up delay time is approximately 15 to 30 microseconds.

[0036] After the main microprocessor enters the working state, it first reads the current count value of the flow sensor through the internal bus. The flow sensor typically uses a Hall effect sensor or a reed switch sensor, and its output is a pulse signal proportional to the water flow volume. The counter inside the main microprocessor accumulates this pulse, and the count value multiplied by the pulse equivalent of the flow sensor yields the cumulative flow since the last reset. The pulse equivalent is an important calibration parameter of the flow sensor, representing the water flow volume corresponding to each output pulse, commonly set at 1 liter per pulse or 10 liters per pulse. The main microprocessor temporarily stores the read count value in its internal random access memory as source data for subsequent spread spectrum modulation and transmission.

[0037] In optional implementations, the resonant frequency of the bulk acoustic resonator can also be set to other industrial, scientific, or medical frequency bands such as 433 MHz or 2.4 GHz, depending on local radio regulations and the actual electromagnetic environment at the site. The length of the group address field is not fixed at 8 bits; in small systems with a limited number of nodes, it can be reduced to 4 bits to shorten the transmission time of the wake-up command frame, while in large systems requiring support for more address groups, it can be extended to 12 or 16 bits. In addition to using Schottky diodes, the envelope detector can also employ an active envelope detection circuit, using operational amplifiers to form a precision rectifier for higher detection sensitivity, but this will correspondingly increase static power consumption. The sleep depth of the main microprocessor can be configured according to application requirements. If a longer wake-up delay is permissible, more internal circuitry can be shut down to further reduce sleep current; if strict requirements are placed on wake-up response speed, some clock circuitry can be kept running to shorten the oscillator settling time.

[0038] The chaotic spread spectrum hardware module plays a core role in signal modulation and coding within the communication link of water meter nodes. Its design goal is to endow each water meter node with unique signal characteristics through the pseudo-random nature of chaotic sequences, enabling correct identification and separation by the well-mounted concentrator when multiple nodes transmit data simultaneously. Compared to traditional pseudo-random code generation methods, the sequence generation method based on chaotic mapping has longer periodicity and better correlation characteristics, while its hardware implementation complexity is relatively controllable.

[0039] The chaotic spread spectrum hardware module integrates three functional units: a chaotic sequence generator, a spread spectrum multiplier, and a differential encoder. These units are cascaded together via an on-chip data bus to form a complete signal processing pipeline. The main control microprocessor communicates with the chaotic spread spectrum hardware module through a serial peripheral interface, writing configuration information such as device identification codes and flow data to it, and reading the output differentially encoded frames after processing.

[0040] refer to Figure 2 , Figure 2The correlation characteristic curves of chaotic spread spectrum sequences are displayed, including two sets of experimental data: autocorrelation function and cross-correlation function. The first set of curves shows the normalized autocorrelation function characteristics of a single chaotic spreading code. The horizontal axis represents the time delay offset. The unit is chips, and the range is from to Chip. The vertical axis represents the normalized autocorrelation value. , range from to The chaotic sequence is generated by a three-stage cascaded Lorentz mapping circuit, with a sequence length of... Chip. At zero latency At this point, the autocorrelation function exhibits a sharp main peak, with the peak value normalized to 1, indicating that the sequence is perfectly correlated with itself. When the time delay shift... At this point, the autocorrelation value rapidly drops to near zero, forming a distinct sidelobe suppression region. The dashed line in the figure marks the theoretical boundary. The measured sidelobe values ​​were all effectively suppressed below the theoretical boundary. This autocorrelation characteristic of the impulse function allows the receiver to accurately identify the signal arrival time through correlation detection, providing a reliable foundation for subsequent synchronous acquisition and data demodulation. The second set of curves shows the normalized cross-correlation function characteristics between the chaotic codes generated by two different water meter devices. The two sets of chaotic sequences were generated by different initial conditions; the first set of initial values ​​was... The initial value of the second group is The vertical axis represents the normalized cross-correlation value. , range from to The dashed lines in the diagram mark the theoretical boundary. Experimental results show that the cross-correlation values ​​of the two sets of chaotic codes remain at a low level throughout the entire time delay offset range, without any obvious correlation peaks. This low cross-correlation characteristic ensures good signal isolation when different water meter devices transmit simultaneously on the same channel. The receiving end can perform correlation operations between the local chaotic code copy and the received signal to selectively extract data information from the target device while suppressing interference signals from other devices. These two correlation characteristics of chaotic sequences together constitute the physical layer foundation of code division multiple access.

[0041] The chaotic sequence generator employs a three-tiered cascade structure to implement hardware iteration of the Lorentz chaotic map. This structure originates from the discretization of the Lorentz attractor mathematical model. The Lorentz system is a deterministic nonlinear dynamical system described by three coupled differential equations, exhibiting extreme sensitivity to initial conditions under specific parameter conditions, the so-called "butterfly effect." Discretizing this continuous-time system using the Euler method yields an iterative mapping form suitable for digital circuit implementation. The three-tiered cascade structure includes a first-stage state register, a second-stage state register, and a third-stage state register, corresponding to the three state variables of the Lorentz system. Each stage state register has a bit width of 16 bits. This bit width ensures sufficient numerical precision to maintain chaotic characteristics while controlling hardware resource consumption. When using a 16-bit specific-point representation, the integer part occupies 4 bits, and the fractional part occupies 12 bits, representing a numerical range from -8 to +7.999755859375, with a resolution of 0.000244140625.

[0042] The initialization process of the chaotic sequence generator determines the initial state of the generated chaotic sequence. Different initial states will lead to completely different subsequent iteration trajectories, which is the theoretical basis for using device identification codes to distinguish each water meter node. During initialization, the main control microprocessor splits the 32-bit device identification code of this water meter node into two parts: a high 16-bit code and a low 16-bit code. The device identification code is a unique number written into the water meter's internal one-time programmable memory when it leaves the factory. No two water meter nodes with the same device identification code exist within the same water supply network. The high 16 bits are written to the first-level status register, and the low 16 bits are written to the second-level status register. For the third-level status register, its initial value is determined by the bitwise XOR result of the high 16 bits and the low 16 bits. The introduction of the XOR operation makes the initial value of the third-level status register depend on both the high and low bits of the device identification code, enhancing the correlation between the initial values ​​of the three status registers and helping the system enter the chaotic state more quickly.

[0043] The iterative process of the chaotic sequence generator performs a state update operation once per system clock cycle. The system clock frequency is set to 4 MHz, meaning one iteration is completed every 250 nanoseconds. The iterative operation involves the coordinated operation of three sets of multipliers and subtractors. At the rising edge of each clock cycle, the current output value of the first-stage state register is fed into one input of the first multiplier, and the current output value of the second-stage state register is fed into the other input of the first multiplier. The two are multiplied to obtain the first intermediate value. The first intermediate value is then fed into the first subtractor and subtracted from the output value of the first-stage state register to obtain the first updated value. This operation corresponds to the discretized update equation of the first state variable of the Lorentz system.

[0044] Simultaneously, the output values ​​of the second-stage state register and the third-stage state register are multiplied in the second multiplier to obtain the second intermediate value. The output value of the first-stage state register is then subtracted from the second intermediate value by the second subtractor to obtain the second updated value. This operation corresponds to the update of the second state variable of the Lorentz system. In the third set of operations, the output values ​​of the first-stage state register and the second-stage state register are multiplied in the third multiplier to obtain the third intermediate value. The third intermediate value is then subtracted from the output value of the third-stage state register by the third subtractor to obtain the third updated value, corresponding to the update of the third state variable.

[0045] At the rising edge of the next clock cycle, the first, second, and third update values ​​are synchronously latched into their respective state registers, replacing the original state values. This synchronous update mechanism ensures that the iterative processes of the three state variables are coupled rather than executed sequentially, conforming to the mathematical definition of a Lorentz system. After the state registers are updated, a new round of iterative calculations begins.

[0046] The chaotic sequence generator outputs the lowest bit of the first-stage state register as the chaotic chip for the current clock cycle. The lowest bit is chosen over other bits because the lower bits of the chaotic system's state variables exhibit stronger randomness, and their statistical characteristics are closer to an ideal white noise sequence. Outputting 64 consecutive chaotic chips constitutes a complete chaotic spreading codeword. The choice of this length (64) is a trade-off between spreading gain and processing delay: a longer spreading codeword results in higher spreading gain and stronger anti-interference capability, but also means a longer transmission time for the same bit of data. In this system, the spreading factor of 64 chips corresponds to approximately 18 dB of processing gain, enabling reliable communication under harsh channel conditions with a signal-to-noise ratio as low as -12 dB.

[0047] The spread spectrum multiplier is responsible for modulating the traffic data to be transmitted with chaotic spreading codewords. Essentially, it expands each bit of the original data into a spreading symbol composed of 64 chips. The spreading process follows the basic method of direct sequence spreading: when the current bit of the traffic data is logic 1, the spread spectrum multiplier directly outputs all 64 chips of the chaotic spreading codeword, maintaining their original polarity; when the current bit of the traffic data is logic 0, the spread spectrum multiplier inverts each of the 64 chips of the chaotic spreading codeword bit by bit before outputting them, i.e., chips that were originally logic 1 become logic 0, and chips that were originally logic 0 become logic 1. This bipolar modulation method ensures that the spreading symbols corresponding to data bits "1" and "0" have opposite polarities. At the receiving end, the value of the original data bit can be determined by correlation operations with the local chaotic spreading codeword. The spread spectrum multiplier processes the traffic data bits sequentially, outputting 64 chips after processing each bit. After all bits have been processed, a continuous spread spectrum data sequence is formed.

[0048] Differential encoders perform differential chaotic keying coding on spread spectrum data sequences. This is an incoherent modulation technique whose significant advantage is that the receiver does not need to perform carrier synchronization and phase estimation, simplifying the design complexity of the demodulator. The core idea of ​​differential coding is to transmit the current symbol and the reference symbol together at the transmitter, and the receiver recovers the data by comparing their correlation, rather than relying on absolute phase information.

[0049] The differential encoder internally contains a 64-stage delay buffer to store the previous chaotic spreading codeword. The delay buffer consists of 64 D flip-flops connected in series, shifting the input 1-bit data one position forward each chip clock cycle, with the earliest input data output from the end. The differential encoder's workflow is as follows: First, all 64 chips of the current chaotic spreading codeword are directly output as a reference segment to subsequent circuits. Then, the current chaotic spreading codeword is XORed bit-by-bit with the previous chaotic spreading codeword stored in the 64-stage delay buffer; the result is output as the information segment. The reference segment and the information segment are concatenated in time to form a 128-chip differential coded frame. The reference segment acts like a pilot signal in the differential coded frame, providing a channel reference and timing synchronization benchmark for the receiver; the information segment carries the actual data information, and its difference from the reference segment reflects the values ​​of the original data bits.

[0050] refer to Figure 3 , Figure 3 This demonstrates the waveform generation principle of differential chaotic shift keying (DFT), presenting the complete signal transformation process from raw data bits to a differentially coded frame through four sets of time-domain waveforms. The first set of waveforms shows the raw data bit sequence. The diagram uses two consecutive data bits as an example for illustration; the first bit... The second bit The horizontal axis represents the chip index, with each data bit corresponding to 64 chip periods. The vertical axis represents the bit level, taking values ​​of 0 or 1. The waveform exhibits a stepped shape, maintaining a high level in the first bit period and a low level in the second bit period, with a clear level transition between the two bits. The second set of waveforms displays a chaotic spread spectrum codeword sequence. The system assigns an independent 64-chip chaotic codeword to each data bit, denoted as... and The chaotic codewords are generated in real time by a hardware chaos generator, and each codeword takes the value of... or This exhibits pseudo-random characteristics. The waveform in the figure shows rapid polarity reversals at the chip level, reflecting the wideband spreading characteristics of chaotic sequences. (Codeword) and coding These waveforms evolve from different chaotic states and exhibit low cross-correlation. The third set of waveforms shows the output signal of the spread spectrum multiplier. The spread spectrum process follows operational rules. ,in This represents the modular multiplication operation. When the data bits... At this time, the output signal maintains the original polarity of the chaotic code, that is, the original code output. When the data bits At this point, the output signal reverses the polarity of the chaotic code, i.e., it outputs the inverse code. In the diagram, the first bit period corresponds to the original code output, and the second bit period corresponds to the inverse code output. The two waveforms maintain the same statistical characteristics but have opposite polarities. The fourth set of waveforms shows the complete differential coded frame structure. Each differential coded frame contains 128 chips, divided into two equal-length functional segments. The first 64 chips constitute the reference segment. The original chaotic codewords are transmitted directly to establish a demodulation reference at the receiving end. The subsequent 64 chips constitute the information segment. The system transmits chaotic codewords modulated by data, carrying the actual user data. The gray shaded area in the diagram indicates the location of the reference segment. The receiver recovers the original data bits by calculating the correlation between the reference segment and the information segment; a positive correlation value is interpreted as bit 1, and a negative correlation value as bit 0. This differential structure eliminates the need for precise carrier synchronization and channel estimation, simplifying receiver design and making it suitable for low-cost water meter terminal implementations.

[0051] After the differentially coded frame is output, the differential encoder writes the current chaotic spread spectrum codeword into a 64-level delay buffer, overwriting the original content, for use in the next frame. This "use and store" mechanism ensures the continuity of reference information between adjacent frames.

[0052] After completing differential coding, each water meter node needs to map the differentially coded frame to the resource format of Sparse Code Multiple Access (SCO) to support simultaneous transmission by multiple nodes. SCO is a non-orthogonal multiple access (NOA) technology whose core feature is allowing multiple users to share the same time-frequency resources. It achieves signal separation between multiple users at the receiving end through a carefully designed sparse codebook. Compared to traditional orthogonal multiple access methods, SCO can support a higher overload factor, meaning it can accommodate more concurrent users with the same number of resource blocks.

[0053] Each water meter node's main control microprocessor pre-stores a sparse codebook. This codebook is uniformly distributed by the on-site concentrator and permanently stored in the flash memory of each node during system deployment. The number of sparse codewords in the sparse codebook is equal to the total number of water meter nodes supported by the system, ensuring that each node receives a unique codeword allocation. In a typical configuration of this system, the sparse codebook has a capacity of 6 sparse codewords, corresponding to the concurrent access capability of 6 water meter nodes. Each sparse codeword contains 6 location indices and 6 phase values. These two sets of parameters together define the mapping rules of the codeword in the sparse code multiple access resource grid.

[0054] Six position indices point to specific orthogonal resource units (ORRs) among the four ORRs. These four ORRs can be understood as four independent transmission channels. In the physical implementation of a wired bus, consecutive transmission time slots can be divided into four sub-slots using time-division multiplexing, with each sub-slot corresponding to an ORR. Duplicate values ​​are allowed among the six position indices, meaning the same ORR may be referenced multiple times, reflecting the "overload" characteristic. Six phase values ​​are taken from the sets 0 degrees, 90 degrees, 180 degrees, and 270 degrees, corresponding to the four constellation points of quadrature phase-shift keying (QPSK). The introduction of phase values ​​allows for differentiation based on phase differences even when two users transmit signals on the same ORR.

[0055] refer to Figure 4 , Figure 4 This paper demonstrates the resource mapping matrix structure for sparse code division multiple access (SDMA) technology. This matrix defines the mapping relationship between multiple water meter nodes and orthogonal resource units, and is a core configuration parameter for implementing non-orthogonal multiple access. The rows of the matrix correspond to six water meter nodes, labeled as node 1 to node 6. The columns of the matrix correspond to four orthogonal resource units, labeled as... , , and Orthogonal resource units can be combinations of physical resources such as time slots, frequency points, or spreading codes. The matrix elements are represented graphically, with solid circles indicating that a node occupies a corresponding resource unit, and hollow dashed circles indicating that a node does not occupy a corresponding resource unit. According to the mapping configuration in the diagram, node 1 occupies resource units... and Node 2 occupies resource units and Node 3 occupies resource units and Node 4 occupies resource units and Node 5 occupies resource units and Node 6 occupies resource units and Each node occupies exactly 2 resource units, and each resource unit is shared by exactly 3 nodes. This sparse mapping structure allows 6 nodes to simultaneously access the system with only 4 orthogonal resource units, achieving an overload factor of 150%, calculated as the overload factor. Compared to traditional orthogonal multiple access (OMA) schemes, this sparse code mapping scheme significantly improves the system's access capacity and spectral efficiency. Since the number of nodes superimposed on each resource unit is limited, and the codeword design of different nodes ensures good distinguishability, the receiver can use a message-passing algorithm to iteratively detect the superimposed signals, gradually separating and recovering the transmitted data from each node. The sparsity of the mapping matrix reduces the computational complexity of iterative detection, enabling this scheme to be implemented on resource-constrained concentrator devices.

[0056] The main control microprocessor reads the corresponding sparse codeword from the sparse codebook based on the node number of this water meter node. The node number is an integer between 1 and 6, assigned by the well concentrator during system initialization. After reading the sparse codeword, the main control microprocessor combines every two consecutive chips of the differentially coded frame into one modulation symbol. The combination method uses Gray coding mapping: chip pair "00" maps to symbol value 0, chip pair "01" maps to symbol value 1, chip pair "11" maps to symbol value 2, and chip pair "10" maps to symbol value 3. Gray coding is characterized by only a 1-bit difference between adjacent symbol values, which can reduce the spread of bit errors when there is noise in the channel. The 128-chip differentially coded frame is converted into 64 modulation symbols after this processing.

[0057] For each modulation symbol, the main control microprocessor allocates it to the corresponding orthogonal resource unit according to the 6 position indices of the sparse codeword. Specifically, the first modulation symbol is sent to the corresponding orthogonal resource unit according to the first position index, the second modulation symbol is sent according to the second position index, and so on. Since the sparse codeword contains only 6 position indices, and there are 64 modulation symbols in total, the position indices need to be used cyclically: the 7th modulation symbol reuses the 1st position index, the 8th modulation symbol reuses the 2nd position index, and so on until all 64 modulation symbols have been allocated.

[0058] While allocating to orthogonal resource units, the main control microprocessor performs phase rotation on the modulation symbols according to the six phase values ​​of the sparse codeword. The phase rotation is implemented using complex multiplication: the modulation symbol is treated as a point on the complex plane, with its real and imaginary parts determined by the symbol value through a four-phase shift keying constellation mapping; the phase value is converted into a complex rotation factor, with 0 degrees corresponding to... 90 degrees correspond 180 degrees correspond 270 degrees correspond ,in The imaginary unit is represented; the phase rotation is achieved by multiplying the modulation symbol by the rotation factor. The rotated modulation symbol is the sparse code modulation output.

[0059] The bus driver circuit is responsible for converting the sparse code modulation output into a differential level signal adapted for wired bus transmission. The core component of the bus driver circuit is a differential line driver chip, which internally contains a pair of complementary push-pull power amplifiers. When the input is logic high, the non-inverting output of the driver outputs a positive voltage, and the inverting output outputs a negative voltage, forming a positive voltage difference between them. When the input is logic low, the voltage relationship between the non-inverting and inverting outputs is reversed, forming a reverse voltage difference. The amplitude of the differential signal is set to ±2.5 volts, meaning the peak-to-peak voltage difference between the non-inverting and inverting inputs is 5 volts. This voltage amplitude meets the wired bus transmission distance requirements while also considering the power consumption limitations of the driver circuit.

[0060] The communication processing module of the wellhead concentrator can be physically implemented using a field-programmable gate array (FPGA) or a digital signal processor (DSP). Its core task is to perform iterative detection based on sparse code multiple access (SMA) on the multi-node superimposed signals from the wired bus, correctly separating and recovering the flow data sent by each water meter node. The multi-node superimposed signal refers to the composite waveform formed by the linear superposition of these signals on the wired bus when multiple water meter nodes simultaneously send their respective sparse code modulation outputs within the same time window. Because each node uses different sparse codewords for modulation, their distribution patterns on the four orthogonal resource units are different. The communication processing module utilizes this distribution difference to achieve multi-user detection.

[0061] The iterative detection algorithm is based on a message-passing mechanism on a factor graph, and its mathematical foundation is the belief propagation theory in probabilistic graphical models. The communication processing module first constructs a factor graph structure corresponding to the sparse code multiple access system. A factor graph is a bipartite graph containing two types of nodes: variable nodes and resource nodes. The communication processing module establishes one variable node for each water meter node and one resource node for each orthogonal resource unit. In this system, there are 6 variable nodes, corresponding to 6 possible concurrent water meter nodes; and 4 resource nodes, corresponding to 4 orthogonal resource units.

[0062] The connection between variable nodes and resource nodes is determined by the six position indices of each sparse codeword in the sparse codebook. If the position index of a sparse codeword contains a pair of variables... If the reference to the orthogonal resource unit is such that the variable node corresponding to the sparse codeword is related to the first orthogonal resource unit, then the reference to the first orthogonal resource unit is the first orthogonal resource unit. There is an edge between each resource node. Due to the sparsity of sparse codewords, each variable node is connected to only some resource nodes, not all of them, which is the meaning of the term "sparse". The sparse connection structure reduces the cyclic complexity of the factor graph, which is beneficial for the convergence of message passing algorithms.

[0063] The iterative detection process is divided into two alternating phases: resource node processing and variable node processing. Each completion of resource node processing and variable node processing is called an iteration. The communication processing module repeats resource node processing and variable node processing for a total of 5 rounds. These 5 iterations are sufficient for the algorithm to converge under most channel conditions.

[0064] During the resource node processing phase, the communication processing module performs the following operations for each resource node. First, it extracts the received sample value from the orthogonal resource unit corresponding to that resource node from the multi-node superimposed signal. The received sample value is a complex number, whose real and imaginary parts are obtained by sampling the differential signal on the wired bus using an analog-to-digital converter. It can be represented as all in the first place. The modulation symbols of the water meter nodes transmitting signals on each orthogonal resource unit are superimposed after phase rotation, plus the influence of channel noise.

[0065] Subsequently, the communication processing module iterates through the candidate symbol combinations of all variable nodes connected to the resource node. A candidate symbol refers to the modulation symbol value that a variable node can transmit. In quadrature phase shift keying (QPSK) modulation, each variable node has four candidate symbols, corresponding to symbol values ​​0, 1, 2, and 3. If the number of variable nodes connected to a resource node is... Then the total number of candidate symbol combinations is For example, when At that time, it is necessary to traverse 64 combinations.

[0066] For each candidate symbol combination, the communication processing module performs phase rotation on the candidate symbols according to the sparse codewords corresponding to each variable node, and then sums the rotated candidate symbols to obtain the reconstructed value. The reconstructed value represents the reconstructed value under the assumption of that candidate symbol combination. The ideal received signal that should be observed on each orthogonal resource unit. The communication processing module calculates the actual received sample value. With reconstructed values The Euclidean distance between them, i.e. ,in The modulus of the complex number is represented. The smaller the Euclidean distance, the better the candidate symbol combination matches actual observations, and the higher its reliability.

[0067] The Euclidean distance is converted into a likelihood metric, following a probabilistic model of a Gaussian channel. Under the assumption of additive white Gaussian noise, the probability density of the received sampled value deviating from the reconstructed value follows a complex Gaussian distribution, and the logarithm of its probability density function is inversely proportional to the square of the Euclidean distance. Therefore, the likelihood metric can be defined as the negative of the square of the Euclidean distance multiplied by a scaling factor related to the noise power. In practical implementations, the noise power can be estimated through statistical analysis of the received signal or by using a preset typical value.

[0068] During the variable node processing phase, the communication processing module performs the following operations on each variable node. Each variable node collects the likelihood metrics calculated in the previous phase from all resource nodes connected to it. For the same candidate symbol, the likelihood metrics from different resource nodes are summed to obtain the comprehensive metric value for that candidate symbol. The summation operation is based on the independence assumption, meaning that noise on each orthogonal resource unit is independent, therefore the likelihood information provided by each resource node can be directly added. The larger the comprehensive metric value, the higher the confidence that the candidate symbol is a genuine transmitted symbol.

[0069] After five rounds of iteration, the communication processing module selects the candidate symbol with the largest comprehensive metric value for each variable node as the detected output symbol. This decision criterion follows the maximum a posteriori probability criterion, which is the optimal symbol detection strategy within the Bayesian framework.

[0070] After the detection output symbols are determined, the communication processing module performs sparse code inverse mapping and differential correlation demodulation on the detection output symbols of each water meter node, ultimately recovering the flow data sent by each water meter node. Sparse code inverse mapping is the reverse process of sparse code mapping. The communication processing module performs phase inverse rotation on the detection output symbols based on the sparse codewords of the water meter node, i.e., multiplying it by the conjugate complex number of the original phase rotation factor, thereby recovering the original phase of the modulation symbol. After the phase inverse rotation is completed, the modulation symbol is split into two chips, restoring the structure of the differentially coded frame.

[0071] Differential correlation demodulation is the inverse process of differential coding. The communication processing module uses the first 64 chips of the differentially coded frame as the reference segment and the last 64 chips as the information segment. A bit-by-bit XOR operation is performed between the reference segment and the information segment to obtain the spread spectrum data segment. The basis for the XOR operation is: if the information segment at the transmitting end is generated by XORing the current chaotic spreading codeword with the previous chaotic spreading codeword, and the reference segment is the current chaotic spreading codeword, then the result of XORing the reference segment with the information segment should reconstruct the modulation result of the previous chaotic spreading codeword and the data bits.

[0072] Finally, the communication processing module performs a correlation operation between the spread spectrum data segment and the chaotic spread spectrum codeword corresponding to the water meter node. Specifically, the correlation operation involves comparing each of the 64 chips of the spread spectrum data segment with the 64 chips of the chaotic spread spectrum codeword bit by bit, counting the number of identical bits. Let the number of identical bits be denoted as . The result of the relevant operation is defined as follows: Since the length of the chaotic spreading codeword is 64, the value range of the correlation operation result is from 0 to 64. When the correlation operation result is greater than 32, the current bit is determined to be logic 1; when the correlation operation result is less than or equal to 32, the current bit is determined to be logic 0. 32, as the decision threshold, is exactly at the midpoint of the value range, and has the minimum average false positive probability under the condition of equal probability distribution of data bits.

[0073] The communication processing module sequentially performs the aforementioned related operations and decision-making processes on all spread spectrum data segments in the differentially coded frame, recovering the flow data sent by the water meter node bit by bit. After the flow data of all water meter nodes has been recovered, the well-mounted concentrator packages the data and sends it to the water supply management platform via the uplink communication link.

[0074] In optional implementations, the number of stages in the chaotic sequence generator can be adjusted to 5 or 7 stages to obtain longer chaotic periods and better sequence statistical characteristics, but this will correspondingly increase hardware resource consumption and iteration latency. The bit width of the status register can also be adjusted to 12 bits or 20 bits depending on the accuracy requirements. The length of the spreading codeword can be set to 32, 128, or 256 chips to adapt to communication requirements under different signal-to-noise ratio conditions. The capacity of the sparse codebook can be extended to 12 or more sparse codewords, which correspondingly requires increasing the number of orthogonal resource units to maintain a reasonable overload factor. The number of iteration detection rounds can be adjusted between 3 and 10 rounds depending on real-time requirements and bit error rate indicators; more rounds result in more complete convergence but also greater processing latency. The decision threshold 32 can also be adaptively adjusted according to the channel statistical characteristics; appropriately shifting the threshold under asymmetric noise conditions helps reduce the overall bit error rate.

[0075] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A centralized wired IoT water meter system for multiple water meters sharing communication, characterized in that: It includes a well-mounted concentrator, multiple water meter nodes, and a wired bus connecting the well-mounted concentrator and each water meter node; each water meter node includes a flow sensor, a main control microprocessor, a bulk acoustic wave wake-up receiver, a chaotic spread spectrum hardware module, and a bus drive circuit; the bulk acoustic wave wake-up receiver is connected to the wired bus and is used to receive the wake-up command frame sent by the well-mounted concentrator and trigger the main control microprocessor to switch from sleep state to working state when the address matches; The chaotic spread spectrum hardware module is connected to the main control microprocessor and is used to generate chaotic spread spectrum codewords based on the device identification code of this water meter node, and to perform spread spectrum processing and differential coding on the flow data collected by the flow sensor, and output differential coded frames. The bus driver circuit is used to convert the sparse code modulation output into a differential level signal adapted for wired bus transmission; the Inoue concentrator includes a communication processing module; The communication processing module is used to send wake-up command frames to the wired bus and perform iterative detection based on sparse code multiple access on the multi-node superimposed signal formed by the sparse code modulation output simultaneously sent by each water meter node via the wired bus, so as to recover the flow data of each water meter node.

2. The system according to claim 1, characterized in that, The bulk acoustic wave wake-up receiver includes a bulk acoustic wave resonator, an envelope detector, and an address matching circuit. The resonant frequency of the bulk acoustic wave resonator is set to the system-defined wake-up carrier frequency. When a wake-up carrier frequency signal appears on the wired bus, the bulk acoustic wave resonator generates a resonant output. The envelope detector is connected to the bulk acoustic wave resonator and is used to extract the envelope of the resonant output and output the envelope signal. The address matching circuit is connected to the envelope detector and is used to determine whether the address matches based on the envelope signal. If a match is found, the circuit outputs a valid wake-up signal to the main control microprocessor.

3. The system according to claim 2, characterized in that, The wake-up instruction frame contains an 8-bit group address field; the address matching circuit contains an 8-bit shift register and an 8-bit address comparator; the 8-bit shift register samples the current envelope level and shifts it into the register on the rising edge of the envelope signal; when the 8-bit shift register is full, the 8-bit address comparator compares the register contents with the pre-stored group address of this water meter node bit by bit; when all 8 bits match, the address matching circuit outputs a wake-up valid signal.

4. The system according to claim 1, characterized in that, The chaotic spread spectrum hardware module includes a chaotic sequence generator, a spread spectrum multiplier, and a differential encoder; the chaotic sequence generator is used to generate chaotic spread spectrum codewords based on the device identification code of this water meter node; The spread spectrum multiplier is connected to the chaotic sequence generator and is used to spread each bit of the traffic data with the chaotic spread spectrum codeword to output the spread spectrum data sequence; the differential encoder is connected to the spread spectrum multiplier and is used to perform differential chaotic keying coding on the spread spectrum data sequence to output the differential coded frame.

5. The system according to claim 4, characterized in that, The chaotic sequence generator adopts a three-tiered structure to realize the hardware iteration of the Lorentz chaotic map. The three-tiered structure includes a first-level state register, a second-level state register, and a third-level state register, with each level state register having a bit width of 16 bits. The initialization process of the chaotic sequence generator is as follows: the main control microprocessor splits the 32-bit device identification code of this water meter node into high 16 bits and low 16 bits, writes the high 16 bits into the first-level state register, writes the low 16 bits into the second-level state register, and writes the bitwise XOR result of the high 16 bits and low 16 bits into the third-level state register.

6. The system according to claim 5, characterized in that, The iterative process of the chaotic sequence generator is as follows: In each system clock cycle, the output of the first-level state register is multiplied by the output of the second-level state register using the first multiplier to obtain the first intermediate value. The first intermediate value is then subtracted from the output of the first-level state register using the first subtractor to obtain the first updated value. The output of the second-level state register is multiplied by the output of the third-level state register using the second multiplier to obtain the second intermediate value. The output of the first-level state register is then subtracted from the second intermediate value using the second subtractor to obtain the second updated value. The output of the first-level state register is multiplied by the output of the second-level state register using the third multiplier to obtain the third intermediate value. The third intermediate value is then subtracted from the output of the third-level state register using the third subtractor to obtain the third updated value. In the next clock cycle, the first, second, and third updated values ​​are written to their respective state registers. The chaotic sequence generator uses the lowest bit of the output of the first-level state register as the chaotic chip output for the current clock cycle, and continuously outputs 64 chaotic chips to form a chaotic spread spectrum codeword.

7. The system according to claim 4, characterized in that, The process of the spread spectrum multiplier performing spread spectrum processing on each bit of the traffic data is as follows: when the current bit of the traffic data is logic 1, the spread spectrum multiplier directly outputs all 64 chips of the chaotic spread spectrum codeword; when the current bit of the traffic data is logic 0, the spread spectrum multiplier inverts all 64 chips of the chaotic spread spectrum codeword bit by bit and then outputs them. The spread spectrum multiplier processes all bits of the traffic data sequentially and outputs a spread spectrum data sequence.

8. The system according to claim 4, characterized in that, The differential encoder contains a 64-level delay buffer. The differential encoder outputs the current chaotic spreading codeword directly as a reference segment, and outputs the current chaotic spreading codeword bitwise XORed with the output of the 64-level delay buffer as an information segment. The reference segment and the information segment are concatenated to form a 128-chip differential coded frame. The differential encoder writes the current chaotic spreading codeword into the 64-level delay buffer for use in the next frame.

9. The system according to claim 1, characterized in that, Each water meter node's main control microprocessor has a pre-stored sparse codebook. The sparse codebook contains a number of sparse codewords equal to the total number of water meter nodes supported by the system. Each sparse codeword contains 6 position indices and 6 phase values. The 6 position indices point to a specific orthogonal resource unit among the 4 orthogonal resource units, and the 6 phase values ​​are taken from the set 0 degrees, 90 degrees, 180 degrees, and 270 degrees. The main control microprocessor reads the corresponding sparse codeword from the sparse codebook according to the node number of the water meter node, combines every 2 consecutive chips of the differential coded frame into 1 modulation symbol, allocates the modulation symbol to the corresponding orthogonal resource unit according to the 6 position indices of the sparse codeword, and performs phase rotation on the modulation symbol according to the 6 phase values ​​of the sparse codeword to generate a sparse code modulation output.

10. The system according to claim 9, characterized in that, The iterative detection process performed by the communication processing module is as follows: The communication processing module establishes one variable node for each water meter node and one resource node for each orthogonal resource unit. It establishes the connection relationship between the variable node and the resource node based on the six position indices of each sparse codeword in the sparse codebook. For each resource node, the communication processing module performs the following processing: extracts the received sample value from the orthogonal resource unit corresponding to the resource node from the multi-node superimposed signal; traverses all candidate symbol combinations of variable nodes connected to the resource node; performs phase rotation on each candidate symbol combination according to the corresponding sparse codeword and sums the results to obtain the reconstructed value; calculates the Euclidean distance between the received sample value and the reconstructed value and converts it into a likelihood metric; the communication processing module collects the likelihood metrics sent by all resource nodes connected to each variable node and accumulates the likelihood metrics for the same candidate symbol. The comprehensive metric value is obtained. After the communication processing module repeatedly performs resource node processing and variable node processing for a total of 5 rounds, it selects the candidate symbol with the largest comprehensive metric value for each variable node as the detection output symbol. The communication processing module performs sparse code inverse mapping and differential correlation demodulation on the detection output symbols of each water meter node, performs phase inverse rotation on the detection output symbols to recover the modulation symbols, splits the modulation symbols into 2 chips to recover the differential coded frame, uses the first 64 chips of the differential coded frame as the reference segment and the last 64 chips as the information segment, and performs bitwise XOR operation between the reference segment and the information segment to obtain the spread spectrum data segment. The spread spectrum data segment is correlated with the chaotic spread spectrum codeword of the corresponding water meter node. When the correlation operation result is greater than 32, the current bit is determined to be logic 1; when the correlation operation result is less than or equal to 32, the current bit is determined to be logic 0. All flow data of each water meter node are recovered in sequence.

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