A method, apparatus, device and storage medium for converting a translation lookaside buffer verification

Abstract

The application discloses a translation look-aside buffer (TLB) verification method, device and equipment and a storage medium. The method comprises the following steps: after receiving a target TLB verification request, performing instantiation processing on a pre-constructed heterogeneous TLB bottom encapsulation model according to attribute information of the target TLB; constructing a verification environment and a verification case corresponding to the target TLB according to an instantiation processing result corresponding to the heterogeneous TLB bottom encapsulation model and a standardized interface corresponding to the heterogeneous TLB bottom encapsulation model; and running the verification case according to the verification environment corresponding to the target TLB to obtain a verification result corresponding to the target TLB. The technical scheme of the embodiment of the application can improve the verification efficiency of the TLB and the accuracy of the verification result.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method, apparatus, device, and storage medium for verifying a conversion backup buffer. Background Technology

[0002] Currently, the Translation Lookaside Buffer (TLB) is a key component of high-performance processor memory systems, and its structural design is becoming increasingly complex, leading to difficulties in modeling the corresponding verification environment and low verification efficiency.

[0003] Existing technologies for verifying heterogeneous TLBs have the following technical drawbacks: Verification engineers need to manually model and develop test cases for specific TLB structures, resulting in a large amount of repetitive work; verification components for each module within the TLB cannot be reused; the physical resource code of the TLB is highly coupled with specific verification requirements, and once the chip's Register Transfer Level (RTL) changes, the TLB-related verification code needs to be modified in multiple places, making it prone to errors; different verification engineers tend to use different logic implementation methods and naming conventions to build verification environments, leading to inconsistent verification environment styles and preventing verification components from being reused across projects; when the TLB to be verified is a new TLB with a special prefetching mechanism or a non-standard organizational structure, existing verification methods often require reconstructing the entire verification environment for that TLB, making the verification environment difficult to maintain and expand. Summary of the Invention

[0004] This invention provides a method, apparatus, device, and storage medium for verifying a transition backup buffer (TLB), which can improve the verification efficiency and accuracy of the verification results.

[0005] According to one aspect of the present invention, a method for verifying a conversion backup buffer is provided, comprising: Upon receiving the target TLB verification request, the pre-built heterogeneous TLB underlying encapsulation model is instantiated based on the target TLB's attribute information. Based on the instantiation processing results corresponding to the heterogeneous TLB underlying encapsulation model and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model, construct the verification environment and verification test cases corresponding to the target TLB. Run the verification test case according to the verification environment corresponding to the target TLB to obtain the verification result corresponding to the target TLB.

[0006] According to another aspect of the present invention, a conversion backup buffer verification apparatus is provided, comprising: The instantiation processing module is used to instantiate the pre-built heterogeneous TLB underlying encapsulation model according to the attribute information of the target TLB after receiving the target TLB verification request. The verification test case construction module is used to construct the verification environment and verification test cases corresponding to the target TLB based on the instantiation processing results corresponding to the heterogeneous TLB underlying encapsulation model and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model. The verification result generation module is used to run the verification test case according to the verification environment corresponding to the target TLB, and obtain the verification result corresponding to the target TLB.

[0007] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the conversion backup buffer verification method according to any embodiment of the present invention.

[0008] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions for causing a processor to execute and implement the conversion backup buffer verification method according to any embodiment of the present invention.

[0009] According to another aspect of the present invention, a computer program product is provided, the computer program product comprising a computer program that, when executed by a processor, implements the conversion backup buffer verification method according to any embodiment of the present invention.

[0010] The technical solution provided in this invention improves the efficiency and accuracy of TLB verification by instantiating a pre-built heterogeneous TLB underlying encapsulation model based on the target TLB's attribute information after receiving a target TLB verification request, constructing a verification environment and verification test cases for the target TLB based on the instantiation result and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model, and running the verification test cases in the verification environment to obtain the verification result for the target TLB.

[0011] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 This is a flowchart of a conversion backup buffer verification method provided according to an embodiment of the present invention; Figure 2 This is a flowchart of another conversion backup buffer verification method provided by an embodiment of the present invention; Figure 3 This is a flowchart of another conversion backup buffer verification method provided by an embodiment of the present invention; Figure 4 This is a schematic diagram of a conversion backup buffer verification device provided according to an embodiment of the present invention; Figure 5 This is a schematic diagram of the structure of an electronic device that implements the conversion backup buffer verification method of the present invention. Detailed Implementation

[0014] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0015] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0016] Figure 1This is a flowchart illustrating a conversion backup buffer verification method provided in an embodiment of the present invention. This embodiment is applicable to verifying the execution logic of a conversion backup buffer. The method can be executed by a conversion backup buffer verification device, which can be implemented in hardware and / or software and configured in an electronic device, such as... Figure 1 As shown, the method includes: Step 110: After receiving the target TLB verification request, instantiate the pre-built heterogeneous TLB underlying encapsulation model according to the target TLB's attribute information.

[0017] In this step, the target TLB can be a TLB to be verified. After receiving the verification request of the target TLB, the attribute information of the target TLB can be obtained, such as the hardware structure attributes, functional behavior attributes and running status attributes of the target TLB. Then, the attribute information of the target TLB is used to instantiate the pre-built heterogeneous TLB underlying encapsulation model.

[0018] In this embodiment, optionally, before receiving the verification request for the target TLB, multiple heterogeneous general-purpose TLBs (i.e., standard TLBs) can be pre-acquired, and then the underlying physical resources corresponding to each standard TLB are uniformly encapsulated to obtain a heterogeneous TLB underlying encapsulation model. The underlying physical resources may include storage units (e.g., virtual page number storage arrays, physical page number storage arrays, and control bit storage arrays), address matching circuits (e.g., address decoders, content-addressable memory), and control logic circuits (e.g., hit detection units, missing detection units, replacement policy execution units, refresh control units, and failure handling units), etc., and this embodiment does not impose limitations on these.

[0019] In one specific implementation, when constructing a heterogeneous TLB underlying encapsulation model, the underlying physical resources corresponding to each standard TLB can be defined as an independent class. The internal state information and control logic information of the physical resources can be encapsulated in the independent class, thereby obtaining a heterogeneous TLB underlying encapsulation framework. Then, a standardized interface for accessing standard TLB functions is built on the heterogeneous TLB underlying encapsulation framework, thereby obtaining a heterogeneous TLB underlying encapsulation model.

[0020] The advantage of this setup is that, upon receiving a verification request from the target TLB, the logical functions of each standard TLB can be accessed simply through the aforementioned standardized interface, thereby constructing the verification scenario corresponding to the target TLB. This reduces the overall learning cost of the target TLB verification process. At the same time, by encapsulating the underlying physical resources of each standard TLB, complete decoupling between physical resources and verification requirements can be achieved, avoiding frequent modifications to the target TLB verification code that could lead to errors in the verification results. This significantly improves the convenience of the target TLB verification process and the accuracy of the verification results.

[0021] Step 120: Based on the instantiation processing results corresponding to the heterogeneous TLB underlying encapsulation model and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model, construct the verification environment and verification test cases corresponding to the target TLB.

[0022] In this embodiment, the logical functions of each standard TLB can be accessed according to the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model, and the verification environment and verification test cases corresponding to the target TLB can be constructed based on the access results and the instantiation processing results corresponding to the heterogeneous TLB underlying encapsulation model.

[0023] The advantage of this setup is that, for each target TLB that triggers a verification request, the corresponding verification environment and verification test cases can be uniformly generated through the access results of the underlying encapsulation model via a standardized interface. That is, when a user triggers different verification requests corresponding to different target TLBs simultaneously, multiple reusable verification environments and verification test cases can be quickly generated through the access results of the underlying encapsulation model via the standardized interface. This avoids the repetitive work caused by manual modeling and test case development for specific TLB structures in existing technologies. Secondly, compared to the existing technology where different verification engineers may use different logic implementation methods and naming conventions to build verification environments, this setup ensures a unified operation process for building verification environments for different TLBs, enabling the reuse of verification methods across projects.

[0024] Step 130: Run the verification test case according to the verification environment corresponding to the target TLB to obtain the verification result corresponding to the target TLB.

[0025] In this embodiment, optionally, after constructing the heterogeneous TLB underlying encapsulation model, an adaptive extension method for the heterogeneous TLB underlying encapsulation model is also provided. That is, when the target TLB structure under test is different from all standard TLB structures, the heterogeneous TLB underlying encapsulation model can be fine-tuned according to the structural information of the target TLB, and the verification environment and verification test cases corresponding to the target TLB can be constructed based on the fine-tuned heterogeneous TLB underlying encapsulation model and standardized interfaces, thereby improving the scalability of the TLB verification method.

[0026] The technical solution provided in this invention improves the efficiency and accuracy of TLB verification by instantiating a pre-built heterogeneous TLB underlying encapsulation model based on the target TLB's attribute information after receiving a target TLB verification request, constructing a verification environment and verification test cases for the target TLB based on the instantiation result and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model, and running the verification test cases in the verification environment to obtain the verification result for the target TLB.

[0027] Figure 2 A flowchart of another conversion backup buffer verification method provided in an embodiment of the present invention is shown below. Figure 2 As shown, the method includes: Step 210: Obtain various physical resources corresponding to various heterogeneous TLBs, and construct an independent class corresponding to each physical resource; the independent class encapsulates the internal state information and control logic information corresponding to the physical resource.

[0028] In this step, specifically, an object-oriented verification language (such as SystemVerilog) can be used to build independent classes for each underlying physical resource corresponding to each standard TLB. For example, a `tlb_entry` class can be built to encapsulate all attributes and basic operation information of a single standard TLB entry; a `plru_policy` class can be built to accurately simulate the replacement algorithm corresponding to the standard TLB, etc.

[0029] Step 220: Based on the preset verification tasks of various types, construct the standardized interface corresponding to each verification task.

[0030] In this step, the verification tasks can be a series of public, implementation-independent verification items, and the standardized interface is used to declare each verification task. For example, a standardized interface `virtual taskcheck_coherency()` can be constructed to declare a verification task that "checks data consistency"; and a standardized interface `functionbit is_translation_valid()` can be constructed to declare a verification task that "determines whether the conversion is valid".

[0031] Step 230: Establish the association between each independent class and each standardized interface, and construct the heterogeneous TLB underlying encapsulation model based on the association.

[0032] Optionally, in this step, a calling relationship can be established between each standardized interface and each independent class, and a heterogeneous TLB underlying encapsulation model can be constructed based on the calling relationship. For example, for the standardized interface compare_translation(), a calling relationship can be established between this interface and the query methods in multiple tlb_entry classes.

[0033] Step 240: After receiving the target TLB verification request, instantiate the standardized interface or independent class in the heterogeneous TLB underlying encapsulation model according to the attribute information of the target TLB.

[0034] Step 250: Connect the instantiated standardized interface or independent class to the input or output port of the target TLB.

[0035] Step 260: Based on the instantiation processing results corresponding to the heterogeneous TLB underlying encapsulation model and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model, construct the verification environment and verification test cases corresponding to the target TLB.

[0036] In this step, specifically, based on the verification request of the target TLB, one or more standardized interfaces corresponding to the underlying encapsulation model of the heterogeneous TLB can be directly called to obtain the verification environment and verification test cases corresponding to the target TLB. During this process, verification engineers do not need to understand the algorithm implementation of the target TLB's underlying physical resources, nor do they need to directly manipulate the target TLB's underlying physical resources, thereby reducing the complexity of the target TLB verification process and improving verification efficiency.

[0037] Step 270: Based on the verification environment corresponding to the target TLB, run the underlying algorithm logic corresponding to the verification test cases in the heterogeneous TLB underlying encapsulation model to obtain the verification logs, verification reports, and coverage data corresponding to different verification metrics for the target TLB.

[0038] The technical solution provided by this invention improves the verification efficiency and accuracy of TLBs by acquiring various physical resources corresponding to multiple heterogeneous TLBs, constructing independent classes for each physical resource, establishing associations between each independent class and each standardized interface, and building a heterogeneous TLB underlying encapsulation model. Upon receiving a target TLB verification request, the standardized interfaces or independent classes in the heterogeneous TLB underlying encapsulation model are instantiated based on the target TLB's attribute information. Based on the instantiation results and the standardized interfaces corresponding to the heterogeneous TLB underlying encapsulation model, a verification environment and verification test cases for the target TLB are constructed. The underlying algorithm logic corresponding to the verification test cases in the heterogeneous TLB underlying encapsulation model is run according to the verification environment of the target TLB, resulting in verification logs, verification reports, and coverage data under different verification metrics for the target TLB.

[0039] Figure 3 A flowchart of another conversion backup buffer verification method provided in an embodiment of the present invention is shown below. Figure 3 As shown, the method includes: Step 310: After receiving the target TLB verification request, if the structural information of the target TLB is different from the structural information of each standard TLB corresponding to the heterogeneous TLB underlying encapsulation model, then obtain the structural difference information between the target TLB and each standard TLB.

[0040] Step 320: Adjust the pre-built heterogeneous TLB underlying encapsulation model based on the structural difference information.

[0041] In one embodiment of this example, the pre-constructed heterogeneous TLB underlying encapsulation model is adjusted according to structural difference information, including: locating the original class in the heterogeneous TLB underlying encapsulation model according to the structural difference information; constructing a new subclass corresponding to the original class; rewriting the new algorithm logic corresponding to the target TLB in the new subclass; and replacing the original class with the new subclass.

[0042] The advantage of this setup is that when the target TLB to be verified has a different structure from each standard TLB, it is not necessary to modify the entire code of the heterogeneous TLB underlying encapsulation model. Instead, the algorithm logic is rewritten only for the new subclasses derived from the independent classes in the model. Throughout the process, the method names and parameter lists of the standardized interface calls at the upper level of the model remain unchanged. This allows the heterogeneous TLB underlying encapsulation model to adapt to the new heterogeneous TLB, improving the model's scalability and reducing the complexity of the target TLB verification process.

[0043] Step 330: Instantiate the adjusted heterogeneous TLB underlying encapsulation model based on the attribute information of the target TLB.

[0044] Step 340: Based on the instantiation processing results corresponding to the heterogeneous TLB underlying encapsulation model and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model, construct the verification environment and verification test cases corresponding to the target TLB.

[0045] Step 350: Run the verification test case according to the verification environment corresponding to the target TLB to obtain the verification result corresponding to the target TLB.

[0046] The technical solution provided in this invention improves the efficiency and accuracy of TLB verification by, upon receiving a target TLB verification request, obtaining structural difference information between the target TLB and each standard TLB if the target TLB's structural information differs from that of the standard TLBs corresponding to the heterogeneous TLB underlying encapsulation model, adjusting the pre-built heterogeneous TLB underlying encapsulation model, instantiating the adjusted heterogeneous TLB underlying encapsulation model based on the target TLB's attribute information, constructing a verification environment and verification test cases corresponding to the target TLB based on the instantiation result and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model, and running the verification test cases in the verification environment corresponding to the target TLB to obtain the verification result.

[0047] Based on the above implementation methods, in order to better explain the technical solution of this embodiment, a memory management unit (MMU) including a three-layer heterogeneous TLB is taken as an example. The MMU may include a Level 1 (L1) instruction TLB, an L1 data TLB, and a Level 2 (L2) TLB. The verification process for the target TLB may include the following steps: First, for the underlying physical resources corresponding to L1 instruction TLB, L1 data TLB, and L2 TLB, a TLB resource class (tlb_resource) is established to encapsulate the common attributes and operations of TLB entries; a standardized interface (standard_tlb_interface) is established to encapsulate standard verification tasks and algorithm functions such as checking translation content (check_translation), triggering faults (trigger_fault), and obtaining cache replacement algorithm status information (get_plru_state); a configurable standardized interface (plru_model) is established to encapsulate the implementation logic of standard replacement strategies, thereby constructing a heterogeneous TLB underlying encapsulation model; Secondly, after triggering the verification request for L1 instruction TLB, L1 data TLB, and L2 TLB, the above-mentioned standard_tlb_interface is instantiated according to the attribute information of each TLB, and the standard interface is connected to the RTL design port; then, the functional interface provided by the standard interface (such as check_translation) is called to construct the unified verification environment and verification test cases corresponding to L1 instruction TLB, L1 data TLB, and L2 TLB. Then, run the unified verification environment and verification test cases described above to obtain the verification results.

[0048] Specifically, the special prefetch buffer strategy designed for L2 TLB does not require modification of the entire heterogeneous TLB underlying encapsulation model. It only requires deriving a new subclass from the standard prefetch base class in the model, rewriting the specific prefetch address prediction algorithm in the new subclass, and then specifying the use of this new subclass when instantiating the L2 TLB verification environment.

[0049] The above implementation method, compared with the existing technology that requires verification engineers to manually build verification environments and write verification test cases for L1 instruction TLB, L1 data TLB and L2 TLB respectively, can solve the problems of difficult verification code maintenance and non-reusability of verification components, reduce the workload of verification engineers, and improve the verification efficiency of heterogeneous TLB and the accuracy of verification results.

[0050] Figure 4 This is a schematic diagram of the structure of a conversion backup buffer verification device provided in an embodiment of the present invention, as shown below. Figure 4 As shown, the device includes: an instantiation processing module 410, a verification test case construction module 420, and a verification result generation module 430.

[0051] The instantiation processing module 410 is used to instantiate the pre-built heterogeneous TLB underlying encapsulation model according to the attribute information of the target TLB after receiving the target TLB verification request. The verification test case construction module 420 is used to construct the verification environment and verification test cases corresponding to the target TLB based on the instantiation processing results corresponding to the heterogeneous TLB underlying encapsulation model and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model. The verification result generation module 430 is used to run the verification test case according to the verification environment corresponding to the target TLB to obtain the verification result corresponding to the target TLB.

[0052] The technical solution provided in this invention improves the efficiency and accuracy of TLB verification by instantiating a pre-built heterogeneous TLB underlying encapsulation model based on the target TLB's attribute information after receiving a target TLB verification request, constructing a verification environment and verification test cases for the target TLB based on the instantiation result and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model, and running the verification test cases in the verification environment to obtain the verification result for the target TLB.

[0053] Based on the above embodiments, the device further includes: The underlying encapsulation model construction module is used to obtain various physical resources corresponding to various heterogeneous TLBs and construct an independent class corresponding to each physical resource. The independent class encapsulates the internal state information and control logic information corresponding to the physical resource. According to various preset verification tasks of different types, a standardized interface corresponding to each verification task is constructed. The association relationship between each independent class and each standardized interface is established, and the heterogeneous TLB underlying encapsulation model is constructed according to the association relationship.

[0054] Instantiation processing module 410 includes: The model instantiation unit is used to instantiate the standardized interfaces or independent classes in the underlying encapsulation model of the heterogeneous TLB according to the attribute information of the target TLB. A port connection unit is used to connect the instantiated standardized interface or independent class to the input port or output port of the target TLB; The model adjustment unit is used to obtain structural difference information between the target TLB and each standard TLB if the structural information of the target TLB is different from the structural information of each standard TLB corresponding to the heterogeneous TLB underlying encapsulation model; and to adjust the pre-constructed heterogeneous TLB underlying encapsulation model according to the structural difference information. The model processing unit is used to instantiate the adjusted heterogeneous TLB underlying encapsulation model based on the attribute information of the target TLB. The original class replacement unit is used to locate the original class in the heterogeneous TLB underlying encapsulation model according to the structural difference information; construct a new subclass corresponding to the original class; rewrite the new algorithm logic corresponding to the target TLB in the new subclass; and replace the original class with the new subclass.

[0055] The verification result generation module 430 includes: The logic execution unit is used to run the underlying algorithm logic corresponding to the verification test cases in the heterogeneous TLB underlying encapsulation model according to the verification environment corresponding to the target TLB, and obtain the verification log, verification report and coverage data corresponding to different verification indicators for the target TLB.

[0056] The above-described apparatus can execute the methods provided in all the foregoing embodiments of the present invention, and has the corresponding functional modules and beneficial effects for executing the above methods. Technical details not described in detail in the embodiments of the present invention can be found in the methods provided in all the foregoing embodiments of the present invention.

[0057] Figure 5 A schematic diagram of an electronic device 10, which can be used to implement embodiments of the present invention, is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0058] like Figure 5 As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) or a random access memory (RAM), communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the read-only memory 12 or loaded from the storage unit 18 into the random access memory 13. The random access memory 13 can also store various programs and data required for the operation of the electronic device 10. The processor 11, the read-only memory 12, and the random access memory 13 are interconnected via a bus 14. Input / output (I / O) interfaces are also connected to the bus 14.

[0059] Multiple components in electronic device 10 are connected to input / output interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of monitors, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0060] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, digital signal processing (DSP) processors, and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as the conversion back buffer verification method.

[0061] In some embodiments, the translation back buffer verification method may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on electronic device 10 via read-only memory 12 and / or communication unit 19. When the computer program is loaded into random access memory 13 and executed by processor 11, one or more steps of the translation back buffer verification method described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform the translation back buffer verification method by any other suitable means (e.g., by means of firmware).

[0062] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-chips (SoCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0063] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0064] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, RAM, ROM, erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0065] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a cathode ray tube (CRT) or a liquid crystal display (LCD)) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0066] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0067] A computing system can include clients and servers. Clients and servers are generally geographically separated and typically interact via communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system. It addresses the shortcomings of traditional physical hosts and Virtual Private Servers (VPS) in terms of management difficulty and weak business scalability.

[0068] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0069] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for verifying a conversion backup buffer, characterized in that, The method includes: Upon receiving the target conversion backup buffer TLB verification request, the pre-built heterogeneous TLB underlying encapsulation model is instantiated based on the target TLB's attribute information. Based on the instantiation processing results corresponding to the heterogeneous TLB underlying encapsulation model and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model, construct the verification environment and verification test cases corresponding to the target TLB. Run the verification test case according to the verification environment corresponding to the target TLB to obtain the verification result corresponding to the target TLB.

2. The method according to claim 1, characterized in that, Before receiving the target TLB verification request, the following is also included: Obtain various physical resources corresponding to multiple heterogeneous TLBs, and construct an independent class for each physical resource; the independent class encapsulates the internal state information and control logic information corresponding to the physical resource; Based on the various preset verification tasks, construct standardized interfaces corresponding to each verification task. Establish the association between each independent class and each standardized interface, and construct the heterogeneous TLB underlying encapsulation model based on the association.

3. The method according to claim 2, characterized in that, Instantiation of the pre-built heterogeneous TLB underlying encapsulation model based on the target TLB's attribute information also includes: Based on the attribute information of the target TLB, the standardized interfaces or independent classes in the underlying encapsulation model of the heterogeneous TLB are instantiated. Connect the instantiated standardized interface or independent class to the input or output port of the target TLB.

4. The method according to claim 1, characterized in that, Run the verification test case according to the verification environment corresponding to the target TLB to obtain the verification result corresponding to the target TLB, including: Based on the verification environment corresponding to the target TLB, the underlying algorithm logic corresponding to the verification test cases in the heterogeneous TLB underlying encapsulation model is run to obtain the verification logs, verification reports, and coverage data corresponding to different verification metrics for the target TLB.

5. The method according to claim 2, characterized in that, Before instantiating the pre-built heterogeneous TLB underlying encapsulation model based on the target TLB's attribute information, the process also includes: If the structural information of the target TLB is different from the structural information of each standard TLB corresponding to the heterogeneous TLB underlying encapsulation model, then obtain the structural difference information between the target TLB and each standard TLB. Based on the structural difference information, the pre-built heterogeneous TLB underlying encapsulation model is adjusted.

6. The method according to claim 5, characterized in that, The pre-built heterogeneous TLB underlying encapsulation model is instantiated based on the target TLB's attribute information, including: Based on the attribute information of the target TLB, the adjusted heterogeneous TLB underlying encapsulation model is instantiated.

7. The method according to claim 5, characterized in that, Based on the structural difference information, the pre-built heterogeneous TLB underlying encapsulation model is adjusted, including: Based on the structural difference information, locate the original class in the heterogeneous TLB underlying encapsulation model; Construct a new subclass corresponding to the original class, rewrite the new algorithm logic corresponding to the target TLB in the new subclass, and replace the original class with the new subclass.

8. A conversion backup buffer verification device, characterized in that, The device includes: The instantiation processing module is used to instantiate the pre-built heterogeneous TLB underlying encapsulation model according to the attribute information of the target TLB after receiving the target TLB verification request. The verification test case construction module is used to construct the verification environment and verification test cases corresponding to the target TLB based on the instantiation processing results corresponding to the heterogeneous TLB underlying encapsulation model and the standardized interface corresponding to the heterogeneous TLB underlying encapsulation model. The verification result generation module is used to run the verification test case according to the verification environment corresponding to the target TLB, and obtain the verification result corresponding to the target TLB.

9. An electronic device, characterized in that, The electronic device includes: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the conversion backup buffer verification method according to any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that cause a processor to execute the conversion backup buffer verification method according to any one of claims 1-7.

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