Dual transformer loaded gain-flattened tunable low noise amplifier

Abstract

This invention belongs to the field of integrated circuit technology and discloses a dual-transformer load-gain-flat tunable low-noise amplifier, including an input matching circuit, a two-stage common-source current-multiplexed amplifier circuit, and an output matching circuit. It also includes a first transformer topology circuit, a second transformer topology circuit, a first adjustable bias voltage source, and a second adjustable bias voltage source. The two-stage common-source current-multiplexed amplifier circuit includes a first-stage common-source amplifier circuit and a second-stage common-source amplifier circuit. The first transformer topology circuit serves as the load for the first-stage common-source amplifier circuit; the second transformer topology circuit serves as the load for the second-stage common-source amplifier circuit. The low-noise amplifier of this invention features high gain, high linearity, and high gain flatness, while achieving a wide tuning range of gain adjustment. Furthermore, it achieves good gain flatness and good input-output matching at different gain adjustment levels.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology and relates to a dual-transformer load gain flat tunable low-noise amplifier. Background Technology

[0002] In radio frequency (RF) receiving systems, low-noise amplifiers (LNAs) are core components located at the very front end of the receiver link. Their noise figure, gain, linearity, and power consumption directly affect the overall performance of the receiver. To improve performance and reduce power consumption, existing technologies often employ methods such as... Figure 1 The low-noise amplifier shown is a two-stage common-source current multiplexing structure.

[0003] like Figure 1 In the circuit shown, from the input terminal V in The incoming RF signal passes through capacitor C5 and inductor L1, entering through the gate of transistor M3. After being amplified by the drain of transistor M3, the signal is blocked by the RF choke L3 and redirected through capacitor C6 to the gate of transistor M4. It then exits through the drain of transistor M4 and exits through capacitor C8. Transistors M3 and M4 form a two-stage common-source amplification structure. Transistor M3 is the first-stage common-source amplification, and transistor M4 is the second-stage common-source amplification. The DC current flowing through transistor M4 is reused by transistor M3, thus achieving higher transconductance and gain at the same current while maintaining the good linearity of the common-source structure. Inductor L5, acting as a peaking inductor, is connected to the drain of transistor M4 to enhance gain.

[0004] However, Figure 1 The circuit structure shown has the following obvious defects in practical applications:

[0005] First, the gain flatness is poor. Because the peaked inductor L5 is used as the load, the circuit will generate a gain peak at a specific frequency, resulting in a non-flat frequency response. The gain fluctuates greatly within the operating frequency band, making it difficult to meet the gain consistency requirements of broadband systems.

[0006] Secondly, there is a serious contradiction between gain tuning and input / output matching. When gain amplitude control is achieved by adjusting the bias voltage VB3, the transconductance of transistors M3 and M4 changes significantly, which in turn alters the input and output impedances of the circuit. This impedance change causes mismatch between the input and output matching networks, introducing additional reflection losses and generating standing waves in the RF link, severely affecting system stability and signal transmission efficiency.

[0007] Therefore, how to achieve a wide tuning range of adjustable gain while maintaining the advantages of high gain, high linearity and low power consumption of the two-stage common-source current reuse structure, and achieve good gain flatness and good input-output matching effect at different gain adjustment levels, has become a technical problem that urgently needs to be solved in this field. Summary of the Invention

[0008] The purpose of this invention is to provide a dual-transformer load gain-flat tunable low-noise amplifier, which has high gain, high linearity, high gain flatness, and a wide tuning range with adjustable gain amplitude, and can achieve good input-output matching effect at different gain adjustment levels.

[0009] To achieve the above objectives, the technical solution adopted by this invention is as follows:

[0010] A dual-transformer load gain flat tunable low-noise amplifier includes an input matching circuit, a two-stage common-source current multiplexing amplifier circuit and an output matching circuit connected in sequence, and also includes a first transformer topology circuit, a second transformer topology circuit, a first adjustable bias voltage source and a second adjustable bias voltage source.

[0011] An input matching circuit is used to receive radio frequency input signals and transmit them to the input terminal of the two-stage common-source current multiplexing amplifier circuit.

[0012] A two-stage common-source current multiplexing amplifier circuit includes a first-stage common-source amplifier circuit and a second-stage common-source amplifier circuit, used to amplify the radio frequency input signal in two stages using common-source amplification.

[0013] Output matching circuit, used to output the amplified RF signal;

[0014] The first transformer topology circuit is used as the load of the first stage common source amplifier circuit and to provide AC ground for the second stage common source amplifier circuit to form a current multiplexing structure, and to provide an injection path for the first adjustable bias voltage source to adjust the gain of the first stage common source amplifier circuit.

[0015] The second transformer topology circuit is used as the load of the second-stage common-source amplifier circuit and provides an injection path for the second adjustable bias voltage source to adjust the gain of the second-stage common-source amplifier circuit.

[0016] As a limitation, the first transformer topology circuit includes a first transformer, a second capacitor, and a first resistor;

[0017] One end of the secondary side of the first transformer is connected to one end of the first resistor, the other end of the first resistor is connected to the input terminal of the first stage common-source amplifier circuit, and the other end of the secondary side of the first transformer is connected to the first adjustable bias voltage source.

[0018] One end of the primary side of the first transformer is connected to the output terminal of the first-stage common-source amplifier circuit, serving as the load of the first-stage common-source amplifier circuit; the other end of the primary side of the first transformer is connected to the common terminal of the second-stage common-source amplifier circuit, serving as AC ground for the second-stage common-source amplifier circuit to form a current multiplexing structure; and the other end of the secondary side of the first transformer is connected to the other end of the primary side of the first transformer through the second capacitor.

[0019] As a further definition, the second transformer topology circuit includes a second transformer and a second resistor;

[0020] One end of the secondary side of the second transformer is connected to the output terminal of the second-stage common-source amplifier circuit, and is used as the load of the second-stage common-source amplifier circuit; the other end of the secondary side of the second transformer is connected to the power supply terminal, and one end of the secondary side of the second transformer is connected to the other end of the secondary side through the second resistor.

[0021] One end of the primary side of the second transformer is connected to the input terminal of the second-stage common-source amplifier circuit, and the other end of the primary side of the second transformer is connected to the second adjustable bias voltage source.

[0022] As a further definition, the first-stage common-source amplifier circuit includes a first transistor and a third capacitor; the second-stage common-source amplifier circuit includes a second transistor.

[0023] The gate of the first transistor is connected to the output of the input matching circuit as the input terminal of the first stage common-source amplifier circuit to receive radio frequency input signals. The gate of the first transistor is also connected to the first resistor. The source of the first transistor is grounded, and the drain of the first transistor is connected to one end of the primary side of the first transformer as the output terminal of the first stage common-source amplifier circuit. The drain of the first transistor is also connected to one end of the third capacitor.

[0024] The gate of the second transistor is connected to one end of the primary side of the second transformer as the input terminal of the second-stage common-source amplifier circuit, and the gate of the second transistor is also connected to the other end of the third capacitor; the drain of the second transistor is connected to one end of the secondary side of the second transformer as the output terminal of the second-stage common-source amplifier circuit, and is also connected to the input terminal of the output matching circuit; the source of the second transistor is connected to the other end of the primary side of the first transformer as the common terminal of the second-stage common-source amplifier circuit.

[0025] As a second limitation, the input matching circuit includes a first capacitor;

[0026] One end of the first capacitor is connected to the input terminal of the first-stage common-source amplifier circuit as the output terminal of the input matching circuit, and the other end of the first capacitor is connected to the radio frequency signal input terminal as the input terminal of the input matching circuit to receive radio frequency input signals.

[0027] As a third limitation, the output matching circuit includes a fourth capacitor;

[0028] One end of the fourth capacitor serves as the input terminal of the output matching circuit and is connected to the output terminal of the second-stage common-source amplifier circuit; the other end of the fourth capacitor serves as the output terminal of the output matching circuit for outputting the amplified radio frequency signal.

[0029] The present invention, by adopting the above-described technical solution, achieves the following technical advancements compared to existing technologies:

[0030] (1) The present invention includes an input matching circuit, a two-stage common-source current multiplexing amplifier circuit and an output matching circuit connected in sequence, and also includes a first transformer topology circuit, a second transformer topology circuit, a first adjustable bias voltage source and a second adjustable bias voltage source; wherein the two-stage common-source current multiplexing amplifier circuit includes a first-stage common-source amplifier circuit and a second-stage common-source amplifier circuit. By connecting the two-stage common-source current multiplexing amplifier circuit to the first transformer topology circuit and the second transformer topology circuit, high gain flatness is further achieved on the basis of the high gain and high linearity brought by the two-stage common-source current multiplexing amplifier circuit.

[0031] (2) The first transformer topology circuit of the present invention is connected to the first adjustable bias voltage source, and the second transformer topology circuit is connected to the second adjustable bias voltage source, which is used to control the gate voltage of the first transistor and the second transistor to change the amplitude and shape of the gain frequency response curve; combined with the high gain flatness characteristics brought by the dual transformer load gain flat tunable low noise amplifier, the gain flat gain amplitude tunable function is realized.

[0032] (3) In this invention, a matching first resistor is connected in series at one end of the secondary side of the first transformer and connected to the gate of the first transistor. A matching second resistor is connected in parallel at one end of the secondary side of the second transformer and connected to the drain of the second transistor. A second capacitor is connected in parallel at one end of the secondary side of the first transformer and one end of the primary side of the first transformer as a DC blocking capacitor. By means of the AC grounding characteristics of the first adjustable bias voltage source, the source of the second transistor is grounded.

[0033] In summary, this invention achieves the advantages of high gain, high linearity, and high gain flatness in low-noise amplifiers, while also realizing a wide tuning range of gain adjustment function, and achieving good gain flatness and good input-output matching effect at different gain adjustment levels. Attached Figure Description

[0034] Figure 1 The diagram shows a circuit diagram of a low-noise amplifier with a two-stage common-source current multiplexing structure in the prior art.

[0035] Figure 2The diagram shown is a circuit diagram of a dual-transformer load gain flat tunable low-noise amplifier according to an embodiment of the present invention.

[0036] Figure 3 The figure shown is a simulation diagram of adjustable gain and gain flatness in an embodiment of the present invention;

[0037] Figure 4 The figure shown is a simulation diagram of input matching at different gear levels according to an embodiment of the present invention;

[0038] Figure 5 The figure shown is a simulation diagram of output matching at different gears in an embodiment of the present invention;

[0039] Figure 6 The figure shown is a simulation diagram of linearity at different gears in an embodiment of the present invention. Detailed Implementation

[0040] To better explain and facilitate understanding of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0041] Example 1: A dual-transformer load-gain-flat tunable low-noise amplifier

[0042] like Figure 1 As shown, this embodiment is a dual-transformer load gain flat tunable low-noise amplifier, including an input matching circuit, a two-stage common-source current multiplexing amplifier circuit and an output matching circuit connected in sequence, and also including a first transformer topology circuit, a second transformer topology circuit, a first adjustable bias voltage source VB1 and a second adjustable bias voltage source VB2.

[0043] The input matching circuit is used to receive the radio frequency input signal and transmit it to the input terminal of the two-stage common-source current multiplexing amplifier circuit.

[0044] A two-stage common-source current multiplexing amplifier circuit, including a first-stage common-source amplifier circuit and a second-stage common-source amplifier circuit, is used to amplify radio frequency input signals through two stages of common-source amplification.

[0045] The output matching circuit is used to output the amplified radio frequency signal.

[0046] The first transformer topology circuit is used as the load of the first-stage common-source amplifier circuit and to provide AC ground for the second-stage common-source amplifier circuit to form a current multiplexing structure, and to provide an injection path for the first adjustable bias voltage VB1 source to adjust the gain of the first-stage common-source amplifier circuit.

[0047] The second transformer topology circuit is used as the load of the second-stage common-source amplifier circuit and provides an injection path for the second adjustable bias voltage source VB2 to adjust the gain of the second-stage common-source amplifier circuit.

[0048] In this embodiment, the first transformer topology circuit includes a first transformer T1, a second capacitor C2, and a first resistor R1; one end P of the secondary side of the first transformer T1 11 One end of the first resistor R1 is connected to the first resistor R1, and the other end of the first resistor R1 is connected to the input terminal of the first stage common-source amplifier circuit, i.e., the gate of the first transistor M1. The other end P of the secondary side of the first transformer T1 is connected to the first resistor R1. 12 Connected to the first adjustable bias voltage source VB1; one end P of the primary side of the first transformer T1 13 The output terminal of the first-stage common-source amplifier circuit is connected to the drain of the first transistor M1; the other end P of the primary side of the first transformer T1 is connected to the drain of the first transistor M1. 14 It is connected to the common terminal of the second-stage common-source amplifier circuit, i.e., the source of the second transistor M2, and the other end P of the secondary side of the first transformer T1. 12 The second capacitor C2 is connected to the other end P of the primary side of the first transformer T1. 14 connect.

[0049] Among them, one end P of the primary side of the first transformer T1 13 The first transistor M1 is connected to its drain and used as the load for the first-stage common-source amplifier circuit; the other end P of the primary side of the first transformer T1... 14 Connected to the source of the second transistor M2, it provides AC ground for the second-stage common-source amplifier circuit to form a current multiplexing structure; one end P of the secondary side of the first transformer T1 11 The gate of the first transistor M1 is connected via the first resistor R1, which facilitates good input matching against gear shifting. The other end P of the secondary side of the first transformer T1... 12 Connected to the first adjustable bias voltage source VB1, it provides an injection path for the first adjustable bias voltage source VB1 to adjust the gain of the first-stage common-source amplifier circuit, eliminating the need for additional bias design. Simultaneously, the drain of the first transistor M1, the primary side of the first transformer T1, the secondary side of the first transformer T1, and the gate of the first transistor M1 form a feedback loop, achieving good input matching and flat gain. Furthermore, the first resistor R1 is connected in series as a matching resistor at one end P of the secondary side of the first transformer T1. 11 Between the gate of the first transistor M1 and the gate of the first transistor, the matching deterioration is addressed when the gain is adjustable; the second capacitor C2 is connected in series between the secondary and primary sides of the first transformer T1 as a DC blocking capacitor to achieve current multiplexing and provide AC ground for the source of the second transistor M2.

[0050] In this embodiment, the second transformer topology circuit includes a second transformer T2 and a second resistor R2; one end P of the secondary side of the second transformer T2... 21 The output terminal of the second-stage common-source amplifier circuit, i.e., the drain of the second transistor M2, is connected to it to serve as the load for the second-stage common-source amplifier circuit; the other end P of the secondary side of the second transformer T2... 22Connected to the power supply terminal VDD, and one end P of the secondary side of the second transformer T2 21 Through the second resistor R2 and the other end P of the secondary side 22 Connection; one end P of the primary side of the second transformer T2 23 The input terminal of the second-stage common-source amplifier circuit is connected to the gate of the two transistors M2, and the other end P of the primary side of the second transformer T2 is connected to the input terminal. 24 Connect to the second adjustable bias voltage source VB2.

[0051] For the second transformer T2, the second resistor R2 is connected in parallel across the secondary side of the second transformer T2 as a matching resistor to solve the matching degradation when the gain is adjustable.

[0052] In this embodiment, the first-stage common-source amplifier circuit includes a first transistor M1 and a third capacitor C3; the second-stage common-source amplifier circuit includes a second transistor M2; the gate of the first transistor M1 serves as the input terminal of the first-stage common-source amplifier circuit and is connected to the output terminal of the input matching circuit for receiving radio frequency input signals; the gate of the first transistor M1 is also connected to a first resistor R1; the source of the first transistor M1 is grounded, and the drain of the first transistor M1 serves as the output terminal of the first-stage common-source amplifier circuit and is connected to one end P of the primary side of the first transformer T1. 13 The drain of the first transistor M1 is also connected to one end of the third capacitor C3; the gate of the second transistor M2 serves as the input terminal of the second-stage common-source amplifier circuit and is connected to one end P of the primary side of the second transformer T2. 23 The gate of the second transistor M2 is also connected to the other end of the third capacitor C3; the drain of the second transistor M2 serves as the output terminal of the second-stage common-source amplifier circuit and is connected to one end P of the secondary side of the second transformer T2. 21 Connect the transistor M2 to the input terminal of the output matching circuit; the source of the second transistor M2 serves as the common terminal of the second-stage common-source amplifier circuit and is connected to the other end P of the primary winding of the first transformer T1. 14 connect.

[0053] The input matching circuit includes a first capacitor C1; one end of the first capacitor C1 serves as the output terminal of the input matching circuit and is connected to the gate of the first transistor M1, and the other end of the first capacitor C1 serves as the input terminal of the input matching circuit and is connected to the radio frequency signal input terminal Vin for receiving radio frequency input signals.

[0054] The output matching circuit includes a fourth capacitor C4; one end of the fourth capacitor C4 serves as the input terminal of the output matching circuit and is connected to the drain of the second transistor M2; the other end of the fourth capacitor C4 serves as the output terminal Vout of the output matching circuit, which is used to output the amplified radio frequency signal.

[0055] In this embodiment, the dual-transformer load gain flat tunable low-noise amplifier enters from the RF signal input terminal Vin during use, and the power supply terminal VDD is a DC power supply. The first adjustable bias voltage source VB1 and the second adjustable bias voltage source VB2 are respectively connected to the adjustable bias voltage, so that the amplified RF signal can be output at the output terminal Vout of the output matching circuit.

[0056] The principle of the dual-transformer load gain flat tunable low-noise amplifier in this embodiment is as follows:

[0057] I. Current reuse

[0058] The RF input signal enters the input matching circuit from the RF signal input terminal Vin, undergoes first-stage common-source amplification via the first transistor M1, and is output from the drain of the first transistor M1. Part of the amplified signal is coupled to the gate of the second transistor M2 through the third capacitor C3 for second-stage amplification, while the other part is input to the first transformer T1. The DC current of the second transistor M2 flows from the drain to the source and then to the P gate of the first transformer T1. 14 Terminal, due to P of the first transformer T1 14 The second transistor M2 is connected to the first adjustable bias voltage source VB1 via the second capacitor C2, thus establishing a stable AC ground for the source of the second transistor M2. At the same time, the DC current flowing through the second transistor M2 also flows through the primary side of the first transformer T1 and is multiplexed by the first transistor M1, thereby forming an efficient two-stage common-source current multiplexing structure.

[0059] Gain flattening is primarily achieved through a dual-transformer load, namely transformer T1 and transformer T2. Transformers T1 and T2 serve as the loads for transistors M1 and M2, respectively. The primary and secondary sides of each transformer form a coupled resonant circuit. Through mutual inductance, they interact to form a second-order system with complex poles. These complex poles determine the frequency response shape of the low-noise amplifier. By adjusting the transformer parameters, these complex poles can be manipulated, thereby achieving gain flattening. The interaction of the two transformers allows for deep adjustment of gain flatness.

[0060] The gain adjustment function is mainly achieved by adjusting the first adjustable bias voltage source VB1 and the second adjustable bias voltage source VB2. By adjusting the first adjustable bias voltage source VB1 and the second adjustable bias voltage source VB2, the gate voltages of the first transistor M1 and the second transistor M2 are controlled, thereby controlling the transconductance and input / output impedance of the entire circuit, ultimately achieving the gain control function. Specifically, the first adjustable bias voltage source VB1 is connected to the P-type gate voltage source of the first transformer T1. 11The terminal is connected to the first resistor R1 and the gate of the first transistor M1 to control the magnitude and curve shape of the gain frequency response of the first-stage common-source amplifier circuit; the second adjustable bias voltage source VB2 is connected to the P of the second transformer T2. 23 The terminal is connected to the gate of the second transistor M2 to control the gain of the second-stage common-source amplifier circuit, and ultimately control the magnitude and curve shape of the overall circuit gain frequency response.

[0061] During the control process, the change in the gate voltage of the first transistor M1 and the second transistor M2 leads to changes in the transconductance of the first transistor M1 and the second transistor M2, ultimately resulting in a deterioration in the input and output matching of the overall circuit. To achieve good input and output matching over a wide tuning range, the topology of the first transformer T1 and the second transformer T2 is modified. Stable parallel impedance components are provided for input and output matching through the first resistor R1 and the second resistor R2, thereby mitigating the impact of the transconductance changes of the first transistor M1 and the second transistor M2 on the overall circuit's input and output matching.

[0062] Meanwhile, for the two-stage common-source current multiplexing basic structure, the source of the second transistor M2 should be AC ​​ground, and the DC current of the second transistor M2 needs to be injected into the P of the first transformer T1. 13 To achieve signal separation and current multiplexing, the structure of the first transformer T1 is modified by using the second capacitor C2, and the first adjustable bias voltage source VB1 is designed at the P terminal of the first transformer T1. 12 At the terminal, the AC grounding of the voltage source is used to realize a two-stage common source current reuse structure, avoiding the need to design the bias circuit repeatedly.

[0063] To verify the dual-transformer load gain-flat tunable low-noise amplifier of this embodiment, Gain0, Gain1, and Gain2 were set as example gain adjustment levels, each corresponding to different gain effects, and the results were obtained. Figures 3-6 The simulation diagram shown.

[0064] Depend on Figure 3 As can be seen, the low-noise amplifier in this embodiment achieves wide-range gain adjustment and has a flat gain curve.

[0065] Depend on Figure 4 As can be seen, the low-noise amplifier in this embodiment achieves stable input matching under different gains (gain tuning), and its input matching is below -10dB at different levels within the wide bandwidth.

[0066] Depend on Figure 5 As can be seen, the low-noise amplifier in this embodiment achieves stable output matching under different gains (gain tuning), and its output matching is below -10dB at different levels within the broadband range.

[0067] Depend on Figure 6 It can be seen that the low-noise amplifier in this embodiment can achieve good high linearity under different gains (gain tuning).

[0068] Simulation results show that the dual-transformer load gain-flat tunable low-noise amplifier in this embodiment achieves gain flatness and adjustability at different levels, while also exhibiting good input-output matching. This dual-transformer load gain-flat tunable low-noise amplifier features high gain, high linearity, and high gain flatness, and also possesses a wide tuning range with adjustable gain amplitude and good input-output matching at different gain adjustment levels.

[0069] It should be noted that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art can still modify the technical solutions described in the above embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A dual-transformer load gain-flat tunable low-noise amplifier, characterized in that, It includes an input matching circuit, a two-stage common-source current multiplexing amplifier circuit and an output matching circuit connected in sequence, as well as a first transformer topology circuit, a second transformer topology circuit, a first adjustable bias voltage source and a second adjustable bias voltage source; An input matching circuit is used to receive radio frequency input signals and transmit them to the input terminal of the two-stage common-source current multiplexing amplifier circuit. A two-stage common-source current multiplexing amplifier circuit includes a first-stage common-source amplifier circuit and a second-stage common-source amplifier circuit, used to amplify the radio frequency input signal in two stages using common-source amplification. Output matching circuit, used to output the amplified RF signal; The first transformer topology circuit is used as the load of the first stage common source amplifier circuit and to provide AC ground for the second stage common source amplifier circuit to form a current multiplexing structure, and to provide an injection path for the first adjustable bias voltage source to adjust the gain of the first stage common source amplifier circuit. The second transformer topology circuit is used as the load of the second-stage common-source amplifier circuit and provides an injection path for the second adjustable bias voltage source to adjust the gain of the second-stage common-source amplifier circuit.

2. The dual-transformer load gain-flat tunable low-noise amplifier according to claim 1, characterized in that, The first transformer topology circuit includes a first transformer, a second capacitor, and a first resistor; One end of the secondary side of the first transformer is connected to one end of the first resistor, the other end of the first resistor is connected to the input terminal of the first stage common-source amplifier circuit, and the other end of the secondary side of the first transformer is connected to the first adjustable bias voltage source. One end of the primary side of the first transformer is connected to the output terminal of the first-stage common-source amplifier circuit, serving as the load of the first-stage common-source amplifier circuit; the other end of the primary side of the first transformer is connected to the common terminal of the second-stage common-source amplifier circuit, serving as AC ground for the second-stage common-source amplifier circuit to form a current multiplexing structure; and the other end of the secondary side of the first transformer is connected to the other end of the primary side of the first transformer through the second capacitor.

3. The dual-transformer load gain-flat tunable low-noise amplifier according to claim 2, characterized in that, The second transformer topology includes a second transformer and a second resistor; One end of the secondary side of the second transformer is connected to the output terminal of the second-stage common-source amplifier circuit, and is used as the load of the second-stage common-source amplifier circuit. The other end of the secondary side of the second transformer is connected to the power supply terminal, and one end of the secondary side of the second transformer is connected to the other end of the secondary side through the second resistor; One end of the primary side of the second transformer is connected to the input terminal of the second-stage common-source amplifier circuit, and the other end of the primary side of the second transformer is connected to the second adjustable bias voltage source.

4. The dual-transformer load gain-flat tunable low-noise amplifier according to claim 3, characterized in that, The first-stage common-source amplifier circuit includes a first transistor and a third capacitor; the second-stage common-source amplifier circuit includes a second transistor. The gate of the first transistor is connected to the output of the input matching circuit as the input terminal of the first stage common-source amplifier circuit to receive radio frequency input signals. The gate of the first transistor is also connected to the first resistor. The source of the first transistor is grounded, and the drain of the first transistor is connected to one end of the primary side of the first transformer as the output terminal of the first stage common-source amplifier circuit. The drain of the first transistor is also connected to one end of the third capacitor. The gate of the second transistor is connected to one end of the primary side of the second transformer as the input terminal of the second-stage common-source amplifier circuit, and the gate of the second transistor is also connected to the other end of the third capacitor; the drain of the second transistor is connected to one end of the secondary side of the second transformer as the output terminal of the second-stage common-source amplifier circuit, and is also connected to the input terminal of the output matching circuit; the source of the second transistor is connected to the other end of the primary side of the first transformer as the common terminal of the second-stage common-source amplifier circuit.

5. The dual-transformer load gain-flat tunable low-noise amplifier according to claim 1, characterized in that, The input matching circuit includes a first capacitor; One end of the first capacitor is connected to the input terminal of the first-stage common-source amplifier circuit as the output terminal of the input matching circuit, and the other end of the first capacitor is connected to the radio frequency signal input terminal as the input terminal of the input matching circuit to receive radio frequency input signals.

6. The dual-transformer load gain-flat tunable low-noise amplifier according to claim 1, characterized in that, The output matching circuit includes a fourth capacitor; One end of the fourth capacitor is connected to the output of the second-stage common-source amplifier circuit as the input of the output matching circuit; the other end of the fourth capacitor is used as the output of the output matching circuit to output the amplified radio frequency signal.

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