A design method of software-based radar data processing component based on VSIPL standard

Abstract

The application relates to the technical field of radar signal processing, in particular to a design method of a software-based radar data processing component based on a VSIPL standard, which comprises the following steps: constructing a layered component model composed of a support library layer, an algorithm logic layer and a memory space management layer; performing algorithm-level granularity division on a radar data processing flow, and decomposing the entire radar data processing flow into multiple algorithm-level modules; designing API interfaces of each function based on the layered component model; using a deep performance optimization strategy based on a VSIPL middleware, and uniformly replacing function functions frequently called in the radar data processing flow into VSIPL standard middleware optimized by a bottom-layer instruction set; and based on the multiple algorithm-level modules and actual reuse requirements, performing secondary aggregation, and encapsulating algorithm-level modules that can be reused into composite components. The method improves the efficiency and real-time performance of radar data processing, enhances the flexibility and expandability of the radar data processing component, and reduces development and maintenance costs.

Description

Technical Field

[0001] The embodiments of this application relate to the field of radar signal processing technology, and in particular to a design method for a software-based radar data processing component based on the VSIPL standard. Background Technology

[0002] Since its inception in the early 20th century, radar technology has undergone profound changes, evolving from mechanical scanning to electronic scanning and then to software-defined radar. In the functional architecture of modern radar systems, the processing flow is typically strictly divided into front-end signal processing and back-end data processing.

[0003] Signal processing primarily involves operations such as pulse compression, beamforming, and clutter suppression. This stage has extremely high data throughput and a well-structured computational architecture, and in current engineering practices, it still widely relies on dedicated hardware such as DSPs or FPGAs for acceleration. Data processing encompasses tasks such as point convergence, target tracking, track association, and management. This stage involves numerous logical branch decisions, complex matrix operations, and dynamic management of multiple target states, and its computational model is more suitable for general-purpose instruction set architectures. Therefore, with the exponential growth of the computing performance of commercial components, radar data processing tasks have gradually shifted from early dedicated boards to running on general-purpose computing platforms (such as high-performance servers and embedded single-board computers).

[0004] Although the operating platform has migrated to general-purpose processors, the lag in software engineering has become a new bottleneck restricting radar performance improvement. Traditional radar data processing software development has long been in a rudimentary stage of "tightly coupled hardware and software." Developers often pursue maximum performance on a single platform, heavily relying on low-level APIs of specific operating systems or proprietary mathematical libraries of specific hardware vendors. This development model results in a lack of portability and scalability in the software code, making it incompatible with cross-platform and cross-operating system requirements. Faced with the demands for radar localization and system upgrades, the closed software architecture leads to extremely low code reuse rates and high maintenance costs throughout the entire lifecycle.

[0005] To address these challenges, the industry has attempted to introduce middleware technology to decouple applications from underlying hardware. In this process, the VSIPL standard was introduced as a middleware specification for high-performance embedded computing. VSIPL provides standardized APIs covering vector, matrix, and signal processing, and is deeply optimized at the underlying level for specific processor instruction sets, particularly utilizing SIMD technology. By calling VSIPL, upper-layer application software can not only achieve seamless cross-platform portability but also automatically obtain computational efficiency close to that of low-level assembly optimization, thus effectively solving the efficiency bottleneck of general-purpose processors when handling large-scale matrix operations.

[0006] However, the inventors of this application have discovered that the application of VSIPL in modern radar systems is mostly limited to local calls, and a complete component-based design methodology based on this standard has not yet been formed, especially in areas such as component layered architecture, unified interface definition, memory management mechanisms, and the construction of composite components, where systematic solutions are lacking. Therefore, there is an urgent need for a design methodology for radar data processing components that balances portability, real-time performance, and flexibility, fundamentally improving the performance and cross-platform adaptability of radar data processing software. Summary of the Invention

[0007] To address the aforementioned technical problems, embodiments of this application propose a design method for a software-based radar data processing component based on the VSIPL standard, aiming to improve the efficiency and real-time performance of radar data processing, enhance the flexibility and scalability of the radar data processing component, and reduce development and maintenance costs.

[0008] To achieve the above objectives, embodiments of this application propose a design method for a software-based radar data processing component based on the VSIPL standard, applicable to different hardware platforms. The method includes the following steps: constructing a layered component model consisting of a support library layer, an algorithm logic layer, and a memory space management layer; the support library layer, located at the bottom layer of the layered component model, is responsible for connecting the upper-layer algorithm logic with the lower-layer heterogeneous hardware resources, providing standardized computing and communication interfaces, and shielding the operating system and instruction set architecture details; the algorithm logic layer is responsible for executing radar data processing tasks and has standardized function sets; the memory space management layer is responsible for resource scheduling and state management during component runtime. The system performs state monitoring; it divides the radar data processing flow into algorithm-level granularity, decomposing the entire process into multiple algorithm-level modules, each responsible for a specific processing task; it designs API interfaces for each function based on a hierarchical component model; it utilizes a deep performance optimization strategy based on VSIPL middleware to uniformly replace frequently called functions in the radar data processing flow with VSIPL standard middleware optimized by the underlying instruction set; and it performs secondary aggregation based on multiple algorithm-level modules and actual reuse requirements, encapsulating reusable algorithm-level modules into composite components to ensure the portability, versatility, and scalability of the radar data processing components.

[0009] To achieve the above objectives, embodiments of this application also propose an electronic device, including a processor and a memory, wherein the memory stores instructions executable by the processor, and the processor is configured to execute the instructions such that the electronic device can implement the design method of a software-based radar data processing component based on the VSIPL standard as described above.

[0010] To achieve the above objectives, embodiments of this application also propose a computer-readable storage medium storing a computer program that, when executed by a processor, enables the implementation of a design method for a software-based radar data processing component based on the VSIPL standard as described above.

[0011] Optionally, the support library layer includes a computing support library and a communication support library; The computation support library adopts the VSIPL standard. VSIPL abstracts the radar data processing process into two core objects: Block objects and View objects. Block objects are responsible for physical memory allocation, alignment, and NUMA node binding, while View objects define the logical structure of the data and serve as the only interface for users to manipulate the data. By binding Block objects and View objects, the computation task and physical storage are decoupled. The VSIPL standard defines a large and complete set of functions, covering all aspects from basic mathematical operations to complex radar processing, including standard function sets for scalars, vectors, matrices, signal processing, and linear algebra. It utilizes the underlying SIMD instruction set for acceleration to ensure efficient function computation. The communication support library adopts a publish / subscribe model, which enables precise location and matching of topic information between components through a centralized information repository, and supports flexible switching of multiple underlying transmission protocols.

[0012] Optionally, in the algorithm logic layer, each function contains six standardized sub-functions: initialization sub-function, parameter acquisition sub-function, parameter setting sub-function, parameter enabling sub-function, algorithm execution sub-function, and destruction sub-function. The properties and parameters of the functions are described using XML. The function encapsulation package contains two types of XML files: property description files and parameter configuration files. The attribute description file is used to describe the identity information and operating environment of the function. It includes the function name, function description and adapted hardware platform information. The parameter configuration file is responsible for defining the initialization parameters required by the internal algorithm of the function, including parameter name, type and format specification.

[0013] Optionally, during the data preprocessing stage, the memory space management layer performs data format conversion between components and functional functions. Based on the input requirements of the functional functions' XML description, it reorganizes, truncates, or concatenates the incoming data and is responsible for the dynamic allocation of buffers during algorithm execution. Simultaneously, it monitors the component status in real time during component execution, including transmission rate, middleware load, functional function execution time, and calculation result verification, achieving transparent supervision of the component's health status. Furthermore, during the lifecycle management stage, it manages the entire process of components from instantiation, readiness, operation, modification to destruction. In particular, during the destruction stage, it implements a strict resource reclamation strategy to prevent memory leaks during long-term operation.

[0014] Optionally, multiple algorithm-level modules include: The data preprocessing module acquires point data from the signal processing end via the UDP protocol, removes clutter and noise points, and parses them into an internal format that the system can process. The point aggregation module is responsible for aggregating the parsed radar point data. Its main function is to merge multiple scattered point data into fewer, more representative points to reduce the amount of data and improve the efficiency of subsequent processing. The nearest neighbor related module is responsible for performing the task of associating and matching points with the existing track database. This module uses the nearest neighbor algorithm to determine the belonging relationship of points by calculating the statistical distance between observed points and predicted tracks, and outputs the pairing information of successfully associated points and tracks and the remaining unassociated points, providing a data basis for subsequent filtering updates. The nearest neighbor correlation module is responsible for processing the remaining traces that are not associated with existing tracks. This module performs correlation analysis between the remaining traces in the current frame and the transient trace library of the previous frame to identify potential new target initiation processes, and triggers subsequent transient track generation or transient trace maintenance processes based on the correlation results. The tracking filtering module is responsible for updating the state of successfully associated tracks. Based on the matrix operation library optimized by the VSIPL standard, this module executes the prediction and update steps of the Kalman filtering algorithm, and recursively calculates the target's motion state vector and error covariance matrix to achieve smooth filtering of the target trajectory and accurate prediction of the state at the next moment. The steady-state track generation module is responsible for the promotion management of the track life cycle. This module performs quality assessment on successfully associated transient tracks, converts transient tracks that meet the criteria into steady-state tracks, and initializes the corresponding track attributes and filtering states. The transient trajectory generation module is responsible for the initial trajectory processing of potential targets. It analyzes the associated transient points and if the preset starting threshold is met, it instantiates a new transient trajectory structure, assigns a temporary trajectory identifier, and establishes an initial motion model. The transient point generation module is responsible for the temporary storage and maintenance of non-associated measurement values. It marks the residual points that are still not matched after relevant processing as transient points and stores them in the transient buffer as candidate inputs for the start of potential targets in the next processing cycle. The steady-state track reporting module is responsible for judging existing steady-state tracks after filtering, and reporting steady-state tracks that meet the reporting conditions; The dot deletion module is responsible for deleting dots that meet the dot deletion conditions; The track erasure module is responsible for deleting tracks that meet the criteria for transient or steady-state track erasure.

[0015] Optionally, for the point-to-point association function, its API interface is: enum ReturnCodeNNDADot_run(IN struct nndadotConfig* RadarFuncConfig,INOUT struct PointInfo*in1,INOUT struct PointTemp* in2,OUT struct AssociatedStruct* out1); The point is associated with the transient point of the previous CPI. If the association is successful, the association information is recorded and stored as an association structure to provide intermediate results for subsequent track processing. The nndadotConfig structure is responsible for providing parameter information, the PointInfo structure serves as the input and output storage space for point information, the PointTemp structure serves as the input and output storage space for transient point information, and the AssociatedStruct structure serves as the input and output storage space for association information.

[0016] Optionally, by employing a deep performance optimization strategy based on VSIPL middleware, at the algorithm implementation level, the frequently called functional functions in the radar data processing flow are statistically analyzed and uniformly replaced with VSIPL standard middleware optimized by the underlying instruction set, in order to reduce code complexity. By leveraging the abstraction capabilities of the VSIPL library on the underlying hardware resources of domestic processors, upper-level mathematical operations are mapped to lower-level SIMD parallel instructions, thereby improving computational efficiency.

[0017] Optionally, the data preprocessing module and the point aggregation module are encapsulated as a preprocessing component, and the track nearest neighbor correlation module, the point nearest neighbor correlation module, the steady-state track generation module, the transient track generation module, and the tracking filtering module are encapsulated as a tracking filtering component.

[0018] The embodiments of this application propose a design method for a software-based radar data processing component based on the VSIPL standard, which has the following advantages compared to traditional software-based radar data processing components.

[0019] First, it improves code portability and maintainability, and reduces costs. Traditional software-based radar data processing components mostly rely on specific platforms, lacking versatility and portability, leading to high development costs and maintenance difficulties. This application designs a layered component model, clearly defining the role and interaction specifications of each layer. Based on this layered component model, a data processing function API interface is designed. Algorithm components with the same function use a unified interface, effectively improving the standardization and high reusability of algorithm components.

[0020] Secondly, it improves the efficiency and real-time performance of radar data processing. This application utilizes the VSIPL calculation middleware, optimized with an optimized underlying instruction set, to perform software-based optimization of the data processing components. Comparative test results show that calling the VSIPL calculation middleware significantly improves the efficiency of its functions, thereby enhancing the real-time performance and efficiency of the radar data processing system.

[0021] Third, the system architecture achieves flexibility through scientific granularity partitioning. Addressing the system rigidity caused by the unreasonable granularity of traditional software-based radar data processing components, this application proposes a method of partitioning by algorithm function. This design ensures clear responsibilities and interfaces for each component, allowing developers to flexibly combine, replace, or configure corresponding algorithm components according to different radar scenarios, quickly build or adjust data processing flows, and enhance the system's adaptability.

[0022] Fourth, the composite component design improves development efficiency and system modularity. Addressing the high demand for functional module reuse in complex systems, this application abstracts composite components above algorithm-level components. This design encapsulates commonly used and fixed processing flows as higher-level building blocks. When building new systems or functions, these composite components can be directly reused, avoiding repeated connections and debugging of underlying algorithm components, reducing repetitive design work, and making the system architecture clearer and more stable. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies of this application will be briefly introduced below. Obviously, the following drawings are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. The drawings described herein are only used to explain this application and are not intended to limit this application.

[0024] Figure 1 This is a flowchart illustrating a design method for a software-based radar data processing component based on the VSIPL standard, provided in one embodiment of this application. Figure 2 This is a schematic diagram of the structure of a layered component model provided in one embodiment of this application; Figure 3 This is a schematic diagram of the hierarchical structure and execution process of functional functions provided in one embodiment of this application; Figure 4 This is a schematic diagram of a data processing flow provided in one embodiment of this application; Figure 5 This is a schematic diagram of the algorithm-level granularity design provided in one embodiment of this application; Figure 6 This is a schematic diagram of the data processing composite component design provided in one embodiment of this application; Figure 7 This is a schematic diagram of the structure of an electronic device provided in another embodiment of this application. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the various embodiments of this application will be described in detail below with reference to the accompanying drawings. Those skilled in the art will understand that many technical details have been presented in the embodiments of this application to facilitate better understanding. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments. The division of the following embodiments is for ease of description and should not constitute any limitation on the specific implementation of this application. The following embodiments can be combined with and referenced by each other without contradiction.

[0026] Currently, the technical solutions for radar data processing can be mainly divided into two categories: "traditional customized systems" and "early software-based component systems," both of which have significant limitations in practical applications.

[0027] Traditional customized radar data processing architecture is currently the mainstream approach. Although the system runs on a general-purpose computer, its design philosophy focuses on "single-point optimization for specific hardware" rather than system-level versatility. Its software adopts a monolithic architecture; although it runs on a general-purpose computer platform, it is developed directly based on a specific operating system and circuit board. The core algorithms heavily utilize non-standard mathematical libraries and lack a unified interface specification.

[0028] Traditional customized radar data processing architectures have two drawbacks.

[0029] First, cross-platform portability is lacking. Due to the absence of middleware isolation, application software and the underlying hardware environment are strongly bound together. When porting across instruction set architectures, extensive modifications to the underlying drivers and mathematical operation layers are required. This closed nature makes it difficult to encapsulate and reuse mature target tracking and correlation algorithms, hindering the iterative accumulation of radar software technology.

[0030] Second, the interfaces are not standardized. There is a lack of industry-standard data interaction protocols between various functional modules (such as track association and Kalman filtering). Interface definitions are often arbitrary, making it difficult to flexibly integrate third-party algorithm components and meet the needs of dynamic algorithm reconstruction in increasingly complex electromagnetic countermeasures environments.

[0031] With the development of software-based radar technology, some research institutions and enterprises have begun to explore software-based radar data processing solutions and attempt to design components based on general-purpose processors. This is the early software-based radar data processing component design, but this design has shortcomings in the scientific division of component granularity.

[0032] Its granularity classification lacks theoretical support and is prone to falling into the trap of being "too coarse" or "too fine".

[0033] The drawbacks of coarse-grained design. Some systems forcibly couple "data association," "state estimation," and "track management" into a single large component. This design leads to complex control flow within the component, making it difficult for the operating system to effectively distribute it across multi-core CPUs for parallel execution. This results in an unbalanced computational load and fails to fully utilize the multi-core parallel advantages of modern processors.

[0034] The drawbacks of fine-grained design. Another type of system blindly pursues modularity, encapsulating even basic matrix operations or simple vector additions as independent components. This results in communication overhead and data copying time between components far exceeding the computation time itself, significantly reducing the system's computation-to-communication ratio and leading to unnecessary processing delays.

[0035] Vectorization optimization is lacking. Although running on general-purpose processors with SIMD extended instruction sets, the algorithm implementations within existing components still largely follow traditional scalar loop patterns. The compiler's ability to automatically vectorize is often limited for complex radar signal processing logic, resulting in data throughput far below the theoretical peak, making it difficult to meet the system's data processing efficiency and real-time requirements.

[0036] It is evident that existing software-based radar data processing components have the following drawbacks.

[0037] First, the code has poor portability and high maintenance costs.

[0038] Existing radar data processing software largely relies on specific underlying environments, lacking versatility and portability. Once the computing platform or operating system changes, the entire data processing software often needs to be redeveloped or undergo extensive underlying modifications, significantly increasing system development costs and extending the development cycle. This application, through a universal design based on the VSIPL standard, achieves seamless portability and high reusability of radar data processing software across different platforms, thereby effectively reducing development and maintenance costs.

[0039] Second, the component granularity is unreasonable.

[0040] Existing technologies lack a scientific basis for granularity division when modularizing data processing flows. Using coarse-grained algorithm-level granularity leads to bloated component functionality and ineffective internal parallelism, while excessively fine granularity introduces significant scheduling and communication overhead due to the surge in the number of components. This blind approach to granularity design is the root cause of system performance bottlenecks. One objective of this application is to establish an optimized design method for component granularity, laying the foundation for improving system performance.

[0041] Third, the system lacks flexibility.

[0042] Unreasonable component granularity directly leads to poor system flexibility. Coarse-grained components result in tight coupling between functional modules and interdependent data interfaces, making it difficult to quickly adjust and refactor the data processing flow according to different task requirements. This application optimizes component granularity, reduces coupling between components, and enables the system to flexibly and quickly adapt to diverse application scenarios.

[0043] Fourth, the real-time performance of data processing is poor.

[0044] Unreasonable component granularity and non-vectorized computation patterns jointly lead to poor real-time performance. Coarse-grained components suffer from low internal serial processing efficiency, while fine-grained components incur high communication overhead. Furthermore, existing designs fail to fully utilize hardware parallel computing capabilities, resulting in high data processing latency that cannot meet the real-time requirements of modern radar. This application, through granularity optimization and the VSIPL high-performance interface, fully leverages the potential of hardware parallelism, significantly improving data processing efficiency and real-time performance.

[0045] The design method of a software-based radar data processing component based on the VSIPL standard proposed in this application is mainly used to achieve the following two objectives.

[0046] First, improve code portability and maintainability.

[0047] Following the VSIPL standard, the data processing components are optimized. Based on a unified API interface standard, the algorithm can be ported and used on different hardware platforms without extensive modifications, improving code maintainability and extensibility. During component implementation, an efficiency-optimized VSIPL computation library is used to replace complex mathematical calculation code, making the algorithm more concise, standardized, accurate, and efficient.

[0048] Second, establish a component granularity optimization design method to improve efficiency.

[0049] Following a modular design approach, radar data processing tasks are decomposed into multiple fine-grained sub-modules, each responsible for a specific processing task, such as signal preprocessing, target detection, and target tracking. Reusable component solutions are further subdivided into composite components. These composite components can be constructed from algorithm-level components (such as point convergence and tracking filtering algorithms) or arithmetic-level components (FFT, vector multiplication, matrix inversion, etc.). This design allows for flexible combination and configuration of components according to different radar scenario requirements, reducing repetitive design work.

[0050] One embodiment of this application proposes a design method for a software-based radar data processing component based on the VSIPL standard, applicable to different hardware platforms. The implementation details of the design method for a software-based radar data processing component based on the VSIPL standard proposed in this embodiment are described in detail below. The following implementation details are provided for ease of understanding and are not necessary for implementing this solution.

[0051] The specific process of the design method for a software-based radar data processing component based on the VSIPL standard proposed in this embodiment can be described as follows: Figure 1 As shown, it includes: Step 11: Construct a layered component model consisting of a support library layer, an algorithm logic layer, and a memory space management layer. The support library layer is located at the bottom layer of the layered component model. It is responsible for connecting the upper-layer algorithm logic with the lower-layer heterogeneous hardware resources, providing standardized computing and communication basic interfaces, and shielding the operating system and instruction set architecture details. The algorithm logic layer is responsible for the execution of radar data processing tasks and has standardized function functions. The memory space management layer is responsible for resource scheduling and status monitoring during component runtime.

[0052] In its specific implementation, the radar data processing component proposed in this embodiment is implemented based on a strictly hierarchical hierarchical component model, such as... Figure 2As shown, this layered component model is divided into a support library layer, an algorithm logic layer, and a memory management layer. The support library layer, located at the bottom, connects the upper-layer algorithm logic with the underlying heterogeneous hardware resources, providing standardized computation and communication interfaces while shielding the details of the operating system and instruction set architecture. The algorithm logic layer is responsible for executing radar data processing tasks and has standardized function sets. The memory management layer is responsible for resource scheduling and status monitoring during component runtime.

[0053] The support library layer includes a computing support library and a communication support library.

[0054] The computational support library adopts the VSIPL standard. VSIPL abstracts the radar data processing process into two core objects: a Block object and a View object. The Block object is responsible for physical memory allocation, alignment, and NUMA node binding, while the View object defines the logical structure of the data (such as step size and offset), serving as the sole interface for user data manipulation. By binding the Block and View objects, computational tasks are decoupled from physical storage. In addition, the VSIPL standard defines a large and complete set of functions, covering everything from basic mathematical operations to complex radar processing. This includes standard function sets in six major categories: scalar, vector, matrix, signal processing, and linear algebra. Acceleration is achieved using the underlying SIMD instruction set, ensuring efficient function computation.

[0055] The communication support library adopts a publish / subscribe model, which enables precise location and matching of topic information between components through a centralized information repository, and supports flexible switching of multiple underlying transmission protocols such as TCP / IP, RapidIO and shared memory.

[0056] The algorithm logic layer is the core business carrier of the layered component model, responsible for executing specific radar data processing tasks. Within the algorithm logic layer, each function contains six standardized sub-functions: initialization (xxx_create), parameter retrieval (xxx_getParameter), parameter setting (xxx_setParameter), parameter enabling (xxx_apply), algorithm execution (xxx_run), and destruction (xxx_destroy). The specific hierarchical structure and execution process of the functional functions are shown in the appendix. Figure 3 As shown, xxx represents the name of the function.

[0057] The properties and parameters of the functions are described using XML. The function encapsulation package contains two types of XML files: property description files and parameter configuration files.

[0058] The attribute description file (xxx_attributes.xml) is used to describe the identity information and runtime environment of the function. The content includes the function name, function description and adapted hardware platform information.

[0059] The parameter configuration file (xxx_Config.xml) is responsible for defining the initialization parameters required by the internal algorithm of the function, including parameter name, type and format specification.

[0060] During the data preprocessing phase, the memory space management layer performs data format conversion between components and functional functions. Based on the input requirements of the functional functions' XML descriptions, it reorganizes, truncates, or concatenates the incoming data and is responsible for the dynamic allocation of buffers during algorithm execution. Simultaneously, it monitors the component status in real time during component execution, including transmission rate, middleware load, functional function execution time, and calculation result verification, achieving transparent supervision of the component's health status. During the lifecycle management phase, it manages the entire process of components from instantiation, readiness, operation, modification to destruction. In particular, during the destruction phase, it implements strict resource reclamation strategies to prevent memory leaks during long-term operation.

[0061] Step 12: Divide the radar data processing flow into algorithm-level granularity, decomposing the entire radar data processing flow into multiple algorithm-level modules, each of which is responsible for a specific processing task.

[0062] In specific implementations, such as Figure 4 As shown, the radar data processing flow is divided into algorithm-level granularity, and the entire radar data processing flow is decomposed into multiple algorithm-level modules, each of which is responsible for a specific processing task.

[0063] In one example, multiple algorithm-level modules include a data preprocessing module, a point aggregation module, a track nearest neighbor correlation module, a point nearest neighbor correlation module, a tracking filtering module, a steady-state track generation module, a transient track generation module, a transient point generation module, a steady-state track reporting module, a point disappearance module, and a track disappearance module.

[0064] The data preprocessing module acquires point data from the signal processing end via the UDP protocol, removes clutter and noise points, and parses them into an internal format that the system can process.

[0065] The DotFusion module is responsible for aggregating the parsed radar dot data. Its main function is to merge multiple scattered dot data into fewer, more representative dot data to reduce the amount of data and improve the efficiency of subsequent processing.

[0066] The TrackAssociationGNN module is responsible for performing the association matching task between points and the existing track database. This module uses the nearest neighbor algorithm to determine the belonging relationship of points by calculating the statistical distance between observed points and predicted tracks, and outputs the successfully associated point-track pairing information and the remaining unassociated points, providing a data basis for subsequent filtering updates.

[0067] The Nearest Neighbor Correlation (NNDADot) module is responsible for processing the remaining traces that are not associated with existing tracks. This module performs correlation analysis between the remaining traces in the current frame and the transient trace library of the previous frame to identify potential new target initiation processes, and triggers subsequent transient track generation or transient trace maintenance processes based on the correlation results.

[0068] The TrackFilterKalman module is responsible for updating the state of successfully associated tracks. Based on the VSIPL standard optimized matrix operation library, this module executes the prediction and update steps of the Kalman filter algorithm, and recursively calculates the target's motion state vector and error covariance matrix to achieve smooth filtering of the target trajectory and accurate prediction of the state at the next moment.

[0069] The steady-state track generation module (Confirmtrack) is responsible for the promotion management of the track lifecycle. This module performs quality assessment on successfully associated transient tracks, converts transient tracks that meet the criteria into steady-state tracks, and initializes the corresponding track attributes and filtering states.

[0070] The Transienttrack module is responsible for the initial processing of potential targets' tracks. It analyzes the associated transient points and, if the preset starting threshold is met, instantiates a new transient track structure, assigns a temporary track identifier, and establishes an initial motion model.

[0071] The transient dot generation module (NewDot) is responsible for the temporary storage and maintenance of non-associated measurement values. It marks residual dots that are still not matched after relevant processing as transient dots and stores them in the transient buffer as candidate inputs for the start of potential targets in the next processing cycle. The steady-state track reporting module (TrackOut) is responsible for judging existing steady-state tracks after filtering, and reporting steady-state tracks that meet the reporting conditions; The PointManager module is responsible for deleting points that meet the criteria for point deletion.

[0072] The TrackManager module is responsible for deleting tracks that meet the criteria for transient or steady-state track deletion.

[0073] The data processing workflow is divided into components, such as... Figure 5 As shown.

[0074] Step 13: Based on the hierarchical component model, design the API interface for each function.

[0075] In the specific implementation, after confirming the data processing flow, the API interfaces of each function can be designed based on the layered component model, as shown in Table 1.

[0076] Table 1: API Interfaces of Data Processing Function Modules

[0077] For the point-to-point association function (taking this as an example), its API interface is: enum ReturnCodeNNDADot_run(IN struct nndadotConfig* RadarFuncConfig,INOUT struct PointInfo*in1,INOUT struct PointTemp* in2,OUT struct AssociatedStruct* out1).

[0078] The point is associated with the transient point of the previous CPI. If the association is successful, the association information is recorded and stored as an association structure to provide intermediate results for subsequent track processing. The nndadotConfig structure is responsible for providing parameter information, the PointInfo structure serves as the input and output storage space for point information, the PointTemp structure serves as the input and output storage space for transient point information, and the AssociatedStruct structure serves as the input and output storage space for association information.

[0079] The structure member variables are shown in Tables 2 and 3, including variable names, data types, and member meanings. The data types are uniformly in accordance with the VSIPL standard, which facilitates subsequent calls to the VSIPL calculation middleware to optimize the function.

[0080] Table 2: List of PointInfo Structure Parameters

[0081] Table 3: Member Variable Table of Related Structures

[0082] Step 14: Using a deep performance optimization strategy based on VSIPL middleware, the frequently called function in the radar data processing flow is uniformly replaced with the VSIPL standard middleware optimized by the underlying instruction set.

[0083] In this implementation, to address the computational bottleneck of traditional radar data processing when dealing with large-scale point patterns, this embodiment employs a deep performance optimization strategy based on the VSIPL middleware. At the algorithm implementation level, the frequently invoked vector calculations and linear algebra operations in the radar data processing flow are statistically analyzed and uniformly replaced with the VSIPL standard middleware optimized for the underlying instruction set. This replacement not only reduces code complexity but, more importantly, leverages the VSIPL library's ability to abstract the underlying hardware resources of domestic processors, mapping upper-level mathematical operations to lower-level SIMD (Single Instruction Multiple Data) parallel instructions, thereby improving computational efficiency.

[0084] Taking the core tracking filtering algorithm in radar data processing as an example, this algorithm involves a large number of state prediction and update operations during execution, including intensive matrix addition, matrix multiplication, and matrix transpose operations. In this embodiment, the algorithm logic was reconstructed by calling the VSIPL standard API interface: vsip_vadd_f was used to perform linear superposition of state vectors, vsip_gemp_f was used to transfer the covariance matrix, and vsip_mtrans_f was used to perform fast matrix transpose. Through the call of these standard interfaces, the rapid prediction and update of the track state at the next moment was achieved, effectively shortening the computation time of a single filter and improving the overall real-time performance of the system. The replacement of VSIPL middleware involved in other function calls has been statistically analyzed and recorded in Table 4.

[0085] Table 4: VSIPL Middleware for Function Calls

[0086] To verify the effectiveness of the above optimization scheme, this embodiment built a simulation test environment based on the Linux operating system. The computation time of each function, both those calling VSIPL library functions and those not calling VSIPL library functions, was recorded by calling a timing function under the Linux operating system. To eliminate jitter errors caused by operating system task scheduling, the test scheme continuously executed each function 100 times and the average time was taken. Simultaneously, to simulate the changes in real radar operating scenarios, the experiment statistically analyzed the specific impact of different numbers of points in a single frame of data (e.g., 100 to 1000 points) on the computation time of each function. Detailed test data are shown in Table 5.

[0087] Table 5: Detailed Test Data

[0088] Test results analysis shows that as the number of input points increases, the execution time of all functions increases, but the execution time of functions that do not call the VSIPL middleware increases at a significantly higher rate than that of the optimized functions. Especially under high load conditions, functions calling the VSIPL computation library exhibit excellent speedup, with a significant improvement in average computational efficiency. This means that in real-world radar applications, facing larger data volumes and more iterations, the optimization scheme in this embodiment can improve the execution efficiency of the data processing flow. In addition to performance improvements, the optimized algorithm code, by removing redundant low-level mathematical logic, has a simpler and clearer structure, greatly enhancing code readability and maintainability.

[0089] Step 15: Based on multiple algorithm-level modules and actual reuse requirements, perform secondary aggregation to encapsulate reusable algorithm-level modules into composite components, ensuring the portability, versatility, and scalability of the radar data processing components.

[0090] In practical implementation, multiple algorithm-level modules can be aggregated again according to actual reuse requirements, and reusable algorithm-level modules can be encapsulated into composite components to ensure the portability, versatility and scalability of radar data processing components.

[0091] In one example, the data preprocessing module and the point aggregation module are encapsulated as a preprocessing component, while the track nearest neighbor correlation module, the point nearest neighbor correlation module, the steady-state track generation module, the transient track generation module, and the tracking filtering module are encapsulated as a tracking filtering component. These two components, along with the reporting component, constitute a composite component, such as... Figure 6 As shown. In this way, while ensuring the portability, versatility, and scalability of the component design, system stability is improved, thereby reducing the overhead of memory and communication resources.

[0092] The design method of a software-based radar data processing component based on the VSIPL standard proposed in this embodiment has the following advantages compared with traditional software-based radar data processing components.

[0093] First, it improves code portability and maintainability, and reduces costs. Traditional software-based radar data processing components mostly rely on specific platforms, lacking versatility and portability, leading to high development costs and maintenance difficulties. This embodiment designs a rigorous layered component model, clearly defining the role and interaction specifications of each layer. Based on this layered component model, a data processing function API interface is designed, allowing algorithm components with the same functionality to use a unified interface, effectively improving the standardization and reusability of algorithm components.

[0094] Secondly, it improves the efficiency and real-time performance of radar data processing. This embodiment calls the VSIPL calculation middleware, which has been optimized with an optimized underlying instruction set, to perform software optimization of the data processing components. Through test result comparison, the efficiency of calling the VSIPL calculation middleware's functions is significantly improved, thereby enhancing the real-time performance and efficiency of the radar data processing system.

[0095] Third, the system architecture achieves flexibility through scientific granularity partitioning. Addressing the system rigidity caused by the unreasonable granularity of traditional software-based radar data processing components, this embodiment proposes a method of partitioning by algorithm function. This design ensures clear responsibilities and interfaces for each component, allowing developers to flexibly combine, replace, or configure corresponding algorithm components according to different radar scenarios, quickly building or adjusting data processing flows, and enhancing the system's adaptability.

[0096] Fourth, the composite component design improves development efficiency and system modularity. Addressing the high demand for functional module reuse in complex systems, this embodiment abstracts composite components above algorithm-level components. This design encapsulates commonly used and fixed processing flows as higher-level "building blocks." When building new systems or functions, these composite components can be directly reused, avoiding repeated connections and debugging of underlying algorithm components, reducing repetitive design work, and making the system architecture clearer and more stable.

[0097] The steps described above are merely for clarity in describing the technical solution. In actual implementation, they can be combined into one step, or certain steps can be broken down into multiple steps, as long as they involve the same logical relationship, they are all within the scope of protection of this application. Any insignificant modifications or designs added to the algorithm or process, as long as they do not change the core of the algorithm or process, are also within the scope of protection of this application.

[0098] This application clearly defines the roles and interaction specifications of each level. Based on the architecture model, a set of data processing function API interfaces was designed, the algorithms were standardized, and a unified interface was used for algorithm components with the same function, effectively improving the standardization and high reusability of algorithm components.

[0099] This application fully leverages the high-performance computing middleware VSIPL, optimized with an optimized underlying instruction set, and improves function algorithms, making function calls more convenient and execution more efficient, effectively enhancing the efficiency of the data processing flow. In real-world radar scenarios, the amount of data is typically very large. The optimized data processing system not only meets the real-time requirements of radar but also facilitates developers in achieving a more rational allocation of overall system resources.

[0100] By dividing the data processing flow into granular parts, this application allows developers to flexibly combine and configure components according to different radar scenario requirements, reducing repetitive design work and showing broad application prospects in various radar systems.

[0101] Software-defined radar, as an evolution of radar technology, inherits the general hardware architecture of digital radar while achieving functional upgrades through heterogeneous computing platforms. Its hardware foundation stems from the modular design of digital radar, providing underlying support for radar task scheduling through heterogeneous processors such as CPUs, GPUs, and FPGAs. Addressing complex and ever-changing application scenarios, software-defined radar, with its reconfigurable hardware platform, standardized component library, and rapid and convenient solution setup, significantly improves the response speed and deployment flexibility of modern radar systems in complex electromagnetic environments by quickly adapting to different task requirements.

[0102] Another embodiment of this application provides an electronic device, such as Figure 7 As shown, it includes a processor 21 and a memory 22. The memory 22 stores instructions that the processor 21 can execute. When the processor 21 is configured to execute the instructions, the electronic device can implement a design method for a software-based radar data processing component based on the VSIPL standard as described in the above method embodiment.

[0103] The memory and processor are connected via a bus, which includes any number of interconnecting buses and bridges, connecting various circuits of one or more processors and the memory. The bus can also connect various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and will not be described further herein. The bus interface provides an interface between the bus and the transceiver. The transceiver can be a single component or multiple components, such as multiple receivers and transmitters, providing a unit for communicating with various other devices over a transmission medium. Data processed by the processor is transmitted over the wireless medium via an antenna, which further receives data and transmits it to the processor.

[0104] The processor manages the bus and general processing, and also provides various functions, including timing, peripheral interfaces, voltage regulation, power management, and other control functions. Memory is used to store data used by the processor during operation.

[0105] Another embodiment of this application proposes a computer-readable storage medium storing a computer program that, when executed by a processor, enables the design method of a software-based radar data processing component based on the VSIPL standard as described in the above method embodiments.

[0106] That is, those skilled in the art will understand that all or part of the steps in the above method embodiments can be implemented by a program instructing related hardware. The program is stored in a storage medium and includes several instructions to cause a device (such as a microcontroller, chip, etc.) or processor to execute all or part of the steps of the method described in the method embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory, random access memory, magnetic disks, or optical disks.

[0107] It will be understood by those skilled in the art that the above embodiments are specific implementations of this application, and various changes in form and detail can be made in practical applications without departing from the spirit and scope of this application. For those skilled in the art, several improvements and modifications can be made without departing from the principles of this application, and these improvements and modifications are also considered to be within the scope of protection of this application.

Claims

1. A design method for a software-based radar data processing component based on the VSIPL standard, applicable to different hardware platforms, characterized in that, The method includes: A layered component model is constructed, consisting of a support library layer, an algorithm logic layer, and a memory space management layer. The support library layer is located at the bottom layer of the layered component model. It is responsible for connecting the upper-layer algorithm logic with the lower-layer heterogeneous hardware resources, providing standardized computing and communication basic interfaces, and shielding the operating system and instruction set architecture details. The algorithm logic layer is responsible for the execution of radar data processing tasks and has standardized function sets. The memory space management layer is responsible for resource scheduling and status monitoring during component runtime. The radar data processing flow is divided into algorithm-level granularity, and the entire radar data processing flow is decomposed into multiple algorithm-level modules, each of which is responsible for a specific processing task. Based on the hierarchical component model, design the API interfaces for each functional function; By utilizing a deep performance optimization strategy based on VSIPL middleware, the frequently called function in the radar data processing flow is uniformly replaced with the VSIPL standard middleware optimized by the underlying instruction set. Based on multiple algorithm-level modules and actual reuse requirements, a secondary aggregation is performed to encapsulate reusable algorithm-level modules into composite components, ensuring the portability, versatility, and scalability of radar data processing components.

2. The design method of a software-based radar data processing component based on the VSIPL standard according to claim 1, characterized in that, The support library layer includes a computing support library and a communication support library; The computation support library adopts the VSIPL standard. VSIPL abstracts the radar data processing process into two core objects: Block objects and View objects. Block objects are responsible for physical memory allocation, alignment, and NUMA node binding, while View objects define the logical structure of the data and serve as the only interface for users to manipulate the data. By binding Block objects and View objects, the computation task and physical storage are decoupled. The VSIPL standard defines a large and complete set of functions, covering all aspects from basic mathematical operations to complex radar processing, including standard function sets for scalars, vectors, matrices, signal processing, and linear algebra. It utilizes the underlying SIMD instruction set for acceleration to ensure efficient function computation. The communication support library adopts a publish / subscribe model, which enables precise location and matching of topic information between components through a centralized information repository, and supports flexible switching of multiple underlying transmission protocols.

3. The design method of a software-based radar data processing component based on the VSIPL standard according to claim 2, characterized in that, In the algorithm logic layer, each function contains six standardized sub-functions: initialization sub-function, parameter retrieval sub-function, parameter setting sub-function, parameter enabling sub-function, algorithm execution sub-function, and destruction sub-function. The properties and parameters of the functions are described using XML. The function encapsulation package contains two types of XML files: property description files and parameter configuration files. The attribute description file is used to describe the identity information and operating environment of the function. It includes the function name, function description and adapted hardware platform information. The parameter configuration file is responsible for defining the initialization parameters required by the internal algorithm of the function, including parameter name, type and format specification.

4. The design method of a software-based radar data processing component based on the VSIPL standard according to claim 3, characterized in that, During the data preprocessing phase, the memory space management layer performs data format conversion between components and functional functions. Based on the input requirements of the functional functions' XML descriptions, it reorganizes, truncates, or concatenates the incoming data and is responsible for the dynamic allocation of buffers during algorithm execution. Simultaneously, it monitors the component status in real time during component execution, including transmission rate, middleware load, functional function execution time, and calculation result verification, achieving transparent supervision of the component's health status. During the lifecycle management phase, it manages the entire process of components from instantiation, readiness, operation, modification to destruction. In particular, during the destruction phase, it implements strict resource reclamation strategies to prevent memory leaks during long-term operation.

5. The design method of a software-based radar data processing component based on the VSIPL standard according to claim 1, characterized in that, Multiple algorithm-level modules include: The data preprocessing module acquires point data from the signal processing end via the UDP protocol, removes clutter and noise points, and parses them into an internal format that the system can process. The point aggregation module is responsible for aggregating the parsed radar point data. Its main function is to merge multiple scattered point data into fewer, more representative points to reduce the amount of data and improve the efficiency of subsequent processing. The nearest neighbor related module is responsible for performing the task of associating and matching points with the existing track database. This module uses the nearest neighbor algorithm to determine the belonging relationship of points by calculating the statistical distance between observed points and predicted tracks, and outputs the pairing information of successfully associated points and tracks and the remaining unassociated points, providing a data basis for subsequent filtering updates. The nearest neighbor correlation module is responsible for processing the remaining traces that are not associated with existing tracks. This module performs correlation analysis between the remaining traces in the current frame and the transient trace library of the previous frame to identify potential new target initiation processes, and triggers subsequent transient track generation or transient trace maintenance processes based on the correlation results. The tracking filtering module is responsible for updating the state of successfully associated tracks. Based on the matrix operation library optimized by the VSIPL standard, this module executes the prediction and update steps of the Kalman filtering algorithm, and recursively calculates the target's motion state vector and error covariance matrix to achieve smooth filtering of the target trajectory and accurate prediction of the state at the next moment. The steady-state track generation module is responsible for the promotion management of the track life cycle. This module performs quality assessment on successfully associated transient tracks, converts transient tracks that meet the criteria into steady-state tracks, and initializes the corresponding track attributes and filtering states. The transient trajectory generation module is responsible for the initial trajectory processing of potential targets. It analyzes the associated transient points and if the preset starting threshold is met, it instantiates a new transient trajectory structure, assigns a temporary trajectory identifier, and establishes an initial motion model. The transient point generation module is responsible for the temporary storage and maintenance of non-associated measurement values. It marks the residual points that are still not matched after relevant processing as transient points and stores them in the transient buffer as candidate inputs for the start of potential targets in the next processing cycle. The steady-state track reporting module is responsible for judging existing steady-state tracks after filtering, and reporting steady-state tracks that meet the reporting conditions; The dot deletion module is responsible for deleting dots that meet the dot deletion conditions; The track erasure module is responsible for deleting tracks that meet the criteria for transient or steady-state track erasure.

6. The design method of a software-based radar data processing component based on the VSIPL standard according to claim 1, characterized in that, For the point-to-point association function, its API interface is: enum ReturnCode NNDADot_run(IN struct nndadotConfig* RadarFuncConfig,INOUT struct PointInfo* in1,INOUT struct PointTemp* in2,OUT struct AssociatedStruct* out1); The point is associated with the transient point of the previous CPI. If the association is successful, the association information is recorded and stored as an association structure to provide intermediate results for subsequent track processing. The nndadotConfig structure is responsible for providing parameter information, the PointInfo structure serves as the input and output storage space for point information, the PointTemp structure serves as the input and output storage space for transient point information, and the AssociatedStruct structure serves as the input and output storage space for association information.

7. The design method of a software-based radar data processing component based on the VSIPL standard according to claim 1, characterized in that, By employing a deep performance optimization strategy based on VSIPL middleware, at the algorithm implementation level, the frequently called functional functions in the radar data processing flow are statistically analyzed and uniformly replaced with VSIPL standard middleware optimized by the underlying instruction set to reduce code complexity. By leveraging the abstraction capabilities of the VSIPL library for the underlying hardware resources of domestic processors, upper-level mathematical operations are mapped to lower-level SIMD parallel instructions, thereby improving computational efficiency.

8. The design method of a software-based radar data processing component based on the VSIPL standard according to claim 1, characterized in that, The data preprocessing module and the point aggregation module are encapsulated as a preprocessing component, and the track nearest neighbor correlation module, the point nearest neighbor correlation module, the steady-state track generation module, the transient track generation module, and the tracking filtering module are encapsulated as a tracking filtering component.

9. An electronic device, characterized in that, include: A processor and a memory, wherein the memory stores instructions executable by the processor, and the processor is configured to, when executing the instructions, enable the electronic device to implement a design method for a software-based radar data processing component based on the VSIPL standard as described in any one of claims 1 to 8.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it can implement the design method of a software-based radar data processing component based on the VSIPL standard as described in any one of claims 1 to 8.

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