A multi-dimensional reconfigurable band-pass filter chip

Abstract

The application discloses a multi-dimensional reconfigurable band-pass filter chip, comprising a voltage driving unit, a current driving unit, an LC resonance network and an adjustable negative resistance network; the chip is based on the impedance-adjustable LC resonance network, constructs a novel band-pass filter architecture driven by voltage and current, realizes multi-dimensional adjustment of the center frequency, bandwidth and gain of the band-pass filter and improvement of out-of-band roll-off through voltage-controlled adjustment of the varactor, LC cascade resistance, LC parallel negative resistance and source degeneration resistance, independently feeds the improved negative resistance network, realizes signal coupling as AC coupling, realizes power consumption configuration of the filter for signal amplitude, and meets the efficient filtering requirements of the receiver in various scenes.

Description

Technical Field

[0001] This invention belongs to the field of filter technology in radio frequency links, and specifically relates to a multi-dimensional reconfigurable bandpass filter chip. Background Technology

[0002] In recent years, tunable filters have been widely used to suppress interference signals in broadband transceiver channels, especially in emerging integrated RF links. Tunable filter chips can flexibly configure the filter's center frequency, bandwidth, and even gain according to different task requirements to more accurately suppress spurious signals in the RF channel. Furthermore, compared to board-level or microwave block filters, filter chips, due to their small size and ease of integration, are more likely to meet the miniaturization requirements of devices.

[0003] Commonly used filter architectures for on-chip integrated filters include N-path filters, active filters, multi-channel switched passive filters, and Q-factor enhanced LC (inductor-capacitor) filters. N-path filters utilize a multi-path switching structure to map the baseband low-pass characteristics to the RF section, exhibiting bandpass characteristics in the RF section. Their center frequency and clock frequency are adjustable, and their bandwidth is consistent with that of the baseband low-pass filter. Because their multi-path switching structure also possesses mixing characteristics, N-path filters are often used in Mixer-First receiver architectures. However, N-path filters rely on the local oscillator signal for frequency switching, and the speed of the frequency synthesizer determines the frequency hopping time. Furthermore, N-path filters require high-performance multi-phase clock generation circuitry, and additional current combining circuitry is needed to suppress odd harmonics; signal distortion caused by clock edges is also unavoidable.

[0004] Active filters typically employ a core of a programmable gain amplifier and a multi-order bandpass filter, utilizing programmable resistor and capacitor arrays to alter the center frequency and bandwidth. However, the GBW (gain-bandwidth product) of operational amplifiers limits the filter's ability to extend to higher frequencies. For example, the BPF (bandpass filter) bandwidth in operational amplifiers based on INP (indium phosphide) / SI (semi-insulating) BICMOS (bipolar complementary metal-oxide-semiconductor) is limited to <3GHz, and the bandwidth of commonly used CMOS (complementary metal-oxide-semiconductor) processes is further reduced.

[0005] Passive BPFs are commonly used in traditional radio front-ends due to their high linearity. To accommodate changes in operating frequency, multi-channel passive filter banks that rely on single-ended multiple single-pole multiple-throw switches are also a common solution. For example, the ADMV8818 chip from Analog Devices (ADI) can implement numerically controlled low-pass, high-pass, and band-pass filters from 2 to 18 GHz. However, their disadvantages are quite obvious: the insertion loss and out-of-band rejection of passive filters are contradictory, and the inductors in high-order filters occupy a large on-chip area. Nevertheless, due to the simple and stable structure of passive filters, they remain one of the solutions for ultra-wideband filtering.

[0006] Multidimensional reconfigurable bandpass filters utilize negative resistance networks to compensate for LC resonant network losses, thereby enhancing the frequency selectivity of the passband. Typically, a parallel voltage / current driven LC resonant network is employed, with fixed-voltage fed cross-coupled MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) used as negative resistors to enhance Q-value. MOS capacitors are used to change the resonant frequency of the LC network. However, for small-swing signal inputs, the negative resistance network still requires a large quiescent current, leading to increased power consumption. Furthermore, with a fixed feed, when the negative resistance is small, the fixed feed causes a surge in current within the negative resistance network circuitry. Summary of the Invention

[0007] In view of the above, the present invention provides a multi-dimensional reconfigurable bandpass filter chip that can satisfy the adjustment of the passband bandwidth, passband gain and center frequency of the bandpass filter, and solves the problem that existing filters have few tunable dimensions and low Q value of the devices in the chip, resulting in slow out-of-band roll-off of the filter.

[0008] A multi-dimensional reconfigurable bandpass filter chip, comprising: The voltage drive unit uses an emitter follower circuit to drive and amplify the differential voltage input signal, and then outputs it to the LC resonant network in the same phase. The current drive unit uses a common-source amplifier circuit to drive and amplify the differential voltage input signal, and then outputs it to the LC resonant network in opposite phase. An LC resonant network is used to perform tunable filtering on the output signals of the voltage drive unit and the current drive unit to generate a differential voltage output signal. An adjustable negative resistance network is used to cancel the parasitic impedance of an LC resonant network and improve the quality factor of the LC resonant network.

[0009] Furthermore, the voltage driving unit includes two emitter follower transistors Q1 and Q2 and two emitter follower DC sources I. DC1 and I DC2In this configuration, the collectors of Q1 and Q2 are connected to the power supply voltage, the base of Q1 is connected to a non-inverting voltage input signal, the base of Q2 is connected to an inverting voltage input signal, and the emitter of Q1 is connected to I... DC1 The input terminal of Q2 is connected to I and serves as the non-inverting output signal terminal of the voltage drive unit. The emitter of Q2 is connected to I. DC2 The input terminal is connected and serves as the inverting output signal terminal of the voltage drive unit, I DC1 and I DC2 The output terminal is grounded.

[0010] Furthermore, the current drive unit includes two common-source amplifier transistors Q3 and Q4, a gain control MOSFET M5, and two source degradation resistors R. S1 and R S2 and a gain resistor R G In this configuration, the collector of Q3 serves as the non-inverting output signal terminal of the current drive unit, the collector of Q4 serves as the inverting output signal terminal of the current drive unit, the base of Q4 is connected to the non-inverting voltage input signal, and the base of Q3 is connected to the inverting voltage input signal. The emitter of Q3 is connected to one end of M5 and R. G one end and R S1 One end of Q4 is connected to the other end of M5, and R is connected to the emitter of Q4. G The other end and R S2 One end is connected, R S1 and R S2 The other end is grounded, and the gate of M5 is connected to the gain control signal Vg.

[0011] Furthermore, the LC resonant network includes two inductors L1 and L2, two variable capacitors C1 and C2, and two low-Q resistors R. C1 and R C2 And two low-resistance control MOSFETs M1 and M2, wherein one end of M1 is connected to R C1 One end of M2 is connected to the non-inverting output signal terminal of the voltage drive unit, and one end of M2 is connected to R. C2 One end of M1 is connected to the inverted output signal terminal of the voltage drive unit, and the other end of M1 is connected to R. C1 The other end of M2 is connected to one end of L1, one end of C1, the positive output signal terminal of the current drive unit, and the positive input terminal of the adjustable negative resistor network to generate a positive voltage output signal. The other end of M2 is connected to R. C2 The other end of L1, one end of L2, one end of C2, the inverted output signal terminal of the current drive unit, and the inverted input terminal of the adjustable negative resistor network are connected to generate an inverted voltage output signal. The gates of M1 and M2 are connected to the low Q value control signal Vc. The other end of L1 is connected to the other end of L2 and connected to the emitter of the voltage control transistor Q9. The collector and base of Q9 are both connected to the power supply voltage. The other end of C1 is connected to the other end of C2 and connected to the center frequency control signal Vf.

[0012] Furthermore, the variable capacitors C1 and C2 are super-abrupt junction varactor diodes.

[0013] Furthermore, the differential voltage input signals are connected in series with a matching resistor R at the signal input port. I1 and R I2 , where R I1 One end is connected to a positive voltage input signal, R I1 The other end and R I2 One end is connected to the power supply voltage, R I2 The other end is connected to an inverting voltage input signal. The signal input port matching resistor is used to reduce input signal reflection loss and ensure that most of the signal energy enters the filter circuit.

[0014] Furthermore, the adjustable negative resistance network includes fixed negative resistance transistors Q5 and Q6, and a fixed resistor R. X1 and R X2 Adjustable negative resistance transistors Q7 and Q8, adjustable resistor R Y1 and R Y2 And negative resistance controlled MOSFETs M3 and M4, where the collector of Q5 is connected to the base of Q6 and the collector of Q7 as the inverting input of the adjustable negative resistance network, and the collector of Q6 is connected to the base of Q5 and the collector of Q8 as the non-inverting input of the adjustable negative resistance network. The emitter of Q5 is connected to R... X1 One end of Q1 is connected to the base of Q7, and the emitter of Q6 is connected to R. X2 One end is connected to the base of Q8, R X1 and R X2 The other end is grounded, and the emitter of Q7 is connected to R. Y1 One end of Q8 is connected to one end of M3, and the emitter of Q8 is connected to R. Y2 One end is connected to one end of M4, R Y1 The other end is connected to the other end of M3 and grounded, R Y2 The other end of M3 is connected to the other end of M4 and grounded. The gates of M3 and M4 are connected to the high Q value control signal Vy.

[0015] Furthermore, the adjustable negative resistance network includes fixed negative resistance transistors Q5 and Q6, and a fixed resistor R. X1 and R X2 Adjustable negative resistance transistors Q7 and Q8, adjustable resistor R Y1 and R Y2 Negative resistance controls MOSFETs M3 and M4, and resistor R. A1 and R A2 and capacitor C A1 and C A2 The collector of Q5 is connected to C. A1One end of Q1 is connected to the collector of Q7 as the inverting input of the adjustable negative resistor network, and the collector of Q6 is connected to C. A2 One end of Q5 is connected to the collector of Q8 as the positive input terminal of the adjustable negative resistor network, and the base of Q5 is connected to the collector of C. A2 The other end and R A1 One end is connected, and the base of Q6 is connected to C. A1 The other end and R A2 One end is connected, R A1 The other end and R A2 The other end is connected in parallel to an adjustable bias voltage V. N The emitter of Q5 and R X1 One end of Q1 is connected to the base of Q7, and the emitter of Q6 is connected to R. X2 One end is connected to the base of Q8, R X1 and R X2 The other end is grounded, and the emitter of Q7 is connected to R. Y1 One end of Q8 is connected to one end of M3, and the emitter of Q8 is connected to R. Y2 One end is connected to one end of M4, R Y1 The other end is connected to the other end of M3 and grounded, R Y2 The other end of M3 is connected to the other end of M4 and grounded. The gates of M3 and M4 are connected to the high Q value control signal Vy.

[0016] Furthermore, the fixed negative resistance transistors Q5 and Q6 are high-frequency transistors with high cutoff frequencies, and the adjustable negative resistance transistors Q7 and Q8 are high-breakdown transistors with high breakdown voltages.

[0017] This invention overcomes the technical bottleneck of existing Q-enhanced filters, achieving a balance between linearity and gain. In particular, it can reduce power consumption under small-signal conditions through configurable filters. Specific innovations and beneficial technical effects are reflected in the following aspects: 1. This invention uses a scheme that simultaneously drives a reconfigurable LC resonant network with voltage and current, and the dual-drive mode ensures a balance between the linearity and gain of the filter.

[0018] 2. This invention uses AC coupling to access the reconfigurable LC resonant network, so that the individually fed negative resistance network has the same tunable range of negative resistance under different voltage feeding conditions.

[0019] 3. This invention uses varactor transistors, MOS-controlled resistors and negative resistance networks, and MOS-controlled source-level degradation resistors to reconstruct filter performance in multiple dimensions. Attached Figure Description

[0020] Figure 1This is a schematic diagram of the circuit architecture of the bandpass filter chip of the present invention.

[0021] Figure 2 The diagram shows the structure of an adjustable negative resistance network. In the diagram, (a) corresponds to the circuit under fixed bias and (b) corresponds to the circuit under adjustable bias.

[0022] Figure 3 This diagram illustrates the relationship between the input power Pin and the passband gain Gain of the bandpass filter under different power feeding conditions in this embodiment.

[0023] Figure 4 The negative resistance R under different power supply states in this embodiment N With control voltage V Y A diagram illustrating the relationship between the two.

[0024] Figure 5 The center frequency of the reconfigurable bandpass filter in this embodiment fc Configurable diagram.

[0025] Figure 6 The bandwidth of the reconfigurable bandpass filter in this embodiment BW Configurable diagram. Detailed Implementation

[0026] To describe the present invention in more detail, the technical solution of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0027] This embodiment provides a reconfigurable Q-value enhanced LC bandpass filter employing a cross-coupled AC negative resistor network, including: a voltage driving unit, a current driving unit, an LC resonant network, an adjustable negative resistor network, and a signal input port matching resistor R. I And voltage control transistor Q9, such as Figure 1 As shown: The voltage drive unit includes a voltage drive section, emitter follower circuit transistors Q1 and Q2, and an emitter follower DC source I. DC An emitter follower circuit can output the signal in phase to an LC resonant network. The differential input signal is directly applied to the input resistor R. I The two ends of the circuit are connected, with the middle tap position serving as an equivalent ground to the power supply section; the bases of voltage-driven transistor Q1 and current-driven transistor Q3 are connected to one end of the input resistor, and the bases of voltage-driven transistor Q2 and current-driven transistor Q4 are connected to the other end of the input resistor; since the bases of the driving transistors can be considered open circuits, the differential input resistor R connected in parallel... I It can be used alone for impedance matching. The signal input port matching resistor R at the initial signal input port. IPrimarily used for impedance matching of RF signal input, it reduces input signal reflection loss and ensures that most signal energy enters the filter circuit.

[0028] The current drive unit includes common-source amplifier transistors Q3 and Q4, and gain resistor R. G Gain control MOSFET M5 and source degradation resistor R S A common-source amplifier circuit can output the output signal to an LC resonant network in opposite phase.

[0029] The voltage and current drive units are connected in parallel. The voltage drive gain is kept below 0dB, resulting in a poor noise figure; the current drive gain is relatively large, offering better noise performance, but its linearity is poor. The differential signal is effectively improved in terms of linearity and noise performance of the bandpass filter through the parallel voltage and current drives. The load of the voltage and current drive circuit is a low-Q control resistor R. C The structure consists of a series-parallel connection of an LC resonant network and an adjustable negative resistor, where the low-Q control resistor R... C Compared to voltage-driven circuits which are connected in series, and current-driven circuits which are connected in parallel, the signals output from the two driving units to the LC resonant network can be amplitude-adjusted, thereby changing the amplitude of the output signal and achieving gain control of the filter.

[0030] An LC resonant network consists of an inductor L, a variable capacitor C, and a low-Q resistor R. C An LC resonant network can perform tunable filtering on the output signals of voltage-driven and current-driven circuits.

[0031] The adjustable negative resistance network includes fixed negative resistance transistors Q5 and Q6 and a fixed resistor R. X Adjustable negative resistance transistors Q7 and Q8 and adjustable resistor R Y Along with control transistors M3 and M4, the negative resistance network is mainly used to cancel the parasitic impedance of the LC resonant network and improve the quality factor of the resonant network.

[0032] The voltage control transistor Q9 is mainly used to reduce the voltage drop in the negative resistance network and to provide bias current for the transistors in the negative resistance network.

[0033] A negative resistance network can compensate for the losses of an LC resonant network, improve the Q value of the resonant network, and achieve high roll-off out-of-band rejection capability. Its circuit structure is as follows: Figure 2 As shown in (a), transistors Q5 and Q6 and resistor R in the adjustable negative resistance network X Provide a fixed negative resistor, transistors Q7, Q8 and R Y It provides adjustable negative resistance; transistors Q5 and Q6 are connected in a cross-coupling manner, while Q5 and Q7 are connected in a Darlington transistor configuration.

[0034] When the adjustable negative resistor network uses a fixed bias, i.e., the power supply voltage is stepped down to 2.4V through control transistor Q9 and then directly supplies power to the negative resistor, the circuit's quiescent operating point voltage is: V C5 =V B5 =V C7 =2.4V, U BE ≈0.85V; Due to the Darlington connection method, the voltage of Q5 and Q6 is approximately 0.85V. CEQ It is approximately 0.85V, while the U of Q7 and Q8 is... CEQ The voltage exceeds 1.7V. Therefore, high-frequency transistors with high cutoff frequencies can be selected for Q5 and Q6, while for Q7 and Q8, 1.7V exceeds the breakdown voltage of high-frequency transistors. In order to ensure stable circuit operation, high-breakdown transistors can be used.

[0035] The adjustable negative resistance architecture addresses the issue that the negative resistance network still requires a large quiescent current when receiving small-swing signals, leading to increased power consumption. This embodiment makes the following adjustments to the negative resistance network, and its circuit structure is as follows: Figure 2 As shown in (b), the bases of the cross-coupled transistors Q5 and Q6 use AC coupling instead of DC coupling, and their bias voltage is a variable voltage Vn to ensure the normal operation of Q5 and Q8. By adjusting the bias voltage Vn, V' can be adjusted. B5 The voltage at the setting is adjustable from 1.8V to 2.4V. The relationship between the gain within the passband of the bandpass filter and the input power of the filter under different control voltages is as follows: Figure 3 As shown, the relationship between negative resistance and control voltage under different power supply states is as follows: Figure 4 As shown.

[0036] The reconfigurable Q-enhanced LC bandpass filter in this embodiment allows for adjustment of its center frequency, gain, and bandwidth. The center frequency adjustment is achieved using an LC resonant network consisting of a variable capacitor and a fixed inductor. Bandwidth expansion is achieved by adjusting the low-Q resistor R. C The gate voltages of parallel MOSFETs M1 and M2 are used to achieve this, along with a low-Q resistor R. C As a series-parallel impedance in the resonant network, its function is to reduce the Q value of the resonant network, thereby increasing the filter bandwidth. Filter bandwidth compression is achieved by adjusting the gate voltages of M3 and M4 in the negative resistance network. The adjustable negative resistance network, acting as a parallel impedance in the resonant network, increases the Q value of the resonant network, thus reducing the filter bandwidth. Filter gain control is achieved by adjusting the gate voltage of M5 in the current-driven network, with the gain resistor R... G With source degradation resistor R S Parallel connection, source-level degradation resistor R S Its function is to reduce the gain of the current-driven network, and reducing the source-level degradation resistance can effectively increase the gain within the filter's passband.

[0037] The capacitor C in the LC resonant network uses a Havar varactor diode. By applying an external digital voltage, the resonant frequency of the LC filter network can be changed, thereby achieving center frequency control of the bandpass filter. The effect is as follows: Figure 5 As shown.

[0038] The LC resonant network uses a low-Q resistor R C The impedance of the LC resonant network and the negative resistance provided by the negative resistance circuit are used to adjust the Q value of the resonator through the external control voltages of M1, M2, M3, and M4, thereby achieving bandwidth adjustment of the bandpass filter. The effect is as follows: Figure 6 As shown.

[0039] Furthermore, in this embodiment, the negative resistance network of the filter participates in signal conditioning using AC coupling. The feed voltage of the network can be controlled and adjusted according to different signal conditions. While ensuring that the range of tunable resistors connected is consistent, the AC coupling connection method can effectively reduce the power consumption of the entire network.

[0040] The above description of the embodiments is provided to enable those skilled in the art to understand and apply the present invention. Those skilled in the art can readily make various modifications to the above embodiments and apply the general principles described herein to other embodiments without creative effort. Therefore, the present invention is not limited to the above embodiments, and any improvements and modifications made to the present invention by those skilled in the art based on the disclosure thereof should be within the scope of protection of the present invention.

Claims

1. A multi-dimensional reconfigurable bandpass filter chip, characterized in that, include: The voltage drive unit uses an emitter follower circuit to drive and amplify the differential voltage input signal, and then outputs it to the LC resonant network in the same phase. The current drive unit uses a common-source amplifier circuit to drive and amplify the differential voltage input signal, and then outputs it to the LC resonant network in opposite phase. An LC resonant network is used to perform tunable filtering on the output signals of the voltage drive unit and the current drive unit to generate a differential voltage output signal. An adjustable negative resistance network is used to cancel the parasitic impedance of an LC resonant network and improve the quality factor of the LC resonant network.

2. The multi-dimensional reconfigurable bandpass filter chip according to claim 1, characterized in that: The voltage driving unit includes two emitter follower transistors Q1 and Q2 and two emitter follower DC sources I. DC1 and I DC2 In this configuration, the collectors of Q1 and Q2 are connected to the power supply voltage, the base of Q1 is connected to a non-inverting voltage input signal, the base of Q2 is connected to an inverting voltage input signal, and the emitter of Q1 is connected to I... DC1 The input terminal of Q2 is connected to I and serves as the non-inverting output signal terminal of the voltage drive unit. The emitter of Q2 is connected to I. DC2 The input terminal is connected and serves as the inverting output signal terminal of the voltage drive unit, I DC1 and I DC2 The output terminal is grounded.

3. The multi-dimensional reconfigurable bandpass filter chip according to claim 1, characterized in that: The current drive unit includes two common-source amplifier transistors Q3 and Q4, a gain control MOSFET M5, and two source degradation resistors R. S1 and R S2 and a gain resistor R G In this configuration, the collector of Q3 serves as the non-inverting output signal terminal of the current drive unit, the collector of Q4 serves as the inverting output signal terminal of the current drive unit, the base of Q4 is connected to the non-inverting voltage input signal, and the base of Q3 is connected to the inverting voltage input signal. The emitter of Q3 is connected to one end of M5 and R. G one end and R S1 One end of Q4 is connected to the other end of M5, and R is connected to the emitter of Q4. G The other end and R S2 One end is connected, R S1 and R S2 The other end is grounded, and the gate of M5 is connected to the gain control signal Vg.

4. The multi-dimensional reconfigurable bandpass filter chip according to claim 1, characterized in that: The LC resonant network includes two inductors L1 and L2, two variable capacitors C1 and C2, and two low-Q resistors R. C1 and R C2 And two low-resistance control MOSFETs M1 and M2, wherein one end of M1 is connected to R C1 One end of M2 is connected to the non-inverting output signal terminal of the voltage drive unit, and one end of M2 is connected to R. C2 One end of M1 is connected to the inverted output signal terminal of the voltage drive unit, and the other end of M1 is connected to R. C1 The other end of M2 is connected to one end of L1, one end of C1, the positive output signal terminal of the current drive unit, and the positive input terminal of the adjustable negative resistor network to generate a positive voltage output signal. The other end of M2 is connected to R. C2 The other end of L1, one end of L2, one end of C2, the inverted output signal terminal of the current drive unit, and the inverted input terminal of the adjustable negative resistor network are connected to generate an inverted voltage output signal. The gates of M1 and M2 are connected to the low Q value control signal Vc. The other end of L1 is connected to the other end of L2 and connected to the emitter of the voltage control transistor Q9. The collector and base of Q9 are both connected to the power supply voltage. The other end of C1 is connected to the other end of C2 and connected to the center frequency control signal Vf.

5. The multi-dimensional reconfigurable bandpass filter chip according to claim 4, characterized in that: The variable capacitors C1 and C2 are super-abrupt junction varactor diodes.

6. The multi-dimensional reconfigurable bandpass filter chip according to claim 1, characterized in that: The differential voltage input signals are connected to a matching resistor R at the signal input port. I1 and R I2 , where R I1 One end is connected to a positive voltage input signal, R I1 The other end and R I2 One end is connected to the power supply voltage, R I2 The other end is connected to an inverted voltage input signal.

7. The multi-dimensional reconfigurable bandpass filter chip according to claim 1, characterized in that: The adjustable negative resistance network includes fixed negative resistance transistors Q5 and Q6, and a fixed resistor R. X1 and R X2 Adjustable negative resistance transistors Q7 and Q8, adjustable resistor R Y1 and R Y2 And negative resistance controlled MOSFETs M3 and M4, where the collector of Q5 is connected to the base of Q6 and the collector of Q7 as the inverting input of the adjustable negative resistance network, and the collector of Q6 is connected to the base of Q5 and the collector of Q8 as the non-inverting input of the adjustable negative resistance network. The emitter of Q5 is connected to R... X1 One end of Q1 is connected to the base of Q7, and the emitter of Q6 is connected to R. X2 One end is connected to the base of Q8, R X1 and R X2 The other end is grounded, and the emitter of Q7 is connected to R. Y1 One end of Q8 is connected to one end of M3, and the emitter of Q8 is connected to R. Y2 One end is connected to one end of M4, R Y1 The other end is connected to the other end of M3 and grounded, R Y2 The other end of M3 is connected to the other end of M4 and grounded. The gates of M3 and M4 are connected to the high Q value control signal Vy.

8. The multi-dimensional reconfigurable bandpass filter chip according to claim 1, characterized in that: The adjustable negative resistance network includes fixed negative resistance transistors Q5 and Q6, and a fixed resistor R. X1 and R X2 Adjustable negative resistance transistors Q7 and Q8, adjustable resistor R Y1 and R Y2 Negative resistance controls MOSFETs M3 and M4, and resistor R. A1 and R A2 and capacitor C A1 and C A2 The collector of Q5 is connected to C. A1 One end of Q1 is connected to the collector of Q7 as the inverting input of the adjustable negative resistor network, and the collector of Q6 is connected to C. A2 One end of Q5 is connected to the collector of Q8 as the positive input terminal of the adjustable negative resistor network, and the base of Q5 is connected to the collector of C. A2 The other end and R A1 One end is connected, and the base of Q6 is connected to C. A1 The other end and R A2 One end is connected, R A1 The other end and R A2 The other end is connected in parallel to an adjustable bias voltage V. N The emitter of Q5 and R X1 One end of Q1 is connected to the base of Q7, and the emitter of Q6 is connected to R. X2 One end is connected to the base of Q8, R X1 and R X2 The other end is grounded, and the emitter of Q7 is connected to R. Y1 One end of Q8 is connected to one end of M3, and the emitter of Q8 is connected to R. Y2 One end is connected to one end of M4, R Y1 The other end is connected to the other end of M3 and grounded, R Y2 The other end of M3 is connected to the other end of M4 and grounded. The gates of M3 and M4 are connected to the high Q value control signal Vy.

9. The multi-dimensional reconfigurable bandpass filter chip according to claim 7 or 8, characterized in that: The fixed negative resistance transistors Q5 and Q6 are high-frequency transistors with high cutoff frequencies, while the adjustable negative resistance transistors Q7 and Q8 are high-breakdown transistors with high breakdown voltages.

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