A method for manufacturing a power panel sidewall circuit

Abstract

This invention relates to the field of power board circuit fabrication technology, specifically to a method for fabricating sidewall circuits on a power board, aiming to solve the core technical problems of difficult-to-control burrs, physical damage to the substrate, lengthy process flow, and poor mass production consistency caused by machining. The method includes the following steps: S100: Multilayer printed circuit board fabrication; S200: Through-hole processing; S300: Groove processing; S400: Full-board electroplating; S500: Anti-corrosion ink spraying; S600: Exposure imaging; S700: Development treatment; S800: Etching and ink removal; S900: Subsequent forming processing.

Description

Technical Field

[0001] This invention relates to the field of power board circuit fabrication technology, specifically, to a method for fabricating power board sidewall circuitry. Background Technology

[0002] As a core infrastructure for computing power, the shipment volume of artificial intelligence (AI) servers continues to grow, directly driving the expansion of the related power supply market. Power boards for AI devices must simultaneously meet the requirements of high power density, high efficiency, heat dissipation, and reliability to adapt to the working environment of data centers.

[0003] Currently, the sidewall circuitry of AI power boards is generally fabricated using a machining method involving routing and drilling. The specific process involves drilling holes first, then milling the board edges using a routing machine, followed by electroplating to cover the board surface and groove walls with a conductive copper layer, and finally completing the circuitry through pattern transfer and etching. This method achieves basic sidewall conductivity, meeting general electrical connection requirements. However, as the power density of AI chips continues to rise and the integration of power modules increases, the inherent defects of the aforementioned traditional machining process in mass production are becoming increasingly apparent, making it difficult to meet the requirements for large-scale manufacturing of high-quality AI power boards. This manifests in the following four aspects: 1. Mechanical milling and drilling are contact cutting processes. During milling, the impact and shearing of the tool on the substrate inevitably produce copper foil burrs and fiberglass debris. These burrs are irregular in shape and highly random in distribution, and even with subsequent cleaning processes such as high-pressure water washing, manual scraping, or sanding, they are still difficult to completely remove. According to actual production data, the overall yield of traditional processes is only 85%~90%, far lower than the level of over 95% of advanced processes. Among them, burr problems are one of the core factors affecting yield: even a tiny burr of 0.1mm can cause short circuits in the pads of ultra-small packaged components, increasing the defect rate by an additional 5%~8%; the missed detection rate of manual inspection is as high as 20%, further exacerbating the quality control risks. 2. The shear stress and impact force exerted by the high-speed rotation of the router blade on the multilayer printed circuit board substrate can easily cause irreversible damage such as micro-cracks, delamination, or resin fragmentation at the junction of the groove wall and the hole wall. These internal defects may gradually expand during subsequent electroplating, reflow soldering, and long-term high and low temperature cycling, eventually leading to interlayer separation or conductive failure, severely reducing the long-term reliability of the power board under the harsh conditions of data centers. 3. Traditional processes involve multiple machining and post-processing steps, requiring 12-15 steps in the entire sidewall wiring fabrication process, with a processing cycle of 24-36 hours, resulting in low mass production efficiency. More importantly, the deburring process heavily relies on manual intervention—traditional manual deburring is costly and inefficient, with labor costs accounting for more than 35% of the total processing cost, and the deburring consistency is poor; sandpaper polishing, on the other hand, easily damages the original precision of the groove wall, resulting in a rework rate as high as 25%, further increasing production costs and extending the delivery cycle; 4. Poor consistency in mass production, limiting large-scale production. Due to wear on mechanical cutting tools and the influence of ambient temperature and batch fluctuations in processing parameters, the sidewall processing quality varies significantly between different batches and even between different panels within the same batch. This makes it difficult to achieve highly stable mass production and does not meet the quality control requirements of large-scale industrial production.

[0004] In response to the above problems, the industry has tried to improve the process by optimizing machining parameters and adding multi-stage burr removal processes, but none of these methods have been able to fundamentally solve the root cause of burr generation and physical damage. Summary of the Invention

[0005] This invention proposes a method for manufacturing power board sidewall circuits, aiming to solve the core technical problems of difficult-to-control burrs, physical damage to substrates, lengthy process flow, and poor mass production consistency caused by machining.

[0006] The technical solution of the present invention is as follows: A method for fabricating sidewall wiring on a power board includes the following steps: S100: Multilayer printed circuit board manufacturing: The inner layer circuit is manufactured according to the preset circuit design, and copper-clad laminate is selected as the substrate for stacking and bonding to form a multilayer printed circuit board. S200: Through-hole processing: Drilling holes in multilayer printed circuit boards to create through-holes within the board; S300: Groove machining: Grooving is performed on the printed circuit board after drilling to form a pre-set groove; S400: Full-board electroplating: The printed circuit board behind the slot is placed in the electroplating solution for full-board electroplating, so that the board surface and the side wall of the slot are covered with a layer of conductive copper. S500: Anti-corrosion ink spraying: Anti-corrosion ink is applied to the side walls and plate surfaces of the tank by spraying. S600: Exposure Imaging: The printed circuit board is exposed using an LDI machine, causing the resist ink to polymerize and solidify according to the preset circuit pattern; S700: Development process: Immerse the exposed printed circuit board in the developer to dissolve the unexposed and cured resist ink, exposing the copper foil areas that do not need to be retained; S800: Etching and ink removal: The developed printed circuit board is placed in an etching solution to etch away the exposed copper foil area, and then the resist ink cured on the surface and sidewalls is removed to form the sidewall circuit. S900: Subsequent molding and processing: After etching and ink removal, the printed circuit board is sequentially subjected to outer layer pattern making, pattern electroplating, secondary etching, solder resist printing, molding and processing and electrical performance testing to obtain the finished printed circuit board with sidewall lines.

[0007] Furthermore, step S100 specifically includes: S110: Inner layer circuit fabrication: Fabricate the inner layer circuit according to the preset circuit design; S120: Lamination and lamination: Flame-retardant copper-clad laminate is selected as the substrate, and the laminates are combined according to the product layer requirements. Vacuum hot pressing process is used for lamination. The lamination temperature is controlled at 170-180℃, the pressure is 2.5-3.0MPa, and the heat and pressure holding time is 60-90min to form a multilayer printed circuit board substrate. The interlayer bonding force is ≥1.5N / mm, and the interlayer offset is ≤0.05mm.

[0008] Furthermore, in step S200, a CNC drilling machine is used for drilling. The drill bit is a diamond-coated drill bit, the rotation speed is set to 80,000-100,000 r / min, the feed rate is 0.1-0.2 mm / s, the hole wall roughness is ≤25 μm, the hole diameter tolerance is controlled within ±0.03 mm, and the hole wall is cleaned by plasma treatment after drilling.

[0009] Furthermore, in step S300, a CNC milling machine is used to process the milling groove. The milling cutter speed is set to 30,000-40,000 r / min, the feed speed is 0.5-1.0 mm / s, and the groove size is controlled within ±0.1 mm. After milling the groove, high-pressure water washing is used to clean the debris in the groove, and the water pressure is 0.8-1.2 MPa.

[0010] Furthermore, in step S400, the electroplating solution is an acidic copper sulfate electroplating solution, the electroplating temperature is controlled at 20-25℃, and the current density is 1.5-2.0 A / dm³. 2 The electroplating time is 15-25 min, the thickness of the conductive copper layer is 5-9 μm, the thickness uniformity deviation is ≤±1 μm, and the adhesion between the conductive copper foil and the substrate is ≥0.8 N / mm.

[0011] Furthermore, in step S500, a low-pressure electrostatic spraying device is used for spraying, the spraying pressure is set to 0.3-0.5MPa, the spraying distance is controlled at 15-20cm, the anti-corrosion ink is a photosensitive epoxy resin anti-corrosion ink, the ink thickness is controlled at 20-50μm, the thickness uniformity deviation is ≤±5μm, and after spraying, it is pre-baked at 60-70℃ for 30-40min.

[0012] Furthermore, in step S600, the exposure energy of the LDI machine is 2000mJ±100mJ, the laser wavelength is 365nm, the resolution of the cured ink pattern is ≤50μm, and the edge neatness deviation is ≤±10μm.

[0013] Furthermore, in step S700, the developer is a sodium carbonate solution with a concentration of 0.8%-1.2%, the developing temperature is controlled at 30-35℃, the developing time is 60-90s, and deionized water is used for rinsing after developing.

[0014] Furthermore, in step S800, the etching solution is a mixed solution of copper chloride and hydrochloric acid, with a copper ion concentration of 180-220 g / L, a hydrochloric acid concentration of 10-15 mL / L, an etching temperature controlled at 45-50℃, and an etching time of 120-180 s. The ink removal process uses a sodium hydroxide solution with a concentration of 5%-8%, a treatment temperature of 50-55℃, and a treatment time of 30-60 seconds.

[0015] Furthermore, in step S900, the copper plating thickness of the pattern electroplating is 15-20μm, the tin plating thickness is 5-8μm, and the solder resist ink thickness of the solder resist printing is 80-120μm.

[0016] The beneficial effects of this invention are as follows: 1. Eliminate burrs at the source and improve product yield. This invention employs a process route of "low-pressure spraying + photopolymerization imaging + chemical etching" to replace the traditional machining method of "routing + drilling." The entire sidewall circuit forming process does not involve any mechanical milling or cutting actions, eliminating the conditions for the generation of copper foil burrs and fiberglass debris at the source. Actual production verification shows that power boards manufactured using this method have no burr defects on their sidewall circuits, and the overall product yield reaches over 95%.

[0017] 2. Avoid physical damage to the substrate and improve structural reliability. In traditional router machining, the high-speed rotation of the router bit applies shear stress and impact force to the multilayer board, easily causing micro-cracks, delamination, or resin fragmentation at the junction of the groove and hole walls. This invention processes the sidewall circuitry after routerging using only chemical and optical methods such as electroplating, spraying, developing, and etching, without generating mechanical contact stress. This avoids physical damage to the substrate and helps ensure the long-term stability of the power board in the high-power, high-temperature environment of data centers.

[0018] 3. Significantly simplifies the process flow and improves production efficiency. Compared to traditional processes that require 12-15 machining and post-processing steps and have a processing cycle of 24-36 hours, this invention simplifies the sidewall circuit manufacturing process to 8-10 steps, shortens the processing cycle to 12-18 hours, increases production efficiency by more than 40%, and reduces the mass production processing cycle by 30%-35%, making it suitable for large-scale industrial production.

[0019] 4. Reduce manufacturing costs On the one hand, the simplified process directly reduces equipment usage and time spent transferring materials between processes; on the other hand, due to the complete resolution of the burr problem, the manual burr removal step in the traditional process is eliminated, significantly reducing labor costs and rework rates. Overall, the manufacturing cost of this invention is 25%-30% lower than that of traditional processes.

[0020] 5. Good consistency in mass production This invention achieves precise control over key parameters such as drilling accuracy, groove size, electroplated copper thickness, ink thickness, and exposure energy. Each process has a clearly defined process window and control standards, avoiding batch fluctuations caused by factors such as mechanical tool wear. Actual production data shows that the batch-to-batch product consistency deviation does not exceed ±3%, making it suitable for large-scale mass production.

[0021] 6. Optimize product design space and conductivity. This invention enables simultaneous processing of sidewall and surface wiring. By replacing part of the surface wiring with a sidewall conductive network, the overall product size can be reduced by 10%-15%, freeing up more space for high-density design of AI power boards. At the same time, the conductive copper layer on the sidewall is continuous and uniform, with a conduction resistance of no more than 50mΩ, which is more than 40% better than the traditional process (80-120mΩ). Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the cross-section of the printed circuit board after the groove processing in an embodiment of the present invention; Figure 2 This is a schematic diagram of the cross-section of the printed circuit board after full-board electroplating in an embodiment of the present invention; Figure 3 This is a schematic cross-sectional view of the printed circuit board after low-pressure spraying of anti-corrosion ink in an embodiment of the present invention (green represents the ink layer). Figure 4 This is a schematic diagram of the cross-section of the printed circuit board after imaging and curing by the LDI machine in an embodiment of the present invention; Figure 5 This is a schematic diagram of the cross-section of the printed circuit board after alkaline development treatment in an embodiment of the present invention; Figure 6 This is a schematic diagram of a printed circuit board cross-section during the etching process in an embodiment of the present invention; Figure 7This is a schematic diagram of the sidewall circuit forming after ink removal in an embodiment of the present invention; Figure 8 This is a schematic diagram of the structure of the finished printed circuit board in an embodiment of the present invention. Detailed Implementation

[0023] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0024] Example 1

[0025] like Figure 1-8 As shown, this embodiment takes an eight-layer AI power board as an example to explain in detail the manufacturing process of the side wall circuitry.

[0026] Step S100: Multilayer Printed Circuit Board Fabrication S110: Inner layer circuit fabrication: According to the preset circuit design requirements, flame-retardant copper-clad laminate (FR-4 grade) is selected as the substrate, and the inner layer circuit pattern is fabricated through conventional processes such as inner layer pattern transfer and etching.

[0027] S120: Lamination and Lamination: Based on the requirements of the eight-layer board structure, the inner core board and prepreg are alternately laminated using a vacuum hot pressing process. The lamination temperature is 170-180℃, the pressure is 2.5-3.0MPa, and the holding time is 60-90min. The resulting multilayer printed circuit board substrate has an interlayer bonding force of not less than 1.5N / mm and an interlayer offset of not more than 0.05mm.

[0028] As an alternative, the pressing temperature can be adjusted appropriately within the range of 170-180℃ depending on the selected board type, with the pressing window recommended by the board supplier as the standard. For products with different numbers of layers, the heat preservation and pressure holding time can be extended or shortened accordingly, with more layers requiring a longer time.

[0029] Step S200: Machining of through holes The through holes were drilled using a CNC drilling machine with a diamond-coated drill bit, at a rotation speed of 80,000-100,000 r / min and a feed rate of 0.1-0.2 mm / s. The roughness of the hole wall after drilling was no greater than 25 μm, and the hole diameter tolerance was controlled within ±0.03 mm.

[0030] After drilling, plasma treatment is performed. Under vacuum conditions, plasma is used to clean the hole walls to remove residual resin and burrs, increasing the adhesion between the hole walls and the electroplated copper. Based on experimental results, the specific plasma parameters are as follows: First stage: Nitrogen 100ml / min, Oxygen 900ml / min, Power 8000W, Processing time 10min; Second stage: Nitrogen 76ml / min, Oxygen 950ml / min, Carbon tetrafluoride 95ml / min, Power 8000W, Processing time 30min; The third stage uses 600 ml / min of oxygen, 7000 W of power, and a processing time of 10 min.

[0031] As an alternative, plasma treatment can also use argon or argon-oxygen mixed gas. The treatment time can be adjusted within the range of 5-15 minutes, and the power can be selected within the range of 1000-3000W. The specific parameters are determined according to the cleanliness of the borehole wall and the capacity of the equipment.

[0032] Step S300: Groove machining The printed circuit board is machined with grooves using a CNC milling machine (see reference). Figure 1 The milling cutter speed is 30,000-40,000 r / min, the feed rate is 0.5-1.0 mm / s, and the groove size is controlled within ±0.1 mm.

[0033] After the mortar is finished, use high-pressure water to clean the debris inside the mortar, with a water pressure of 0.8-1.2MPa, to ensure that there are no residual impurities on the mortar wall.

[0034] Step S400: Full-board electroplating The printed circuit board behind the slot is placed in an acidic copper sulfate electroplating solution for full-board electroplating (reference). Figure 2 The electroplating solution temperature is 20-25℃, and the current density is 1.5-2.0 A / dm³. 2 Electroplating time: 15-25 minutes.

[0035] After electroplating, a conductive copper layer is uniformly covered on the board surface and the sidewalls of the plating tank. The copper layer thickness is 5-9 μm, and the thickness uniformity deviation does not exceed ±1 μm. The adhesion between the conductive copper foil and the substrate is not less than 0.8 N / mm. The electroplating solution formula is: copper sulfate 60-80 g / L, sulfuric acid 180-220 g / L, chloride ion 40-60 ppm, with the addition of appropriate amounts of brightener and leveling agent.

[0036] Step S500: Low-pressure spraying of anti-corrosion ink Low-voltage electrostatic spraying equipment is used to spray-coat the electroplated printed circuit board (reference). Figure 3 Spraying pressure 0.3-0.5MPa, spraying distance 15-20cm, to evenly cover the tank sidewalls and plate surface with anti-corrosion ink.

[0037] The ink used is a photosensitive epoxy resin resist ink, with a thickness of 20-50μm and a thickness uniformity deviation not exceeding ±5μm. After spraying, pre-bake at 60-70℃ for 30-40 minutes to remove volatile components from the ink.

[0038] The purpose of the pre-baking process is to prevent solvent evaporation from contaminating the equipment or affecting image quality during subsequent exposures. Compared to traditional screen printing, low-pressure electrostatic spraying offers better coverage in non-planar areas such as the sidewalls of the spray tank. Charged ink particles can be uniformly adsorbed onto the sidewalls of the tank under the influence of an electric field, making it less prone to dripping and accumulation. In contrast, traditional screen printing results in poor uniformity of ink coverage in non-planar (vertical) areas, making it difficult to obtain an ink layer of consistent thickness.

[0039] As an alternative, photosensitive polyimide inks or other photosensitive resin inks can also be used as resist inks. When selecting these inks, the pre-baking temperature and time, as well as the subsequent exposure and development parameters, need to be adjusted accordingly.

[0040] Step S600: LDI image solidification The pre-baked printed circuit board is placed in an LDI (Laser Direct Imaging) machine with an exposure energy of 2000mJ±100mJ and a laser wavelength of 365nm. The LDI machine emits ultraviolet light for precise irradiation according to the preset sidewall and surface circuit patterns (see reference). Figure 4 This causes the photosensitive ink to undergo a polymerization reaction and solidify.

[0041] The resolution of the cured ink pattern is no greater than 50μm, and the edge neatness deviation is no more than ±10μm.

[0042] LDI imaging eliminates the need for photomasks, using computer-controlled laser scanning for high alignment accuracy (the tolerance for milling plates and drilled hole sidewalls is 100μm, which can be improved to 50μm using LDI), making it particularly suitable for transferring patterns in non-planar locations such as sidewalls. Exposure energy must be controlled within a suitable range: too low energy results in incomplete ink polymerization, causing the ink in the retained area to dissolve during development; too high energy may produce a halo effect, causing the cured area to extend beyond the pattern boundary.

[0043] Step S700: Alkaline Development Treatment The imaged printed circuit board is then immersed in an alkaline developing solution (see reference). Figure 5 The developer is a sodium carbonate solution with a concentration of 0.8%-1.2%, a temperature of 30-35℃, and a development time of 60-90 seconds. Unexposed and uncured resist ink is dissolved, exposing the copper foil areas that do not need to be preserved. After development, rinse thoroughly with deionized water.

[0044] If the development time is too short, ink residue will remain in the unexposed areas, affecting the subsequent etching effect; if the time is too long, it may erode the edges of the cured ink, causing the lines to become thinner or have gaps.

[0045] As an alternative, potassium hydroxide solution or tetramethylammonium hydroxide solution can be used instead of sodium carbonate solution as the developer. When choosing a developer, the concentration, temperature and time need to be adjusted accordingly based on the specific type of developer.

[0046] Step S800: Etching and ink removal treatment The developed printed circuit board is then placed in an acidic etching solution for etching (see reference). Figure 6 The etching solution is a mixture of copper chloride and hydrochloric acid, with a copper ion concentration of 180-220 g / L and a hydrochloric acid concentration of 10-15 mL / L. The etching temperature is 45-50℃, and the etching time is 120-180 s. The exposed copper foil area is etched away to form the pre-defined sidewall lines.

[0047] After etching, the printed circuit board is immersed in a stripping solution to remove the hardened resist ink from the surface and sidewalls. The stripping solution is a sodium hydroxide solution with a concentration of 5%-8%, a temperature of 50-55℃, and a processing time of 30-60 seconds. After stripping, the formed sidewall circuitry is obtained (see reference). Figure 7 ).

[0048] As an alternative, other organic de-inking agents can be used instead of sodium hydroxide solution. When choosing one, the de-inking temperature and processing time need to be adjusted accordingly based on the type of de-inking agent and the type of ink.

[0049] Step S900: Subsequent molding processing After etching and ink removal, the printed circuit board undergoes the following processes: fine correction of the outer layer pattern, pattern electroplating (copper plating thickness 15-20μm, tin plating thickness 5-8μm), secondary etching (the first etching is to form the sidewall circuitry of the slot, and the second etching is to etch the outer layer circuitry layer to connect it with the sidewall circuitry), solder mask printing (solder mask thickness 80-120μm), character printing, shape forming, and electrical performance testing. The final product is a finished printed circuit board with sidewall circuitry (see reference). Figure 8 ).

[0050] The power board sidewall circuitry fabricated using Example 1, after actual production verification, shows a comparison of its process effectiveness with the existing "routing + drilling" process, as shown in the table below:

[0051] Example 2

[0052] The difference between this embodiment and Embodiment 1 lies in the adjustment of the lamination and pressing parameters. For a six-layer power board product, the pressing temperature is 175℃, the pressure is 2.8MPa, and the holding time is 75min. After pressing, the interlayer bonding force is not less than 1.8N / mm, and the interlayer offset does not exceed 0.04mm. The remaining steps are the same as in Embodiment 1.

[0053] Example 3

[0054] The difference between this embodiment and Embodiment 1 lies in the adjustment of drilling parameters. For through holes with a thickness-to-diameter ratio (the ratio of plate thickness to hole diameter) of not less than 8:1, the drilling speed is adjusted to 90,000 r / min, and the feed rate is 0.15 mm / s. The plasma treatment time is 12 min, and the power is 2000 W. The roughness of the hole wall after treatment is not greater than 20 μm. The remaining steps are the same as in Embodiment 1.

[0055] Example 4

[0056] The difference between this embodiment and Embodiment 1 lies in the adjustment of the full-board electroplating parameters. For scenarios requiring a high copper layer thickness on the sidewalls, the electroplating time is extended to 22 minutes, and the current density is adjusted to 1.8 A / dm². 2 The thickness of the conductive copper layer was controlled to be 8 μm. Test results showed that the conduction resistance of the sidewall circuit was no greater than 45 mΩ. The remaining steps were the same as in Example 1.

[0057] Example 5

[0058] The difference between this embodiment and Embodiment 1 lies in the adjustment of the resist ink spraying and exposure parameters. For fine lines with a line width and spacing of no more than 75μm / 75μm, the ink thickness is controlled at 25μm, the LDI exposure energy is adjusted to 2050mJ, and the development time is 75s. The resolution of the cured ink pattern is no greater than 40μm, and the edge neatness deviation is no more than ±8μm. The remaining steps are the same as in Embodiment 1.

[0059] Example 6

[0060] The difference between this embodiment and Embodiment 1 lies in the adjustment of etching parameters. For a full-board copper plating layer reaching 9μm, the etching time is extended to 170s, and the etching temperature is 48℃. After etching, no copper residue remains, and the insulation between circuits is excellent. The remaining steps are the same as in Embodiment 1.

[0061] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for fabricating circuitry on the sidewall of a power board, characterized in that, Includes the following steps: S100: Multilayer printed circuit board manufacturing: The inner layer circuit is manufactured according to the preset circuit design, and copper-clad laminate is selected as the substrate for stacking and bonding to form a multilayer printed circuit board. S200: Through-hole processing: Drilling holes in multilayer printed circuit boards to create through-holes within the board; S300: Groove machining: Grooving is performed on the printed circuit board after drilling to form a pre-set groove; S400: Full-board electroplating: The printed circuit board behind the slot is placed in the electroplating solution for full-board electroplating, so that the board surface and the side wall of the slot are covered with a layer of conductive copper. S500: Anti-corrosion ink spraying: Anti-corrosion ink is applied to the side walls and plate surfaces of the tank by spraying. S600: Exposure Imaging: The printed circuit board is exposed using an LDI machine, causing the resist ink to polymerize and solidify according to the preset circuit pattern; S700: Development process: Immerse the exposed printed circuit board in the developer to dissolve the uncured resist ink and expose the copper foil areas that do not need to be retained; S800: Etching and ink removal: The developed printed circuit board is placed in an etching solution to etch away the exposed copper foil area, and then the resist ink cured on the surface and sidewalls is removed to form the sidewall circuit. S900: Subsequent molding and processing: After etching and ink removal, the printed circuit board is sequentially subjected to outer layer pattern making, pattern electroplating, secondary etching, solder resist printing, molding and processing and electrical performance testing to obtain the finished printed circuit board with sidewall lines.

2. The method for fabricating power board sidewall circuitry according to claim 1, characterized in that, Step S100 specifically includes: S110: Inner layer circuit fabrication: Fabricate the inner layer circuit according to the preset circuit design; S120: Lamination and lamination: Flame-retardant copper-clad laminate is selected as the substrate, and the laminates are combined according to the product layer requirements. Vacuum hot pressing process is used for lamination. The lamination temperature is controlled at 170-180℃, the pressure is 2.5-3.0MPa, and the heat and pressure holding time is 60-90min to form a multilayer printed circuit board substrate. The interlayer bonding force is ≥1.5N / mm, and the interlayer offset is ≤0.05mm.

3. The method for fabricating the sidewall circuitry of a power board according to claim 1, characterized in that, In step S200, a CNC drilling machine is used for drilling. The drill bit is a diamond-coated drill bit. The rotation speed is set to 80,000-100,000 r / min, the feed rate is 0.1-0.2 mm / s, the hole wall roughness is ≤25 μm, and the hole diameter tolerance is controlled within ±0.03 mm. After drilling, plasma treatment is used to clean the hole wall.

4. The method for fabricating the sidewall circuitry of a power board according to claim 1, characterized in that, In step S300, a CNC milling machine is used to process the milling groove. The milling cutter speed is set to 30,000-40,000 r / min, the feed speed is 0.5-1.0 mm / s, and the groove size is controlled within ±0.1 mm. After milling, high-pressure water washing is used to clean the debris in the groove, and the water pressure is 0.8-1.2 MPa.

5. A method for fabricating power board sidewall circuitry according to claim 1, characterized in that, The electroplating solution in step S400 is an acidic copper sulfate electroplating solution, the electroplating temperature is controlled at 20-25℃, and the current density is 1.5-2.0 A / dm³. 2 The electroplating time is 15-25 min, the thickness of the conductive copper layer is 5-9 μm, the thickness uniformity deviation is ≤ ±1 μm, and the adhesion between the conductive copper foil and the substrate is ≥ 0.8 N / mm.

6. A method for fabricating power board sidewall circuitry according to claim 1, characterized in that, In step S500, a low-pressure electrostatic spraying device is used for spraying. The spraying pressure is set to 0.3-0.5MPa, the spraying distance is controlled at 15-20cm, the anti-corrosion ink is a photosensitive epoxy resin anti-corrosion ink, the ink thickness is controlled at 20-50μm, the thickness uniformity deviation is ≤±5μm, and after spraying, it is pre-baked at 60-70℃ for 30-40min.

7. A method for fabricating power board sidewall circuitry according to claim 1, characterized in that, In step S600, the exposure energy of the LDI machine is 2000mJ±100mJ, the laser wavelength is 365nm, the resolution of the cured ink pattern is ≤50μm, and the edge neatness deviation is ≤±10μm.

8. A method for fabricating power board sidewall circuitry according to claim 1, characterized in that, In step S700, the developer is a sodium carbonate solution with a concentration of 0.8%-1.2%, the developing temperature is controlled at 30-35℃, the developing time is 60-90s, and deionized water is used for rinsing after developing.

9. A method for fabricating power board sidewall circuitry according to claim 1, characterized in that, In step S800, the etching solution is a mixed solution of copper chloride and hydrochloric acid, with a copper ion concentration of 180-220 g / L and a hydrochloric acid concentration of 10-15 mL / L. The etching temperature is controlled at 45-50℃ and the etching time is 120-180 s. The ink removal process uses a sodium hydroxide solution with a concentration of 5%-8%, a treatment temperature of 50-55℃, and a treatment time of 30-60 seconds.

10. A method for fabricating power board sidewall circuitry according to claim 1, characterized in that, In step S900, the copper plating thickness of the pattern electroplating is 15-20μm, the tin plating thickness is 5-8μm, and the solder resist ink thickness of the solder resist printing is 80-120μm.

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