Magnetostrictive liquid level meter circuit

Abstract

The utility model provides a magnetostrictive liquid level meter circuit, and relates to the technical field of liquid level meters. According to the magnetostrictive liquid level meter circuit, a bus chip KY3001LR with an SOC is applied to a liquid level meter, two-wire system high-speed bus setting with a ring and double ring design is adopted, an edge-triggered pulse excitation circuit is designed through a phase inverter and an RC circuit, a constant-current excitation circuit is designed through a constant-current source, the initial state of the circuit is determined, the excitation pulse width is determined, and the circuit is stable and reliable. The circuit state adaptability in the power-on process is guaranteed, when the length of the sensor changes, the current can be automatically adjusted, the magnetostriction line length can be self-adapted, the interchangeability of the base meter is achieved, and the problems of hardware replacement and test, equipment damage caused by program abnormity and the like are avoided. In addition, the two-wire system high-speed bus is set to have higher driving capability and loading capability, and more parameters and variables can be transmitted; and all functions are completed by using a single chip, so that the communication speed is higher, and the wiring cost is also saved.

Description

Technical Field

[0001] The utility model relates to the technical field of liquid level gauges, in particular to a magnetostrictive liquid level gauge circuit. Background Art

[0002] With the rapid development of science and technology, magnetostrictive level gauges have been widely used in various high-tech industries. The magnetostrictive level gauge consists of a magnetic float, a sensor, and an intelligent electronic device. It uses the Wiedemann effect and the inverse magnetostrictive effect to achieve liquid level measurement. A magnetostrictive wire is installed in the non-magnetic sensor catheter. The electronic device emits an excitation pulse, which propagates on the magnetostrictive wire. A moving circumferential magnetic field is formed around the magnetostrictive wire. The magnetic field first generates an induced voltage through the induction coil of the electronic device. The timing starts when this voltage signal is detected. When the magnetic field interacts with the magnetic field of the magnetic float, a torsion wave is generated on the magnetostrictive wire. This torsion wave propagates from the position of the magnetic float to both ends along the magnetostrictive wire at a known speed. When the torsion wave reaches the induction coil, the induction coil will generate an induced voltage, and the timing ends. According to the time difference, the distance from the float to the induction coil can be calculated, and the liquid level value can be obtained according to the installation relationship. In order to improve the accuracy, the distance from the float to the bottom of the sensor is usually calibrated. When it is installed on site, the output can be adjusted according to the actual liquid level to correct the deviation caused by the installation.

[0003] A two-wire 4-20mA magnetostrictive level meter in the prior art transmits the primary variable through loop current and transmits other parameters through digital communication using a HART chip. Due to the limitation of its maximum current, it is difficult to achieve a large range of applications. Since the HART bus has a poor load capacity and must use a HART chip to achieve communication, the speed is extremely slow and can only be used in scenarios where real-time requirements are not high or where the primary variable changes very slowly.

[0004] Another four-wire magnetostrictive level gauge in the prior art uses RS485 communication. Multiple devices can be connected to the bus. Its load capacity is significantly better than that of a two-wire magnetostrictive level gauge. However, the power line and communication line are independent, which increases the wiring cost. Utility Model Content

[0005] The utility model aims to provide a magnetostrictive liquid level meter circuit, which applies a bus chip KY3001LR with SOC to the liquid level meter, adopts a two-wire high-speed bus AUTBUS, and designs a constant current excitation circuit to solve the problems raised in the above background technology.

[0006] In order to achieve the above purpose, the utility model provides the following technical solutions:

[0007] A magnetostrictive liquid level gauge circuit, the magnetostrictive liquid level gauge circuit adopts a bus chip KY3001LR with a SOC and a two-wire bus setting of a ring and a double ring, including a main chip U1, a low-pass filter circuit, a pulse excitation circuit and a constant current circuit, the U1 controls the current of the constant current circuit through the low-pass filter circuit; the U1 controls the on and off of the constant current circuit through the pulse excitation circuit;

[0008] The pulse excitation circuit includes a current limiting resistor R11, an inverter U3, a pull-down resistor R12, a coupling capacitor C9, a pull-up resistor R10, an inverter U4, and a switch tube Q2;

[0009] The excitation signal ACT enters the inverter U3 through the current limiting resistor R11, and the output of the inverter U3 is input to the inverter U4 through the coupling capacitor C9 and the pull-up resistor R10. The output of the inverter U4 controls the on-off of the switch tube Q2, and controls the on-off of the constant current circuit; the pull-down resistor R12 provides a certain input state for the inverter U3; the pull-up resistor R10 provides a certain initial state for the inverter U4; during the power-on process, no current passes through the magnetostrictive liquid level meter circuit; when the excitation signal ACT generates a rising edge, the excitation current is triggered, and the duration of the excitation current is jointly determined by the capacitor C9 and the resistor R10;

[0010] The low-pass filter circuit includes an active low-pass filter, and the DAC output of the main chip U1 obtains a stable reference voltage after passing through the active low-pass filter;

[0011] The constant current circuit includes a resistor and a MOS tube Q1; when the switch tube Q2 is turned on, the voltage output by the DAC of the main chip U1 through the active low-pass filter is equal to the voltage of the resistor; when the switch tube Q2 is turned off, the resistor R16 is pulled to the ground, the output current is 0, the voltage of the sampling resistors R20~R22 is 0, and the MOS tube Q1 is in the off state.

[0012] Preferably, the access terminal J1 of the two-wire bus of the magnetostrictive liquid level gauge circuit is connected to the POAS module U7 through the gas discharge tube GAP1 and the gas discharge tube GAP2; the POAS module U7 is connected to the module U8 of the two-wire bus interface through the resettable fuse F1 and the resettable fuse F2; the bus interface module U8 is connected to the bus interface of the main chip U1;

[0013] The POAS module U7 supplies power to the system. The POAS module U7 is composed of a rectifier bridge, a common-mode inductor, and a coupling capacitor. The coupling capacitor leads the signal on the two-wire bus to the terminal.

[0014] The output power of the POAS module U7 is connected to the varistor R24, the diode D4, the TVS tube D5, the energy storage capacitors E2 and C16, and the bypass capacitor C17 in sequence, and enters the power input end of the DC-DC chip U6, and outputs +12V power through the DC-DC converter to power the entire circuit system;

[0015] The access terminal J2 of the two-wire bus of the magnetostrictive level meter circuit is connected in parallel with the diode D2, and the pulse excitation circuit is isolated from the system power supply through the energy storage capacitor E1, the diode D1, and the π-type filter composed of the capacitor C10, the capacitor C11, and the power inductor L1.

[0016] Preferably, the magnetostrictive liquid level meter circuit further includes a collection circuit, and the collection circuit includes a differential amplifier, an RC low-pass filter, an AC proportional amplifier, a third-stage threshold amplifier circuit, a blocking resistor R48, and an inverter U9;

[0017] The differential amplifier includes resistor R38, resistor R36, resistor R40, resistor R46 and operational amplifier U10A; the RC low-pass filter includes resistor R45 and capacitor C26, providing a low-ripple power supply for operational amplifier U10A; the AC proportional amplifier includes a DC blocking capacitor C24, a resistor R39, a resistor R37, a resistor R44, a resistor R47, and a proportional amplifier U10B; the third-stage threshold amplifier circuit includes a diode D7, a current limiting resistor R41, a pull-down resistor R42, a transistor Q3, and a pull-up resistor R34;

[0018] The induction coil generates a rising edge through the differential amplifier, which is coupled to the proportional amplifier U10B through the DC blocking capacitor C24 for secondary amplification, the voltage is clamped by the diode D7, and then tertiary amplification is performed through the transistor Q3. The collector output signal enters the inverter U9 through the current limiting resistor R48, and the inverter U9 outputs a pulse signal TC which is sent to the GPIO pin of the main chip U1 or the timer-related pin.

[0019] Preferably, the system output power +12V of the magnetostrictive liquid level gauge circuit is stepped down to +5V through the DC-DC chip U11, and the +5V is then stepped down to +3.3V through the DC-DC chip U12.

[0020] Preferably, the +3.3V power supply sequentially passes through the π-type filter FB3, the LDO chip U13, and the π-type filter FB4 to obtain a low-ripple +1.2V; the power interface of the LDO chip U13 is connected to a bypass capacitor;

[0021] The +3.3V power supply passes through the π-type filter FB6, the LDO chip U14, and the π-type filter FB5 in sequence to obtain a low-ripple +1.5V; the power supply interface of the LDO chip U14 is connected to a bypass capacitor.

[0022] Preferably, the magnetostrictive liquid level meter circuit further includes a crystal oscillator circuit, a reset circuit, and a system flash memory circuit;

[0023] The crystal oscillator circuit uses an active crystal oscillator, and a +3.3V power supply supplies power to the crystal oscillator through a π-type filter;

[0024] The crystal oscillator is connected to a plurality of energy storage capacitors and bypass capacitors; the crystal oscillator circuit provides a clock for the main chip U1 through the capacitor C6 and the resistor R2.

[0025] Preferably, the DC-DC converter includes a freewheeling diode D6, a power inductor L2, an energy storage capacitor E3, a filter capacitor C18, a resistor divider, and a TVS tube D3; the resistor divider includes R23 and R17.

[0026] Preferably, the magnetostrictive liquid level meter circuit is configured to be triggered by a rising edge.

[0027] Preferably, the magnetostrictive liquid level meter circuit also includes a keyboard circuit, a display circuit, and a serial port debugging circuit.

[0028] The beneficial effects of the utility model are:

[0029] The bus chip KY3001LR with SOC is applied to the liquid level meter. The two-wire high-speed bus AUTBUS has stronger driving ability and load capacity, which can transmit more parameters and variables; it has less wiring, higher communication speed and more access nodes, saving wiring costs. In addition, the AUTBUS bus has a ring and double ring design, which makes the communication of devices on the bus more reliable, and uses a single chip to complete all functions.

[0030] An edge-triggered pulse excitation circuit is designed through an inverter and an RC circuit, and a constant current excitation circuit is designed using a constant current source. This allows the circuit's initial state to be determined, as well as the excitation pulse width, to ensure the circuit's state adaptability during the power-on process. When the sensor's length changes, the current can be automatically adjusted, and the magnetostrictive wire length can be adapted to achieve base meter interchangeability, avoiding hardware replacement and testing, as well as equipment damage due to program abnormalities, thus providing convenience for production. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 This is the bus power supply principle diagram of the utility model

[0032] Figure 2 The power generation circuit diagram of the utility model

[0033] Figure 3 The core power generation circuit diagram of the utility model

[0034] Figure 4 This is the power supply circuit diagram of the single chip microcomputer of the utility model

[0035] Figure 5 This is the minimum system circuit diagram of the single chip microcomputer of this utility model

[0036] Figure 6 This is the system startup configuration diagram of the utility model

[0037] Figure 7 This is the human-computer interaction circuit diagram of the utility model

[0038] Figure 8 This is the constant current excitation circuit diagram of the utility model

[0039] Fig. 9 This is the excitation waveform diagram of the utility model

[0040] Fig.10 The signal acquisition circuit diagram of the utility model DETAILED DESCRIPTION

[0041] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0042] Under the wave of domestic substitution, it has become an important task for many domestic instrument manufacturers to use a large number of domestic chips for system design, replace the imported chips in the original design, and increase the use ratio of domestic chips. Aiming at the shortcomings of the traditional magnetostrictive liquid level meter, the utility model has carried out a domestic design and provides a magnetostrictive liquid level meter circuit. The bus chip KY3001LR (U1) with SOC is applied to the liquid level meter, and a two-wire high-speed bus setting with a ring and double ring design is adopted, including a pulse excitation circuit, a low-pass filter circuit, a constant current circuit, an acquisition circuit, a power supply circuit, a crystal oscillator circuit, a reset circuit, a system flash memory circuit, a keyboard circuit, a display circuit, and a serial port debugging circuit. The main chip U1 controls the current of the constant current circuit through a low-pass filter. The main chip U1 controls the on and off of the constant current circuit through a pulse excitation circuit.

[0043] like Figure 1As shown in the figure, it is the bus power supply principle diagram of the utility model. The access terminal J1 of the two-wire bus is connected to the gas discharge tubes GAP1 and GAP2 for lightning protection of the bus. U7 is a POAS module, which is composed of a rectifier bridge, a common mode inductor, and a coupling capacitor. The existence of the rectifier bridge makes it unnecessary to distinguish between positive and negative poles when connecting the device. The lead-out terminals 5 and 6 are used to power the system, and the coupling capacitor leads the signal on the bus to terminals 3 and 4.

[0044] The output power of U7 passes through the varistor R24, diode D4, TVS tube D5, energy storage capacitor E2 and C16, bypass capacitor C17, and then enters the power input terminal of the DC-DC chip U6, and outputs +12V power through the DC-DC converter to power the entire circuit system. Among them, TVS tube D3 protects the system power supply to prevent overvoltage from causing system damage; D6 is a freewheeling diode, L2 is a power inductor, E3 is an energy storage capacitor, C18 is a filter capacitor, and R23 and R17 form a resistor divider, which makes the choice of DC-DC chip U6 wider. When choosing a fixed voltage output version, R23 can use a zero-value resistor.

[0045] KY1000 (U8) is a bus interface module, and its pins are connected to the bus interface of the main chip KY3001LR (U1). In order to facilitate impedance matching and testing, resistors R25 to R28 are used at the connection. U8 and U7 are connected through self-recovery fuses F1 and F2. In order to strengthen protection, TVS and gas discharge tubes can also be added here for interface protection.

[0046] like Figure 2 As shown, it is the power generation circuit diagram of the utility model, the system power supply +12V is stepped down to +5V through the DC-DC chip U11, and +5V is stepped down to +3.3V through the DC-DC chip U12. Among them, L3 and L4 are power inductors; R51 and R54, R55 and R56 form a resistor divider to ensure that the voltage of the DC-DC enable end does not exceed the limit value to avoid interface damage; R52, R53, and C33 form a voltage divider filter circuit to provide voltage feedback for U11; R57, R58, R59, and C36 form a voltage divider filter circuit to provide voltage feedback for U12, and R58 and R59 are connected in parallel to make it easier to find a suitable resistor and reduce costs.

[0047] like Figure 3 As shown, it is the core power generation circuit diagram of the utility model. After the +3.3V power passes through the π-type filter, it enters the LDO chip to obtain a regulated power supply, and then passes through the π-type filter to obtain low-ripple +1.2V and +1.SV.

[0048] +3.3V is generated by the switching power supply chip U13, which has relatively large noise. After adding a π-type filter to it, it powers the system to obtain a low-noise power supply voltage, such as Figure 4 The figure shows the power supply circuit diagram of the single chip microcomputer of the present invention. Each power interface of the chip is provided with a bypass capacitor to improve the stability of the power supply system. Due to the large number of capacitors, not all of them are shown in the figure.

[0049] The crystal oscillator circuit, reset circuit, and system flash memory circuit constitute the minimum system circuit diagram of the microcontroller, such as Figure 5 As shown. The system clock uses an active crystal oscillator, which is powered by a π-type filter, and multiple energy storage capacitors and bypass capacitors are placed near the crystal oscillator to reduce the impact of power supply noise on the clock output frequency. Since the clock frequency is as high as 25MHz, the clock output pin provides the clock to the main chip through capacitor C6 and resistor R2, which facilitates impedance matching adjustment and avoids reflection.

[0050] System startup configuration such as Figure 6 As shown, SP10_TX is pulled low through resistor R6. When the system is powered on, UART0_TX and UART1_TX both maintain the default high level state. At this time, the system is started from flash memory U2 through a 10MHz clock.

[0051] Keyboard circuit, display circuit, serial port debugging circuit, such as Figure 7 Shown is a human-computer interaction circuit diagram of the utility model.

[0052] like Figure 8 As shown, this is the constant current excitation circuit diagram of the utility model. Different from the traditional excitation circuit, the utility model uses constant current driving technology to realize the excitation of the magnetostrictive level meter circuit, and uses the DAC output of the main chip U1 to control the current of the constant current source. The DAC output passes through the third-order Salley-Key active low-pass filter to obtain a more stable reference voltage.

[0053] When the switch tube Q2 is turned on, the current output by the constant current source makes the voltage on the sampling resistors R20~R22 equal to the reference voltage output by the low filter, that is, constant current control is realized. When the switch tube Q2 is turned off, since the 5th pin of the operational amplifier is pulled to the ground by the resistor R16, the constant current source output is turned off, the output current is 0, and the voltage through the sampling resistors R20~R22 is 0. At this time, the MOS tube Q1 is in the off state.

[0054] Since the magnetostrictive wire is very long, its inductance characteristics cannot be ignored, and the switching time is very short, there is a high-speed pulse current. Therefore, a diode D2 is connected in parallel to the interface J2 of the magnetostrictive circuit to provide a freewheeling channel and suppress the reverse voltage. Since the excitation current is relatively large, it will cause the power supply voltage to fluctuate. In order to prevent the excitation circuit from affecting the system circuit, the π-type filter composed of C10, C11, and L1 is used to separate the excitation circuit from the system power supply. The diode D1 prevents the reverse voltage from impacting the main circuit, and the energy storage capacitor E1 provides a large amount of excitation current for the excitation circuit to reduce the loop area.

[0055] The excitation signal ACT enters the inverter U3 through the current limiting resistor R11, and the pull-down resistor R12 provides a certain input state for U3 to avoid oscillation during the power-on process. The output of U3 is input to the inverter U4 through the coupling capacitor C9 and the pull-up resistor R10. The output of U4 controls the switch tube Q2, and then controls the opening and closing of the constant current circuit. The pull-up resistor R10 provides a certain initial state for the inverter U4, that is, in the default state, U4 outputs a low level, the switch tube Q2 is turned off, Q1 is turned off, and no current passes through the magnetostrictive wire. When the excitation signal ACT generates a rising edge, the inverter U3 outputs a low level, and the voltage across the capacitor C9 cannot change suddenly, so the voltage at the input end of U4 instantly becomes a low level, U4 outputs a high level, Q2 is turned on, Q1 is turned on, and an excitation current is generated on the magnetostrictive wire. At this time, capacitor C9 is charged under the action of pull-up resistor R10. When the voltage reaches the lower limit of the high-level voltage at the input end of U4, the output of U4 becomes low, Q2 is turned off, Q1 is turned off, and the excitation current on the magnetostrictive wire is interrupted.

[0056] like Fig. 9 As shown, it is the excitation waveform diagram of the utility model, the top one is the waveform of pin 2 of U4, the middle one is the excitation signal ACT, and the bottom one is the control signal QACT of the switch tube Q2.

[0057] The advantage of using this excitation circuit is that when the system is powered on, no current flows through the magnetostrictive level meter circuit, which reduces the instantaneous current at startup and ensures a certain circuit state. When debugging the main chip, the program will not be interrupted, which will cause continuous excitation current to be generated, or even burn the device. This circuit will only trigger the excitation current when the excitation signal ACT generates a rising edge, and the current duration is determined by the capacitor C9 and the resistor R10.

[0058] like Fig.10As shown, it is the signal acquisition circuit diagram of the utility model. The two ends of the induction coil are connected to SV+ and SV-, and the voltage at the two ends of the induction coil is collected by a differential amplifier. Since the echo generated on the magnetostrictive line corresponds to the pulse voltage of the induction coil, the pulse signal is obtained through the DC blocking capacitor C24 and input to the proportional amplifier U10B for secondary amplification. In order to avoid malfunction caused by interference, the voltage is clamped by the diode D7. The number of diodes can be increased according to actual needs, that is, when the amplifier output voltage exceeds the clamping voltage of the diode, it will be transmitted to the next stage. In order to avoid unnecessary influence caused by interference, the third stage is amplified, and the amplifier circuit composed of the transistor Q3 is used for amplification. After the three-stage amplification, the collector output signal enters the inverter U9 through the current limiting resistor R48, and the pulse signal TC output by the inverter U9 is input to the GPIO pin of the main chip or the timer-related pin.

[0059] R50 and R49 form a resistor divider to provide a certain reference voltage of 2.5V for the amplifier input, C27 and C28 are filter capacitors; R38, R36, R40, R46 and operational amplifier U10A form a differential amplifier; C25 is a filter capacitor; R35 and R43 provide voltage bias for the differential amplifier and provide a certain level for the induction coil; R45 and C26 form an RC low-pass filter to provide a low-ripple power supply for the operational amplifier; C24, R39, R37, R44, R47, and U10B form an AC proportional amplifier; diode D7, current limiting resistor R41, pull-down resistor R42, transistor Q3, and pull-up resistor R34 form a third-stage threshold amplifier circuit; current limiting resistor R48 and inverter U9 realize voltage transformation and waveform shaping.

[0060] When an induced voltage is generated (SV+>SV-), the output end of the differential amplifier U10A generates a rising edge, which is coupled to the proportional amplifier U10B through capacitor C24 for secondary amplification. The voltage is clamped by diode D7. When there is base current, the collector of transistor Q3 is low level, and the inverter U9 outputs high level. When there is no base current, the collector of transistor Q3 is high level, and the inverter U9 outputs low level. From the above analysis, it can be seen that when the induction coil detects the echo signal normally, U9 should generate at least one pulse signal.

[0061] In actual application, starting from the issuance of excitation, U9 generates multiple pulse signals. In order to correctly identify the effective echo, the pulse signals within the specified time can be discarded. The first pulse signal after the discarding is identified as the normal echo signal.

[0062] The pulse signal of U9 is received by using the external pin interrupt of the single-chip microcomputer or the timer capture interrupt. This circuit is set to trigger on the rising edge. An array is designed to record the time. The timer is started when the excitation is issued. The time of the timer is read once each interrupt is generated and recorded in the array. When the time exceeds the specified cut-off time, it is considered that the correct echo signal is obtained. This time (including the reaction time of the excitation circuit and the transmission time on the magnetostrictive line) has a one-to-one correspondence with the measurement position, and it is easy to calibrate by calibration.

[0063] The contents not described in detail in this specification belong to the prior art known to professional and technical personnel in this field.

[0064] Finally, it should be noted that the above description is only a preferred example of the utility model and is not intended to limit the utility model. Although the utility model is described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions recorded in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the utility model shall be included in the protection scope of the utility model.

Claims

1. A magnetostrictive liquid level meter circuit, characterized in that: The magnetostrictive liquid level meter circuit adopts a bus chip KY3001LR with SOC and a two-wire bus setting of a ring and a double ring, including a main chip U1, a low-pass filter circuit, a pulse excitation circuit and a constant current circuit. The main chip U1 controls the current of the constant current circuit through the low-pass filter circuit; the main chip U1 controls the on and off of the constant current circuit through the pulse excitation circuit; The pulse excitation circuit includes a current limiting resistor R11, an inverter U3, a pull-down resistor R12, a coupling capacitor C9, a pull-up resistor R10, an inverter U4, and a switch tube Q2; The excitation signal ACT enters the inverter U3 through the current limiting resistor R11, and the output of the inverter U3 is input to the inverter U4 through the coupling capacitor C9 and the pull-up resistor R10. The output of the inverter U4 controls the on-off of the switch tube Q2, and controls the on-off of the constant current circuit; the pull-down resistor R12 provides a certain input state for the inverter U3; the pull-up resistor R10 provides a certain initial state for the inverter U4; During the power-on process, no current flows through the magnetostrictive level gauge circuit; when the excitation signal ACT generates a rising edge, the excitation current is triggered, and the duration of the excitation current is determined by the capacitor C9 and the resistor R10; The low-pass filter circuit includes an active low-pass filter, and the DAC output of the main chip U1 obtains a stable reference voltage after passing through the active low-pass filter; The constant current circuit includes a resistor and a MOS tube Q1; when the switch tube Q2 is turned on, the voltage output by the DAC of the main chip U1 through the active low-pass filter is equal to the voltage of the resistor; when the switch tube Q2 is turned off, the resistor R16 is pulled to the ground, the output current is 0, the voltage of the sampling resistors R20~R22 is 0, and the MOS tube Q1 is in the off state.

2. A magnetostrictive liquid level meter circuit according to claim 1, characterized in that: The access terminal J1 of the two-wire bus of the magnetostrictive liquid level gauge circuit is connected to the POAS module U7 through the gas discharge tube GAP1 and the gas discharge tube GAP2; the POAS module U7 is connected to the module U8 of the two-wire bus interface through the resettable fuse F1 and the resettable fuse F2; the bus interface module U8 is connected to the bus interface of the main chip U1; The POAS module U7 supplies power to the system. The POAS module U7 is composed of a rectifier bridge, a common-mode inductor, and a coupling capacitor. The coupling capacitor leads the signal on the two-wire bus to the terminal. The output power of the POAS module U7 is connected to the varistor R24, the diode D4, the TVS tube D5, the energy storage capacitors E2 and C16, and the bypass capacitor C17 in sequence, and enters the power input end of the DC-DC chip U6, and outputs +12V power through the DC-DC converter to power the entire circuit system; The access terminal J2 of the two-wire bus of the magnetostrictive level meter circuit is connected in parallel with the diode D2, and the pulse excitation circuit is isolated from the system power supply through the energy storage capacitor E1, the diode D1, and the π-type filter composed of the capacitor C10, the capacitor C11, and the power inductor L1.

3. A magnetostrictive liquid level meter circuit according to claim 1, characterized in that: The magnetostrictive liquid level meter circuit also includes a collection circuit, which includes a differential amplifier, an RC low-pass filter, an AC proportional amplifier, a third-stage threshold amplifier circuit, a blocking resistor R48, and an inverter U9; The differential amplifier includes resistor R38, resistor R36, resistor R40, resistor R46 and operational amplifier U10A; the RC low-pass filter includes resistor R45 and capacitor C26, providing a low-ripple power supply for operational amplifier U10A; the AC proportional amplifier includes a DC blocking capacitor C24, a resistor R39, a resistor R37, a resistor R44, a resistor R47, and a proportional amplifier U10B; the third-stage threshold amplifier circuit includes a diode D7, a current limiting resistor R41, a pull-down resistor R42, a transistor Q3, and a pull-up resistor R34; The induction coil generates a rising edge through the differential amplifier, which is coupled to the proportional amplifier U10B through the DC blocking capacitor C24 for secondary amplification, the voltage is clamped by the diode D7, and then tertiary amplification is performed through the transistor Q3. The collector output signal enters the inverter U9 through the current limiting resistor R48, and the inverter U9 outputs a pulse signal TC which is sent to the GPIO pin of the main chip U1 or the timer-related pin.

4. A magnetostrictive liquid level meter circuit according to claim 1, characterized in that: The system output power +12V of the magnetostrictive liquid level meter circuit is stepped down to +5V through the DC-DC chip U11, and the +5V is stepped down to +3.3V through the DC-DC chip U12.

5. A magnetostrictive liquid level meter circuit according to claim 4, characterized in that: The +3.3V power supply passes through the π-type filter FB3, the LDO chip U13, and the π-type filter FB4 in sequence to obtain a low-ripple +1.2V; the power interface of the LDO chip U13 is connected to a bypass capacitor; The +3.3V power supply passes through the π-type filter FB6, the LDO chip U14, and the π-type filter FB5 in sequence to obtain a low-ripple +1.5V; the power supply interface of the LDO chip U14 is connected to a bypass capacitor.

6. A magnetostrictive liquid level meter circuit according to claim 5, characterized in that: The magnetostrictive liquid level meter circuit also includes a crystal oscillator circuit, a reset circuit, and a system flash memory circuit; The crystal oscillator circuit uses an active crystal oscillator, and a +3.3V power supply supplies power to the crystal oscillator through a π-type filter; The crystal oscillator is connected to a plurality of energy storage capacitors and bypass capacitors; the crystal oscillator circuit provides a clock for the main chip U1 through the capacitor C6 and the resistor R2.

7. A magnetostrictive liquid level meter circuit according to claim 2, characterized in that: The DC-DC converter includes a freewheeling diode D6, a power inductor L2, an energy storage capacitor E3, a filter capacitor C18, a resistor divider, and a TVS tube D3; the resistor divider includes R23 and R17.

8. The magnetostrictive liquid level meter circuit according to claim 1, characterized in that: The magnetostrictive level meter circuit is set to rising edge trigger.

9. The magnetostrictive liquid level meter circuit according to claim 1, characterized in that: The magnetostrictive liquid level meter circuit also includes a keyboard circuit, a display circuit, and a serial port debugging circuit.

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