Solid state relay

Abstract

The utility model provides a solid-state relay. The solid-state relay comprises an electronic switch, a control circuit, a detection circuit and an AND gate logic circuit. The input end of the detection circuit is electrically connected with the power supply loop, and the output end of the detection circuit is electrically connected with the first input end of the AND gate logic circuit so as to detect power supply parameters on the power supply loop and output a detection result signal to the AND gate logic circuit; the output end of the control circuit is electrically connected with the second input end of the AND gate logic circuit so as to output a control signal to the AND gate logic circuit; the output end of the AND gate logic circuit is electrically connected with the control end of the electronic switch so as to output a conduction signal to the electronic switch when both the detection result signal and the control signal meet requirements; the electronic switch is connected in series with the power supply loop to control the power supply loop to be conducted according to the conduction signal. The judgment of the two conditions is completely realized through a hardware mode, the response speed is high, the delay is extremely low, and the problem of control failure of the whole switch caused by the delay problem is not easy to occur.

Description

Technical Field

[0001] The utility model relates to the technical field of switch circuits, in particular to a solid-state relay. Background Art

[0002] A solid-state relay is an electrical switch without mechanical parts, which uses solid semiconductor devices to realize the switching function of the circuit. Solid-state relays usually need to control the power supply circuit to conduct when there is a conduction demand and the power supply parameters of the power supply circuit are normal, thereby improving the reliability of the solid-state relay in switch control.

[0003] In order to achieve the above purpose in the prior art, the power supply parameters are usually obtained and then output to the corresponding controller. After receiving the conduction request, the controller determines whether the obtained power supply parameters are normal through software. If so, it outputs the corresponding conduction signal to control the electronic switch in the solid-state relay to conduct. However, control through software has a high delay, especially when the controller is overloaded, which may even cause the entire switch control to fail. Utility Model Content

[0004] In view of the deficiencies in the prior art, the utility model provides a solid-state relay.

[0005] In one embodiment, the utility model provides a solid-state relay, the solid-state relay comprising:

[0006] Electronic switches, control circuits, detection circuits and AND gate logic circuits;

[0007] The input end of the detection circuit is electrically connected to the power supply circuit, and the output end of the detection circuit is electrically connected to the first input end of the AND gate logic circuit to detect the power supply parameters on the power supply circuit and output the detection result signal to the AND gate logic circuit;

[0008] The output terminal of the control circuit is electrically connected to the second input terminal of the AND gate logic circuit to output a control signal to the AND gate logic circuit;

[0009] The output end of the AND gate logic circuit is electrically connected to the control end of the electronic switch to output a conduction signal to the electronic switch when both the detection result signal and the control signal meet the requirements;

[0010] The electronic switch is connected in series with the power supply circuit to control the conduction of the power supply circuit according to the conduction signal.

[0011] In one embodiment, the detection circuit includes an overcurrent detection circuit, and the overcurrent detection circuit includes a current transformer, a first sampling resistor and a first comparator;

[0012] The input end of the current transformer is connected in series with the power supply circuit and the electronic switch, the first output end of the current transformer is electrically connected to the first end of the first sampling resistor and the inverting input end of the first comparator respectively, the second end of the first sampling resistor and the second output end of the current transformer are grounded respectively, the non-inverting input end of the first comparator is connected to the reference voltage, and the output end of the first comparator is electrically connected to the first input end of the AND gate logic circuit.

[0013] In one embodiment, the overcurrent detection circuit further includes a first rectifier bridge;

[0014] The first input end of the first rectifier bridge is electrically connected to the first output end of the current transformer, the second input end of the first rectifier bridge is electrically connected to the second output end of the current transformer, the first output end of the first rectifier bridge is electrically connected to the first end of the first sampling resistor and the inverting input end of the first comparator respectively, and the second output end of the first rectifier bridge is grounded.

[0015] In one embodiment, the detection circuit further includes an overvoltage detection circuit, which includes a voltage transformer, a second sampling resistor and a second comparator;

[0016] The first input end of the voltage transformer is electrically connected to the power supply circuit, the second input end of the voltage transformer is grounded, the first output end of the voltage transformer is electrically connected to the first end of the second sampling resistor and the inverting input end of the second comparator respectively, the second end of the second sampling resistor and the second output end of the voltage transformer are grounded respectively, the non-inverting input end of the second comparator is connected to the reference voltage, and the output end of the second comparator is electrically connected to the first input end of the AND gate logic circuit.

[0017] In one embodiment, the overvoltage detection circuit further includes a second rectifier bridge;

[0018] The first input end of the second rectifier bridge is electrically connected to the first output end of the voltage transformer, the second input end of the second rectifier bridge is electrically connected to the second output end of the voltage transformer, the first output end of the second rectifier bridge is electrically connected to the first end of the second sampling resistor and the inverting input end of the second comparator respectively, and the second output end of the second rectifier bridge is grounded.

[0019] In one embodiment, the detection circuit further includes an over-temperature detection circuit, and the over-temperature detection circuit includes a positive temperature coefficient thermistor, a first voltage-dividing resistor, and a third comparator;

[0020] The first end of the positive temperature coefficient thermistor is electrically connected to the first end of the first voltage-dividing resistor and the inverting input end of the third comparator respectively, the second end of the positive temperature coefficient thermistor is grounded, the second end of the first voltage-dividing resistor is connected to the working voltage, the non-inverting input end of the third comparator is connected to the reference voltage, and the output end of the third comparator is electrically connected to the first input end of the AND gate logic circuit;

[0021] Positive temperature coefficient thermistors are used to sense temperature in electronic switches.

[0022] In one embodiment, the control circuit includes a controller and a fourth comparator;

[0023] The output end of the controller is electrically connected to the non-inverting input end of the fourth comparator, the inverting input end of the fourth comparator is connected to the reference voltage, and the output end of the fourth comparator is electrically connected to the second input end of the AND gate logic circuit.

[0024] In one embodiment, the solid-state relay further includes a voltage-stabilizing diode and a second voltage-dividing resistor;

[0025] The anode of the voltage-stabilizing diode is grounded, the first end of the second voltage-dividing resistor is connected to the working voltage, and the cathode of the voltage-stabilizing diode is electrically connected to the second end of the second voltage-dividing resistor to output a reference voltage.

[0026] In one embodiment, the solid state relay further comprises a photocoupler;

[0027] The input end of the photoelectric coupler is electrically connected to the output end of the AND gate logic circuit, and the output end of the photoelectric coupler is electrically connected to the control end of the electronic switch.

[0028] In one embodiment, the electronic switch includes a thyristor and the solid-state relay further includes a current limiting resistor;

[0029] The gate of the thyristor is electrically connected to the first end of the current limiting resistor and the output end of the AND gate logic circuit respectively, and the cathode of the thyristor is electrically connected to the second end of the current limiting resistor.

[0030] Through the above-mentioned solid-state relay, the control circuit is only used to output the corresponding control signal according to the conduction demand it receives, and the collection of power supply parameters is realized through the corresponding detection circuit. The detection circuit outputs the corresponding detection result signal according to the detected power supply parameters. The control signal and the detection result signal respectively correspond to whether there is a conduction demand and whether the power supply parameters are normal. The AND logic judgment function of the AND gate logic circuit is used to output the conduction signal to the electronic switch when the control signal and the detection result signal meet the requirements at the same time, thereby driving the electronic switch to conduct, and then realizing the conduction of the power supply circuit. In this way, the judgment of the two conditions is completely realized by hardware, with fast response speed and extremely low delay, and it is not easy to cause the entire switch control to fail due to delay problems. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0032] Figure 1 This is a schematic diagram of the structure of a solid-state relay in one embodiment of the utility model;

[0033] Figure 2 The following is a schematic diagram of a specific circuit implementation of a solid-state relay in one embodiment of the utility model. DETAILED DESCRIPTION

[0034] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the utility model.

[0035] In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, which are only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. In the present application, the word "exemplary" is used to mean "used as an example, illustration or description". Any embodiment described as "exemplary" in the present application is not necessarily interpreted as being more preferred or more advantageous than other embodiments. In order to enable any person skilled in the art to implement and use the utility model, the following description is given. In the following description, details are listed for the purpose of explanation. It should be understood that one of ordinary skill in the art can recognize that the utility model can be implemented without using these specific details. In other examples, well-known structures and processes will not be elaborated in detail to avoid unnecessary details that make the description of the utility model obscure. Therefore, the utility model is not intended to be limited to the embodiments shown, but is consistent with the widest range of principles and features disclosed in this application.

[0036] like Figure 1As shown, in one embodiment, the utility model provides a solid-state relay, which includes an electronic switch, a control circuit, a detection circuit and an AND gate logic circuit.

[0037] Among them, the AND gate logic circuit is used to perform AND logic judgment on the input, and then complete the corresponding output. For example, taking the high and low level signals as an example, the AND gate logic circuit outputs a high level only when both inputs are high levels.

[0038] The input end of the detection circuit is electrically connected to the power supply loop, and the output end of the detection circuit is electrically connected to the first input end of the AND gate logic circuit to detect the power supply parameters on the power supply loop and output the detection result signal to the AND gate logic circuit.

[0039] Among them, the detection circuit can be various types of detection circuits, such as an overcurrent detection circuit, an overvoltage detection circuit and / or an overtemperature detection circuit, etc. The power supply parameter and the detection result signal are related to the type of the detection circuit. When the detection circuit is an overcurrent detection circuit, the corresponding power supply parameter is the current value, and the corresponding detection result signal includes a first detection result signal indicating that the current is not too high and a second detection result signal indicating that the current is too high; when the detection circuit is a high-voltage detection circuit, the corresponding power supply parameter is the voltage value, and the corresponding detection result signal includes a first detection result signal indicating that the voltage is not too high and a second detection result signal indicating that the voltage is too high; when the detection circuit is an overtemperature detection circuit, the corresponding power supply parameter is the temperature value, and the corresponding detection result signal includes a first detection result signal indicating that the temperature is not too high and a second detection result signal indicating that the temperature is too high.

[0040] The output terminal of the control circuit is electrically connected to the second input terminal of the AND gate logic circuit to output a control signal to the AND gate logic circuit.

[0041] The control circuit is used to receive control instructions sent by a host computer or other device, and output corresponding control signals according to the instructions. Specifically, the control signal includes a first control signal representing a conduction requirement and a second control signal representing a disconnection requirement.

[0042] The output end of the AND gate logic circuit is electrically connected to the control end of the electronic switch, so as to output a conduction signal to the electronic switch when both the detection result signal and the control signal meet the requirements.

[0043] Among them, taking the high and low levels as an example, the first control signal output by the control circuit can be a high level, that is, when the control signal is at a high level, it represents the conduction requirement, and the first detection result signal output by the detection circuit can be a high level, that is, when the detection result signal is at a high level, it represents that the power supply parameter is not too high. When the AND gate logic circuit receives two high levels, based on the principle of AND gate logic, the AND gate logic circuit outputs a high level to the electronic switch, that is, a conduction signal.

[0044] The electronic switch is connected in series with the power supply circuit to control the conduction of the power supply circuit according to the conduction signal.

[0045] Through the above-mentioned solid-state relay, the control circuit is only used to output the corresponding control signal according to the conduction demand it receives, and the collection of power supply parameters is realized through the corresponding detection circuit. The detection circuit outputs the corresponding detection result signal according to the detected power supply parameters. The control signal and the detection result signal respectively correspond to whether there is a conduction demand and whether the power supply parameters are normal. The AND logic judgment function of the AND gate logic circuit is used to output the conduction signal to the electronic switch when the control signal and the detection result signal meet the requirements at the same time, thereby driving the electronic switch to conduct, and then realizing the conduction of the power supply circuit. The judgment of the two conditions is completely realized by hardware, with fast response speed and extremely low delay, and it is not easy to cause the entire switch control to fail due to delay problems.

[0046] In one embodiment, the detection circuit includes an overcurrent detection circuit.

[0047] like Figure 2 As shown, the overcurrent detection circuit includes a current transformer CT1, a first sampling resistor R9, a first comparator U3C and a first rectifier bridge BR1. Figure 2 In the embodiment, the electronic switch comprises a thyristor D3.

[0048] Among them, the input end of the current transformer CT1 is connected in series with the power supply circuit (including the live wire input end L_IN, the live wire output end L_OUT and the line between the two) and the thyristor D3, the first output end of the current transformer CT1 is electrically connected to the first input end of the first rectifier bridge BR1, the first output end of the first rectifier bridge BR1 is electrically connected to the first end of the first sampling resistor R9 and the inverting input end of the first comparator U3C respectively, the second output end of the current transformer CT1 is electrically connected to the second input end of the first rectifier bridge BR1, the second output end of the first rectifier bridge BR1 and the second end of the first sampling resistor R9 are grounded respectively, the non-inverting input end of the first comparator U3C is connected to the reference voltage VREF, and the output end of the first comparator U3C is electrically connected to the first input end of the AND gate logic circuit U2.

[0049] Among them, Figure 2 In the embodiment, the power supply circuit is an AC circuit, so it is necessary to add a first rectifier bridge BR1 to rectify the AC signal output by the current transformer CT1, so as to output the rectified DC signal to the inverting input terminal of the first comparator U3C. Of course, in other embodiments, when the power supply circuit is a DC circuit, the first rectifier bridge BR1 is not required, and the first output terminal of the current transformer CT1 can be directly electrically connected to the inverting input terminal of the first comparator U3C.

[0050] Among them, when the current in the power supply circuit is too high, the voltage connected to the inverting input terminal of the first comparator U3C is relatively high, which is greater than the reference voltage VREF connected to the non-inverting input terminal of the first comparator U3C, so that the output terminal of the first comparator U3C outputs a low level; similarly, when the current in the power supply circuit is not too high, the voltage connected to the inverting input terminal of the first comparator U3C is relatively low, which is less than the reference voltage VREF connected to the non-inverting input terminal of the first comparator U3C, so that the output terminal of the first comparator U3C outputs a high level.

[0051] like Figure 2 As shown, in one embodiment, the detection circuit further includes an overvoltage detection circuit and a first current limiting resistor R2, and the overvoltage detection circuit includes a voltage transformer VT1, a second sampling resistor R12, a second comparator U3D and a second rectifier bridge BR2.

[0052] Among them, the first input end of the voltage transformer VT1 is electrically connected to the power supply circuit (including the live wire input end L_IN, the live wire output end L_OUT and the line between the two), the second input end of the voltage transformer VT1 is grounded, the first output end of the voltage transformer VT1 is electrically connected to the first input end of the second rectifier bridge BR2, the first output end of the second rectifier bridge BR2 is electrically connected to the first end of the second sampling resistor R12 and the inverting input end of the second comparator U3D respectively, the second output end of the voltage transformer is electrically connected to the second input end of the second rectifier bridge BR2, the second end of the second sampling resistor R12 and the second output end of the second rectifier bridge BR2 are grounded respectively, the in-phase input end of the second comparator U3D is connected to the reference voltage VREF, the output end of the second comparator U3D is electrically connected to the output end of the first comparator U3C, the first input end of the AND gate logic circuit U2 and the first end of the first current limiting resistor R2 respectively, and the second end of the first current limiting resistor R2 is connected to the working voltage of 5V.

[0053] Among them, Figure 2 In the embodiment, the power supply circuit is an AC circuit, so a second rectifier bridge BR2 is required to rectify the AC signal output by the voltage transformer VT1, so as to output the rectified DC signal to the inverting input terminal of the second comparator U3D. Of course, in other embodiments, when the power supply circuit is a DC circuit, the second rectifier bridge BR2 is not required, and the first output terminal of the voltage transformer VT1 can be directly electrically connected to the inverting input terminal of the second comparator U3D.

[0054] Among them, when the voltage in the power supply circuit is too high, the voltage connected to the inverting input terminal of the second comparator U3D is higher, which is greater than the reference voltage VREF connected to the non-inverting input terminal of the second comparator U3D, so that the output terminal of the second comparator U3D outputs a low level; similarly, when the voltage in the power supply circuit is not too high, the voltage connected to the inverting input terminal of the second comparator U3D is lower, which is less than the reference voltage VREF connected to the non-inverting input terminal of the second comparator U3D, so that the output terminal of the second comparator U3D outputs a high level.

[0055] Among them, the first comparator U3C and the second comparator U3D output the 5V working voltage connected to the first current limiting resistor R2. When the first comparator U3C outputs GND and the second comparator U3D outputs GND, the 5V working voltage connected to the first current limiting resistor R2 is pulled down, and the first input end of the AND gate logic circuit U2 is connected to a low level; when the first comparator U3C outputs GND and the second comparator U3D outputs a high impedance state, the 5V working voltage connected to the first current limiting resistor R2 is pulled down by the GND output by the first comparator U3C, and the first input end of the AND gate logic circuit U2 is connected to a low level; when the first comparator U3C outputs a high impedance state and the second comparator U3D outputs a high impedance state, the 5V working voltage connected to the first current limiting resistor R2 is not pulled down, and the first input end of the AND gate logic circuit U2 is connected to a high level. That is to say, when at least one of overcurrent and overvoltage occurs, the first input terminal of the AND gate logic circuit U2 can only be connected to a low level. Only when neither overcurrent nor overvoltage occurs, the first input terminal of the AND gate logic circuit U2 can be connected to a high level (the premise is that the detection circuit only includes an overcurrent detection circuit and an overvoltage detection circuit).

[0056] Among them, in other embodiments, the overvoltage detection circuit can exist alone, that is, there is only an overvoltage detection circuit but no overcurrent detection circuit; in this way, the output of the second comparator U3D in the overvoltage detection circuit directly determines the level of the first input terminal of the AND gate logic circuit U2.

[0057] In one embodiment, the detection circuit further includes an over-temperature detection circuit.

[0058] Among them, Figure 2 As shown, the over-temperature detection circuit includes a positive temperature coefficient thermistor RT1, a first voltage-dividing resistor R7 and a third comparator U3B.

[0059] Among them, the first end of the positive temperature coefficient thermistor RT1 is electrically connected to the first end of the first voltage-dividing resistor R7 and the inverting input end of the third comparator U3B respectively, the second end of the positive temperature coefficient thermistor RT1 is grounded, the second end of the first voltage-dividing resistor R7 is connected to the working voltage of 5V, the non-inverting input end of the third comparator U3B is connected to the reference voltage VREF, and the output end of the third comparator U3B is electrically connected to the first end of the first current limiting resistor R2, the first input end of the AND gate logic circuit U2, the output end of the first comparator U3C and the output end of the second comparator U3D respectively.

[0060] The positive temperature coefficient thermistor RT1 is used to sense the electronic switch (such as Figure 2 The temperature of the thyristor D3 in the circuit.

[0061] The positive temperature coefficient thermistor RT1 mainly directly senses the temperature of the heat sink corresponding to the thyristor D3 , thereby indirectly sensing the temperature of the thyristor D3 .

[0062] Among them, when the temperature of the thyristor D3 is too high, the resistance value of the positive temperature coefficient thermistor RT1 is relatively high. Under the voltage dividing effect of the positive temperature coefficient thermistor RT1 and the first voltage dividing resistor R7, the voltage connected to the inverting input terminal of the third comparator U3B is relatively high, which is greater than the reference voltage VREF connected to the non-inverting input terminal of the third comparator U3B, so that the output terminal of the third comparator U3B outputs a low level; similarly, when the temperature of the thyristor D3 is not too high, the resistance value of the positive temperature coefficient thermistor RT1 is relatively low. Under the voltage dividing effect of the positive temperature coefficient thermistor RT1 and the first voltage dividing resistor R7, the voltage connected to the inverting input terminal of the third comparator U3B is relatively low, which is less than the reference voltage VREF connected to the non-inverting input terminal of the third comparator U3B, so that the output terminal of the third comparator U3B outputs a high level.

[0063] Among them, the same as the above embodiment, when the detection circuit includes an overcurrent detection circuit, an overvoltage detection circuit and an overtemperature detection circuit at the same time, when at least one of overcurrent, overvoltage and overtemperature occurs, the first input terminal of the AND gate logic circuit U2 can only be connected to a low level, and only when overcurrent, overvoltage and overtemperature do not occur, the first input terminal of the AND gate logic circuit U2 can be connected to a high level. The specific principles and details can be referred to the above embodiment, and will not be repeated here.

[0064] Among them, in other embodiments, the over-temperature detection circuit can exist alone, that is, there is only an over-temperature detection circuit, but no over-current detection circuit and over-voltage detection circuit; in this way, the output of the third comparator U3B in the over-temperature detection circuit directly determines the level of the first input terminal of the AND gate logic circuit U2.

[0065] like Figure 2As shown, in one embodiment, the control circuit includes a controller and a fourth comparator U3A.

[0066] Among them, the output end of the controller is electrically connected to the non-inverting input end of the fourth comparator U3A through the resistor R5 and the resistor R6, so that the voltage signal CTR output by the controller is transmitted to the non-inverting input end of the fourth comparator U3A through the voltage dividing effect of the resistor R5 and the resistor R6, the inverting input end of the fourth comparator U3A is connected to the reference voltage VREF, and the output end of the fourth comparator U3A is electrically connected to the second input end of the AND gate logic circuit U2.

[0067] Among them, when the upper computer sends an instruction representing the conduction requirement to the controller, the controller outputs a high-level voltage signal CTR, and the non-inverting input terminal of the fourth comparator U3A is connected to a high level, which is greater than the reference voltage VREF connected to the inverting input terminal of the fourth comparator U3A, so that the fourth comparator U3A outputs a high level; when the upper computer sends an instruction representing the disconnection requirement to the controller, the controller outputs a low-level voltage signal CTR, and the non-inverting input terminal of the fourth comparator U3A is connected to a low level, which is less than the reference voltage VREF connected to the inverting input terminal of the fourth comparator U3A, so that the fourth comparator U3A outputs a low level.

[0068] like Figure 2 As shown, in one embodiment, the solid-state relay further includes a voltage-stabilizing diode ZD1 and a second voltage-dividing resistor R8.

[0069] The anode of the voltage-stabilizing diode ZD1 is grounded, the first end of the second voltage-dividing resistor R8 is connected to the working voltage of 5V, and the cathode of the voltage-stabilizing diode ZD1 is electrically connected to the second end of the second voltage-dividing resistor R8 to output the reference voltage VREF.

[0070] Among them, when the 5V voltage connected to the second voltage-dividing resistor R8 does not jump, the voltage drop on the voltage-dividing diode ZD1 is less than its breakdown voltage, thereby outputting a 5V reference voltage VREF to the next stage; when the 5V voltage connected to the second voltage-dividing resistor R8 jumps, the voltage drop on the voltage-dividing diode ZD1 is greater than its breakdown voltage, and the voltage-dividing diode ZD1 is turned on, thereby directing the jump voltage to the ground, thereby protecting the next stage.

[0071] like Figure 2 As shown, in one embodiment, the solid-state relay further includes a photocoupler U1.

[0072] The input end of the photocoupler U1 is electrically connected to the output end of the AND gate logic circuit U2, and the output end of the photocoupler U1 is electrically connected to the control end of the electronic switch (such as Figure 2 The gate of the thyristor D3 in is electrically connected.

[0073] Among them, the photocoupler U1 can play a role of electrical isolation, thereby achieving electrical isolation between the power supply circuit and the control circuit, and avoiding interference of the high-voltage side on the low-voltage side.

[0074] like Figure 2 As shown, in one embodiment, the electronic switch includes a thyristor D3, and the solid-state relay further includes a second current limiting resistor R10.

[0075] The gate of the thyristor D3 is electrically connected to the first end of the second current limiting resistor R10 and the output end of the AND gate logic circuit U2 (specifically, Figure 2 In the embodiment, the gate of the thyristor D3 is electrically connected to the output end of the AND gate logic circuit U2 through the photoelectric coupler U1, and the cathode of the thyristor D3 is electrically connected to the second end of the second current limiting resistor R10.

[0076] The second current limiting resistor R10 is used to control the trigger current of the thyristor D3 and provide certain protection. The specific functions include:

[0077] Limiting the gate current: By selecting the second current limiting resistor R10 with an appropriate value, the gate current can be limited to prevent excessive current from damaging the thyristor D3;

[0078] Controlling the triggering speed: The second current limiting resistor R10 can affect the triggering speed of the thyristor D3. Properly adjusting the value of the second current limiting resistor R10 can control the opening and closing speed of the thyristor D3 to meet the circuit design requirements;

[0079] Reducing electromagnetic interference: The second current limiting resistor R10 can also help reduce electromagnetic interference in the circuit and improve the stability and reliability of the system.

[0080] It should be noted that Figure 2 The components not mentioned in the above embodiments are all elements required to realize the basic functions of the circuit, and their specific functions will not be repeated here.

[0081] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the detailed description of other embodiments above, and will not be repeated here.

[0082] The solid-state relay provided by the present invention is introduced in detail above. The principle and implementation mode of the present invention are explained by using specific examples in this article. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for technicians in this field, according to the idea of ​​the present invention, there will be changes in the specific implementation mode and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

[0083] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

Claims

1. A solid-state relay, characterized in that: The solid state relay comprises: Electronic switches, control circuits, detection circuits and AND gate logic circuits; The input end of the detection circuit is electrically connected to the power supply circuit, and the output end of the detection circuit is electrically connected to the first input end of the AND gate logic circuit to detect the power supply parameters on the power supply circuit and output a detection result signal to the AND gate logic circuit; The output end of the control circuit is electrically connected to the second input end of the AND gate logic circuit to output a control signal to the AND gate logic circuit; The output end of the AND gate logic circuit is electrically connected to the control end of the electronic switch, so as to output a conduction signal to the electronic switch when both the detection result signal and the control signal meet the requirements; The electronic switch is connected in series with the power supply circuit to control the power supply circuit to be turned on according to the turn-on signal.

2. The solid-state relay according to claim 1, characterized in that: The detection circuit includes an overcurrent detection circuit, and the overcurrent detection circuit includes a current transformer, a first sampling resistor and a first comparator; The input end of the current transformer is connected in series with the power supply circuit and the electronic switch, the first output end of the current transformer is electrically connected to the first end of the first sampling resistor and the inverting input end of the first comparator respectively, the second end of the first sampling resistor and the second output end of the current transformer are grounded respectively, the non-inverting input end of the first comparator is connected to the reference voltage, and the output end of the first comparator is electrically connected to the first input end of the AND gate logic circuit.

3. The solid-state relay according to claim 2, characterized in that: The overcurrent detection circuit also includes a first rectifier bridge; The first input end of the first rectifier bridge is electrically connected to the first output end of the current transformer, the second input end of the first rectifier bridge is electrically connected to the second output end of the current transformer, the first output end of the first rectifier bridge is electrically connected to the first end of the first sampling resistor and the inverting input end of the first comparator respectively, and the second output end of the first rectifier bridge is grounded.

4. The solid-state relay according to claim 1, characterized in that: The detection circuit further includes an overvoltage detection circuit, which includes a voltage transformer, a second sampling resistor and a second comparator; The first input end of the voltage transformer is electrically connected to the power supply circuit, the second input end of the voltage transformer is grounded, the first output end of the voltage transformer is electrically connected to the first end of the second sampling resistor and the inverting input end of the second comparator respectively, the second end of the second sampling resistor and the second output end of the voltage transformer are grounded respectively, the non-inverting input end of the second comparator is connected to the reference voltage, and the output end of the second comparator is electrically connected to the first input end of the AND gate logic circuit.

5. The solid-state relay according to claim 4, characterized in that: The overvoltage detection circuit also includes a second rectifier bridge; The first input end of the second rectifier bridge is electrically connected to the first output end of the voltage transformer, the second input end of the second rectifier bridge is electrically connected to the second output end of the voltage transformer, the first output end of the second rectifier bridge is electrically connected to the first end of the second sampling resistor and the inverting input end of the second comparator respectively, and the second output end of the second rectifier bridge is grounded.

6. The solid-state relay according to claim 1, characterized in that: The detection circuit also includes an over-temperature detection circuit, which includes a positive temperature coefficient thermistor, a first voltage-dividing resistor and a third comparator; The first end of the positive temperature coefficient thermistor is electrically connected to the first end of the first voltage-dividing resistor and the inverting input end of the third comparator respectively, the second end of the positive temperature coefficient thermistor is grounded, the second end of the first voltage-dividing resistor is connected to the working voltage, the non-inverting input end of the third comparator is connected to the reference voltage, and the output end of the third comparator is electrically connected to the first input end of the AND gate logic circuit; The positive temperature coefficient thermistor is used to sense the temperature of the electronic switch.

7. The solid-state relay according to claim 1, characterized in that: The control circuit includes a controller and a fourth comparator; The output end of the controller is electrically connected to the non-inverting input end of the fourth comparator, the inverting input end of the fourth comparator is connected to the reference voltage, and the output end of the fourth comparator is electrically connected to the second input end of the AND gate logic circuit.

8. The solid-state relay according to any one of claims 2 to 7, characterized in that: The solid-state relay also includes a voltage-stabilizing diode and a second voltage-dividing resistor; The anode of the voltage-regulating diode is grounded, the first end of the second voltage-dividing resistor is connected to the working voltage, and the cathode of the voltage-regulating diode is electrically connected to the second end of the second voltage-dividing resistor to output a reference voltage.

9. The solid-state relay according to claim 1, characterized in that: The solid-state relay also includes a photocoupler; The input end of the photoelectric coupler is electrically connected to the output end of the AND gate logic circuit, and the output end of the photoelectric coupler is electrically connected to the control end of the electronic switch.

10. The solid-state relay according to claim 1, characterized in that: The electronic switch includes a thyristor, and the solid-state relay also includes a current-limiting resistor; The gate of the thyristor is electrically connected to the first end of the current limiting resistor and the output end of the AND gate logic circuit respectively, and the cathode of the thyristor is electrically connected to the second end of the current limiting resistor.

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