The invention discloses an array substrate, a manufacturing method therefore, and a display panel. The array substrate includes a plurality of thin film transistor, and each thin film transistor comprises a gate electrode, an oxide semiconductor layer, and an etching barrier layer, wherein the etching barrier layer is located on the oxide semiconductor layer which includes a channel region and a non-channel region, the non-channel region includes an electrode region and a connection region, and the electrode region includes a first electrode region and a second electrode region. Each connection region includes a first connection region and a second connection region, and the first electrode region, the first connection region, the channel region, the second connection region and the secondelectrode region are sequentially arranged in a first direction, and the first direction is parallel to the array substrate. A region, covered by the corresponding etching barrier layer, of each oxide semiconductor layer is a channel region. Each gate electrode is located at one side, far from the corresponding etching barrier layer, of the corresponding oxide semiconductor layer. The width of atleast one connection region is less than the width of the channel region in a second direction. The overlapping area of the gate electrodes with the non-channel regions is reduced, and the parasiticcapacitance is also reduced.