Serial peripheral interface bus circuit with one master and multiple slaves

Abstract

The utility model relates to a one-master multi-slave serial peripheral interface bus circuit, which comprises a plurality of microprocessor control unit master devices, a plurality of microprocessor control unit slave devices, a plurality of level conversion interface chips and isolating diodes, the microprocessor control unit enters a signal main road from a master-in and slave-out bus signal of the equipment through the diodes, and the isolating diodes are arranged between the corresponding microprocessor control units and the corresponding level conversion interface chips, so that the bus level is changed from not 3V to 5V through the level conversion chips; bus signals are output after passing through the level conversion chip, the threshold value of device damage is improved, protection of the micro-processing control unit is achieved, signal isolation is achieved through the rapid on-off diode, the situation that multiple signals drive the bus signals at the same time, and data receiving is wrong is avoided, and the reliability of the device is improved. The safety and the reliability of the serial peripheral interface bus circuit of the avionics equipment can be improved.

Description

Technical Field

[0001] The utility model relates to the technical field of avionics equipment bus communication, in particular to a one-master-multiple-slave serial peripheral interface bus circuit. Background Art

[0002] For avionics equipment, the serial peripheral interface bus is a commonly used bus, often used between multiple modules of a single device. The bus is transmitted through the module connector and the bottom printed circuit board. The receiving end of the bus's master-input and slave-output signals is the master device, and the sending end is multiple slave devices. During device communication, multiple slave devices drive the signal, so only by adding isolation diodes can interference from unrelated devices be avoided and normal communication between devices be guaranteed. However, the current bus transmission rate can reach the megahertz level, but ordinary diodes cannot meet the bus transmission rate requirements, so fast-switching diodes are needed. However, there is no corresponding circuit diagram for fast-switching diodes. At the same time, the bus end of the microprocessor control unit has a voltage of 3.3V during use, so the voltage level is often interfered with when transmitting between different modules, and the corresponding voltage is also very likely to cause damage to the processor device.

[0003] The traditional one-master-multiple-slave serial peripheral interface bus circuit has the following main disadvantages: the bus directly interconnects multiple devices, and if glitch interference occurs, it can easily cause damage to the master control device, and the security is not high. Utility Model Content

[0004] The utility model provides a one-master-multiple-slave serial peripheral interface bus circuit, which realizes bus signal change through a level conversion interface chip, changing the 3.3V of the microprocessor control unit to 5V, and realizes the isolation of the master input and slave output signals through fast on-off diodes, thereby avoiding the situation where the bus signal of the master device microprocessor control unit is driven by multiple driving sources and causes bus level reception errors, and solves the current technical problems that bus voltage easily causes damage to the main control device and low safety.

[0005] In order to achieve the above technical objectives, the specific technical solutions adopted by this utility model are:

[0006] A one-master-multiple-slave serial peripheral interface bus circuit comprises a microprocessor control unit master device, a microprocessor control unit slave device, a level conversion interface chip and an isolation diode. There are multiple microprocessor control unit slave devices. The signal voltage between the microprocessor control unit master device and each microprocessor control unit slave device is changed from 3.3V to 5V via the level conversion interface chip. The master input and slave output bus signals of the microprocessor control unit slave devices enter the signal trunk through the diodes. The isolation diodes are arranged between the corresponding microprocessor control unit and the corresponding level conversion interface chip to isolate the transmitted master input and slave output signals.

[0007] Furthermore, the isolation diode adopts a fast switching diode, thereby ensuring the bus data transmission rate.

[0008] Furthermore, there are four microprocessor control unit slave devices, and each microprocessor control unit slave device performs bus transmission with the microprocessor control unit master device through a corresponding circuit.

[0009] By adopting the above technical solution, the utility model can also bring the following beneficial effects:

[0010] 1. The utility model provides an on-site detection circuit for airborne jammers. The bus level is changed to 5V through a level conversion chip. The bus signal is output after passing through the level conversion chip, thereby increasing the threshold of device damage and realizing protection of the microprocessor control unit. The signal is isolated by a fast switching diode to avoid multiple signals driving the bus signal at the same time and data reception errors. The circuit can improve the safety and reliability of the serial peripheral interface bus circuit of avionics equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0012] Figure 1 The utility model discloses a circuit block diagram of a one-master-multiple-slave serial peripheral interface bus circuit. DETAILED DESCRIPTION

[0013] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0014] The following describes the implementation of the present invention through specific concrete examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. The present invention can also be implemented or applied through other different specific implementation methods, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0015] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on the present invention, it should be understood by those skilled in the art that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects described herein can be used to implement an apparatus and / or practice a method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this apparatus and / or practice this method.

[0016] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention. The illustrations only show components related to the present invention and are not drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component can be changed at will, and the component layout type may also be more complicated.

[0017] Additionally, in the following description, specific details are provided to provide a thorough understanding of the examples. However, one skilled in the art will appreciate that the aspects described can be practiced without these specific details.

[0018] Example 1

[0019] In one embodiment of the present invention, see Figure 1The present invention discloses a one-master, multiple-slave serial peripheral interface bus circuit. A microprocessor control unit master and multiple slave devices are all powered by 3.3V. The bus signal from the microprocessor control unit master enters the signal trunk via a level conversion interface chip. The bus signal from the microprocessor control unit slave device undergoes level conversion via the level conversion interface chip. The master-input and slave-output bus signals from the microprocessor control unit slave device enter the signal trunk via diodes. The diodes are fast-switching diodes that ensure bus data transmission speeds. The four microprocessor control unit slave devices are respectively a first control unit slave device, a second control unit slave device, a third control unit slave device, and a fourth control unit slave device. Each microprocessor control unit slave device performs bus transmission with the microprocessor control unit master device via corresponding circuits and a level conversion interface chip.

[0020] In this embodiment, the model of the microprocessor control unit master device is LCR3209, the model of the microprocessor control unit slave device is LCR3209, the model of the level conversion interface chip is SM164245PA, and the model of the fast switching diode is 1N4148H.

[0021] In summary, the present invention changes the bus level from 3V to 5V through a level conversion chip. The bus signal is output after passing through the level conversion chip, thereby increasing the threshold of device damage and protecting the microprocessor control unit. Signal isolation is achieved through fast switching diodes to avoid multiple signals driving the bus signal at the same time and data reception errors. This can improve the safety and reliability of the serial peripheral interface bus circuit of avionics equipment.

[0022] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A one-master-multiple-slave serial peripheral interface bus circuit, characterized in that: It includes a microprocessor control unit master device, a microprocessor control unit slave device, a level conversion interface chip and an isolation diode. There are multiple microprocessor control unit slave devices. The signal voltage between the microprocessor control unit master device and each microprocessor control unit slave device will be changed from 3.3V to 5V through the level conversion interface chip. The isolation diode is arranged between the corresponding microprocessor control unit and the corresponding level conversion interface chip to isolate the transmitted master-in and slave-out signals.

2. The one-master-multiple-slave serial peripheral interface bus circuit according to claim 1, wherein: The isolation diode is a fast switching diode.

3. The one-master-multiple-slave serial peripheral interface bus circuit according to claim 1, wherein: There are four microprocessor control unit slave devices, and each microprocessor control unit slave device performs bus transmission with the microprocessor control unit master device through a corresponding circuit.

Images