Constant-current and constant-voltage circuit without software control

Abstract

The utility model discloses a constant-current and constant-voltage circuit without software control, which comprises a Buck power level circuit, a voltage sampling circuit, a current sampling circuit and an error amplifying circuit, and the error amplifying circuit is provided with a first error amplifier and a second error amplifier. The output end of the first error amplifier and the output end of the second error amplifier are electrically connected with the Buck power level circuit, the Buck power level circuit is electrically connected with the voltage sampling circuit and the current sampling circuit, the voltage sampling circuit is electrically connected with the first error amplifier, and the current sampling circuit is electrically connected with the second error amplifier. An FREQ pin of a Buck chip U4 is grounded, a 0.76 V voltage is obtained through voltage division by a resistor R27 and a resistor R29, so that the switching frequency of a Buck power level circuit is invalid, the voltage is controlled through a first error amplifier, the current is controlled through a second error amplifier, the first error amplifier and the second error amplifier carry out operation, and then a PWM comparator in the Buck chip U4 is controlled through a COMP pin of the Buck chip U4. Therefore, voltage and current are controlled.

Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of voltage reduction circuit, especially to a constant current constant voltage circuit without software control. BACKGROUND

[0002] BUCK circuit is a step-down conversion circuit, with the continuous progress of electronic technology, the current BUCK circuit only needs to pass through a BUCK integrated chip, a power inductance and a plurality of capacitors and resistors to form, and the integration degree is high. In the desktop DC regulated power supply, it needs to have CC / CV (constant current / constant voltage) automatic switching function, however, the current BUCK integrated chip is built-in error amplifier, and the number and connection mode of error amplifier need to be adjusted to realize the CC / CV automatic switching function, and a programmable voltage needs to be introduced at the Vref end, and it is difficult to carry out physical operation for the highly integrated BUCK integrated chip, so that the BUCK circuit is difficult to customize the function, and the constant current constant voltage is often realized by the software mode, the control mode is complex, and the reaction speed is slow, therefore, it is necessary to improve. SUMMARY

[0003] In view of the defects in the prior art, the utility model aims at providing a hardware constant voltage constant current circuit for simplifying the self-defined function, which realizes the constant current constant voltage without software, and improves the reaction speed.

[0004] In order to realize the above object, the utility model adopts the technical scheme of a constant current constant voltage circuit without software control, including buck power stage circuit, voltage sampling circuit, current sampling circuit and error amplifier circuit, the error amplifier circuit is provided with first error amplifier and second error amplifier, the output end of first error amplifier and second error amplifier is connected with buck power stage circuit respectively, and the buck power stage circuit is connected with voltage sampling circuit and current sampling circuit respectively, the voltage sampling circuit is connected with first error amplifier, and the current sampling circuit is connected with second error amplifier, the buck power stage circuit is provided with buck chip U4, the FB pin of buck chip U4 is connected with resistance R27 and resistance R29, the FB pin of buck chip U4 is connected with the second end of resistance R27 and the first end of resistance R29 respectively, the first end of resistance R27 is connected with VDD_3V3 power supply end, the second end of resistance R29 and the FREQ pin of buck chip U4 are grounded respectively, and the PG pin of buck chip U4 is used to be connected with processor.

[0005] Further, the output terminal of the first error amplifier is electrically connected to the COMP pin of the Buck chip U4 through a diode D11, the inverting input terminal of the first error amplifier is electrically connected to the voltage sampling circuit, the non-inverting input terminal of the first error amplifier is used for receiving the PWM_COMP signal of the processor, the positive power supply terminal of the first error amplifier is electrically connected to the ACDD_3V3 power supply terminal, and the negative power supply terminal of the first error amplifier is grounded.

[0006] The output terminal of the second error amplifier is electrically connected to the COMP pin of the Buck chip U4 through a diode D12, the inverting input terminal of the second error amplifier is electrically connected to the current sampling circuit, the non-inverting input terminal of the second error amplifier is used for receiving the PWM_CURRENT signal of the processor, the positive power supply terminal of the second error amplifier is electrically connected to the AVDD_3V3 power supply terminal, and the negative power supply terminal of the second error amplifier is grounded.

[0007] Further, the error amplifier circuit is a two-stage negative feedback circuit, and the error amplifier circuit includes an operational amplifier chip U6, an inductor L5, resistors R47, R41, R49, R65, R52, R10, R42, R45, R4, R46, R43, R5, R1, R44, R3, capacitors C86, C42, C44, C91, C85, C45, C46, C47, C41, C40, C72, C43, C48, a diode D11, and a diode D12.

[0008] The OUT1 pin of the operational amplifier chip U6 is respectively electrically connected to the first end of the resistor R41, the first end of the capacitor C42, and the first end of the capacitor C86, the second end of the resistor R41 is electrically connected to the negative electrode of the diode D11, the positive electrode of the diode D11 is electrically connected to the first end of the resistor R65, the second end of the resistor R65 is electrically connected to the COMP pin of the Buck chip U4,

[0009] The IN1- pin of the operational amplifier chip U6 is respectively electrically connected to the second end of the resistor R47, the second end of the capacitor C86, and the first end of the resistor R49, the second end of the resistor R47 is electrically connected to the second end of the capacitor C42, and the second end of the resistor R49 is electrically connected to the voltage sampling circuit.

[0010] The IN1+ pin of the operational amplifier chip U6 is electrically connected with the first end of the capacitor C44, the first end of the capacitor C91 and the first end of the resistor R52 respectively, the second end of the resistor R52 is electrically connected with the first end of the capacitor C85 and the first end of the resistor R10 respectively, the second end of the resistor R10 is electrically connected with the first end of the capacitor C45 and the first end of the resistor R4 respectively, the second end of the resistor R4 is electrically connected with the processor, for receiving the PWM_CURRENT signal, and the second ends of the capacitor C44, the capacitor C91, the capacitor C85 and the capacitor C45 are grounded respectively;

[0011] The OUT2 pin of the operational amplifier chip U6 is electrically connected with the second end of the resistor R42, the second end of the resistor R45, the first end of the capacitor C41, the first end of the capacitor C72 and the first end of the resistor R43 respectively, the first end of the resistor R42 is electrically connected with the negative electrode of the diode D12, the positive electrode of the diode D12 is electrically connected with the first end of the resistor R65, the second end of the resistor R43 is electrically connected with the first end of the resistor R44,

[0012] The IN2- pin of the operational amplifier chip U6 is electrically connected with the second end of the resistor R46, the second end of the capacitor C72 and the current sampling circuit respectively, the first end of the resistor R46 is electrically connected with the second end of the capacitor C41,

[0013] The IN2+ pin of the operational amplifier chip U6 is electrically connected with the first end of the capacitor C40 and the first end of the resistor R5 respectively, the second end of the resistor R5 is electrically connected with the first end of the capacitor C43 and the first end of the resistor R1 respectively, the second end of the resistor R1 is electrically connected with the first end of the capacitor C48 and the first end of the resistor R3 respectively, the second end of the resistor R3 is electrically connected with the processor, for receiving the PWM_CURRENT signal, and the second ends of the capacitor C40, the capacitor C43 and the capacitor C48 are grounded respectively.

[0014] The V+ power supply end of the operational amplifier chip U6 is electrically connected with the second end of the inductor L5, the first end of the capacitor C46 and the first end of the capacitor C47 respectively, the first end of the inductor L5 is electrically connected with the first end of the resistor R45 and the AVDD_3V3 power supply end respectively, and the V- power supply end of the operational amplifier chip U6, the second end of the capacitor C46 and the second end of the capacitor C47 are grounded respectively.

[0015] In a further technical solution, the model of the operational amplifier chip U6 is GS8592-MR.

[0016] In a further technical solution, the second end of the resistor R44 is connected with a current protection circuit.

[0017] Further, the Buck power stage circuit comprises a Buck chip U4, a resistor R16, a resistor R20, a resistor R21, a resistor R22, a resistor R23, a resistor R91, a resistor R17, a resistor R18, a resistor R24, a resistor R27, a resistor R29, a resistor R25, a resistor R26, a resistor R12, a resistor R19, a resistor R30, a resistor R37, a resistor R36, a capacitor C33, a capacitor C24, a capacitor C88, a capacitor C76, a capacitor C25, a capacitor C27, a capacitor C29, a capacitor C30, a capacitor C31, a capacitor C32, an inductor L2, a diode D9, an NMOS tube Q2, an NMOS tube Q3 and a light emitting diode LED2,

[0018] An IN pin of the Buck chip U4 is electrically connected with a POWER_VCC power supply end,

[0019] A VCC1 pin of the Buck chip U4 is electrically connected with a VCC1 power supply end,

[0020] A VCC2 pin of the Buck chip U4 is electrically connected with the VCC1 power supply end and a second end of the resistor R16 respectively, a first end of the resistor R16 is electrically connected with a DCDC_5V power supply end,

[0021] An ILIM pin of the Buck chip U4 is electrically connected with a second end of the resistor R30 and a first end of the resistor R37 respectively, a first end of the resistor R30 is electrically connected with the VCC1 power supply end, and a second end of the resistor R37 is grounded,

[0022] A CCM / AAM pin of the Buck chip U4 is electrically connected with a second end of the resistor R20, and a first end of the resistor R20 is grounded,

[0023] A PG pin of the Buck chip U4 is electrically connected with a processor and a second end of the resistor R36 respectively, a first end of the resistor R36 is electrically connected with a negative electrode of the light emitting diode LED2, and a positive electrode of the light emitting diode LED2 is electrically connected with the VCC1 power supply end,

[0024] An EN / SYNC pin of the Buck chip U4 is electrically connected with a second end of the resistor R21 and a first end of the resistor R22 respectively, a first end of the resistor R21 is electrically connected with the processor, and a second end of the resistor R22 is grounded,

[0025] A FREQ pin of the Buck chip U4 is electrically connected with a first end of the resistor R23, and a second end of the resistor R23 is grounded,

[0026] An SGND pin, a PGND pin and an ePAD pin of the Buck chip U4 are grounded respectively,

[0027] The COMP pin of the Buck chip U4 is electrically connected with the first end of the diode D11, the diode D12 and the resistor R91 respectively, the second end of the resistor R91 is grounded,

[0028] The SS pin of the Buck chip U4 is electrically connected with the first end of the capacitor C33, the second end of the capacitor C33 is grounded,

[0029] The SYNCO pin of the Buck chip U4 is electrically connected with the first end of the resistor R24, the second end of the resistor R24 is grounded,

[0030] The FB pin of the Buck chip U4 is electrically connected with the second end of the resistor R27 and the first end of the resistor R29 respectively, the first end of the resistor R27 is electrically connected with the VDD_3V3 power supply end, the second end of the resistor R29 is grounded,

[0031] The SENSE- pin of the Buck chip U4 is electrically connected with the first end and the ground end of the resistor R25 respectively, the second end of the resistor R25 is electrically connected with the ground end, the first end of the resistor R26, the SENSE+ pin of the Buck chip U4 and the current sampling circuit respectively, the second end of the resistor R26 is electrically connected with the current sampling circuit and the ground end respectively,

[0032] The BG pin of the Buck chip U4 is electrically connected with the gate of the NMOS tube Q3, the source of the NMOS tube Q3 is grounded,

[0033] The SW pin of the Buck chip U4 is electrically connected with the second end of the capacitor C24, the drain of the NMOS tube Q3, the source of the NMOS tube Q2, the first end of the resistor R12 and the first end of the inductor L2 respectively, the first end of the capacitor C24 is electrically connected with the second end of the resistor R18 and the negative electrode of the diode D9 respectively, the positive electrode of the diode D9 is electrically connected with the VCC1 power supply end, the second end of the resistor R12 is electrically connected with the first end of the capacitor C88, the second end of the capacitor C88 is grounded, the second end of the inductor L2 is electrically connected with the DCDC_POWER power supply end, the first end of the capacitor C76, the first end of the capacitor C25, the first end of the capacitor C27, the first end of the capacitor C29, the first end of the capacitor C30, the first end of the capacitor C31 and the first end of the resistor R19 respectively, the second end of the resistor R19 is electrically connected with the first end of the capacitor C32, the second end of the capacitor C76, the second end of the capacitor C25, the second end of the capacitor C27, the second end of the capacitor C29, the second end of the capacitor C30, the second end of the capacitor C31 and the second end of the capacitor C32 are grounded respectively,

[0034] The BST pin of the Buck chip U4 is electrically connected with the first end of the resistor R18,

[0035] The TG pin of the Buck chip U4 is electrically connected with the first end of the resistor R17, the second end of the resistor R17 is electrically connected with the gate of the NMOS tube Q2 respectively, and the drain of the NMOS tube Q2 is electrically connected with the POWER_VCC power supply end.

[0036] In a further technical solution, the current sampling circuit comprises an operational amplifier chip U5, an inductor L4, a diode D1, a diode D4, a resistor R86, a resistor R39, a resistor R33, a resistor R38, a resistor R34, a resistor R31, a resistor R35, a resistor R32, a resistor R28, a resistor R51, a resistor R50, a resistor R40, a capacitor C37, a capacitor C87, a capacitor C36, a capacitor C39 and a capacitor C38,

[0037] The OUT1 pin of the operational amplifier chip U5 is electrically connected with the first end of the resistor R31, the first end of the resistor R34, the first end of the capacitor C37 and the third end of the diode D1 respectively, the second end of the resistor R31 is electrically connected with the first end of the capacitor C87 and the processor respectively, the second end of the capacitor C87 is grounded, the first end of the diode D1 is grounded, the second end of the diode D1 is electrically connected with the AVDD_3V3 power supply end,

[0038] The IN1- pin of the operational amplifier chip U5 is electrically connected with the second end of the resistor R34, the second end of the capacitor C37 and the first end of the resistor R39 respectively, and the second end of the resistor R39 is grounded.

[0039] The IN1+ pin of the operational amplifier chip U5 is electrically connected with the first end of the resistor R38, the first end of the resistor R33 and the second end of the resistor R86 respectively, the first end of the resistor R86 is electrically connected with the VDD_3V3 power supply end, the V- pin of the operational amplifier chip U5, the second end of the resistor R33 and the second end of the resistor R38 are grounded respectively.

[0040] The V+ pin of the operational amplifier chip U5 is electrically connected with the second end of the inductor L4, the first end of the capacitor C36 and the first end of the capacitor C39 respectively, the first end of the inductor L4 is electrically connected with the AVDD_3V3 power supply end, the second end of the capacitor C36 and the second end of the capacitor C39 are grounded respectively.

[0041] The OUT2 pin of the operational amplifier chip U5 is electrically connected with the third end of the diode D4, the first end of the resistor R35, the first end of the capacitor C38 and the first end of the resistor R32 respectively, the first end of the diode D4 is grounded, the second end of the diode D4 is electrically connected with the AVDD_3V3 power supply end, the second end of the resistor R32 is electrically connected with the second error amplifier.

[0042] The IN2-pin of the operational amplifier chip U5 is electrically connected with the second end of the resistor R35, the second end of the capacitor C38 and the second end of the resistor R50 respectively, the first end of the resistor R50 is electrically connected with the SENSE+ pin of the Buck chip U4,

[0043] The IN2+ pin of the operational amplifier chip U5 is electrically connected with the second end of the resistor R28, the first end of the resistor R51 and the second end of the resistor R40 respectively, the first end of the resistor R28 is electrically connected with the AVDD_3V3 power supply end, the second end of the resistor R51 is grounded, and the first end of the resistor R40 is electrically connected with the second end of the resistor R26.

[0044] In the further technical scheme, the model of the Buck chip U4 is MP9925GL-Z, the model of the NMOS tube Q2 and the NMOS tube Q3 is RUH4040M2, the model of the operational amplifier chip U5 is GS8592-MR, and the model of the diode D1 and the diode D4 is WSR3002T3.

[0045] In the further technical scheme, the voltage sampling circuit comprises an operational amplifier U7, an inductor L6, a fuse F2, a connecting seat J4, a resistor R100, a resistor R55, a resistor R57, a resistor R58, a resistor R59, a resistor R56, a capacitor C93, a capacitor C51, a capacitor C65 and a capacitor C49,

[0046] The non-inverting input end of the operational amplifier U7 is electrically connected with the second end of the resistor R55, the second end of the capacitor C93 and the first end of the resistor R58 respectively, the first end of the capacitor C93 is electrically connected with the first pin of the connecting seat J4, the first end of the resistor R55 and the second end of the resistor R100 respectively, the first end of the resistor R100 is electrically connected with the second pin of the connecting seat J4, the first end of the fuse F2 and the DCDC_POWER power supply end respectively, the second end of the fuse F2 is electrically connected with the POWER_OUT+ power supply end, and the second end of the resistor R58 is grounded,

[0047] The inverting input end of the operational amplifier U7 is electrically connected with the second end of the resistor R57, the first end of the resistor R59 and the first end of the capacitor C51 respectively, the first end of the resistor R57 is grounded, the second end of the resistor R49 is electrically connected with the first end of the resistor R56, the output end of the operational amplifier U7, the second end of the resistor R59 and the second end of the capacitor C51 respectively, and the second end of the resistor R56 is electrically connected with the processor,

[0048] The positive power supply end of the operational amplifier U7 is electrically connected with the first end of the capacitor C49, the first end of the capacitor C65 and the second end of the inductor L6 respectively, the first end of the inductor L6 is electrically connected with the AVDD_3V3 power supply end, the negative power supply end of the operational amplifier U7, the second end of the capacitor C65 and the second end of the capacitor C49 are grounded respectively.

[0049] Further technical solutions, the model of operational amplifier U7 is GS8591-TR, the model of fuse F2 is 0452008.MRL.

[0050] After adopting the above structure, the utility model has the advantages compared with prior art: through resistance R29, the FREQ pin of Buck chip U4 is grounded, thereby making the switching frequency of Buck power stage circuit invalid, through the FB pin of Buck chip U4, the switching frequency is set by the synchronous signal given by processor, then through the voltage of 0.76V voltage that resistance R27 and resistance R29 divide, the voltage is less than the reference voltage of error amplifier inside Buck chip U4, thereby making the error amplifier inside Buck chip U4 invalid, only using the PWM comparator inside Buck chip U4, through the control voltage of first error amplifier, the control current of second error amplifier, after the operation of first error amplifier and second error amplifier, through the COMP pin of Buck chip U4, the PWM comparator inside Buck chip U4 is controlled, thereby controlling voltage and current, reaching the purpose of constant current and constant voltage, realizing constant current and constant voltage from the physical level, without software to realize constant current and constant voltage, control mode is simple, improves reaction speed. BRIEF DESCRIPTION OF DRAWINGS

[0051] The utility model is further explained below in combination with the drawings and examples.

[0052] Fig. 1 It is the circuit block diagram of the utility model;

[0053] Fig. 2 It is the circuit diagram of Buck power stage circuit and current sampling circuit of the utility model;

[0054] Fig. 3 It is the circuit diagram of error amplifier circuit and voltage sampling circuit of the utility model;

[0055] Fig. 4 It is the work flow chart of the utility model.

[0056] In the drawing:

[0057] 1 Buck power stage circuit;

[0058] 2 voltage sampling circuit;

[0059] 3 current sampling circuit;

[0060] 4 error amplifier circuit, 41 first error amplifier, 42 second error amplifier. DETAILED DESCRIPTION

[0061] The following are merely preferred embodiments of the present invention and do not limit the scope of protection of the present invention.

[0062] A constant current and constant voltage circuit that does not require software control, such as Figs. 1 to 4 As shown, the circuit includes a Buck power stage circuit 1, a voltage sampling circuit 2, a current sampling circuit 3, and an error amplifier circuit 4. The error amplifier circuit 4 is equipped with a first error amplifier 41 and a second error amplifier 42. The output terminals of the first error amplifier 41 and the second error amplifier 42 are electrically connected to the Buck power stage circuit 1, respectively. The Buck power stage circuit 1 is electrically connected to the voltage sampling circuit 2 and the current sampling circuit 3, respectively. The voltage sampling circuit 2 is electrically connected to the first error amplifier 41, and the current sampling circuit 3 is electrically connected to the second error amplifier 42. The Buck power stage circuit 1 is equipped with a Buck chip U4. The FB pin of the Buck chip U4 is connected to resistors R27 and R29. The FB pin of the Buck chip U4 is electrically connected to the second end of resistor R27 and the first end of resistor R29, respectively. The first end of resistor R27 is electrically connected to the VDD_3V3 power supply terminal. The second end of resistor R29 and the FREQ pin of the Buck chip U4 are grounded, respectively. The PG pin of the Buck chip U4 is used for electrical connection with the processor. Traditional constant current and constant voltage circuits using Buck chip U4 achieve constant current and constant voltage control through software, which is complex to operate and has a slow response speed. This invention, however, grounds the FREQ pin of Buck chip U4 via resistor R29, thus disabling the switching frequency of Buck power stage circuit 1. The switching frequency is set by receiving a synchronization signal from the processor through the FB pin of Buck chip U4. A voltage of 0.76V is obtained by voltage division through resistors R27 and R29. This voltage is lower than the reference voltage of the error amplifier inside Buck chip U4, thus disabling the error amplifier. Only the PWM comparator inside Buck chip U4 is used. The voltage is controlled by the first error amplifier 41, and the current is controlled by the second error amplifier 42. After calculation by the first and second error amplifiers 41 and 42, the result is used to control the PWM comparator inside Buck chip U4 via the COMP pin, thereby controlling the voltage and current to achieve constant current and constant voltage. This achieves constant current and constant voltage at a physical level, eliminating the need for software implementation and improving response speed.

[0063] Specifically, the output end of the first error amplifier 41 is electrically connected with the COMP pin of the Buck chip U4 through the diode D11, the inverting input end of the first error amplifier 41 is electrically connected with the voltage sampling circuit 2, the non-inverting input end of the first error amplifier 41 is used for receiving the PWM_COMP signal of the processor, the positive power supply end of the first error amplifier 41 is electrically connected with the ACDD_3V3 power supply end, and the negative power supply end of the first error amplifier 41 is grounded; the output end of the second error amplifier 42 is electrically connected with the COMP pin of the Buck chip U4 through the diode D12, the inverting input end of the second error amplifier 42 is electrically connected with the current sampling circuit 3, the non-inverting input end of the second error amplifier 42 is used for receiving the PWM_CURRENT signal of the processor, the positive power supply end of the second error amplifier 42 is electrically connected with the AVDD_3V3 power supply end, and the negative power supply end of the second error amplifier 42 is grounded. When the output voltage of the first error amplifier 41 is high and the output voltage of the second error amplifier 42 is low, the first error amplifier 41 enables the PWM comparator in the Buck chip U4 through the diodes D11 and D12, and the second error amplifier 42 disables the PWM comparator in the Buck chip U4; when the output voltage of the first error amplifier 41 is low and the output voltage of the second error amplifier 42 is high, the first error amplifier 41 disables the PWM comparator in the Buck chip U4 through the diodes D11 and D12, and the second error amplifier 42 enables the PWM comparator in the Buck chip U4; thereby realizing the control of the PWM comparator in the Buck chip U4, and the structure is simple and the cost is low.

[0064] Specifically, the error amplifier circuit 4 is a circuit structure of a two-stage negative feedback circuit, and the error amplifier circuit 4 comprises an operational amplifier chip U6, an inductor L5, a resistor R47, a resistor R41, a resistor R49, a resistor R65, a resistor R52, a resistor R10, a resistor R42, a resistor R45, a resistor R4, a resistor R46, a resistor R43, a resistor R5, a resistor R1, a resistor R44, a resistor R3, a capacitor C86, a capacitor C42, a capacitor C44, a capacitor C91, a capacitor C85, a capacitor C45, a capacitor C46, a capacitor C47, a capacitor C41, a capacitor C40, a capacitor C72, a capacitor C43, a capacitor C48, a diode D11 and a diode D12, the OUT1 pin of the operational amplifier chip U6 is electrically connected with the first end of the resistor R41, the first end of the capacitor C42 and the first end of the capacitor C86 respectively, the second end of the resistor R41 is electrically connected with the negative electrode of the diode D11, the positive electrode of the diode D11 is electrically connected with the first end of the resistor R65, the second end of the resistor R65 is electrically connected with the COMP pin of the Buck chip U4, the IN1- pin of the operational amplifier chip U6 is electrically connected with the second end of the resistor R47, the second end of the capacitor C86 and the first end of the resistor R49 respectively, the second end of the capacitor C42 is electrically connected with the first end of the resistor R47, the second end of the resistor R49 is electrically connected with the voltage sampling circuit 2, the IN1+ pin of the operational amplifier chip U6 is electrically connected with the first end of the capacitor C44, the first end of the capacitor C91 and the first end of the resistor R52 respectively, the second end of the resistor R52 is electrically connected with the first end of the capacitor C85 and the first end of the resistor R10 respectively, the second end of the resistor R10 is electrically connected with the first end of the capacitor C45 and the first end of the resistor R4 respectively, the second end of the resistor R4 is electrically connected with the processor, for receiving a PWM_CURRENT signal, and the second end of the capacitor C44, the second end of the capacitor C91, the second end of the capacitor C85 and the second end of the capacitor C45 are grounded respectively.The OUT2 pin of the operational amplifier chip U6 is electrically connected with the second end of the resistor R42, the second end of the resistor R45, the first end of the capacitor C41, the first end of the capacitor C72 and the first end of the resistor R43 respectively, the first end of the resistor R42 is electrically connected with the negative electrode of the diode D12, the positive electrode of the diode D12 is electrically connected with the first end of the resistor R65, the second end of the resistor R43 is electrically connected with the first end of the resistor R44, the IN2- pin of the operational amplifier chip U6 is electrically connected with the second end of the resistor R46, the second end of the capacitor C72 and the current sampling circuit 3 respectively, the first end of the resistor R46 is electrically connected with the second end of the capacitor C41, the IN2+ pin of the operational amplifier chip U6 is electrically connected with the first end of the capacitor C40 and the first end of the resistor R5 respectively, the second end of the resistor R5 is electrically connected with the first end of the capacitor C43 and the first end of the resistor R1 respectively, the second end of the resistor R1 is electrically connected with the first end of the capacitor C48 and the first end of the resistor R3 respectively, the second end of the resistor R3 is electrically connected with the processor for receiving the PWM_CURRENT signal, the second end of the capacitor C40, the second end of the capacitor C43 and the second end of the capacitor C48 are grounded respectively; the V+ power supply end of the operational amplifier chip U6 is electrically connected with the second end of the inductor L5, the first end of the capacitor C46 and the first end of the capacitor C47 respectively, the first end of the inductor L5 is electrically connected with the first end of the resistor R45 and the AVDD_3V3 power supply end respectively, the V- power supply end of the operational amplifier chip U6, the second end of the capacitor C46 and the second end of the capacitor C47 are grounded respectively. The error amplifier circuit 4 is a two-stage negative feedback circuit structure, without the need for additional two independent operational amplifiers, simplifying the structure, reducing the cost and being easy to produce. The processor gives the reference voltage to the non-inverting input end of the first error amplifier 41 through the DAC, the inverting input end of the first error amplifier 41 introduces the voltage feedback signal of the voltage acquisition circuit 2, and the reference voltage and the voltage feedback signal are amplified to control the PWM comparator in the Buck chip U4; the higher the voltage output by the first error amplifier 41, the greater the pulse duty cycle of the Buck chip U4 output, the output voltage increases, and the voltage tends to be stable; the processor gives the reference voltage to the non-inverting input end of the second error amplifier 42 through the DAC, the current acquisition circuit 3 converts the collected current into a corresponding voltage value and sends it to the inverting input end of the second error amplifier 42, the second error amplifier 42 compares the voltage at the non-inverting input end with the voltage at the inverting input end, when the voltage at the inverting input end is greater than the voltage at the non-inverting input end, the COMP pin voltage of the Buck chip U4 is pulled down, the pulse duty cycle is reduced, the output voltage and current are reduced, and the voltage at the non-inverting input end of the second error amplifier 42 is equal to the voltage at the inverting input end, thereby realizing current limiting regulation and achieving the purpose of constant current.

[0065] Specifically, the model of the operational amplifier chip U6 is GS8592-MR. The GS8592-MR is a precision operational amplifier, adopts an MSOP-8 package form, has a gain bandwidth product of 4.5 MHz, an input bias current of 20 pA, an input offset voltage of 30 uV, a common-mode rejection ratio of 110 dB, a slew rate of 2.5 V / us, a working voltage of 1.8 V-5.5 V, an output current of 30 mA, an input offset voltage temperature drift of 10 nV / ℃, and a power supply current of each channel of 550 uA.

[0066] Specifically, the second end of the resistor R44 is connected with a current protection circuit. The current protection circuit prevents the current in the circuit from exceeding the predetermined maximum value, thereby protecting the circuit and the equipment from being damaged. When the current in the circuit exceeds the set value, the protection device will act, and the circuit is cut off through the tripping of the circuit breaker or the sending of an alarm signal to protect the equipment and personal safety.

[0067] Specifically, the Buck power stage circuit 1 comprises a Buck chip U4, a resistor R16, a resistor R20, a resistor R21, a resistor R22, a resistor R23, a resistor R91, a resistor R17, a resistor R18, a resistor R24, a resistor R27, a resistor R29, a resistor R25, a resistor R26, a resistor R12, a resistor R19, a resistor R30, a resistor R37, a resistor R36, a capacitor C33, a capacitor C24, a capacitor C88, a capacitor C76, a capacitor C25, a capacitor C27, a capacitor C29, a capacitor C30, a capacitor C31, a capacitor C32, an inductor L2, a diode D9, an NMOS tube Q2, an NMOS tube Q3 and a light emitting diode LED2, the IN pin of the Buck chip U4 is electrically connected with the POWER_VCC power terminal, the VCC1 pin of the Buck chip U4 is electrically connected with the VCC1 power terminal, the VCC2 pin of the Buck chip U4 is electrically connected with the VCC1 power terminal and the second end of the resistor R16 respectively, the first end of the resistor R16 is electrically connected with the DCDC_5V power terminal, the ILIM pin of the Buck chip U4 is electrically connected with the second end of the resistor R30 and the first end of the resistor R37 respectively, the first end of the resistor R30 is electrically connected with the VCC1 power terminal, the second end of the resistor R37 is grounded, the CCM / AAM pin of the Buck chip U4 is electrically connected with the second end of the resistor R20, the first end of the resistor R20 is grounded, the PG pin of the Buck chip U4 is electrically connected with the processor and the second end of the resistor R36 respectively, the first end of the resistor R36 is electrically connected with the negative electrode of the light emitting diode LED2, the positive electrode of the light emitting diode LED2 is electrically connected with the VCC1 power terminal, the EN / SYNC pin of the Buck chip U4 is electrically connected with the second end of the resistor R21 and the first end of the resistor R22 respectively, the first end of the resistor R21 is electrically connected with the processor, the second end of the resistor R22 is grounded, the FREQ pin of the Buck chip U4 is electrically connected with the first end of the resistor R23, the second end of the resistor R23 is grounded, the COMP pin of the Buck chip U4 is electrically connected with the diode D11, the diode D12 and the first end of the resistor R91 respectively, the second end of the resistor R91 is grounded, the SS pin of the Buck chip U4 is electrically connected with the first end of the capacitor C33, the second end of the capacitor C33 is grounded, the SYNCO pin of the Buck chip U4 is electrically connected with the first end of the resistor R24, the second end of the resistor R24 is grounded, the FB pin of the Buck chip U4 is electrically connected with the second end of the resistor R27 and the first end of the resistor R29 respectively, the first end of the resistor R27 is electrically connected with the VDD_3V3 power terminal, the second end of the resistor R29 is grounded, the SENSE- pin of the Buck chip U4 is electrically connected with the first end and the ground terminal of the resistor R25 respectively,The second end of the resistor R25 is electrically connected with the ground terminal, the first end of the resistor R26, the SENSE+ pin of the Buck chip U4 and the current sampling circuit 3 respectively, the second end of the resistor R26 is electrically connected with the current sampling circuit 3 and the ground terminal respectively, the BG pin of the Buck chip U4 is electrically connected with the gate of the NMOS tube Q3, the source of the NMOS tube Q3 is grounded, the SW pin of the Buck chip U4 is electrically connected with the second end of the capacitor C24, the drain of the NMOS tube Q3, the source of the NMOS tube Q2, the first end of the resistor R12 and the first end of the inductor L2 respectively, the first end of the capacitor C24 is electrically connected with the second end of the resistor R18 and the negative electrode of the diode D9 respectively, the positive electrode of the diode D9 is electrically connected with the VCC1 power terminal, the second end of the resistor R12 is electrically connected with the first end of the capacitor C88, the second end of the capacitor C88 is grounded, the second end of the inductor L2 is electrically connected with the DCDC_POWER power terminal, the first end of the capacitor C76, the first end of the capacitor C25, the first end of the capacitor C27, the first end of the capacitor C29, the first end of the capacitor C30, the first end of the capacitor C31 and the first end of the resistor R19 respectively, the second end of the resistor R19 is electrically connected with the first end of the capacitor C32, the second end of the capacitor C76, the second end of the capacitor C25, the second end of the capacitor C27, the second end of the capacitor C29, the second end of the capacitor C30, the second end of the capacitor C31 and the second end of the capacitor C32 are grounded respectively, the BST pin of the Buck chip U4 is electrically connected with the first end of the resistor R18, the TG pin of the Buck chip U4 is electrically connected with the first end of the resistor R17, the second end of the resistor R17 is electrically connected with the gate of the NMOS tube Q2 respectively, the drain of the NMOS tube Q2 is electrically connected with the POWER_VCC power terminal.

[0068] Specifically, the current sampling circuit 3 comprises an operational amplifier chip U5, an inductor L4, a diode D1, a diode D4, a resistor R86, a resistor R39, a resistor R33, a resistor R38, a resistor R34, a resistor R31, a resistor R35, a resistor R32, a resistor R28, a resistor R51, a resistor R50, a resistor R40, a capacitor C37, a capacitor C87, a capacitor C36, a capacitor C39 and a capacitor C38, the OUT1 pin of the operational amplifier chip U5 is electrically connected with the first end of the resistor R31, the first end of the resistor R34, the first end of the capacitor C37 and the third end of the diode D1 respectively, the second end of the resistor R31 is electrically connected with the first end of the capacitor C87 and the processor respectively, the second end of the capacitor C87 is grounded, the first end of the diode D1 is grounded, the second end of the diode D1 is electrically connected with the AVDD_3V3 power supply end, the IN1- pin of the operational amplifier chip U5 is electrically connected with the second end of the resistor R34, the second end of the capacitor C37 and the first end of the resistor R39 respectively, the second end of the resistor R39 is grounded, the IN1+ pin of the operational amplifier chip U5 is electrically connected with the first end of the resistor R38, the first end of the resistor R33 and the second end of the resistor R86 respectively, the first end of the resistor R86 is electrically connected with the VDD_3V3 power supply end, the V- pin of the operational amplifier chip U5, the second end of the resistor R33 and the second end of the resistor R38 are grounded respectively, the V+ pin of the operational amplifier chip U5 is electrically connected with the second end of the inductor L4, the first end of the capacitor C36 and the first end of the capacitor C39 respectively, the first end of the inductor L4 is electrically connected with the AVDD_3V3 power supply end, the second end of the capacitor C36 and the second end of the capacitor C39 are grounded respectively, the OUT2 pin of the operational amplifier chip U5 is electrically connected with the third end of the diode D4, the first end of the resistor R35, the first end of the capacitor C38 and the first end of the resistor R32 respectively, the first end of the diode D4 is grounded, the second end of the diode D4 is electrically connected with the AVDD_3V3 power supply end, the second end of the resistor R32 is electrically connected with the second error amplifier 42, the IN2- pin of the operational amplifier chip U5 is electrically connected with the second end of the resistor R35, the second end of the capacitor C38 and the second end of the resistor R50 respectively, the first end of the resistor R50 is electrically connected with the SENSE+ pin of the Buck chip U4, the IN2+ pin of the operational amplifier chip U5 is electrically connected with the second end of the resistor R28, the first end of the resistor R51 and the second end of the resistor R40 respectively, the first end of the resistor R28 is electrically connected with the AVDD_3V3 power supply end, the second end of the resistor R51 is grounded, the first end of the resistor R40 is electrically connected with the second end of the resistor R26.The resistance of resistor R39 is 1K, the resistance of resistor R33 is 1K, the resistance of resistor R38 is 30K, the resistance of resistor R34 is 30K, the resistance of resistor R31 is 1K, the resistance of resistor R35 is 30K, the resistance of resistor R32 is 0R, the resistance of resistor R51 is 30K, the resistance of resistor R50 is 1K, the resistance of resistor R40 is 1K, resistors R86 and R28 are protection resistors, the capacity of capacitor C37 is 22pF, the capacity of capacitor C87 is 0.1uF, the capacity of capacitor C36 is 0.1uF, and the capacity of capacitor C39 is 0.1uF.

[0069] Specifically, the model of Buck chip U4 is MP9925GL-Z, the model of NMOS tube Q2 and NMOS tube Q3 is RUH4040M2, the model of operational amplifier chip U5 is GS8592-MR, and the model of diode D1 and diode D4 is WSR3002T3.

[0070] Specifically, the voltage sampling circuit 2 comprises an operational amplifier U7, an inductor L6, a fuse F2, a connecting seat J4, a resistor R100, a resistor R55, a resistor R57, a resistor R58, a resistor R59, a resistor R56, a capacitor C93, a capacitor C51, a capacitor C65 and a capacitor C49, the non-inverting input terminal of the operational amplifier U7 is electrically connected with the second terminal of the resistor R55, the second terminal of the capacitor C93 and the first terminal of the resistor R58 respectively, the first terminal of the capacitor C93 is electrically connected with the first pin of the connecting seat J4, the first terminal of the resistor R55 and the second terminal of the resistor R100 respectively, the first terminal of the resistor R100 is electrically connected with the second pin of the connecting seat J4, the first terminal of the fuse F2 and the DCDC_POWER power supply terminal respectively, the second terminal of the fuse F2 is electrically connected with the POWER_OUT+ power supply terminal, the second terminal of the resistor R58 is grounded, the inverting input terminal of the operational amplifier U7 is electrically connected with the second terminal of the resistor R57, the first terminal of the resistor R59 and the first terminal of the capacitor C51 respectively, the first terminal of the resistor R57 is grounded, the second terminal of the resistor R49 is electrically connected with the first terminal of the resistor R56, the output terminal of the operational amplifier U7, the second terminal of the resistor R59 and the second terminal of the capacitor C51 respectively, the second terminal of the resistor R56 is electrically connected with the processor, the positive power supply terminal of the operational amplifier U7 is electrically connected with the first terminal of the capacitor C49, the first terminal of the capacitor C65 and the second terminal of the inductor L6 respectively, the first terminal of the inductor L6 is electrically connected with the AVDD_3V3 power supply terminal, the negative power supply terminal of the operational amplifier U7, the second terminal of the capacitor C65 and the second terminal of the capacitor C49 are grounded respectively. The voltage sampling circuit 2 plays a role of protecting the circuit while carrying out voltage feedback through the fuse F2, and when the voltage is greater than 30V, the fuse F2 is fused, thereby playing a role of overvoltage protection. The resistance value of the resistor R100 is 5.1R, the resistance value of the resistor R55 is 100K, the resistance value of the resistor R57 is 100K, the resistance value of the resistor R58 is 10K, the resistance value of the resistor R59 is 10K, the resistance value of the resistor R56 is 22R, the capacity of the capacitor C51 is 22pF, the capacity of the capacitor C65 is 0.1uF, and the capacity of the capacitor C49 is 0.1uF. The voltage outputted by the second terminal of the resistor R56 is VOLTAGE_ADC, and VOLTAGE_ADC=10 / 100*POWER_OUT+.

[0071] Specifically, the model number of the operational amplifier U7 is GS8591-TR, and the model number of the fuse F2 is 0452008.MRL.

[0072] The above is only a preferred embodiment of the present application, and for those skilled in the art, according to the idea of the present application, the specific implementation mode and application range can be changed, and the content of the specification should not be understood as a limitation of the present application.

Claims

1. A constant current constant voltage circuit without software control, characterized by: The Buck power stage circuit (1), the voltage sampling circuit (2), the current sampling circuit (3) and the error amplifier circuit (4) are included, the error amplifier circuit (4) is provided with a first error amplifier (41) and a second error amplifier (42), the output terminals of the first error amplifier (41) and the second error amplifier (42) are electrically connected with the Buck power stage circuit (1) respectively, the Buck power stage circuit (1) is electrically connected with the voltage sampling circuit (2) and the current sampling circuit (3) respectively, the voltage sampling circuit (2) and the first error amplifier (41) are electrically connected, the current sampling circuit (3) and the second error amplifier (42) are electrically connected, the Buck power stage circuit (1) is provided with a Buck chip U4, the FB pin of the Buck chip U4 is connected with a resistor R27 and a resistor R29, the FB pin of the Buck chip U4 is electrically connected with the second end of the resistor R27 and the first end of the resistor R29 respectively, the first end of the resistor R27 is electrically connected with a VDD_3V3 power supply terminal, the second end of the resistor R29 and the FREQ pin of the Buck chip U4 are grounded respectively, and the PG pin of the Buck chip U4 is used for electrical connection with a processor.

2. A constant current constant voltage circuit without software control according to claim 1, characterized in that: The output terminal of the first error amplifier (41) is electrically connected with the COMP pin of the Buck chip U4 through a diode D11, the inverting input terminal of the first error amplifier (41) is electrically connected with the voltage sampling circuit (2), the non-inverting input terminal of the first error amplifier (41) is used for receiving a PWM_COMP signal of the processor, the positive power supply terminal of the first error amplifier (41) is electrically connected with an ACDD_3V3 power supply terminal, and the negative power supply terminal of the first error amplifier (41) is grounded. The output terminal of the second error amplifier (42) is electrically connected with the COMP pin of the Buck chip U4 through a diode D12, the inverting input terminal of the second error amplifier (42) is electrically connected with the current sampling circuit (3), the non-inverting input terminal of the second error amplifier (42) is used for receiving a PWM_CURRENT signal of the processor, the positive power supply terminal of the second error amplifier (42) is electrically connected with an AVDD_3V3 power supply terminal, and the negative power supply terminal of the second error amplifier (42) is grounded.

3. A constant current constant voltage circuit without software control according to claim 2, characterized in that: The error amplifier circuit (4) is a circuit structure of a two-stage negative feedback circuit, and the error amplifier circuit (4) includes an operational amplifier chip U6, an inductor L5, resistors R47, R41, R49, R65, R52, R10, R42, R45, R4, R46, R43, R5, R1, R44, R3, capacitors C86, C42, C44, C91, C85, C45, C46, C47, C41, C40, C72, C43, C48, the diode D11 and the diode D12, The OUT1 pin of the operational amplifier chip U6 is electrically connected with the first end of the resistor R41, the first end of the capacitor C42 and the first end of the capacitor C86 respectively, the second end of the resistor R41 is electrically connected with the negative electrode of the diode D11, the positive electrode of the diode D11 is electrically connected with the first end of the resistor R65, the second end of the resistor R65 is electrically connected with the COMP pin of the Buck chip U4, The IN1- pin of the operational amplifier chip U6 is electrically connected with the second end of the resistor R47, the second end of the capacitor C86 and the first end of the resistor R49 respectively, the second end of the capacitor C42 is electrically connected with the first end of the resistor R47, the second end of the resistor R49 is electrically connected with the voltage sampling circuit (2), The IN1+ pin of the operational amplifier chip U6 is electrically connected with the first end of the capacitor C44, the first end of the capacitor C91 and the first end of the resistor R52 respectively, the second end of the resistor R52 is electrically connected with the first end of the capacitor C85 and the first end of the resistor R10 respectively, the second end of the resistor R10 is electrically connected with the first end of the capacitor C45 and the first end of the resistor R4 respectively, the second end of the resistor R4 is electrically connected with the processor for receiving the PWM_CURRENT signal, the second end of the capacitor C44, the second end of the capacitor C91, the second end of the capacitor C85 and the second end of the capacitor C45 are grounded respectively; The OUT2 pin of the operational amplifier chip U6 is electrically connected with the second end of the resistor R42, the second end of the resistor R45, the first end of the capacitor C41, the first end of the capacitor C72 and the first end of the resistor R43 respectively, the first end of the resistor R42 is electrically connected with the negative electrode of the diode D12, the positive electrode of the diode D12 is electrically connected with the first end of the resistor R65, the second end of the resistor R43 is electrically connected with the first end of the resistor R44, The IN2- pin of the operational amplifier chip U6 is electrically connected with the second end of the resistor R46, the second end of the capacitor C72 and the current sampling circuit (3) respectively, the first end of the resistor R46 is electrically connected with the second end of the capacitor C41, The IN2+ pin of the operational amplifier chip U6 is electrically connected with the first end of the capacitor C40 and the first end of the resistor R5 respectively, the second end of the resistor R5 is electrically connected with the first end of the capacitor C43 and the first end of the resistor R1 respectively, the second end of the resistor R1 is electrically connected with the first end of the capacitor C48 and the first end of the resistor R3 respectively, the second end of the resistor R3 is electrically connected with the processor for receiving the PWM_CURRENT signal, the second end of the capacitor C40, the second end of the capacitor C43 and the second end of the capacitor C48 are grounded respectively; The V+ power supply end of the operational amplifier chip U6 is electrically connected with the second end of the inductor L5, the first end of the capacitor C46 and the first end of the capacitor C47 respectively, the first end of the inductor L5 is electrically connected with the first end of the resistor R45 and the AVDD_3V3 power supply end respectively, the V- power supply end of the operational amplifier chip U6, the second end of the capacitor C46 and the second end of the capacitor C47 are grounded respectively.

4. A constant current constant voltage circuit without software control according to claim 3, characterized in that: The model of the operational amplifier chip U6 is GS8592-MR.

5. A constant current constant voltage circuit without software control according to claim 3, characterized in that: The second end of the resistor R44 is connected with a current protection circuit.

6. A constant current constant voltage circuit without software control according to claim 2, characterized in that: The Buck power stage circuit (1) comprises the Buck chip U4, the resistor R16, the resistor R20, the resistor R21, the resistor R22, the resistor R23, the resistor R91, the resistor R17, the resistor R18, the resistor R24, the resistor R27, the resistor R29, the resistor R25, the resistor R26, the resistor R12, the resistor R19, the resistor R30, the resistor R37, the resistor R36, the capacitor C33, the capacitor C24, the capacitor C88, the capacitor C76, the capacitor C25, the capacitor C27, the capacitor C29, the capacitor C30, the capacitor C31, the capacitor C32, the inductor L2, the diode D9, the NMOS tube Q2, the NMOS tube Q3 and the light emitting diode LED2, The IN pin of the Buck chip U4 is electrically connected with the POWER_VCC power supply end, The VCC1 pin of the Buck chip U4 is electrically connected with the VCC1 power supply end, The VCC2 pin of the Buck chip U4 is electrically connected with the VCC1 power supply end and the second end of the resistor R16 respectively, and the first end of the resistor R16 is electrically connected with the DCDC_5V power supply end, The ILIM pin of the Buck chip U4 is electrically connected with the second end of the resistor R30 and the first end of the resistor R37 respectively, the first end of the resistor R30 is electrically connected with the VCC1 power supply end, and the second end of the resistor R37 is grounded, The CCM / AAM pin of the Buck chip U4 is electrically connected with the second end of the resistor R20, and the first end of the resistor R20 is grounded, The PG pin of the Buck chip U4 is electrically connected with the processor and the second end of the resistor R36 respectively, the first end of the resistor R36 is electrically connected with the negative electrode of the light emitting diode LED2, and the positive electrode of the light emitting diode LED2 is electrically connected with the VCC1 power supply end, The EN / SYNC pin of the Buck chip U4 is electrically connected with the second end of the resistor R21 and the first end of the resistor R22 respectively, the first end of the resistor R21 is electrically connected with the processor, and the second end of the resistor R22 is grounded, The FREQ pin of the Buck chip U4 is electrically connected with the first end of the resistor R23, and the second end of the resistor R23 is grounded, The SGND pin, the PGND pin and the ePAD pin of the Buck chip U4 are grounded respectively, The COMP pin of the Buck chip U4 is electrically connected with the diode D11, the diode D12 and the first end of the resistor R91 respectively, and the second end of the resistor R91 is grounded, The SS pin of the Buck chip U4 is electrically connected with the first end of the capacitor C33, and the second end of the capacitor C33 is grounded, The SYNCO pin of the Buck chip U4 is electrically connected with the first end of the resistor R24, and the second end of the resistor R24 is grounded, The FB pin of the Buck chip U4 is electrically connected with the second end of the resistor R27 and the first end of the resistor R29 respectively, the first end of the resistor R27 is electrically connected with the VDD_3V3 power supply end, and the second end of the resistor R29 is grounded, The SENSE- pin of the Buck chip U4 is electrically connected with the first end of the resistor R25 and the ground terminal respectively, the second end of the resistor R25 is electrically connected with the ground terminal, the first end of the resistor R26, the SENSE+ pin of the Buck chip U4 and the current sampling circuit (3) respectively, the second end of the resistor R26 is electrically connected with the current sampling circuit (3) and the ground terminal respectively, The BG pin of the Buck chip U4 is electrically connected with the gate of the NMOS tube Q3, and the source of the NMOS tube Q3 is grounded, The SW pin of the Buck chip U4 is electrically connected with the second end of the capacitor C24, the drain of the NMOS tube Q3, the source of the NMOS tube Q2, the first end of the resistor R12 and the first end of the inductor L2 respectively, the first end of the capacitor C24 is electrically connected with the second end of the resistor R18 and the negative electrode of the diode D9 respectively, the positive electrode of the diode D9 is electrically connected with the VCC1 power terminal, the second end of the resistor R12 is electrically connected with the first end of the capacitor C88, the second end of the capacitor C88 is grounded, the second end of the inductor L2 is electrically connected with the DCDC_POWER power terminal, the first end of the capacitor C76, the first end of the capacitor C25, the first end of the capacitor C27, the first end of the capacitor C29, the first end of the capacitor C30, the first end of the capacitor C31 and the first end of the resistor R19 respectively, the second end of the resistor R19 is electrically connected with the first end of the capacitor C32, the second end of the capacitor C76, the second end of the capacitor C25, the second end of the capacitor C27, the second end of the capacitor C29, the second end of the capacitor C30, the second end of the capacitor C31 and the second end of the capacitor C32 are grounded respectively, The BST pin of the Buck chip U4 is electrically connected with the first end of the resistor R18, The TG pin of the Buck chip U4 is electrically connected with the first end of the resistor R17, the second end of the resistor R17 is electrically connected with the gate of the NMOS tube Q2 respectively, and the drain of the NMOS tube Q2 is electrically connected with the POWER_VCC power terminal.

7. A constant current constant voltage circuit without software control according to claim 6, characterized in that: The current sampling circuit (3) comprises an operational amplifier chip U5, an inductor L4, a diode D1, a diode D4, a resistor R86, a resistor R39, a resistor R33, a resistor R38, a resistor R34, a resistor R31, a resistor R35, a resistor R32, a resistor R28, a resistor R51, a resistor R50, a resistor R40, a capacitor C37, a capacitor C87, a capacitor C36, a capacitor C39 and a capacitor C38, The OUT1 pin of the operational amplifier chip U5 is electrically connected with the first end of the resistor R31, the first end of the resistor R34, the first end of the capacitor C37 and the third end of the diode D1 respectively, the second end of the resistor R31 is electrically connected with the first end of the capacitor C87 and the processor respectively, the second end of the capacitor C87 is grounded, the first end of the diode D1 is grounded, and the second end of the diode D1 is electrically connected with the AVDD_3V3 power terminal, The IN1- pin of the operational amplifier chip U5 is electrically connected with the second end of the resistor R34, the second end of the capacitor C37 and the first end of the resistor R39 respectively, and the second end of the resistor R39 is grounded, The IN1+ pin of the operational amplifier chip U5 is electrically connected with the first end of the resistor R38, the first end of the resistor R33 and the second end of the resistor R86 respectively, the first end of the resistor R86 is electrically connected with the VDD_3V3 power supply end, the V- pin of the operational amplifier chip U5, the second end of the resistor R33 and the second end of the resistor R38 are grounded respectively, The V+ pin of the operational amplifier chip U5 is electrically connected with the second end of the inductor L4, the first end of the capacitor C36 and the first end of the capacitor C39 respectively, the first end of the inductor L4 is electrically connected with the AVDD_3V3 power supply end, the second end of the capacitor C36 and the second end of the capacitor C39 are grounded respectively, The OUT2 pin of the operational amplifier chip U5 is electrically connected with the third end of the diode D4, the first end of the resistor R35, the first end of the capacitor C38 and the first end of the resistor R32 respectively, the first end of the diode D4 is grounded, the second end of the diode D4 is electrically connected with the AVDD_3V3 power supply end, the second end of the resistor R32 is electrically connected with the second error amplifier (42), The IN2- pin of the operational amplifier chip U5 is electrically connected with the second end of the resistor R35, the second end of the capacitor C38 and the second end of the resistor R50 respectively, the first end of the resistor R50 is electrically connected with the SENSE+ pin of the Buck chip U4, The IN2+ pin of the operational amplifier chip U5 is electrically connected with the second end of the resistor R28, the first end of the resistor R51 and the second end of the resistor R40 respectively, the first end of the resistor R28 is electrically connected with the AVDD_3V3 power supply end, the second end of the resistor R51 is grounded, the first end of the resistor R40 is electrically connected with the second end of the resistor R26.

8. A constant current constant voltage circuit without software control according to claim 7, characterized in that: The model of the Buck chip U4 is MP9925GL-Z, the model of the NMOS tube Q2 and the NMOS tube Q3 is RUH4040M2, the model of the operational amplifier chip U5 is GS8592-MR, the model of the diode D1 and the diode D4 is WSR3002T3.

9. A constant current constant voltage circuit without software control according to claim 3, characterized in that: The voltage sampling circuit (2) comprises an operational amplifier U7, an inductor L6, a fuse F2, a connecting seat J4, a resistor R100, a resistor R55, a resistor R57, a resistor R58, a resistor R59, a resistor R56, a capacitor C93, a capacitor C51, a capacitor C65 and a capacitor C49, The positive input end of the operational amplifier U7 is electrically connected with the second end of the resistor R55, the second end of the capacitor C93 and the first end of the resistor R58 respectively, the first end of the capacitor C93 is electrically connected with the first pin of the connecting seat J4, the first end of the resistor R55 and the second end of the resistor R100 respectively, the first end of the resistor R100 is electrically connected with the second pin of the connecting seat J4, the first end of the fuse F2 and the DCDC_POWER power supply end respectively, the second end of the fuse F2 is electrically connected with the POWER_OUT+ power supply end, the second end of the resistor R58 is grounded, The inverting input end of the operational amplifier U7 is electrically connected with the second end of the resistor R57, the first end of the resistor R59 and the first end of the capacitor C51 respectively, the first end of the resistor R57 is grounded, the second end of the resistor R49 is electrically connected with the first end of the resistor R56, the output end of the operational amplifier U7, the second end of the resistor R59 and the second end of the capacitor C51 respectively, the second end of the resistor R56 is electrically connected with the processor, The positive power supply end of the operational amplifier U7 is electrically connected with the first end of the capacitor C49, the first end of the capacitor C65 and the second end of the inductor L6 respectively, the first end of the inductor L6 is electrically connected with the AVDD_3V3 power supply end, the negative power supply end of the operational amplifier U7, the second end of the capacitor C65 and the second end of the capacitor C49 are grounded respectively.

10. A constant current constant voltage circuit without software control according to claim 9, characterized in that: The model of the operational amplifier U7 is GS8591-TR, and the model of the fuse F2 is 0452008.MRL.

Images