Circuit board structure and electronic equipment
By setting through-holes at the target test points on the PCB board and placing conductive tubes inside the through-holes, the problem of residual wires caused by lead wires was solved, and the transmission quality of high-speed signals was improved.
Patent Information
- Application Number
- CN202520857300.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-30
- Publication Date
- 2026-05-15
- Estimated Expiration
- 2035-04-30
AI Technical Summary
During high-speed signal transmission on a PCB board, residual traces caused by leads can affect signal quality.
A through-hole is set at the target test point location, and a conductive tube is placed inside the through-hole. The traces are then connected to the pads at both ends of the through-hole to avoid generating residual traces.
It improves the transmission quality of high-speed signals, reduces the impedance and capacitive reactance of the signal transmission path, and avoids high-frequency signal attenuation.
Smart Images
Figure CN224249889U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of electronic and electrical product technology, and in particular to a circuit board structure and an electronic device. Background Technology
[0002] Printed circuit boards (PCBs) are essential components for the physical support and signal transmission of electronic products. Different PCB test points are placed on the PCB to facilitate debugging and testing. Typically, test points are arranged on one side of the PCB, and signals need to be traced to these test points for testing. However, for high-speed signals, these traces become stubs, causing signal reflection and affecting the quality of high-speed signal transmission. Summary of the Invention
[0003] To address the aforementioned problems in the prior art, the purpose of this application is to set a through hole at the target test point and install a conductive tube inside the through hole, connecting the traces to the pads at both ends of the through hole respectively, thereby avoiding the generation of residual traces and improving the quality of high-speed signal transmission.
[0004] To address the aforementioned issues, this application provides a circuit board structure comprising a top layer, at least two inner layers, a bottom layer, a first trace, and a second trace.
[0005] The top layer, the at least two inner layers, and the bottom layer are stacked sequentially.
[0006] The surface of the top layer is provided with target test points, and through holes are provided at the corresponding positions of the target test points; both the top and bottom surfaces of the through holes are provided with copper-exposed pads; and conductive tubes are provided inside the through holes.
[0007] One end of the first trace is located in any inner layer, and the other end of the first trace is connected to the pad on the top surface.
[0008] One end of the second trace is located in any inner layer, and the other end of the second trace is connected to the pad on the surface of the bottom layer.
[0009] In this embodiment, the pad includes an inner ring and an outer ring, and the inner ring and the outer ring are concentric rings;
[0010] The inner ring is a hollow structure, and the space between the inner ring and the outer ring is a copper-leaking structure.
[0011] In this embodiment, the first trace passes through the copper drain structure.
[0012] In this embodiment of the application, the length of the first trace on the top surface is 1-3 mm.
[0013] In this embodiment, the second trace passes through the copper drain structure.
[0014] In this embodiment of the application, the length of the second trace on the bottom surface is 1-3 mm.
[0015] In this embodiment, the cross-section of the conductive tube is parallel to or overlaps with the inner ring.
[0016] In this embodiment of the application, the first wiring includes a first buried wiring portion located in any of the inner layers, and the second wiring includes a second buried wiring portion located in any of the inner layers, wherein the first buried wiring portion and the second buried wiring portion are located in the same inner layer.
[0017] In this embodiment of the application, the first wiring includes a first buried wiring portion located in any of the inner layers, and the second wiring includes a second buried wiring portion located in any of the inner layers, wherein the first buried wiring portion and the second buried wiring portion are located in different inner layers.
[0018] On the other hand, this application also provides an electronic device, which includes the circuit board structure in the embodiments of this application.
[0019] Due to the above technical solutions, the circuit board structure described in this application has the following beneficial effects:
[0020] By setting through holes at the target test points on the circuit board structure and placing conductive tubes inside the through holes, the traces are connected to the pads at both ends of the through holes. Thus, the signal of the first trace can be transmitted to the second trace through the conductive tubes at the through holes, thereby avoiding the generation of residual traces and improving the quality of high-speed signal transmission. Attached Figure Description
[0021] To more clearly illustrate the technical solutions of this application, the accompanying drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are merely some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.
[0022] Figure 1 This is a schematic cross-sectional view of the circuit board structure provided in the embodiment of this application;
[0023] Figure 2 This is a schematic cross-sectional view of the circuit board structure provided in the embodiment of this application;
[0024] Figure 3 This is a schematic diagram of the target test point structure of the circuit board structure provided in the embodiments of this application;
[0025] Figure 4This is a schematic diagram of the target test point structure of the circuit board structure provided in the embodiments of this application.
[0026] Among them, 1-first trace, 2-second trace, 3-target test point, 31-inner ring, 32-outer ring, 4-conductive tube. Detailed Implementation
[0027] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0028] The term "an embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of this application. In the description of this application, it should be understood that the terms "upper," "lower," "left," "right," "top," "bottom," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. Moreover, the terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein.
[0029] Combination Figure 1 This application describes a circuit board structure provided in an embodiment. The structure includes a top layer, at least two inner layers, a bottom layer, a first trace 1, and a second trace 2, which are stacked sequentially. The surface of the top layer is provided with target test points 3, and through holes are provided at the corresponding positions of the target test points 3. The top and bottom surfaces of the through holes are provided with open copper pads. Conductive tubes 4 are provided in the through holes. One end of the first trace 1 is located in any inner layer, and the other end of the first trace 1 is connected to the pad on the surface of the top layer. One end of the second trace 2 is located in any inner layer, and the other end of the second trace 2 is connected to the pad on the surface of the bottom layer.
[0030] In specific embodiments of this application, the circuit board structure may have two inner layers or more inner layers.
[0031] In a specific embodiment of this application, the top layer is used to place components and perform some routing, and the surface of the top layer is covered with a solder mask and silkscreen markings; one of the at least two inner layers is usually used as a power layer or ground layer to distribute power or provide electromagnetic shielding, and can also be used for high-speed signal routing; the other of the at least two inner layers is mostly used for signal routing or ground layer, and is connected to the upper and lower layers through vias; the bottom layer is used for component mounting and routing, and some simple signals or ground lines are distributed on this layer.
[0032] In a specific embodiment of this application, different layers are isolated by insulating materials.
[0033] In this embodiment of the application, by setting a through hole at the target test point 3 of the circuit board structure and setting a conductive tube 4 in the through hole, the traces are respectively connected to the pads at both ends of the through hole, so that the signal of the first trace 1 can be transmitted to the second trace 2 through the conductive tube 4 at the through hole, thereby avoiding the generation of residual traces and improving the quality of high-speed signal transmission.
[0034] In a specific embodiment of this application, the left and right directions of the first trace 1 and the second trace 2 at the target test point are not limited.
[0035] In this embodiment, the pad includes an inner ring 31 and an outer ring 32, which are concentric rings; the inner ring 31 is a hollow structure, and the area between the inner ring 31 and the outer ring 32 is a copper leakage structure.
[0036] In specific embodiments of this application, a copper-exposed structure refers to a structure that exposes the area of copper foil.
[0037] In a specific embodiment of this application, by setting the pads as a double-ring copper drain structure, the test probe can directly contact and obtain signals through the copper drain structure, thereby facilitating the testing and debugging of the target test point 3.
[0038] In this embodiment, the first trace 1 penetrates the copper drain structure.
[0039] In this embodiment, by passing the first trace 1 through the copper leakage structure, the signal of the first trace 1 can be directly transmitted to one end of the conductive tube 4, thereby avoiding the generation of residual traces and improving the quality of high-speed signal transmission.
[0040] In this embodiment of the application, the length of the first trace 1 on the top surface is 1-3mm.
[0041] In one specific embodiment of this application, the length of the first trace 1 on the top surface is 2mm.
[0042] In this embodiment, by setting the length of the first trace 1 on the top surface to 1-3mm, the impedance and capacitance of the signal transmission path are reduced, high-frequency signal attenuation is avoided, and the quality of high-speed signal transmission is improved.
[0043] In this embodiment, the second trace 2 penetrates the copper drain structure.
[0044] In this embodiment, by passing the second trace 2 through the copper leakage structure, the signal at the other end of the conductive tube 4 can be transmitted to the second trace 2, avoiding the generation of residual traces and improving the quality of high-speed signal transmission.
[0045] In this embodiment of the application, the length of the second trace 2 on the bottom surface is 1-3mm.
[0046] In one specific embodiment of this application, the length of the second trace 2 on the bottom surface is 2mm.
[0047] In this embodiment, by setting the length of the second trace 2 on the bottom surface to 1-3mm, the impedance and capacitance of the signal transmission path are reduced, high-frequency signal attenuation is avoided, and the quality of high-speed signal transmission is improved.
[0048] In this embodiment, the cross-section of the conductive tube 4 is parallel to or overlaps with the inner ring 31.
[0049] In a specific embodiment of this application, the conductive tube 4 is attached to the surface of the through hole, and the diameter of the through hole is equal to the diameter of the inner ring 31.
[0050] In this embodiment, by setting the cross-section of the conductive tube 4 to be parallel or overlap with the inner ring 31, the impedance and capacitive reactance caused by structural differences are reduced, high-frequency signal attenuation is avoided, and the quality of high-speed signal transmission is improved.
[0051] In this embodiment of the application, the first wiring 1 includes a first buried wiring portion located in any inner layer, and the second wiring 2 includes a second buried wiring portion located in any inner layer, with the first buried wiring portion and the second buried wiring portion located in the same inner layer.
[0052] In this embodiment of the application, by setting the first buried wire portion and the second buried wire portion in the same inner layer, high-speed signal transmission in the same layer is achieved, and residual wires are avoided, thereby improving the quality of high-speed signal transmission.
[0053] In this embodiment of the application, the first wiring 1 includes a first buried wiring portion located in any inner layer, and the second wiring 2 includes a second buried wiring portion located in any inner layer, wherein the first buried wiring portion and the second buried wiring portion are located in different inner layers.
[0054] In this embodiment, by setting the first buried wire portion and the second buried wire portion in different inner layers, high-speed signal transmission in different inner layers is achieved, and residual wires are avoided, thereby improving the quality of high-speed signal transmission.
[0055] The working principle of the circuit board structure in this embodiment is as follows:
[0056] The high-speed signal of the first trace 1 is transmitted to one end of the conductive tube 4 through the first buried trace and the trace located on the top surface. The test probe detects the copper leakage pad at the target test point 3. The high-speed signal is transmitted to the second trace 2 located on the bottom surface through the conductive tube 4, and then to the second buried trace, thus completing the transmission and testing of the high-speed signal.
[0057] or,
[0058] The high-speed signal of the second trace 2 is transmitted to one end of the conductive tube 4 through the second buried trace and the trace located on the bottom surface. The high-speed signal is transmitted to the first trace 1 located on the top surface through the conductive tube 4, and then to the first buried trace, thus completing the transmission of the high-speed signal. The test probe detects the copper leakage pad at the target test point 3, thus completing the test of the high-speed signal.
[0059] The circuit board structure in this application embodiment has the following beneficial effects:
[0060] By setting a through hole at the target test point 3 of the circuit board structure and setting a conductive tube 4 inside the through hole, the traces are connected to the pads at both ends of the through hole, so that the signal of the first trace 1 can be transmitted to the second trace 2 through the conductive tube 4 at the through hole, thereby avoiding the generation of residual traces and improving the quality of high-speed signal transmission.
[0061] This application also provides an electronic device, which includes the circuit board structure involved in the embodiments of this application. The beneficial effects of this electronic device are the same as those of the circuit board structure in the embodiments of this application, and will not be described in detail here.
[0062] The foregoing description has fully disclosed the specific embodiments of this application. It should be noted that any modifications made by those skilled in the art to the specific embodiments of this application do not depart from the scope of the claims. Accordingly, the scope of the claims of this application is not limited to the foregoing specific embodiments.
Claims
1. A circuit board structure, characterized in that, Including the top layer, at least two inner layers, the bottom layer, the first wiring, and the second wiring. The top layer, the at least two inner layers, and the bottom layer are stacked sequentially. The surface of the top layer is provided with target test points, and through holes are provided at the corresponding positions of the target test points; both the top and bottom surfaces of the through holes are provided with copper-exposed pads; and conductive tubes are provided inside the through holes. One end of the first trace is located in any inner layer, and the other end of the first trace is connected to the pad on the top surface. One end of the second trace is located in any inner layer, and the other end of the second trace is connected to the pad on the surface of the bottom layer.
2. The circuit board structure according to claim 1, characterized in that, The pad includes an inner ring and an outer ring, and the inner ring and the outer ring are concentric rings; The inner ring is a hollow structure, and the space between the inner ring and the outer ring is a copper-leaking structure.
3. The circuit board structure according to claim 2, characterized in that, The first trace runs through the copper drain structure.
4. The circuit board structure according to claim 3, characterized in that, The length of the first trace on the top surface is 1-3 mm.
5. The circuit board structure according to claim 2, characterized in that, The second trace runs through the copper drain structure.
6. The circuit board structure according to claim 5, characterized in that, The length of the second trace on the bottom surface is 1-3 mm.
7. The circuit board structure according to claim 2, characterized in that, The cross-section of the conductive tube is parallel to or overlaps with the inner ring.
8. The circuit board structure according to claim 1, characterized in that, The first wiring includes a first buried wiring portion located in any of the inner layers, and the second wiring includes a second buried wiring portion located in any of the inner layers, wherein the first buried wiring portion and the second buried wiring portion are located in the same inner layer.
9. The circuit board structure according to claim 1, characterized in that, The first wiring includes a first embedded portion located in any of the inner layers, and the second wiring includes a second embedded portion located in any of the inner layers, wherein the first embedded portion and the second embedded portion are located in different inner layers.
10. An electronic device, characterized in that, Includes the circuit board structure as described in any one of claims 1-9.