A DBC ceramic-based five-pin integrated PFC power semiconductor package structure
By using DBC ceramic substrate and solder paste welding technology, efficient heat dissipation and simplified manufacturing of five-pin integrated PFC power semiconductor packaging structure are achieved, solving the problems of heat dissipation performance and process complexity of existing packaging structures, and meeting the needs of highly integrated power supply design.
Patent Information
- Application Number
- CN202521344020.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-30
- Publication Date
- 2026-08-25
- Estimated Expiration
- 2035-06-30
AI Technical Summary
The existing To-247 package structure has problems such as inconsistent pin and heat sink thickness, complex manufacturing process, high material cost, and the exposed part of the frame base island is not insulated, which affects the heat dissipation performance of the product and makes it difficult to meet the requirements of highly integrated power supply design.
The DBC ceramic substrate replaces the traditional metal frame, and the five-pin integrated PFC power semiconductor package structure is used. The chip and pins are soldered with solder paste. The package adopts a TO-247 shape, and the clamping component fixes the DBC ceramic substrate, which simplifies the packaging process and achieves internal insulation and efficient heat dissipation.
It improves the thermal management capability of the package, reduces production costs and process complexity, adapts to the development trend of highly integrated and miniaturized modules, and improves electromagnetic compatibility performance and system efficiency.
Smart Images

Figure CN224684690U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to but not limited to the semiconductor manufacturing technical field, especially related to a kind of DBC ceramic base five-foot integrated PFC power semiconductor packaging structure. BACKGROUND
[0002] Current power module has the trend of miniaturization, integration and high power density, and the existing To-247 conventional packaging form is a 3-pin IGBT module, the packaging frame uses a traditional integrated stamping metal copper frame, the frame uses forging process, the pin and the fin thickness are inconsistent, the profiled material manufacturing process is complex, the material cost is high, and the frame base island bare leakage part is not insulated, and the insulating rubber pad needs to be increased when assembling the radiator, and the heat-conducting silicone grease is applied, which affects the product heat dissipation performance. The existing To-247 conventional packaging pin and fin thickness are inconsistent, the profiled material manufacturing process is complex, the material cost is high, and the frame base island bare leakage part is not insulated, and the insulating rubber pad needs to be increased when assembling the radiator, and the heat-conducting silicone grease is applied, which affects the product heat dissipation performance.
[0003] The existing technology CN115148723A has the following two key technical problems: First, based on the structure of To-247 traditional metal pin frame and overall shell, the whole structure is formed by welding DBC ceramic and metal frame, and the traditional packaging molding is completed. Although this method improves the heat dissipation performance, it still needs to machine the TO-247 metal part and use multiple assembly processes, which is complex and requires high assembly precision, and the processing cost and heat path length have not been fundamentally improved.
[0004] Second, the basic packaging structure still retains multiple chip discrete welding, and is connected by metal wire or metal strip to form a complete circuit, which is limited by the number of pins and space, and the power density is limited, which is difficult to meet the design requirements of high integration power supply. UTILITY MODEL CONTENTS
[0005] In view of the problems existing in the prior art, the utility model provides a DBC ceramic base five-foot integrated PFC power semiconductor packaging structure.
[0006] The utility model is realized as follows: a DBC ceramic base five-foot integrated PFC power semiconductor packaging structure integrates the pfc structure into a To-247 appearance 5-pin power packaging, the chip base island uses high thermal conductivity DBC, and the ceramic sheet becomes a directly bondable ceramic after being double-sided metalized; the DBC removes the semicircular structure, and two tiebars are stretched out from the side to press the DBC, and the chip and the pin are welded using the tin paste process.
[0007] This utility model provides a DBC ceramic-based five-pin integrated PFC power semiconductor package structure, including: an IGBT chip, a first fast recovery diode chip, a second fast recovery diode chip, a DBC ceramic substrate, pin components, and a package body; The IGBT chip, the first fast recovery diode chip, and the second fast recovery diode chip are mounted side by side on the metal coating surface of the DBC ceramic substrate; The DBC ceramic substrate has double-sided metal layers, with the bottom metal layer exposed at the bottom of the package for external heat dissipation connection; The pin assembly includes five pins, namely a first pin, a second pin, a third pin, a fourth pin, and a fifth pin; the first pin is connected to the gate of the IGBT chip, the second pin is connected to the emitter of the IGBT chip, the third pin is connected to the collector of the IGBT chip, the fourth pin is connected to the anode of the second fast recovery diode chip, and the fifth pin is connected to the cathode of the second fast recovery diode chip. The anode of the first fast recovery diode chip is connected to the collector of the IGBT chip, and the cathode is connected to the emitter of the IGBT chip, forming a freewheeling circuit in parallel with the IGBT chip; The package adopts a TO-247 form factor, the pin assembly extends from the bottom of the package and is arranged linearly, and the top of the package has metal mounting holes for mechanical mounting; The DBC ceramic substrate is held inside the package by two clamping members extending from the side wall of the package, and the clamping members and the DBC ceramic substrate form a rigid fixing structure. The IGBT chip, the first fast recovery diode chip, and the second fast recovery diode chip are electrically connected to the metal layer of the DBC ceramic substrate by soldering. The pin assembly is also electrically connected to the IGBT chip, the first fast recovery diode chip, and the second fast recovery diode chip by soldering.
[0008] Based on the above technical solutions and the technical problems solved, the advantages and positive effects of the technical solution to be protected by this utility model are as follows: This invention uses DBC ceramic as the heat sink structure and arranges the power chips side by side on it, with the bottom metal exposed. This optimizes the thermal path and simplifies the packaging process, resulting in a more compact structure and lower thermal resistance.
[0009] This invention uses a five-pin design to precisely divide the functional pins (gate, emitter, collector, diode anode, and cathode), enabling IGBTs and dual fast recovery diodes to be efficiently integrated into a single package, resulting in a compact circuit suitable for high-power, high-frequency applications.
[0010] Given the current trend of power modules becoming increasingly miniaturized, integrated, and with higher power density, this utility model discloses a TO-247-5L PFC (Power Factor Correction) module packaging structure based on DBC insulation and heat dissipation. The PFC boost diode and IGBT are encapsulated within a TO-247 using a DBC insulating substrate. The DBC substrate, with its ceramic core providing insulation, and copper plating on both sides, allows for chip and wire bonding on one side and serves as a heat dissipation surface on the other. This improves the product's heat dissipation capacity while achieving internal insulation, eliminating the need for the traditional TO-247 insulating pad bonding process, reducing application costs, and improving production efficiency and overall production costs after encapsulation. Attached Figure Description
[0011] Figure 1 This is a schematic diagram of the appearance of the DBC ceramic-based five-pin integrated PFC power semiconductor package structure provided in this embodiment of the present invention; Figure 2 This is a topological diagram of the internal structure of the DBC ceramic-based five-pin integrated PFC power semiconductor package provided in this embodiment of the present invention. Figure 3 This is a schematic diagram of the internal structure of the DBC ceramic-based five-pin integrated PFC power semiconductor package provided in this embodiment of the present invention; Figure 4 This is a structural diagram of the DBC ceramic-based five-pin integrated PFC power semiconductor packaging structure provided in this embodiment of the present invention. Figure 5 This utility model provides a DBC ceramic-based five-pin integrated PFC power semiconductor packaging structure framework. In the diagram: 1. Package housing; 2. Pins; 2-1. First pin; 2-2. Second pin; 2-3. Third pin; 2-4. Fourth pin; 2-5. Fifth pin; 3. DBC insulating substrate; 4. PFC boost diode; 5. IGBT. Detailed Implementation
[0012] To make the objectives, technical solutions, and advantages of this utility model clearer, the following detailed description is provided in conjunction with embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this utility model.
[0013] like Figure 2 As shown, this utility model adopts a five-pin TO-247 package, which is defined as pins 1 to 5, corresponding to the key electrical interfaces of the IGBT and two fast recovery diodes (FRDs). Figure 3The internal interconnection path between the pins and the chip is revealed: the first pin (G) is connected to the gate of the IGBT; the second pin (E) is connected to the common terminal of the IGBT emitter and the negative terminal of FRD1; the third pin (C) is the collector of the IGBT and is also connected to the positive terminal of FRD1; the fourth pin (A) is connected to the anode of FRD2; and the fifth pin (K) is connected to the cathode of FRD2. This pin definition realizes the functional integration and reasonable exposure of the internal structure of the device, which facilitates system design and PCB routing.
[0014] Figure 1 and Figure 3 This demonstrates the layout of the device, which integrates two fast recovery diodes and an IGBT chip within the same package. By utilizing shared pins and a compact arrangement, the interconnect length between chips is effectively shortened, significantly reducing equivalent parasitic inductance and stray capacitance. Especially in high-speed switching scenarios, it effectively suppresses voltage spikes and switching oscillations, improving system electromagnetic compatibility (EMI) performance and enhancing switching efficiency.
[0015] like Figure 4 and Figure 5 As shown, the bottom base island of this device no longer uses the traditional TO-247 copper frame structure, but instead introduces a double-sided metallized ceramic DBC (Direct Bonded Copper) substrate as the platform to carry the chip. DBC has excellent thermal conductivity and electrical insulation properties, which significantly improves the thermal management capability of the package, making it especially suitable for high power density applications, while ensuring the dielectric safety of the system under high voltage operating conditions.
[0016] Figure 5 As can be seen, by eliminating the semi-circular guide slot structure used for fixing in the traditional TO-247 package and replacing it with two laterally extending tie bars to press the DBC board, the package area is greatly reduced, saving material costs. At the same time, this improved structure simplifies the mold and assembly process while ensuring mechanical stability, adapting to the current trend of highly integrated and miniaturized modules.
[0017] The chip and DBC substrate are bonded using solder paste instead of traditional solder joint bonding, effectively controlling solder joint voids, improving thermal interface stability, and reducing thermal resistance fluctuations. Furthermore, the pins and DBC are bonded using the same method, improving pin position consistency and electrical connection reliability. This process is more suitable for highly automated production, improving finished product consistency and batch yield.
[0018] The overall package maintains TO-247 pin arrangement and standard size compatibility. Figure 1 , Figure 2It possesses excellent replaceability and versatility, facilitating the upgrade and seamless replacement of existing systems. Simultaneously, its integrated internal architecture combined with optimized packaging design adapts to various high-performance power conversion scenarios such as PFC, power inverters, and motor drives, meeting multiple requirements for high efficiency, low noise, and compact size.
[0019] like Figure 1 As shown, the PFC structure that originally required multiple chips is integrated into a 5-pin power package in the TO-247 form factor, which reduces the overall parasitic parameters of the original multiple discrete components at the PCB board level, reduces electromagnetic / switching noise, improves EMI performance, and increases system efficiency. like Figure 4 , Figure 5 As shown, the traditional metal copper frame chip island of TO247 is replaced with DBC with a high thermal conductivity. The ceramic sheet is coated with metal on both sides and becomes a ceramic that can be directly bonded. Furthermore, the process of attaching a thermally conductive insulating sheet to the external heat dissipation base of the traditional TO247 is solved, which simplifies the manufacturing process, improves production efficiency, and has better heat dissipation and insulation performance in high power and high current application scenarios.
[0020] Integration improves production efficiency and reduces production costs; The DBC removes the semi-circular structure and extends two tie bars from the side to press down the DBC, making the area smaller and the cost lower. Using solder paste to solder chips and pins results in more stable void ratios and solder pad positions.
[0021] like Figure 2 , Figure 3 As shown, the first pin is the gate of the IGBT, abbreviated as G.
[0022] The second pin is the emitter of the IGBT, abbreviated as E; The third pin is the collector of the IGBT, abbreviated as C; The fourth pin is the diode anode, abbreviated as A; The fifth pin is the diode cathode, abbreviated as K.
[0023] like Figures 1-3As shown, the IGBT and two fast recovery diodes (FRD1, FRD2) in the PFC power stage are co-packaged in a modified TO-247 five-pin power housing. The traditional copper lead frame is replaced by a high thermal conductivity DBC (Direct Bonded Copper) ceramic sheet. The DBC is coated with copper on the top and bottom, serving as the chip mounting surface and heat dissipation path, respectively. The chip is directly soldered onto the DBC using lead-free solder paste, while the lower copper layer is in close contact with the external heat sink, forming an integrated heat flow channel of "chip-DBC-heat sink" with its own insulating layer. This eliminates the need for multiple layers of mounting, including the housing, insulating sheet, and heat sink, and consolidates multiple discrete devices into a single module, effectively reducing the package size and parasitic loop area.
[0024] On the DBC, the IGBT chip is located on the central copper island, with FRD1 and FRD2 symmetrically arranged on its left and right sides, close to the fourth pin (A) and the fifth pin (K). This "central switch + two-sided freewheeling" geometric layout minimizes the bonding wires from the three chips to their respective pins and reduces loop inductance. Simultaneously, the IGBT and the two diodes are connected to the bottom copper island via DBC ceramic heat diffusion, allowing for unified heat transfer to the bottom heatsink, avoiding localized hot spots and improving thermal uniformity. Insulating trenches are maintained between the chips to meet creepage distance requirements and facilitate precise flux deposition.
[0025] Five pins extend from the upper housing and are sequentially connected to the chip electrode wires: the first pin (G) is wire-bonded to the IGBT gate; the second pin (E) is directly soldered to the IGBT emitter copper island; the third pin (C) is led out to the IGBT collector through multiple strands of aluminum wire in parallel; the fourth pin (A) is connected to the FRD2 anode copper island; and the fifth pin (K) is connected to the FRD2 cathode copper island. As an anti-parallel IGBT diode, FRD1 shares the IGBT collector copper island for its cathode and the emitter copper island for its anode, without requiring additional pins. This design creates the shortest possible current loop within the device's internal power circuit, significantly reducing package parasitic inductance under high di / dt and dv / dt conditions, and improving switching losses and EMI.
[0026] To further reduce package length and cost, the traditional semi-circular heatsink mounting ears of the TO-247 have been eliminated, replaced by tie-bars extending from both sides that directly press against the edges of the DBC. The tie-bars are integrally molded with the housing, providing positioning for the DBC before the plastic cures, and also serving as a dual function of mechanical restraint and thermal conduction pressurization. Compared to the "copper frame + solder pad" solution, this structure eliminates the stamping and riveting processes, reducing the projected area of the DBC by approximately 15%, resulting in higher material utilization, and the shorter flow channel facilitates the filling of the molding compound.
[0027] The integrated five-pin device is electrically equivalent to a "Boost PGCIGBT + dual diode" topology: when the controller injects a drive signal into pin 1, the IGBT turns on, and the current flows from pins 2-3 through the inductor to boost the voltage; at the instant the IGBT turns off, the energy storage inductor current freewheels through FRD1 and FRD2 to the output capacitor, and forms a loop through pins 4-5 to complete the energy transfer. Due to the reduction in inductance between chips and between chips and pins, switching overshoot, voltage spikes, and common-mode noise are significantly suppressed, allowing the overall EMI filter size to be further reduced, and the PFC efficiency is generally improved by 0.3-0.5 percentage points.
[0028] Both the chip and pins utilize a lead-free solder paste reflow soldering process with controllable void ratio. The void ratio is measured to be <5% by X-ray. Simultaneously, the solder paste exhibits a self-positioning effect on the DBC, ensuring a chip positional tolerance of ±75µm. The DBC-heatsink interface uses pre-applied thermal grease spring clips or automatic screws for fastening, eliminating the need for manual application of insulating sheets, simplifying assembly and reducing failure rates. After 1000 thermal cycles from -55℃ to 150℃, the package thermal resistance increases by only 5%, significantly better than the traditional TO-247 (approximately 15%). Overall, this structure demonstrates a longer thermomechanical reliability life and lower overall manufacturing cost under high power, high current, and high temperature environments.
[0029] In the description of this utility model, unless otherwise stated, "a plurality of" means two or more; the terms "upper," "lower," "left," "right," "inner," "outer," "front end," "rear end," "head," "tail," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. In addition, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0030] The above description is only a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any modifications, equivalent substitutions and improvements made by those skilled in the art within the technical scope disclosed in this utility model, and within the spirit and principles of this utility model, should be included within the protection scope of this utility model.
Claims
1. A DBC ceramic-based five-pin integrated PFC power semiconductor package structure, characterized in that, include: An IGBT chip, a first fast recovery diode chip, a second fast recovery diode chip, a DBC ceramic substrate, pin components, and a package; The IGBT chip, the first fast recovery diode chip, and the second fast recovery diode chip are mounted side by side on the metal coating surface of the DBC ceramic substrate; The DBC ceramic substrate has double-sided metal layers, with the bottom metal layer exposed at the bottom of the package for external heat dissipation connection; The pin assembly includes five pins, namely the first pin, the second pin, the third pin, the fourth pin, and the fifth pin; The first pin is connected to the gate of the IGBT chip, the second pin is connected to the emitter of the IGBT chip, the third pin is connected to the collector of the IGBT chip, the fourth pin is connected to the anode of the second fast recovery diode chip, and the fifth pin is connected to the cathode of the second fast recovery diode chip. The anode of the first fast recovery diode chip is connected to the collector of the IGBT chip, and the cathode is connected to the emitter of the IGBT chip, forming a freewheeling circuit in parallel with the IGBT chip; The package adopts a TO-247 form factor, the pin assembly extends from the bottom of the package and is arranged linearly, and the top of the package has metal mounting holes for mechanical mounting; The DBC ceramic substrate is held inside the package by two clamping members extending from the side wall of the package, and the clamping members and the DBC ceramic substrate form a rigid fixing structure. The IGBT chip, the first fast recovery diode chip, and the second fast recovery diode chip are electrically connected to the metal layer of the DBC ceramic substrate by soldering. The pin assembly is also electrically connected to the IGBT chip, the first fast recovery diode chip, and the second fast recovery diode chip by soldering.
Citation Information
Patent Citations
Packaging method of PFC (Power Factor Correction) module with To-247 appearance
CN115148723A