Total power adaptive allocation circuit

Abstract

The utility model provides a total power adaptive distribution circuit, it includes total output circuit and a plurality of sub output circuit, total output circuit includes main relay and main relay control circuit, and main relay control circuit judges whether the output power sum of a plurality of sub output circuit exceeds the rated total power of total output circuit, if yes, then through main control winding control main switch unit is disconnected, otherwise, then through main control winding control main switch unit is turned on, sub output circuit includes sub relay, sub relay control circuit and load, sub relay control circuit judges whether the load of sub output circuit exists overload or short circuit, if yes, then through sub control winding control sub switch unit is disconnected, otherwise, then through sub control winding control sub switch unit is turned on. Compared with prior art, the utility model not only can realize when detecting certain sub output circuit failure does not influence other sub output circuit normal work, and can limit the output of total power.

Description

[Technical Field]

[0001] This utility model relates to the field of circuit design technology, and in particular to a total power adaptive distribution circuit. [Background Technology]

[0002] In practical applications, when a main output circuit needs to be divided into multiple outputs, it is usually done by connecting it with connectors or by soldering hard wires to divide it into multiple outputs.

[0003] However, the above-mentioned existing technical solutions have the following problems and disadvantages:

[0004] 1. It simply divides one output circuit into multiple output circuits in a simple way, without power adjustment and power detection circuits, and cannot ensure that the output power of each circuit meets the load requirements of each circuit.

[0005] 2. There is no power protection circuit. When one of the outputs is short-circuited, the entire system will not work properly. This is not conducive to fault detection and is not suitable for applications where a fault in one output should not affect other outputs.

[0006] Therefore, it is necessary to propose a new technical solution to address the above problems. [Utility Model Content]

[0007] One of the objectives of this invention is to provide a total power adaptive distribution circuit, which can not only ensure that the normal operation of other sub-output circuits is not affected when a fault is detected in a sub-output circuit, but also limit the total power output to ensure that the total output power of the sub-output circuits does not exceed the total power output of the total output circuit, thus ensuring the safe operation of the total output circuit.

[0008] According to one aspect of the present invention, a total power adaptive distribution circuit is provided, comprising a total output circuit and multiple sub-output circuits. The total output circuit includes a main relay and a main relay control circuit. The main relay includes a main control winding and a main switching unit. The main control winding is used to control the main switching unit to be turned on or off. The main relay control circuit determines whether the sum of the output power of the multiple sub-output circuits exceeds the rated total power of the total output circuit. If so, the main control winding controls the main switching unit to be turned off; otherwise, the main control winding controls the main switching unit to be turned off. The winding controls the main switch unit to conduct; the sub-output circuit includes a sub-relay, a sub-relay control circuit, and a load. The sub-relay includes a sub-control winding and a sub-switch unit. The sub-control winding is used to control the sub-switch unit to conduct or turn off; the load is connected to the first power supply Vbat in sequence through the sub-switch unit and the main switch unit; the sub-relay control circuit determines whether the load of the sub-output circuit is overloaded or short-circuited. If so, it controls the sub-switch unit to turn off through the sub-control winding; otherwise, it controls the sub-switch unit to conduct through the sub-control winding.

[0009] Compared with the prior art, this utility model provides a total power adaptive distribution circuit, which can not only ensure that the normal operation of other sub-output circuits is not affected when a fault is detected in a sub-output circuit, but also limit the total power output to ensure that the total output power of the sub-output circuits does not exceed the total power output of the total output circuit, thus ensuring the safe operation of the total output circuit. [Attached Image Description]

[0010] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Among them:

[0011] Figure 1 This is a circuit diagram of the total power adaptive distribution circuit in one embodiment of the present invention.

Detailed Implementation Methods

[0012] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, the utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0013] The term "an embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that excludes other embodiments. Unless otherwise specified, the terms coupling, connection, linking, and interconnection used herein to indicate electrical connection mean direct or indirect connection. For example, A being connected to B includes both a direct electrical connection between A and B and a connection between A and B via electrical components or circuits.

[0014] In the description of this utility model, it should be understood that the terms "upper", "lower", "front", "back", "positive", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0015] Please refer to Figure 1 As shown, it is a circuit diagram of the total power adaptive distribution circuit in one embodiment of the present invention. Figure 1 The total power adaptive distribution circuit shown includes a total output circuit 110 and multiple sub-output circuits 120 and 130, and the multiple sub-output circuits 120 and 130 have the same circuit topology. For ease of description, in Figure 1 The embodiment described above shows only two sub-output circuits, namely sub-output circuit 120 and sub-output circuit 130. In reality, there can be two, three, or more sub-output circuits. Since the circuit topology of each sub-output circuit is the same, only sub-output circuit 120 is described in detail below.

[0016] The main output circuit 110 includes a main relay 112 and a main relay control circuit (unmarked). The main relay 112 includes a main control winding Relay1 and a main switch unit K1. The main control winding Relay1 is used to control the main switch unit K1 to be turned on or off. The main relay control circuit (unmarked) determines whether the sum of the output power of the multiple sub-output circuits 120 and 130 exceeds the rated total power of the main output circuit 110. If so, the main switch unit K1 is turned off through the main control winding Relay1; otherwise, the main switch unit K1 is turned on through the main control winding Relay1.

[0017] The sub-output circuit 120 includes a sub-relay 122, a sub-relay control circuit (unmarked), and a load Load1. The sub-relay 122 includes a sub-control winding Relay2 and a sub-switch unit K2. The sub-control winding Relay2 is used to control the sub-switch unit K2 to be turned on or off. The load Load1 is connected to the first power supply Vbat in sequence through the sub-switch unit K2 and the main switch unit K1. The sub-relay control circuit (unmarked) determines whether the load Load1 of the sub-output circuit 120 is overloaded or short-circuited. If so, it controls the sub-switch unit K2 to be turned off through the sub-control winding Relay2. Otherwise, it controls the sub-switch unit K2 to be turned on through the sub-control winding Relay2.

[0018] exist Figure 1 In the specific embodiment shown, the main relay control circuit (not labeled) includes a main overcurrent protection unit 114 and a main current sampling amplification unit 116. The main current sampling amplification unit 116 is used to sum and proportionally amplify the sub-detection voltages VB1 and VB2 received from the sub-output circuits 120 and 130 at its input terminal to obtain a main detection voltage VG representing the total power of the sub-output circuits 120 and 130. The output terminal G of the main current sampling amplification unit 116 outputs the main detection voltage VG. The input terminal of the main overcurrent protection unit 114 is connected to the output terminal G of the main current sampling amplification unit 116, and its output terminal J is connected to the main control winding Relay1. The main overcurrent protection unit 114 determines whether the total output power of the sub-output circuits 120 and 130 exceeds the rated total power of the total output circuit 110 by comparing the main detection voltage VG with the preset main reference voltage VH, and drives the main control winding Relay1 to control the main switch unit K1 to turn on or off based on the comparison result. When the main detection voltage VG is detected to be greater than the preset main reference voltage VH, it indicates that the total output power of the multiple sub-output circuits 120 and 130 exceeds the rated total power of the total output circuit 110. The main overcurrent protection unit 114 controls the main switch unit K1 to disconnect through the main control winding Relay1, thereby stopping the first power supply Vbat from supplying power to the multiple sub-output circuits. When the main detection voltage VG is detected to be less than the preset main reference voltage VH, it indicates that the total output power of the multiple sub-output circuits 120 and 130 does not exceed the rated total power of the total output circuit 110. The main overcurrent protection unit 114 controls the main switch unit K1 to conduct through the main control winding Relay1, thereby allowing the first power supply Vbat to supply power to the multiple sub-output circuits through the main switch unit K1.

[0019] exist Figure 1In the specific embodiment shown, the sub-relay control circuit (not labeled) includes a sub-overcurrent protection unit 124, a sub-current sampling and amplification unit 126, and a sub-current sampling unit 128. Sub-current sampling unit 128 is used to detect the load Load1 current in sub-output circuit 120 and outputs a current sampling voltage VA1 representing the magnitude of the load Load1 current through its output terminal A1; the input terminal of sub-current sampling amplification unit 126 is connected to the output terminal A1 of sub-current sampling unit 128, and its output terminal B1 is connected to the input terminal of main current sampling amplification unit 116; sub-current sampling amplification unit 126 is used to proportionally amplify the current sampling voltage VA1 to obtain sub-detection voltage VB1, and outputs the sub-detection voltage VB1 through its output terminal B1; the input terminal of sub-overcurrent protection unit 124 is connected to the output terminal B1 of sub-current sampling amplification unit 126, and its output terminal F1 is connected to sub-control winding Relay2; sub-overcurrent protection unit 124 determines whether the load Load1 of sub-output circuit 120 is overloaded or short-circuited by comparing the sub-detection voltage VB1 with the preset sub-reference voltage VC1, and drives sub-control winding Relay2 to control sub-switching unit K2 to turn on or off based on the comparison result. When the detected sub-detection voltage VB1 is greater than the preset sub-reference voltage VC1, it indicates that the load Load1 is overloaded or short-circuited. The sub-overcurrent protection unit 124 controls the sub-switching unit K2 to disconnect through the sub-control winding Relay2, thereby stopping the first power supply Vbat from supplying power to the load Load1. When the detected sub-detection voltage VB1 is less than the preset sub-reference voltage VC1, it indicates that the load Load1 is not overloaded or short-circuited. The sub-overcurrent protection unit 124 controls the sub-switching unit K2 to conduct through the sub-control winding Relay2, thereby allowing the first power supply Vbat to supply power to the load Load1 sequentially through the main switching unit K1 and the sub-switching unit K2.

[0020] exist Figure 1In the specific embodiment shown, the sub-current sampling unit 128 includes resistors R50 and R51, semiconductor devices Q15, Q16, Q13, and Q14, resistors R48 and R49. Among them, one end of resistor R50 is connected to the first power supply Vbat via sub-switch unit K2 and main switch unit K1, and the other end is connected to load Load1; the first connection terminal of semiconductor device Q15 is connected to one end of resistor R50 via resistor R51, and its second connection terminal is connected to the first connection terminal of semiconductor device Q13; the control terminal of semiconductor device Q13 is connected to its first connection terminal, and its second connection terminal is connected to node A1; node A1 is grounded via resistor R48; the first connection terminal of semiconductor device Q16 is connected to the other end of resistor R50, and its second connection terminal is connected to the first connection terminal of semiconductor device Q14, and its control terminal is connected to the control terminal of semiconductor device Q15; the control terminal of semiconductor device Q16 is connected to its second connection terminal; the control terminal of semiconductor device Q14 is connected to the control terminal of semiconductor device Q13, and its second connection terminal is grounded via resistor R49; node A1 is the output terminal of sub-current sampling unit 128; the voltage of node A1 is the current sampling voltage VA1.

[0021] exist Figure 1 In the specific embodiment shown, the sub-current sampling amplification unit 126 includes resistors R45, R46, and R47, and operational amplifier U6. The first input terminal of operational amplifier U6 is connected to node A1 via resistor R47, its second input terminal is grounded via resistor R46, its output terminal is connected to node B1, its second input terminal is connected to node B1 via resistor R45, and its power supply terminal is connected to a third power supply VDD. Node B1 is the output terminal of the sub-current sampling amplification unit 126, and the voltage at node B1 is the sub-detection voltage VB1.

[0022] exist Figure 1In the specific embodiment shown, the sub-overcurrent protection unit 124 includes resistors R32, R33, R34, R35, R36, R37, R38, R39, R40, R41, R42, R43, and R44, comparator U5, diode D3, switching device Q9, switching device Q10, switching device Q11, switching device Q12, and capacitor C2. In this circuit, comparator U5's first input terminal is connected to node C1, and its second input terminal is connected to node B1 via resistor R44; its power supply terminal is connected to the third power supply VDD, and its power supply terminal is connected to node C1 via resistor R42, and its power supply terminal is connected to its output terminal via resistor R41; node C1 is grounded via resistor R43; the first connection terminal of switching device Q11 is connected to the output terminal of comparator U5, its second connection terminal is grounded, its control terminal is grounded via resistor R38, and its control terminal is connected to node D1 via resistor R37; the first connection terminal of switching device Q12 is connected to the third power supply VDD, its control terminal is connected to the first connection terminal of switching device Q11 via resistor R40, its second connection terminal is connected to the anode of diode D3, and the cathode of diode D3 is connected to the first connection terminal of switching device Q10 via resistor R34; the switching devices... The second connection terminal of Q10 is grounded, and its control terminal is grounded through resistor R35. Its control terminal is connected to node D1 through resistor R36. One end of resistor R39 is connected to the second connection terminal of switching device Q12, and the other end is connected to node D1. One end of resistor R32 is connected to the third power supply VDD, and the other end is connected to node E1. Node E1 is grounded through resistor R33, and node E1 is connected to the first connection terminal of switching device Q10. The first connection terminal of switching device Q9 is connected to node F1, its second connection terminal is grounded, and its control terminal is connected to node E1. Node F1 is connected to the second power supply VCC through sub-control winding Relay2, and node F1 is the output terminal of sub-current protection unit 122. The voltage of node C1 is the sub-reference voltage VC1. One end of capacitor C2 is connected to the power supply terminal of comparator U5, and the other end is grounded.

[0023] When comparator U5 detects that the sub-detection voltage VB1 is less than the preset sub-reference voltage VC1, its output terminal outputs the first comparison result, causing switching devices Q10, Q11, and Q12 to all turn off, thereby turning on switching device Q9. This, in turn, controls the second power supply VCC to supply power to the sub-control winding Relay2, so that the sub-control winding Relay2 controls the sub-switching unit K2 to turn on. When comparator U5 detects that the sub-detection voltage VB1 is greater than the preset sub-reference voltage VC1, its output terminal outputs the second comparison result, causing switching devices Q10, Q11, and Q12 to all turn on, thereby turning off switching device Q9. This, in turn, controls the second power supply VCC to not supply power to the sub-control winding Relay2, so that the sub-control winding Relay2 controls the sub-switching unit K2 to turn off.

[0024] exist Figure 1 In the specific embodiment shown, semiconductor device Q13 is an NPN transistor, and its first connection terminal, second connection terminal, and control terminal are the collector, emitter, and base of the NPN transistor, respectively; semiconductor device Q14 is an NPN transistor, and its first connection terminal, second connection terminal, and control terminal are the collector, emitter, and base of the NPN transistor, respectively; semiconductor device Q15 is a PNP transistor, and its first connection terminal, second connection terminal, and control terminal are the emitter, collector, and base of the PNP transistor, respectively; semiconductor device Q16 is a PNP transistor, and its first connection terminal, second connection terminal, and control terminal are the emitter, collector, and base of the PNP transistor, respectively.

[0025] exist Figure 1 In the specific embodiment shown, the first and second input terminals of operational amplifier U6 are its non-inverting and inverting input terminals, respectively; the first and second input terminals of comparator U5 are its non-inverting and inverting input terminals, respectively; switching device Q9 is an NPN transistor, and the first connection terminal, second connection terminal, and control terminal of switching device Q9 are the collector, emitter, and base of the NPN transistor, respectively; switching device Q10 is an NPN transistor, and the first connection terminal, second connection terminal, and control terminal of switching device Q10 are the collector, emitter, and base of the NPN transistor, respectively; switching device Q11 is an NPN transistor, and the first connection terminal, second connection terminal, and control terminal of switching device Q11 are the collector, emitter, and base of the NPN transistor, respectively; switching device Q12 is a PNP transistor, and the first connection terminal, second connection terminal, and control terminal of switching device Q12 are the emitter, collector, and base of the PNP transistor, respectively.

[0026] exist Figure 1In the specific embodiment shown, the sub-output circuit 120 further includes a resistor R6. The main current sampling amplification unit 116 includes resistors R8 and R9 and an operational amplifier U2. The first input terminal of the operational amplifier U2 is connected to the output terminal of the sub-current sampling amplification unit 126 (or the second input terminal of the comparator U5) via resistor R6. Its second input terminal is grounded via resistor R8. Its output terminal is connected to node G. Its second input terminal is connected to node G via resistor R9. Its power supply terminal is connected to the third power supply VDD. Node G is the output terminal of the main current sampling amplification unit 116. The voltage of node G is the main detection voltage VG.

[0027] exist Figure 1 In the specific embodiment shown, the main overcurrent protection unit 114 includes resistors R1, R2, R3, R4, and R5, a comparator U1, and a switching device Q0. The first input terminal of comparator U1 is connected to node H, its second input terminal is connected to node G via resistor R5, and its output terminal is connected to node I. Node H is grounded via resistor R4 and connected to the power supply terminal of comparator U1 via resistor R3. The power supply terminal of comparator U1 is connected to the third power supply VDD. One end of resistor R2 is connected to the power supply terminal of comparator U1, and the other end is connected to node I. Node I is grounded via resistor R1. The first connection terminal of switching device Q0 is connected to node J, its second connection terminal is grounded, and its control terminal is connected to node I. Node J is connected to the second power supply VCC via the main control winding Relay1, and node J is the output terminal of the main current protection unit 114. The voltage at node H is the main reference voltage VH.

[0028] When comparator U1 detects that the main detection voltage VG is less than the preset main reference voltage VH, its output terminal outputs the first comparison result, which turns on the switching device Q0, thereby controlling the second power supply VCC to supply power to the main control winding Relay1, so that the main control winding Relay1 controls the main switching unit K1 to turn on; when comparator U1 detects that the main detection voltage VG is greater than the preset main reference voltage VH, its output terminal outputs the second comparison result, which turns off the switching device Q0, thereby controlling the second power supply VCC not to supply power to the main control winding Relay1, so that the main control winding Relay1 controls the main switching unit K1 to turn off.

[0029] exist Figure 1 In the specific embodiment shown, the first input terminal and the second input terminal of the operational amplifier U2 are its non-inverting input terminal and its inverting input terminal, respectively; the first input terminal and the second input terminal of the comparator U1 are its non-inverting input terminal and its inverting input terminal, respectively; the switching device Q0 is an NPN transistor, and the first connection terminal, the second connection terminal and the control terminal of the switching device Q0 are the collector, emitter and base of the NPN transistor, respectively.

[0030] Since the sub-output circuit 120 and sub-output circuit 130 have the same circuit topology and working principle, the sub-output circuit 130 will be briefly described below.

[0031] The sub-output circuit 130 includes a sub-relay 132, a sub-relay control circuit (unmarked), and a load Load2. The sub-relay 132 includes a sub-control winding Relay3 and a sub-switching unit K3.

[0032] exist Figure 1 In the specific embodiment shown, the sub-relay control circuit (not labeled) includes a sub-overcurrent protection unit 134, a sub-current sampling and amplification unit 136, and a sub-current sampling unit 138. The sub-current sampling unit 138 includes resistors R29 and R30, semiconductor devices Q7, Q8, Q5, and Q6, resistors R26 and R27. The sub-current sampling and amplification unit 136 includes resistors R23, R24, and R25, and an operational amplifier U4. The sub-overcurrent protection unit 134 includes resistors R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, and R28, a comparator U3, a diode D4, switching devices Q1, Q2, Q3, and Q4, and a capacitor C1.

[0033] exist Figure 1 In the specific embodiment shown, the sub-output circuit 130 further includes a resistor R7, and the first input terminal of the operational amplifier U2 is connected to the output terminal of the sub-current sampling amplification unit 136 (or the second input terminal of the comparator U3) via the resistor R7.

[0034] exist Figure 1 In the specific embodiment shown, the main relay 112 further includes a diode D1, the negative terminal of which is connected to one end of the main control winding Relay1, and the positive terminal of which is connected to the other end of the main control winding Relay1. One end of the main control winding Relay1 is connected to the second power supply VCC. The sub-relay 122 further includes a diode D2, the negative terminal of which is connected to one end of the sub-control winding Relay2, and the positive terminal of which is connected to the other end of the sub-control winding Relay2. One end of the sub-control winding Relay2 is connected to the second power supply VCC. The sub-relay 132 further includes a diode D5, the negative terminal of which is connected to one end of the sub-control winding Relay3, and the positive terminal of which is connected to the other end of the sub-control winding Relay3. One end of the sub-control winding Relay3 is connected to the second power supply VCC. Diodes D1, D2, and D5 serve an absorption function.

[0035] To facilitate understanding of this utility model, the following detailed description is provided. Figure 1 The working principle of the total power adaptive distribution circuit shown.

[0036] 1. Since the sub-output circuits 120 and 130 operate on the same principle, we only need to analyze the operating principle of sub-output circuit 120. After the system is powered on, power supplies Vbat, VCC, and VDD supply power normally. Sampling resistor R50 samples the current flowing through load Load1. R51, Q15, Q16, Q13, Q14, R48, and R49 form a current source circuit used for current sampling. Assuming the current flowing through resistor R50 is I1, and the current flowing through resistor R51 is I2, and the PN junction voltage of the PNP transistor is Vbe, we can deduce the base voltage VB of Q15: I2*R51-Vbe; similarly, the base voltage VB of Q16 is I1*R50-Vbe. Since Q15 and Q16 are identical PNP transistors, their base voltages VB are the same. Therefore, I2*R51-Vbe = I1*R50-Vbe, which leads to I2 = I1*R50 / R51. Furthermore, Q15 and Q16 form a current mirror, so the current flowing through the collector-emitter junction of Q16 is also I2. Because the resistance of the sampling resistor R50 is much smaller than that of R51, we can convert the large current of the load Load1 into a small current value. Since the amplification factor β of the transistor is very large (usually several hundred), the base current IB is negligible compared to the collector current IC. Therefore, the current flowing through R48 and R51 is basically the same, with a current value of I2. Similarly, Q13 and Q14 are transistors with identical parameters, so the current through R49 is also I2. By calculating the voltage value V1 on R48 as V1 = (I1*R50 / R51)*R48, the current value of the load Load1 can be converted into the voltage value of R48 and sent to the non-inverting input of the op-amp U6 for amplification.

[0037] 2. R47, R46, R45, and op-amp chip U6 form a non-inverting amplifier circuit. If the voltage across R48 is V1, the op-amp output calculation formula is: (1 + R45 / R46) * V1. The op-amp output is connected to the inverting input of comparator U5 through R44. The reference voltage value of the non-inverting input of comparator U5 is: R43 * VDD / (R42 + R43). When the circuit is working normally, (1 + R45 / R46) * V1 < R43 * VDD / (R42 + R43). According to the comparator principle, the output voltage of comparator U5 is high, and the voltage is VDD. Because Q12 is a PNP transistor, its emitter voltage is VDD, and its base is connected to the output voltage of comparator U5 through R40, which is also VDD. At this time, transistor Q12 is in the cutoff state (or off state). The bases of Q10 and Q11 are pulled down to GND through resistors. Since Q12 is in the off state and D3 is a unidirectional diode, the VDD voltage will not affect the base voltages of Q10 and Q11, both of which are 0V. Q10 and Q11 are both NPN transistors, and both are in the off state (or turned-off state). Based on the above analysis, the circuit will not affect the drive of Q9. The base of Q9 is connected to VDD through R32, so after power-on, the NPN transistor is saturated and conducting. VCC drives the control winding Relay2 of sub-relay 122, which in turn controls the closing of sub-relay 122 (or sub-switch unit K2), thereby supplying power to the load Load1.

[0038] 3. The current sampling amplifier circuits 126 and 136 of sub-output circuits 120 and 130 are connected to the non-inverting input of operational amplifier U2 through resistors R6 and R7, respectively, and form a non-inverting summing circuit with R8 and R9. We set the output voltage of the current sampling amplifier circuit (i.e., sub-current sampling amplifier unit 126) of sub-output circuit 120 to be Va1, and the output voltage of the current sampling amplifier circuit (i.e., sub-current sampling amplifier unit 136) of sub-output circuit 130 to be Va2. According to the calculation formula of the non-inverting summing amplifier circuit, the output voltage of operational amplifier U2 can be calculated as: R9 / R8(Va1 / R6+Va2 / R7). The output voltage of op-amp U2 is connected to the inverting input of comparator U1. The reference voltage at the non-inverting input of U1 is divided by R2 and R3 to VDD, and the voltage value is: R4*VDD / (R3+R4). When the system is working normally, R4*VDD / (R3+R4)>R9 / R8(Va1 / R6+Va2 / R7), so the output voltage of comparator U1 is high, and the voltage value is VDD. Since Q0 is an NPN transistor, and the base of Q0 is connected to the output of comparator U1, Q0 is saturated and conducting when the system is working normally. VCC can control the control winding Relay1 of main relay 112 to turn on main relay 112 (or main switch unit K1), so that Vbat can supply power to the loads of sub-output circuits 120 and 130.

[0039] 4. When a sub-output circuit, say sub-output circuit 120, experiences an overload or short circuit, the current flowing through R50 will increase, and the voltage V1 across R48 will also increase. According to the op-amp output calculation formula (1 + R45 / R46) * V1, the output of op-amp U6 will also increase. When this output voltage exceeds the reference voltage R43 * VDD / (R42 + R43) of comparator U5, comparator U5 will output a low level because... Q12 is a PNP transistor. The base of Q12 is connected to the output of comparator U5 via resistor R40. When the output voltage of comparator U5 is low, PNP transistor Q12 will be saturated and conducting. The collector voltage of Q12 is VDD. This collector voltage is connected to the bases of Q10 and Q11 via resistors R39 and R36 and R37, respectively. Since both Q10 and Q11 are NPN transistors, they will both be saturated and conducting. After Q11 is turned on, its collector voltage will be pulled down to 0V, keeping Q12 in a saturated state, independent of the output state of comparator U5. When Q10 is turned on, its collector is pulled down to 0V. At this time, the base voltage of NPN transistor Q9 is also 0V, and Q9 is turned off. Since there is no power supply circuit, sub-relay 122 (or main switch unit K2) will always be in the open state, and the load1 circuit will also be disconnected. At this time, the abnormal state of sub-output circuit 120 will not affect other sub-output circuits.

[0040] 5. When the total power of sub-output circuits 120 and 130 exceeds that of the main power output circuit (i.e., the total output circuit 110), that is, when the sum of the output voltage Va1 of the sub-current sampling amplifier unit 126 of sub-output circuit 120 and the output voltage Va2 of the sub-current sampling amplifier unit 136 of sub-output circuit 130 increases, the output voltage of operational amplifier U2 will also increase. When R9 / R8(Va1 / R6+Va2 / R7)>R4*VDD / (R3+R4), the output of comparator U1 is low. Q0 is an NPN transistor, and the base of Q0 is connected to the output terminal of comparator U1, so Q0 will be cut off. The control winding Relay1 circuit of the main relay 112 cannot be turned on, and the main relay 112 (or the main switch unit K1) will go from the closed state to the open state, which can limit the total power output of the total output circuit 110.

[0041] In summary, the total power adaptive distribution circuit provided by this utility model has the following beneficial effects:

[0042] 1. In this utility model, the overload or short circuit of the sub-output circuit does not affect the normal operation of other output circuits, and the faulty circuit can be easily identified.

[0043] 2. This utility model can adjust the output power value of each channel simply by changing the value of the sampling resistor or the reference voltage of the comparator according to different output power requirements, which makes it convenient to adjust the distribution of the total power.

[0044] 3. This utility model can limit the total power output, ensuring that the sum of the sub-output power does not exceed the total power output, and ensuring the safe operation of the total output circuit.

[0045] It should be noted that any modifications made by those skilled in the art to the specific embodiments of this utility model do not depart from the scope of the claims of this utility model. Accordingly, the scope of the claims of this utility model is not limited to the foregoing specific embodiments.

Claims

1. A total power adaptive distribution circuit, characterized in that, It includes a main output circuit and multiple sub-output circuits. The total output circuit includes a main relay and a main relay control circuit. The main relay includes a main control winding and a main switch unit. The main control winding is used to control the main switch unit to be turned on or off. The main relay control circuit determines whether the sum of the output power of the multiple sub-output circuits exceeds the rated total power of the total output circuit. If so, the main switch unit is turned off through the main control winding; otherwise, the main switch unit is turned on through the main control winding. The sub-output circuit includes a sub-relay, a sub-relay control circuit, and a load. The sub-relay includes a sub-control winding and a sub-switch unit. The sub-control winding is used to control the sub-switch unit to be turned on or off. The load is connected to the first power supply Vbat in sequence through the sub-switch unit and the main switch unit. The sub-relay control circuit determines whether the load of the sub-output circuit is overloaded or short-circuited. If so, it controls the sub-switch unit to be turned off through the sub-control winding; otherwise, it controls the sub-switch unit to be turned on through the sub-control winding.

2. The total power adaptive distribution circuit according to claim 1, characterized in that, The main relay control circuit includes a main overcurrent protection unit and a main current sampling and amplification unit. The main current sampling amplification unit is used to sum and proportionally amplify the sub-detection voltages received at its input terminal from the output of the multiple sub-output circuits to obtain a main detection voltage representing the total power of the multiple sub-output circuits. The main detection voltage is output at the output terminal of the main current sampling amplification unit. The input terminal of the main overcurrent protection unit is connected to the output terminal of the main current sampling amplification unit, and its output terminal is connected to the main control winding. The main overcurrent protection unit determines whether the sum of the output power of the multiple sub-output circuits exceeds the rated total power of the total output circuit by comparing the main detection voltage with the preset main reference voltage, and drives the main control winding to control the main switch unit to turn on or off based on the comparison result.

3. The total power adaptive distribution circuit according to claim 2, characterized in that, The sub-relay control circuit includes a sub-overcurrent protection unit, a sub-current sampling and amplification unit, and a sub-current sampling unit. The sub-current sampling unit is used to detect the load current in the sub-output circuit and output a current sampling voltage representing the magnitude of the load current through its output terminal; The input terminal of the sub-current sampling amplification unit is connected to the output terminal of the sub-current sampling unit, and the output terminal of the sub-current sampling amplification unit is connected to the input terminal of the main current sampling amplification unit; the sub-current sampling amplification unit is used to proportionally amplify the current sampling voltage to obtain a sub-detection voltage, and outputs the sub-detection voltage through its output terminal; The input terminal of the sub-overcurrent protection unit is connected to the output terminal of the sub-current sampling and amplification unit, and its output terminal is connected to the sub-control winding. The sub-overcurrent protection unit determines whether the load of the sub-output circuit is overloaded or short-circuited by comparing the sub-detection voltage with the preset sub-reference voltage, and drives the sub-control winding to control the sub-switching unit to turn on or off based on the comparison result.

4. The total power adaptive distribution circuit according to claim 3, characterized in that, When the main detection voltage is detected to be greater than the preset main reference voltage, the main overcurrent protection unit controls the main switch unit to disconnect through the main control winding; When the main detection voltage is detected to be less than the preset main reference voltage, the main overcurrent protection unit controls the main switching unit to turn on through the main control winding. When the detected sub-detection voltage is greater than the preset sub-reference voltage, the sub-overcurrent protection unit controls the sub-switching unit to disconnect through the sub-control winding; when the detected sub-detection voltage is less than the preset sub-reference voltage, the sub-overcurrent protection unit controls the sub-switching unit to turn on through the sub-control winding.

5. The total power adaptive distribution circuit according to claim 3 or 4, characterized in that, The sub-current sampling unit includes resistors R50 and R51, semiconductor devices Q15, Q16, Q13, and Q14, resistors R48 and R49. One end of resistor R50 is connected to the first power supply Vbat via the sub-switch unit and the main switch unit, and the other end is connected to the load. The first connection terminal of semiconductor device Q15 is connected to one end of resistor R50 via resistor R51, and its second connection terminal is connected to the first connection terminal of semiconductor device Q13. The control terminal of semiconductor device Q13 is connected to its first connection terminal, and its second connection terminal is connected to node A1. Node A1 is grounded via resistor R48. The first connection terminal of semiconductor device Q16 is connected to the other end of resistor R50, and its second connection terminal is connected to the first connection terminal of semiconductor device Q14. Its control terminal is connected to the control terminal of semiconductor device Q15. The control terminal of semiconductor device Q16 is connected to its second connection terminal. The control terminal of semiconductor device Q14 is connected to the control terminal of semiconductor device Q13, and its second connection terminal is grounded via resistor R49. Node A1 is the output terminal of the sub-current sampling unit.

6. The total power adaptive distribution circuit according to claim 5, characterized in that, The sub-current sampling and amplification unit includes resistors R45, R46, and R47, and operational amplifier U6. The first input terminal of the operational amplifier U6 is connected to node A1 via resistor R47, its second input terminal is grounded via resistor R46, its output terminal is connected to node B1, its second input terminal is connected to node B1 via resistor R45, its power supply terminal is connected to the third power supply VDD, and node B1 is the output terminal of the sub-current sampling amplification unit.

7. The total power adaptive distribution circuit according to claim 6, characterized in that, The sub-overcurrent protection unit includes resistors R32, R33, R34, R35, R36, R37, R38, R39, R40, R41, R42, R43, and R44; comparator U5; diode D3; and switching devices Q9, Q10, Q11, and Q12. The first input terminal of comparator U5 is connected to node C1, its second input terminal is connected to node B1 via resistor R44, its power supply terminal is connected to the third power supply VDD, its power supply terminal is connected to node C1 via resistor R42, and its power supply terminal is connected to its output terminal via resistor R41; node C1 is grounded via resistor R43; the first connection terminal of switching device Q11 is connected to the output terminal of comparator U5, its second connection terminal is grounded, its control terminal is grounded via resistor R38, and its control terminal is connected to node D1 via resistor R37; the first connection terminal of switching device Q12 is connected to the third power supply VDD, its control terminal is connected to the first connection terminal of switching device Q11 via resistor R40, its second connection terminal is connected to the anode of diode D3, and the cathode of diode D3 is connected to the anode of diode D3 via resistor R44. 34 is connected to the first connection terminal of the switching device Q10; the second connection terminal of the switching device Q10 is grounded, its control terminal is grounded through the resistor R35, and its control terminal is connected to the node D1 through the resistor R36; one end of the resistor R39 is connected to the second connection terminal of the switching device Q12, and its other end is connected to the node D1; one end of the resistor R32 is connected to the third power supply VDD, and its other end is connected to the node E1; the node E1 is grounded through the resistor R33, and the node E1 is connected to the first connection terminal of the switching device Q10; the first connection terminal of the switching device Q9 is connected to the node F1, its second connection terminal is grounded, and its control terminal is connected to the node E1; the node F1 is connected to the second power supply VCC through the sub-control winding Relay2, and the node F1 is the output terminal of the sub-overcurrent protection unit.

8. The total power adaptive distribution circuit according to claim 7, characterized in that, When the comparator U5 detects that the sub-detection voltage is less than the preset sub-reference voltage, its output terminal outputs the first comparison result, so that the switching devices Q10, Q11 and Q12 are all turned off, thereby turning on the switching device Q9, and then controlling the second power supply VCC to supply power to the sub-control winding, so that the sub-control winding controls the sub-switching unit to turn on. When the comparator U5 detects that the sub-detection voltage is greater than the preset sub-reference voltage, its output terminal outputs a second comparison result, so that the switching devices Q10, Q11, and Q12 are all turned on, thereby turning off the switching device Q9, and then controlling the second power supply VCC not to supply power to the sub-control winding, so that the sub-control winding controls the sub-switching unit to turn off.

9. The total power adaptive distribution circuit according to claim 7, characterized in that, The semiconductor device Q13 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of the semiconductor device Q13 are the collector, emitter, and base of the NPN transistor, respectively. The semiconductor device Q14 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of the semiconductor device Q14 are the collector, emitter, and base of the NPN transistor, respectively. The semiconductor device Q15 is a PNP transistor, and the first connection terminal, the second connection terminal, and the control terminal of the semiconductor device Q15 are the emitter, collector, and base of the PNP transistor, respectively. The semiconductor device Q16 is a PNP transistor, and the first connection terminal, the second connection terminal, and the control terminal of the semiconductor device Q16 are the emitter, collector, and base of the PNP transistor, respectively. The first and second input terminals of the operational amplifier U6 are its non-inverting input terminal and its inverting input terminal, respectively. The first and second input terminals of the comparator U5 are its non-inverting input terminal and its inverting input terminal, respectively. The switching device Q9 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of the switching device Q9 are the collector, emitter, and base of the NPN transistor, respectively. The switching device Q10 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of the switching device Q10 are the collector, emitter, and base of the NPN transistor, respectively. The switching device Q11 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of the switching device Q11 are the collector, emitter, and base of the NPN transistor, respectively. The switching device Q12 is a PNP transistor, and the first connection terminal, the second connection terminal, and the control terminal of the switching device Q12 are the emitter, collector, and base of the PNP transistor, respectively.

10. The total power adaptive distribution circuit according to claim 3 or 4, characterized in that, The sub-output circuit also includes resistor R6. The main current sampling amplification unit includes resistors R8 and R9 and operational amplifier U2. The first input terminal of operational amplifier U2 is connected to the output terminal of the sub-current sampling amplification unit via resistor R6. Its second input terminal is grounded via resistor R8. Its output terminal is connected to node G. Its second input terminal is connected to node G via resistor R9. Its power supply terminal is connected to the third power supply VDD. Node G is the output terminal of the main current sampling amplification unit.

11. The total power adaptive distribution circuit according to claim 10, characterized in that, The main overcurrent protection unit includes resistors R1, R2, R3, R4, and R5, a comparator U1, and a switching device Q0. The first input terminal of comparator U1 is connected to node H, its second input terminal is connected to node G via resistor R5, and its output terminal is connected to node I. Node H is grounded via resistor R4, and node H is connected to the power supply terminal of comparator U1 via resistor R3. The power supply terminal of comparator U1 is connected to the third power supply VDD. One end of resistor R2 is connected to the power supply terminal of comparator U1, and the other end is connected to node I. Node I is grounded via resistor R1. The first connection terminal of switching device Q0 is connected to node J, its second connection terminal is grounded, and its control terminal is connected to node I. Node J is connected to the second power supply VCC via the main control winding Relay1, and node J is the output terminal of the main overcurrent protection unit.

12. The total power adaptive distribution circuit according to claim 11, characterized in that, When the comparator U1 detects that the main detection voltage is less than the preset main reference voltage, its output terminal outputs the first comparison result, so that the switching device Q0 is turned on, thereby controlling the second power supply VCC to supply power to the main control winding, so that the main control winding controls the main switching unit to turn on. When the comparator U1 detects that the main detection voltage is greater than the preset main reference voltage, its output terminal outputs a second comparison result, so that the switching device Q0 is turned off, thereby controlling the second power supply VCC not to supply power to the main control winding, so that the main control winding controls the main switching unit to turn off.

13. The total power adaptive distribution circuit according to claim 11, characterized in that, The first and second input terminals of the operational amplifier U2 are its non-inverting input terminal and its inverting input terminal, respectively. The first and second input terminals of the comparator U1 are its non-inverting input terminal and its inverting input terminal, respectively. The switching device Q0 is an NPN transistor, and the first connection terminal, the second connection terminal, and the control terminal of the switching device Q0 are the collector, emitter, and base of the NPN transistor, respectively.

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