BIPOLEAL TRANSISTOR WITH INSULATED GATE

Abstract

Bipolar transistor with insulated gate, IGBT (100), comprising: a semiconductor body (102) having a first surface (106) and a second surface (112) and comprising an active region (104) and an edge termination region (108) that at least partially surrounds the active region (104), wherein the active region (104) comprises a first part (1041) of an active IGBT region (1040) and a second part (1042) of the active IGBT region (1040); a contact (110) on a second surface (112) of the semiconductor body (102), wherein a minimum vertical distance (d1) between the contact (110) in the first part of the active IGBT region (1041) and a reference plane (1061) on the first surface (106) is greater than a minimum vertical distance (d2) between the contact (110) in the second part of the active IGBT region (1042) and the reference plane (1061) on the first surface (106), wherein the semiconductor body (102) has a drift region (118) of a first conductivity type, a field stop region (123) of the first conductivity type, and a collector region (124) of a second conductivity type, wherein the contact (110) comprises a plurality of protrusions (1101) that form depressions (122) in the semiconductor body (102) at the fill the second surface (112), and the recesses (122) are arranged in the second part (1042) of the active IGBT area (1040); and a plurality of first mesa regions (1161) on the first surface (106) of the active IGBT region (1040) of the semiconductor body (102), wherein a first width (w1) of one of the plurality of first mesa regions (1161) along a first lateral direction (x1) is less than 20% of a lateral extent of the first part (1041) of the active IGBT region (1040) which is laterally bounded by the depressions (122).

Description

TECHNICAL AREA

[0001] The present disclosure relates to a semiconductor device, in particular an insulated gate bipolar transistor, IGBT, which has an active region and an edge termination region that at least partially surrounds the active region. BACKGROUND

[0002] The technological development of new generations of semiconductor devices, such as IGBTs, aims to improve electrical device characteristics and reduce costs by shrinking device geometries. For example, reference is made to the disclosures in US 2019 / 0 245 070 A1, CN 2 05 248 280 U, and US 2011 / 0 186 965 A1. Although costs can be reduced by shrinking device geometries, increasing device functionalities per unit area necessitates addressing a variety of trade-offs and challenges. For example, a trade-off between area-specific on-resistance and on-resistance RDS(on) is required. on xA and switching efficiency are device optimization.

[0003] Therefore, there is a need for an improved IGBT. SUMMARY

[0004] The invention is defined in the independent patent claims. Further developments are the subject of the dependent patent claims.

[0005] The expert will recognize additional features and advantages upon reading the following detailed description and upon examining the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The accompanying drawings are enclosed to provide a further understanding of the embodiments and are incorporated into and form part of this description. The drawings illustrate examples of semiconductor devices and, together with the description, serve to explain the principles of the examples. Further examples are described in the following detailed description and the claims. Fig. 1A and Fig. Figure 1B shows partial cross-sectional views to illustrate an example of an IGBT with different substrate thicknesses in an active region of the IGBT. Fig. 2, Fig. 3, Fig. 4, Fig. 5, Fig. 6 to Fig. Figure 7 shows partial cross-sectional views to illustrate design examples of a collector contact and a field stop region of an IGBT. Fig. 8 and Fig. Figure 9 shows partial cross-sectional views to illustrate design examples of a backward conducting IGBT, RC-IGBT. Fig. 10A and Fig. Figure 10B shows partial cross-sectional views to illustrate design examples of a cathode contact in an active diode region of the RC-IGBT. Fig. 11A and Fig. Figure 11B shows partial cross-sectional views to illustrate design examples of transistor and diode cells on a front face of an RC-IGBT. Fig. Figure 12 is a schematic graphical representation to illustrate vertical doping concentration profiles in mesa regions of an active diode region and an active IGBT region of an RC-IGBT. DETAILED DESCRIPTION

[0007] The following detailed description refers to the accompanying drawings, which form part thereof and illustrate specific examples of IGBTs. It is understood that other examples may be used and structural or logical modifications made without departing from the scope of this disclosure. For example, features illustrated or described for one example may be used in conjunction with other examples to arrive at yet another example. It is intended that this disclosure includes such modifications and variations. The examples are described using specific language, which should not be interpreted as limiting the scope of the attached claims. The drawings are not to scale and are for illustrative purposes only.Corresponding elements are designated with the same reference symbols in the various drawings, unless otherwise stated.

[0008] The terms "have," "contain," "comprise," "exhibit," and the like are open-ended terms, indicating the presence of the identified structures, elements, or features, but not excluding the presence of additional elements or features. Indefinite and definite articles should encompass both the plural and the singular unless the context clearly indicates otherwise.

[0009] The term "electrically connected" describes a permanent, low-resistance connection between electrically connected elements, for example, a direct contact between the elements in question or a low-resistance connection via a metal and / or a highly doped semiconductor material. The term "electrically coupled" implies that one or more intermediate elements suitable for signal and / or power transmission may be connected between the electrically coupled elements, for example, elements that are controllable to temporarily provide a low-resistance connection in a first state and a high-resistance electrical decoupling in a second state. A resistive contact is a non-rectifying electrical junction.

[0010] For physical dimensions, specified ranges include the boundary values. For example, a range for a parameter y from a to b is read as a ≤ y ≤ b. The same applies to ranges with a boundary value such as "at most" and "at least".

[0011] The terms "on" and "over" should not be interpreted as meaning only "directly on" and "directly over". Rather, if an element is positioned "on" or "over" another element (e.g., a layer is "on" or "over" another layer or "on" or "over" a substrate), another component (e.g., another layer) can be positioned between the two elements (e.g., another layer can be positioned between a layer and a substrate if the layer is "on" or "over" the substrate).

[0012] An example of an insulated-gate bipolar transistor (IGBT) can comprise a semiconductor body with a first surface and a second surface. The IGBT can include an active region and an edge termination region that at least partially surrounds the active region. The active region can comprise a first part and a second part. The IGBT can further have a contact on a second surface of the semiconductor body. A minimum vertical distance between the contact in the first part of the active IGBT region and a reference plane on the first surface can be greater than a minimum vertical distance between the contact in the second part of the active IGBT region and the reference plane on the first surface.

[0013] The IGBT can be, for example, part of an integrated circuit or a discrete semiconductor device or module. The IGBT can be a power IGBT, such as a vertical power IGBT with a load current flowing between the first surface and the second surface opposite the first. The power IGBT can be configured to conduct currents greater than 1 A, 10 A, 30 A, 50 A, 75 A, or even 100 A, and can furthermore be configured to block voltages between load electrodes, such as between emitter and collector, in the range of several hundred to several thousand volts, e.g., 400 V, 650 V, 1.2 kV, 1.7 kV, 3.3 kV, 4.5 kV, 5.5 kV, 6 kV, 6.5 kV, 10 kV. The blocking voltage can, for example, correspond to a voltage class specified in a datasheet of the power semiconductor device.To achieve a desired current-carrying capacity, the IGBT can be designed using a large number of parallel-connected IGBT cells. These parallel-connected IGBT cells can, for example, be arranged in the form of a strip or a strip segment. Of course, the IGBT cells can also have any other shape, such as circular, elliptical, or polygonal, including octahedral shapes.

[0014] The semiconductor body may have or consist of a semiconductor substrate. The semiconductor body material may be group IV elemental semiconductors, a group IV-IV compound semiconductor material, a group III-V compound semiconductor material, or a group II-VI compound semiconductor material. Examples of group IV elemental semiconductor materials include silicon (Si) and germanium (Ge). Examples of group IV-IV compound semiconductor materials include silicon carbide (SiC) and silicon germanium (SiGe). Examples of group III-V compound semiconductor materials include gallium arsenide (GaAs), gallium nitride (GaN), gallium phosphide (GaP), indium phosphide (InP), indium gallium nitride (InGaN), and idium gallium arsenide (InGaAs). Examples of II-VI compound semiconductor materials include cadmium telluride (CdTe), mercury cadmium telluride (CdHgTe), and cadmium magnesium telluride (CdMgTe).

[0015] For example, the first surface can be a front or top surface of the semiconductor body, and the second surface can be a rear or back surface. The semiconductor body can, for example, be mounted on a conductor frame via the second surface. Bond pads can be arranged over the first surface of the semiconductor body, and bond wires can be bonded to the bond pads. The reference plane on the first surface can coincide with a planar region or section of the first surface of the semiconductor body, such as a planar interface region between the semiconductor body and an interlayer dielectric that directly borders the semiconductor body from above.

[0016] The edge termination region may contain a termination structure. In blocking mode or in a blocking-biased mode of the IGBT, the blocking voltage drops laterally between the active region and a field-free region across the termination structure. The termination structure may have a higher or slightly lower voltage blocking capability than the active region. For example, the termination structure may include a junction termination extension (JTE) with or without a variation in lateral doping (VLD), one or more laterally separated guard rings, or any combination thereof.

[0017] The active region can be an area in which an emitter region of the IGBT on the first surface and a collector region of the IGBT on the second surface are arranged opposite each other along a vertical direction. Within the active region, an IGBT load current can enter or exit the semiconductor body of the IGBT, for example, via contact plugs on the first surface of the semiconductor body.

[0018] The first load electrode of the IGBT can be an emitter electrode. The emitter electrode can be part of a wiring region above the semiconductor body. The wiring region can contain one or more wiring levels, such as two, three, four, or even more. Each wiring level can be formed by a single or a stack of conductive layers, such as a metal layer. The wiring levels can be structured, for example, lithographically. An interlayer dielectric structure can be arranged between stacked wiring levels. A contact plug or contact conductor(s) can be formed in openings in the interlayer dielectric structure to electrically connect parts, such as metal conductors or contact regions, of different wiring levels. The emitter electrode can be formed by one or more elements of the wiring region.Similarly, the collector electrode can be formed by one or more elements of a wiring area above the second surface.

[0019] By adjusting the thickness d1 for improved turn-on resistance in the first part of the active IGBT region and the thickness d2 for improved turn-off smoothness in the second part of the active IGBT region, both characteristics can be improved with respect to different parts of the active IGBT region. This allows for greater flexibility when setting characteristic device parameters and thus enables an improved trade-off between area-specific turn-on resistance, R. on xA, and the switching efficiency.

[0020] For example, the semiconductor body can have a drift region of a first conductivity type, a field-stop region of a first conductivity type, and a collector region of a second conductivity type. The contact contains a variety of protrusions or ridges that fill depressions in the semiconductor body on the second surface. The depressions are located in the second part of the active IGBT region. For example, the contact can completely cover the second surface in the active IGBT region. The contact can also be, for example, the only wiring plane of the wiring region above the second surface. The density and dimensions, e.g., width and depth, of the depressions, or the density and dimensions, e.g., width and height, of the ridges can vary with respect to the second surface in the active IGBT region.

[0021] The blocking voltage of the IGBT can be adjusted by the impurity concentration and / or the vertical extent of the drift region within the semiconductor body. The doping concentration of the drift region can gradually increase or decrease with increasing distance from the first surface, at least in regions or sections of its vertical extent. According to other examples, the impurity concentration in the drift region can be approximately uniform. For silicon-based power IGBTs, an average impurity concentration in the drift region can range between 2 × 10⁻⁶. 12 cm -3 and 1 × 10 16 cm -3 , for example in an area of ​​5 × 10 12 cm -3 up to 1 × 10 15 cm -3 or up to 2 × 10 14 cm -3 , lie. In some cases, the average impurity concentration in the drift region for silicon-based IGBTs can be in the range of 1 × 1014 cm -3 up to 1 × 10 16 cm -3 In the case of a SiC-based power IGBT, the average defect concentration in the drift region can be between 5 × 10⁻⁶. 14 cm -3 and 1 × 10 17 cm -3 , for example in an area of ​​1 × 10 15 cm -3 up to 2 × 10 16 cm -3The vertical extent of the drift region can depend on voltage blocking requirements, such as a specified voltage class, of the vertical power IGBT. When the vertical power IGBT is operated in a voltage blocking mode, a space charge region can extend partially or completely vertically through the drift region, depending on the blocking voltage applied to the vertical power IGBT. If the vertical power IGBT is operated at or near the specified maximum blocking voltage, the space charge region can reach or penetrate the field-stop region, which is configured to prevent the space charge region from extending further to a collector contact on the second major surface of the semiconductor body. For IGBTs, this allows the drift region to be formed using desired low doping levels and with a desired thickness while achieving soft switching.

[0022] For example, the IGBT may also have third mesa regions. Each of the third mesa regions may be laterally bounded by opposing depressions. The field stop region may have a first layer that lines the sidewalls and top surface of the third mesa regions. The field stop region may also have a second layer on top of the first layer. The doping concentration of the first layer may be higher than that of the second layer. An interface between the drift region and the second layer of the field stop region may, for example, be planar. For instance, the interface may be closer to the first surface than the bottom surface of the depressions. The second layer may have protruding regions toward the second surface. These protruding regions may, for example, be located within the mesa regions.The field-stopping region can, for example, include additional layers to create a field-stopping region with multiple peaks. In some other examples, the second layer can be fully integrated into the third mesa region. The flexibility in the field-stopping region design can be tailored to meet the specific requirements of electric field reduction demanded by IGBT applications.

[0023] For example, the IGBT can further exhibit a plurality of first mesa regions on the first surface of the active IGBT region of the semiconductor body. The width of one of the plurality of first mesa regions along a first lateral direction can be less than 20% of the lateral extent of the first part of the active IGBT region, which is laterally bounded by regions of the second part of the active IGBT region.

[0024] For example, a minimum vertical distance between a bottom surface of the drift region in the first part of the active IGBT area and the reference plane at the first surface can be greater than a minimum vertical distance between a bottom surface of the drift region in the second part of the active IGBT area and the reference plane at the first surface. This allows for variation in the thickness of the drift region within the active IGBT area.

[0025] For example, the IGBT can be a reverse-conducting IGBT, RC-IGBT, which also includes an active diode region. Similar to the active region of the IGBT, the active diode can also be at least partially surrounded by the edge termination region. Thus, an active region that is partially surrounded by the edge termination region can encompass both the active region of the IGBT and the active diode region.

[0026] For example, the minimum vertical distance between the contact in the first part of the active IGBT region and the reference plane on the first surface can be greater than a minimum vertical distance between the contact in the active diode region and the reference plane on the first surface. This can, for example, allow for an improvement in the forward voltage VF compared to the overall efficiency when switching on the IGBT (a trade-off between the ON state and switching, e.g., turning on, the IGBT, accompanied by turning off the diode in RC-IGBTs).

[0027] For example, the minimum vertical distance between the contact in the second part of the active IGBT region and the reference plane on the first surface can be equal to the minimum vertical distance between the contact in the active diode region and the reference plane on the first surface. This can, for example, simplify a manufacturing process by jointly processing the active IGBT region and the active diode region.

[0028] For example, a minimum distance between the contact in a first part of the active diode region and the reference plane on the first surface can be greater than a minimum vertical distance between the contact in a second part of the active diode region and the reference plane on the first surface. Similar to the active IGBT region, a trade-off between characteristic parameters of the diode region of the RC-IGBT can also be improved by, for example, varying parameter optimization across different parts of the active diode region.

[0029] The contact can, for example, comprise a multitude of protrusions that fill depressions in the semiconductor body on the second surface. The depressions can be arranged in the active diode region. This allows for variation in the effective thickness of a substrate or drift region within the active diode region. The density and dimensions (e.g., width and depth) of the depressions, or the density and dimensions (e.g., width and height) of the protrusions, can vary relative to the second surface in the active diode region.

[0030] For example, the contact in the first part of the active IGBT region can contain a first contact material that differs from a second contact material contained in the contact in the active diode region. This allows for the independent adjustment of electrical contact properties in the diode region and the IGBT region.

[0031] The first contact material can, for example, be aluminum (Al) directly adjacent to a p-doped collector region in the active IGBT area. For example, the first contact material can be Al, Si-doped Al, or AlSiCu. The second contact material can be titanium (Ti) directly adjacent to an n-doped cathode region in the active diode area. For example, an Al-based wiring layer can be used to provide an electrical contact, such as a good resistive contact, with a p-doped semiconductor material, such as silicon. For example, a wiring layer formed using titanium, titanium / tungsten, or titanium / nitride can be used to provide an electrical contact, such as a good resistive contact, with an n-doped semiconductor material, such as silicon.

[0032] The IGBT can, for example, exhibit a plurality of first mesa regions in the active IGBT area of ​​the semiconductor body. Furthermore, the IGBT can exhibit a plurality of second mesa regions in the active diode region of the semiconductor body. The first width of one of the plurality of first mesa regions can be smaller than the second width of one of the plurality of second mesa regions. The width can be measured along the first lateral direction. The first lateral direction can be perpendicular to a second lateral direction. The second lateral direction can, for example, be a longitudinal direction of strip-shaped transistor cells.

[0033] For example, the number of electrical contacts on one of the multiple second mesa regions along the first lateral direction can be greater than the number of electrical contacts on one of the multiple first mesa regions along the first lateral direction. For example, there can be one contact on one of the first mesa regions along the first lateral direction, and there can be more than one, e.g., two, three, four, five, or even more than five contacts, on one of the second mesa regions.

[0034] For example, the IGBT can further exhibit a plurality of first mesa regions in the active IGBT region of the semiconductor body and a plurality of second mesa regions in the active diode region of the semiconductor body. The IGBT can also exhibit a first-type conductivity drift region. A first vertical concentration profile of first-type dopants in the center of one of the first mesa regions can exceed a vertical concentration profile of first-type dopants in the center of one of the second mesa regions by at least 30% of the first height of the plurality of first mesa regions.

[0035] For example, the ratio between Δ and Vbr can be in a range of 3 µm / kV to 15 µm / kV, where Δ is a difference between the first minimum vertical distance d1 and the second minimum vertical distance d2, and Vbr is a collector-emitter breakdown voltage of the IGBT.

[0036] For example, an interface between the contact in the second part of the active diode region and the semiconductor body is essentially flat. "Essentially flat" also encompasses process / manufacturing variations or characteristics, as well as surface roughness. For instance, the underside of a trench produced by an etching process can be considered essentially flat.

[0037] The contact in the second part of the active diode area can, for example, have a multitude of protrusions that fill depressions in the semiconductor body on the second surface.

[0038] Details regarding the structure, function, or technical benefits of features described above in relation to an IGBT apply equally to the exemplary procedures described here. A machining of the semiconductor body may incorporate one or more optional additional features corresponding to one or more aspects mentioned in connection with the proposed concept or one or more examples described above or below.

[0039] Another example relates to a method for fabricating an insulated-gate bipolar transistor. The method can involve forming an active region and an edge termination region, at least partially surrounding the active region, in a semiconductor body with a first surface and a second surface. The active region can comprise a first part of an active IGBT region and a second part of the active IGBT region. Furthermore, the method can involve forming a contact on a second surface of the semiconductor body. A minimum vertical distance between the contact in the first part of the active IGBT region and a reference plane on the first surface can be greater than a minimum vertical distance between the contact in the second part of the active IGBT region and the reference plane on the first surface.

[0040] For example, forming the active region and the edge termination region can include forming a gate structure, an emitter region of a first conductivity type, a body region of a second conductivity type, and a wiring region by processing the semiconductor body on the first surface. Furthermore, forming the active region and the edge termination region can include forming pits in the semiconductor body on the second surface by at least one masked etching process. The formation of the active region and the edge termination region can also include introducing dopants into the semiconductor body through at least one ion implantation process via the second surface. Finally, forming the active region and the edge termination region can include forming the contact on the second surface.The formation of the active area and the edge closure area may also include one or more optional additional features, e.g., activation of implanted dopants by thermal healing, e.g., by rapid thermal processing / curing (RTP / RTA) or by laser healing.

[0041] For example, at least one ion implantation process can be performed through the second surface before the wells are formed. At least one ion implantation process through the second surface can be performed after the wells are formed. This can, for example, allow greater flexibility in setting doping concentration profiles.

[0042] All ion implantation processes through the second surface can be performed, for example, after the formation of the depressions. Therefore, no ion implantation process through the second surface necessarily needs to be performed before the formation of the depressions.

[0043] Forming the contact can, for example, involve forming a first contact material on the second surface. Forming the contact can further involve removing the first contact material in the active IGBT region. Subsequently, forming the contact can further involve forming a second contact material on the second surface. This can allow for the adjustment of contact materials on the second surface of the semiconductor body with respect to electrical contact properties, e.g., ohmic contact properties.

[0044] The IGBT can be configured as a reverse-conducting IGBT, RC-IGBT, by forming an active diode region. The minimum vertical distance between the contact in the first part of the active IGBT region and the reference plane on the first surface can be set larger than the minimum vertical distance between the contact in the active diode region and the reference plane on the first surface.

[0045] Examples and features described above and below can be combined.

[0046] Functional and structural details described in relation to the examples above shall apply equally to the exemplary examples illustrated in the figures and described below.

[0047] Further examples of insulated-gate bipolar transistors (IGBTs) are explained below in conjunction with the accompanying drawings. Functional and structural details described in relation to the examples above apply equally to the exemplary embodiments illustrated in the figures and described below. In some of the illustrated examples, for an n-channel IGBT, the first conductance type is an n-type and the second conductance type is a p-type. However, for a p-channel IGBT, the first conductance type can also be a p-type and the second conductance type an n-type.

[0048] Fig. Figure 1A schematically illustrates a cross-sectional view of part of an IGBT 100. The IGBT 100 comprises a semiconductor body 102 with a first surface 106 and a second surface 112. The IGBT 100 includes an active region 104 and an edge termination region 108, which at least partially surrounds the active region 104. Although in the simplified view of Fig. Not illustrated in Figure 1A, the active region 104 can be a region in which an emitter region of the IGBT 100 on the first surface 106 and a collector region of the IGBT 100 on the second surface 112 are arranged opposite each other along a vertical direction y. In other words, an IGBT load current can enter or exit the semiconductor body 102 of the IGBT 100 in the active region 104. In the edge termination region 108, a blocking voltage can be applied between the active region and a field-free region via a (in Fig. 1A (not illustrated) termination structure slopes laterally.

[0049] The schematic cross-sectional view of Fig. Figure 1B is a more detailed view of the active region 104 of the IGBT 100, which is located in Fig. Figure 1A illustrates this. The active region 104 comprises a first part 1041 of an active IGBT region 1040 and a second part 1042 of the active IGBT region 1040. A contact 110 is arranged on the second surface 112 of the semiconductor body 100. A minimum vertical distance d1 between the contact 110 in the first part 1041 of the active IGBT area 1040 and a reference plane 1061 on the first surface 106 is greater than a minimum vertical distance d2 between the contact 110 in the second part 1042 of the active IGBT area 1040 and the reference plane 1061 on the first surface 106. By adjusting the thickness d1 for improved on-resistance and the thickness d2 for improved switching smoothness, both characteristics can be improved with respect to different parts of the active IGBT area 1040.This can allow for greater flexibility when setting characteristic device parameters, and can thus, for example, improve the trade-off between an area-specific on-resistance, R. on xA, and enable switching efficiency.

[0050] Fig. Figure 2 schematically and exemplarily shows an IGBT 100, based on the example of the Fig. 1A, Fig. 1B based.

[0051] The IGBT 100 comprises a multitude of first mesa regions 1161 in the active IGBT region 1040 on the first surface 106 of the semiconductor body 102. Each of the first mesa regions 1161 is, for example, laterally bounded along a first lateral direction x1 by trench structures 1171. A gate and / or a field dielectric, as well as a gate and / or a field electrode, can be arranged, for example, in the trench structures 1171.

[0052] A drift region 118 of a first conductivity type is arranged in the semiconductor body 102. A field stop region 123 of the first conductivity type and a collector region 124 of a second conductivity type are arranged between the drift region 118 and the second surface 112. The contact 110, e.g., a collector contact, has a plurality of protrusions 1101 that fill depressions 122 in the semiconductor body 102 on the second surface 112. A pair of depressions 122 laterally bounds a third mesa area 1163 along the first lateral direction x1. The field stop area 123 comprises a first layer 1231, which lines the sidewalls and a top surface of the mesa areas 1163, and a second layer 1232 on top of the first layer 1231. The doping concentration of the first layer 1231 is higher than that of the second layer 1232.The second layer 1232 is bounded by the first layer 1231 in the direction of the second surface 112 and may be bounded in the direction of the first surface 106 by the drift region 118, e.g., by a planar boundary to the drift region 118. A width w3 of the third mesa region 1163 is greater than a width w1 of the first mesa region 1161 at the first surface 106.

[0053] The side walls of the third mesa areas 1163 may also be tapered to simplify processing, e.g. to simplify the deposition of a material (of materials) for contact 110 or to simplify ion implantation processes to create the field stop area 123 or the collector area 124.

[0054] Fig. Figure 3 schematically and exemplarily shows an IGBT 100, based on the example of the Fig. 1A, Fig. 1B based. The one in Fig. The IGBT 100 shown in Figure 3 differs from the one in Figure 3. Fig. 2 illustrated IGBT 100 by showing that a minimum vertical distance d3 between a bottom surface of the drift region 118 in the first part 1041 of the active IGBT region 1040 and the reference plane 1061 at the first surface 106 is greater than a minimum vertical distance d4 between a bottom surface of the drift region 118 in the second part 1042 of the active IGBT region 1040 and the reference plane 1061 at the first surface 106. Unlike in Fig. As illustrated in example 2, a thickness variation of the drift area 118 can be achieved, for example by varying the thickness of the second layer 1232 of the field stop area 123. Fig. 2 is omitted. Sidewalls of the third mesa areas 1163 may also be tapered to simplify processing, e.g. to simplify the deposition of a material (of materials) for contact 110 or to simplify ion implantation processes to create the field stop area 123 or the collector area 124.

[0055] Fig. Figure 4 schematically and exemplarily illustrates an IGBT 100, based on the example of the Fig. 1A, Fig. 1B based. The one in Fig. The IGBT 100 shown in section 4 differs from the one in the diagram. Fig. Figure 2 illustrated IGBT 100 by showing that the field-stop region 123 comprises, in addition to the first and second layers 1231, 1232, third, fourth, and fifth layers 1233, 1234, 1235. Each of the third, fourth, and fifth layers 1233, 1234, 1235 has a higher doping concentration than the second layer 1232. Thus, the field-stop region 123 exhibits a doping concentration profile with multiple peaks along the vertical direction y. These multiple peaks can be formed, for example, by ion implantation processes with different ion implantation energies, such as different proton implantation energies, followed by suitable annealing steps, which are carried out, for example, at temperatures between 350°C and 420°C for a period of time between 30 minutes and 5 hours. The number of peaks and the vertical doping profile of field stop area 123 can be varied and adapted to specific needs.

[0056] In addition to the recesses 122 that define the second part 1042 of the active IGBT area 1040 in the examples described above, second, third, or even more recesses can be provided, differing in depth and / or width. Second recesses 1222 with a greater width and depth than the recesses 122 are used for the IGBT 100. Fig. 5, which is based on the example of Fig. 3 is based on schematic and exemplary illustrations. By varying the depth and / or width of the indentations across the active IGBT area 1040, e.g., in one of the examples above, the trade-off between an area-specific on-resistance, R, can be adjusted. onxA, and the switching efficiency with respect to different parts of the active IGBT area 1040 can be variably adjusted. Varying the depth of the wells can be achieved, for example, by anisotropic etching with crystal plane selectivity using different widths of etch mask openings, e.g., by wet alkaline etching of silicon with, for example, tetramethylammonium hydroxide (TMAH) with or without surfactants such as isopropyl alcohol (IPA) solutions.

[0057] In the examples described above, the collector layer 124 may have a constant lateral doping concentration or may contain areas that are more and / or less doped than other areas. For example, parts of the collector area 124 on a bottom surface of the wells 122 may be more highly doped than parts of the collector area 124 on side walls of the wells 122 and / or parts of the collector area 124 on the second surface 112. Likewise, parts of the collector area 124 on the second surface 112 may be more highly doped than parts of the collector area 124 on a bottom surface of the wells 122 or on side walls of the wells 122.

[0058] Fig. 6 and Fig. Figure 7 shows schematic and exemplary IGBTs 100 based on the in Fig. The 4 or 2 illustrated examples are based on this, but differ from those in Fig. 4 and Fig. The two illustrated examples differ in that the depressions 122 extend deeper into the semiconductor body 102 from the second surface 112 than the second layer 1232 of the field-stop region 123.

[0059] Fig. Figure 8 shows schematically and by way of example an IGBT which is designed as a backward conducting IGBT, RC-IGBT, 101 and further contains an active diode area 1043.

[0060] The minimum vertical distance d1 between the contact 110 in the first part 1041 of the active IGBT area 1040 and the reference plane 1061 on the first surface 106 is greater than a minimum vertical distance d6 between the contact 110 in the active diode area 1043 and the reference plane 1061 on the first surface 106.

[0061] In some examples, e.g., the one in Fig. In the illustrated example 8, the minimum vertical distance d2 between the contact 110 in the second part 1042 of the active IGBT area 1040 and the reference plane 1061 on the first surface 106 is equal (i.e., in line with variations caused by process fluctuations / unevenness in production) to the minimum vertical distance d6 between the contact 110 in the active diode area 1043 and the reference plane 1061 on the first surface 106.

[0062] Fig. Figure 9 schematically and exemplarily shows the active diode region 1043 of another example of an RC-IGBT 101. The RC-IGBT 101 has a minimum vertical distance d5 between the contact 110 in a first part 1044 of the active diode region 1043 and the reference plane 1061 on the first surface 106, which is greater than a minimum vertical distance d6 between the contact 110 in a second part 1045 of the active diode region 1043 and the reference plane 1061 on the first surface 106.

[0063] As shown in the schematic cross-sectional view of the Fig. 10A, Fig. As schematically illustrated in Figure 10B, the contact 110 in the exemplary active diode regions 1043 comprises a plurality of protrusions 1102 that fill depressions 125 in the semiconductor body 102 on the second surface 112, and the depressions 125 are arranged in the active diode region 1043. The contact 110 in the first part 1041 of the active IGBT region 1040 (see, for example, Figure 10B) Fig. 1, Fig. 2, Fig. 3, Fig. 4, Fig. 5, Fig. 6 to Fig. 7) may contain a first contact material that differs from a second contact material contained in contact 110 in the active diode region 1043, e.g., a cathode contact. For example, the first contact material may comprise aluminum, Al, directly adjacent to a p-doped collector region of an n-channel RC IGBT. The second contact material may comprise titanium, Ti, directly adjacent to an n-doped cathode region for an n-channel RC IGBT. For example, an Al-based wiring layer may be used to provide an electrical contact, e.g., a resistive contact, with a p-doped semiconductor material, e.g., silicon. A wiring layer formed using titanium or titanium / tungsten, or based on titanium / nitride, may, for example, be used to provide an electrical contact, e.g., a resistive contact, with an n-doped semiconductor material, e.g., silicon.The formation of the contact 110 by the first and second contact materials can be carried out, for example, by forming the first contact material on the second surface 112, removing the first contact material in the active IGBT area 1041, 1042 and then forming a second contact material on the second surface 112.

[0064] Referring to the schematic and exemplary cross-sectional views of the Fig. 11A, Fig. Figure 11B, illustrating an RC-IGBT 101, shows that the RC-IGBT 101 contains a plurality of first mesa regions 1161 in the active IGBT region 1040 of the semiconductor body 102 and a plurality of second mesa regions 1162 in the active diode region 1043 of the semiconductor body 102. A first width w1 of one of the plurality of first mesa regions 1161 is smaller than a second width w2 of one of the plurality of second mesa regions 1162. A first number of electrical contacts 1311 on one of the plurality of second mesa regions 1162 and / or extending into it along the first lateral direction x1 is larger than a second number of electrical contacts 1312 on one of the plurality of first mesa regions 1161 along the first lateral direction x1.

[0065] The schematic graphical representation of Fig. Figure 12 is an exemplary illustration of vertical concentration profiles c of dopants of the first conductivity type. For example, a first vertical concentration profile c1 of dopants of the first conductivity type in the center of one of the first mesa regions exceeds 1161 (see Fig. 11B) a vertical concentration profile of dopants of the first conductivity type in the center of one of the second mesa areas 1162 (see Fig. 11A) over at least 30% of a first height h1 of the multitude of first mesa areas 1161.

[0066] The aspects and features mentioned and described together with one or more of the previously described examples and figures can also be combined with one or more of the other examples to replace an identical feature of the other example or to additionally introduce the feature into the other example.

Claims

[1] Bipolar transistor with insulated gate, IGBT (100), comprising: a semiconductor body (102) having a first surface (106) and a second surface (112) and comprising an active region (104) and an edge termination region (108) that at least partially surrounds the active region (104), wherein the active region (104) comprises a first part (1041) of an active IGBT region (1040) and a second part (1042) of the active IGBT region (1040); a contact (110) on a second surface (112) of the semiconductor body (102), wherein a minimum vertical distance (d1) between the contact (110) in the first part of the active IGBT region (1041) and a reference plane (1061) on the first surface (106) is greater than a minimum vertical distance (d2) between the contact (110) in the second part of the active IGBT region (1042) and the reference plane (1061) on the first surface (106), wherein the semiconductor body (102) has a drift region (118) of a first conductivity type, a field stop region (123) of the first conductivity type, and a collector region (124) of a second conductivity type, wherein the contact (110) comprises a plurality of protrusions (1101) that form depressions (122) in the semiconductor body (102) at the fill the second surface (112), and the recesses (122) are arranged in the second part (1042) of the active IGBT area (1040); and a plurality of first mesa regions (1161) on the first surface (106) of the active IGBT region (1040) of the semiconductor body (102), wherein a first width (w1) of one of the plurality of first mesa regions (1161) along a first lateral direction (x1) is less than 20% of a lateral extent of the first part (1041) of the active IGBT region (1040) which is laterally bounded by the depressions (122). [2] IGBT (100) according to the preceding claim, further comprising third mesa regions (1163), wherein each of the third mesa regions (1163) is laterally bounded by opposite depressions (122), wherein the field stop region (123) comprises a first layer (1231), lining the side walls and a top surface of the third mesa regions (1163), and a second layer (1232) on top of the first layer (1231), wherein a doping concentration of the first layer (1231) is higher than a doping concentration of the second layer (1232). [3] IGBT (100) according to one of the preceding claims, wherein a minimum vertical distance (d3) between a bottom surface of the drift region in the first part (1041) of the active IGBT region (1040) and the reference plane (1061) on the first surface (106) is greater than a minimum vertical distance (d4) between a bottom surface of the drift region in the second part (1042) of the active IGBT region (1040) and the reference plane (1061) on the first surface (106). [4] Bipolar transistor with insulated gate, IGBT (100), comprising: a semiconductor body (102) having a first surface (106) and a second surface (112) and comprising an active region (104) and an edge termination region (108) that at least partially surrounds the active region (104), wherein the active region (104) comprises a first part (1041) of an active IGBT region (1040) and a second part (1042) of the active IGBT region (1040); a contact (110) on a second surface (112) of the semiconductor body (102), wherein a minimum vertical distance (d1) between the contact (110) in the first part of the active IGBT region (1041) and a reference plane (1061) on the first surface (106) is greater than a minimum vertical distance (d2) between the contact (110) in the second part of the active IGBT region (1042) and the reference plane (1061) on the first surface (106), wherein the IGBT (100) is a backward-conducting IGBT, RC-IGBT, which further comprises an active diode region (1043), and wherein the minimum vertical distance (d1) between the contact (110) in the first part (1041) of the active IGBT region (1040) and the reference plane (1061) on the first surface (106) is greater than a minimum vertical distance (d6) between the contact (110) in the active diode area (1043) and the reference plane (1061) at the first surface (106). [5] IGBT (100) according to the preceding claim, wherein the minimum vertical distance (d2) between the contact (110) in the second part (1042) of the active IGBT region (1040) and the reference plane (1061) on the first surface (106) is equal to the minimum vertical distance (d6) between the contact (110) in the active diode region (1043) and the reference plane (1061) on the first surface (106). [6] IGBT (100) according to the preceding claim, wherein a minimum vertical distance (d5) between the contact (110) in a first part (1044) of the active diode region (1043) and the reference plane (1061) on the first surface (106) is greater than a minimum vertical distance (d6) between the contact (110) in a second part (1045) of the active diode region (1043) and the reference plane (1061) on the first surface (106). [7] IGBT (100) according to any one of claims 4 to 6, wherein the contact (110) comprises a plurality of protrusions (1102) that fill depressions (125) in the semiconductor body (102) on the second surface (112), and the depressions (125) are arranged in the active diode region (1043). [8] IGBT (100) according to any one of claims 4 to 7, wherein the contact (110) in the first part (1041) of the active IGBT region (1040) contains a first contact material which differs from a second contact material contained in the contact (110) in the active diode region (1043). [9] IGBT (100) according to the preceding claim, wherein the first contact material comprises aluminium, Al, directly adjacent to a p-doped collector region, and the second contact material comprises titanium, Ti, directly adjacent to an n-doped cathode region. [10] IGBT (100) according to any one of claims 4 to 9, further comprising a plurality of first mesa regions (1161) in the active IGBT region (1040) of the semiconductor body (102) and a plurality of second mesa regions (1162) in the active diode region (1043) of the semiconductor body (102), wherein a first width (w1) of one of the plurality of first mesa regions (1161) is smaller than a second width (w2) of one of the plurality of second mesa regions (1162). [11] IGBT (100) according to the preceding claim, wherein a first number of electrical contacts on one of the plurality of second mesa areas (1162) along the first lateral direction (x1) is greater than a second number of electrical contacts on one of the plurality of first mesa areas (1161) along the first lateral direction (x1). [12] IGBT (100) according to any one of claims 4 to 11, further comprising a plurality of first mesa regions (1161) in the active IGBT region (1040) of the semiconductor body (102) and a plurality of second mesa regions (1162) in the active diode region (1043) of the semiconductor body (102) and a drift region (118) of a first conductivity type, wherein a first vertical concentration profile of dopants (c1) of the first conductivity type in a center of one of the first mesa regions (1161) exceeds a vertical concentration profile of dopants of the first conductivity type in a center of one of the second mesa regions (1162) over at least 30% of a first height (h1) of the plurality of first mesa regions (1161). [13] Method for manufacturing an insulated gate bipolar transistor, IGBT (100), comprising: a formation in a semiconductor body (102) having a first surface (106) and a second surface (112), an active region (104) and an edge termination region (108) that at least partially surrounds the active region (104), wherein the active region (104) comprises a first part (1041) of an active IGBT region (1040) and a second part (1042) of the active IGBT region (1040); a forming of a contact (110) on a second surface (112) of the semiconductor body (102), wherein a minimum vertical distance (d1) between the contact (110) in the first part (1041) of the active IGBT region (1040) and a reference plane (1061) on the first surface (106) is greater than a minimum vertical distance (d2) between the contact (110) in the second part (1042) of the active IGBT region (1040) and the reference plane (1061) on the first surface (106); a formation of a drift region (118) of a first conductivity type, a field stop region (123) of the first conductivity type and a collector region (124) of a second conductivity type, wherein the contact (110) comprises a plurality of protrusions (1101) that fill depressions (122) in the semiconductor body (102) on the second surface (112), and the depressions (122) are arranged in the second part (1042) of the active IGBT region (1040) and limit; and a formation of a plurality of first mesa regions (1161) on the first surface (106) of the active IGBT region (1040) of the semiconductor body (102), wherein a first width (w1) of one of the plurality of first mesa regions (1161) along a first lateral direction (x1) is less than 20% of a lateral extent of the first part (1041) of the active IGBT region (1040) which is laterally bounded by the depressions (122). [14] Method according to the preceding claim, comprising forming the active area (104) and the edge closure area (108): a formation of a gate structure, an emitter region of a first conductivity type, a body region of a second conductivity type and a wiring region by machining the semiconductor body on the first surface (106); thereafter a formation of the depressions (122) in the semiconductor body (102) on the second surface (112) by at least one masked etching process; an introduction of dopants into the semiconductor body (102) by at least one ion implantation process through the second surface (112); and thereafter a formation of contact (110) on the second surface (112). [15] Method according to the preceding claim, wherein at least one ion implantation process is carried out through the second surface (112) before forming the depressions (122) and at least one ion implantation process is carried out through the second surface (112) after forming the depressions (122). [16] Method according to the preceding claim, wherein all ion implantation processes are carried out through the second surface (112) after forming the depressions. [17] Method according to one of the four preceding claims, wherein forming the contact (110) a formation of a first contact material on the second surface (112); a removal of the first contact material in the active IGBT area (1041, 1042); and thereafter includes the formation of a second contact material on the second surface (112). [18] Method according to any one of the five preceding claims, wherein the IGBT (100) is formed as a backward conducting IGBT, RC-IGBT, by forming an active diode region (1043). [19] Method according to the preceding claim, wherein the minimum vertical distance (d1) between the contact (110) in the first part (1041) of the active IGBT region (1040) and the reference plane (1061) on the first surface (106) is set larger than a minimum vertical distance (d6) between the contact (110) in the active diode region (1043) and the reference plane (1061) on the first surface (106).

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