Image sensor

Abstract

To provide an image sensor that can improve the a dynamic range and a signal-to-noise ratio, for example.SOLUTION: An image sensor has: a pixel array that includes a plurality of pixels arranged in a first direction and a second direction that intersect with each other; and a peripheral circuit that is connected to the plurality of pixels through a plurality of row and column lines and drives the plurality of pixels. Each pixel includes a first photodiode, a second photodiode with a smaller light-receiving area than the first photodiode, and a pixel circuit that connects the first and second photodiodes to the peripheral circuit. The peripheral circuit acquires a first pixel signal by executing a first readout operation for each pixel after a first exposure time and acquires a second pixel signal by executing a second readout operation, which is different from the first readout operation, for some pixels among the pixels after a second exposure time, which is shorter than the first exposure time. The peripheral circuit generates first image data by using the first pixel signal and generates second image data by using the second pixel signal.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present invention relates to an image sensor, and more particularly to an image sensor capable of improving the dynamic range, signal-to-noise ratio, and the like. [Background technology]

[0002] An image sensor is a sensor that receives light and generates an electrical signal, and includes a pixel array having a plurality of pixels and peripheral circuits for driving the pixel array to generate an image. In recent years, as image sensors have been adopted in fields such as vehicles, methods have been proposed for accurately photographing subjects of various shapes.

[0003] One method is to set multiple image sensors differently to accurately capture various subjects, but this requires a lot of space and increases the cost. Therefore, various methods have been proposed for accurately capturing images of multiple subjects having different characteristics using a single image sensor. Summary of the Invention [Problem to be solved by the invention]

[0004] The present invention has been made in consideration of the above-mentioned problems in conventional image sensors, and an object of the present invention is to provide an image sensor having a structure in which one pixel includes a first photodiode and a second photodiode having different light receiving areas, in which a first readout operation performed after a first exposure time and a second readout operation performed after a second exposure time are set differently, thereby improving the dynamic range, signal-to-noise ratio, etc. [Means for solving the problem]

[0005] In order to achieve the above object, an image sensor according to the present invention includes: a pixel array including a plurality of pixels arranged in a first direction and a second direction intersecting the first direction; and a peripheral circuit connected to the plurality of pixels via a plurality of row lines and a plurality of column lines and driving the plurality of pixels, wherein each of the plurality of pixels includes a first photodiode, a second photodiode having a light-receiving area smaller than that of the first photodiode, and a pixel circuit connecting the first photodiode and the second photodiode to the peripheral circuit, wherein the peripheral circuit performs a first readout operation on each of the plurality of pixels after a first exposure time to obtain a first pixel signal, and performs a second readout operation on at least some of the plurality of pixels after a second exposure time shorter than the first exposure time to obtain a second pixel signal, and the peripheral circuit generates first image data using the first pixel signal and generates second image data using the second pixel signal.

[0006] In addition, an image sensor according to the present invention, which has been made to achieve the above-mentioned object, includes a plurality of pixels, each including a first photodiode, a second photodiode having a light-receiving area smaller than that of the first photodiode, and a pixel circuit connected to the first photodiode and the second photodiode, and a peripheral circuit that sequentially performs a first shutter operation, a first exposure time, a first readout operation, a second shutter operation, a second exposure time, and a second readout operation for each of the plurality of pixels, wherein the first readout operation includes a plurality of first readout operations that are sequentially performed, and the second readout operation includes a plurality of second readout operations that are sequentially performed, and the peripheral circuit performs at least one of the plurality of second readout operations in a manner different from the plurality of first readout operations.

[0007] In addition, an image sensor according to the present invention, which has been made to achieve the above-mentioned object, includes a plurality of pixels, each including a first photodiode, a second photodiode having a light-receiving area smaller than that of the first photodiode, and a pixel circuit connected to the first photodiode and the second photodiode, and a peripheral circuit that drives the plurality of pixels, wherein the pixel circuit performs a plurality of first readout operations to output signals after a first exposure time, and performs a plurality of second readout operations to output signals after a second exposure time that is shorter than the first exposure time, and wherein the number of times that the pixel circuit outputs a signal corresponding to a charge generated in the first photodiode during the plurality of second readout operations is greater than the number of times that the pixel circuit outputs a signal corresponding to a charge generated in the second photodiode. [Effects of the Invention]

[0008] According to the image sensor of the present invention, each pixel includes a first photodiode, a second photodiode, and a pixel circuit. The second photodiode has a smaller light receiving area than the first photodiode. Therefore, a first readout operation for acquiring a pixel signal corresponding to charges generated in the first photodiode and the second photodiode during a first exposure time and a second readout operation for acquiring a pixel signal corresponding to charges generated in the first photodiode and the second photodiode during a second exposure time are performed separately, thereby improving the signal-to-noise ratio, dynamic range, number of frames per second, etc. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a block diagram showing a schematic configuration of an image sensor according to an embodiment of the present invention; [Figure 2] FIG. 1 is a simplified diagram illustrating a pixel array structure of an image sensor according to an embodiment of the present invention. [Figure 3] FIG. 1 is a simplified diagram illustrating a pixel array structure of an image sensor according to an embodiment of the present invention. [Figure 4] 1 is a simplified circuit diagram illustrating a pixel included in an image sensor according to an embodiment of the present invention. [Figure 5] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 6] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 7] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 8] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 9] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 10] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 11] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 12] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 13] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 14] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 15] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 16] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 17] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 18] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 19] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 20] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 21] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 22] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 23] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; [Figure 24] 4A and 4B are diagrams illustrating the operation of an image sensor according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0010] Next, specific examples of embodiments for carrying out the image sensor according to the present invention will be described with reference to the drawings.

[0011] FIG. 1 is a block diagram showing a schematic configuration of an image sensor according to an embodiment of the present invention. Referring to FIG. 1, an image sensor 10 includes a pixel array 20, a peripheral circuit 30, and the like. The pixel array 20 includes a plurality of pixel regions arranged in an array along a plurality of rows and a plurality of columns. Each of the multiple pixel regions has a photoelectric conversion element that generates an electric charge in response to light, and the photoelectric conversion element is connected to a pixel circuit that generates and outputs a signal corresponding to the electric charge generated by the photoelectric conversion element.

[0012] A pixel may be realized by a photoelectric conversion element and a pixel circuit. The photoelectric conversion element may include a photodiode made of a semiconductor material and / or an organic photodiode made of an organic material. In one embodiment, one pixel may include a first photodiode and a second photodiode having different light receiving areas. As an example, the pixel circuit includes a plurality of transistors and capacitors. The capacitor stores excess charge generated in the photodiode and is connected to the photodiode through at least one transistor. In one embodiment, the capacitor may be a metal-insulator-metal (MIM) capacitor.

[0013] The peripheral circuitry 30 includes circuits for controlling the pixel array 20 . For example, the peripheral circuit 30 includes a row driver 31, a read-out circuit 32, a data output circuit 33, a control logic 34, and the like. The row driver 31 drives the pixel array 20 row by row. For example, the row driver 31 inputs control signals for controlling the on / off of each of the transistors included in the pixel circuits to the pixel array 20 on a row-by-row basis.

[0014] Among the pixels, pixels arranged at the same position along the row direction (the horizontal direction in FIG. 1) share the same column line. For example, pixels arranged at the same position in the column direction (vertical direction in FIG. 1) are simultaneously selected by the row driver 31 and output pixel signals via column lines. In one embodiment, the readout circuitry 32 simultaneously receives signals from the pixels selected by the row driver 31 via the column lines. As an example, the readout circuit 32 sequentially receives a reset voltage and a signal voltage from each of the pixels, the signal voltage being a voltage that reflects the charge generated in the photodiode of each of the pixels onto the reset voltage.

[0015] The readout circuit 32 includes a plurality of correlated double samplers and a plurality of counters, and the correlated double samplers are connected to the pixels via column lines. As an example, one correlated double sampler and one counter are connected to one column line. The correlated double sampler reads voltage signals via column lines from pixels connected to row lines selected by row line select signals of the row driver 31 . One of the input terminals of each of the correlated double samplers is connected to a column line, and the other input terminal is connected to a ramp voltage. The output of each of the correlated double samplers is connected to a counter, which counts the time that the output of each of the correlated double samplers is maintained at a particular voltage to generate a digital pixel signal. As an example, a counter counts the time that the ramp voltage input to the correlated double sampler is greater than the voltage on the column line, and converts the output of the correlated double sampler into a digital pixel signal. The data output circuit 33 includes memories such as latches and buffer circuits for temporarily storing digital pixel signals.

[0016] The control logic 34 includes a timing controller for controlling the operation timing of the row driver 31, the readout circuit 32, and the data output circuit 33. Depending on the embodiment, control logic 34 may also determine the data format that data output circuitry 33 outputs or perform pre-processing of the data that data output circuitry 33 outputs.

[0017] In one embodiment of the present invention, the readout circuitry 32 may perform the readout operation for each of the plurality of pixels more than once. As an example, when one of the plurality of row lines is selected, the readout circuit 32 reads a signal corresponding to the charge generated when the pixels arranged along the selected row line are exposed to light. In one embodiment of the present invention, the signal corresponding to the charge generated in the pixel during a single exposure time can be read multiple times by readout circuitry 32 . The readout circuitry 32 is capable of acquiring signals from the pixels under different operating conditions. As an example, the readout circuit 32 performs at least one readout operation under each of a high conversion gain condition and a low conversion gain condition for each pixel. The conversion gain of each pixel varies depending on whether the transistor connected to the floating diffusion node in each pixel is turned on or off.

[0018] As described above, each of the plurality of pixels includes a capacitor. During the exposure time, charges generated in the photodiode exceeding the FWC (Full Well Capacity) of the photodiode are transferred to and stored in the capacitor, and the readout circuit 32 performs a readout operation to obtain a signal corresponding to the charges stored in the capacitor. By generating an image using signals acquired from pixels under different operating conditions by the readout circuit 32, the range of light intensities that the image sensor 10 can represent can be expanded, improving the dynamic range. In one embodiment of the present invention, the first readout operation after the first exposure time and the second readout operation after the second exposure time, which is shorter than the first exposure time, are performed differently. By performing each of the first readout operation and the second readout operation in a manner optimized according to the length of the exposure time, it is possible to improve the signal-to-noise ratio, dynamic range, etc. of the first image data generated from the charges generated in the first exposure time and the second image data generated from the charges generated in the second exposure time.

[0019] 2 and 3 are simplified diagrams illustrating the pixel array structure of an image sensor according to one embodiment of the present invention. First, referring to FIG. 2, the pixel array 50 includes a plurality of pixels PX arranged in a first direction (X-axis direction) and a second direction (Y-axis direction).

[0020] Each of the plurality of pixels PX includes a first photodiode PD1 and a second photodiode PD2, and the light receiving area of ​​the first photodiode PD1 is larger than the light receiving area of ​​the second photodiode PD2. In the embodiment shown in FIG. 2, in each of the plurality of pixels PX, a first photodiode PD1 and a second photodiode PD2 are arranged in a diagonal direction that intersects with the first direction and the second direction. Each of the plurality of pixels PX includes a color filter that transmits light corresponding to a wavelength of one of red, green, and blue hues. Each of the plurality of pixels PX includes one of a red color filter, a green color filter, and a blue color filter.

[0021] FIG. 3 is an enlarged view of a partial region 60 of FIG. Referring to FIG. 3, four pixels PX arranged in a 2×2 configuration among a plurality of pixels PX are arranged in a Bayer pattern. As shown in FIG. 3, of the four pixels PX arranged in a 2x2 configuration, two pixels PX arranged diagonally include a green color filter, and the other two pixels PX include a red color filter and a blue color filter.

[0022] In the embodiment shown in FIGS. 2 and 3, each of the plurality of pixels PX includes a first microlens ML1 and a second microlens ML2. The first microlens ML1 is disposed above the first photodiode PD1 in the first light receiving region A1, and the second microlens ML2 is disposed above the second photodiode PD2 in the second light receiving region A2. However, the arrangement of each of the plurality of pixels PX may not be limited to the arrangement shown in FIGS. For example, the plurality of pixels PX may be arranged in a tetra pattern, in which four pixels PX arranged in a 2×2 format along the first and second directions include color filters of the same color. Also, some of the pixels PX may not include a color filter, or may include a color filter that passes light of a color other than red, green, and blue.

[0023] In each of the plurality of pixels PX, the first photodiode PD1 and the second photodiode PD2 are connected to a column line via one pixel circuit. The pixel circuit includes a plurality of transistors and a capacitor. During the exposure time, charges generated in excess of the FWC of the first and second photodiodes PD1 and PD2 are transferred to and stored in the capacitor.

[0024] In an image sensor including pixel array 50 according to an embodiment of the present invention, the readout operation is performed differently depending on the length of the exposure time. For example, when an image sensor is installed in a means of transportation, the exposure time is set to a certain time or more in order to accurately recognize a light source that exhibits a flicker phenomenon. However, when the exposure time is set long in this way, other subjects may not be photographed accurately. For example, in an image of a subject moving at high speed, the shape of the subject may appear distorted. In one embodiment of the present invention, to solve the above problem, first image data is generated using pixel signals corresponding to charges generated during a first exposure time, and second image data is generated using pixel signals corresponding to charges generated during a second exposure time that is shorter than the first exposure time. Assuming that the image sensor is installed in a means of transportation, the first image data can be used to accurately capture a light source that causes flickering, and the second image data can be used to capture other subjects without distortion.

[0025] In addition, in one embodiment of the present invention, the first readout operation after the first exposure time and the second readout operation after the second exposure time are performed differently. Due to the difference in exposure time, when the first readout operation and the second readout operation are performed using the same scheme, the signal-to-noise ratio, dynamic range, etc. may be reduced in the first image data and / or the second image data. In one embodiment of the present invention, the signal-to-noise ratio and dynamic range of each of the first and second image data can be improved by performing a first readout operation with a first scheme optimized for a relatively long first exposure time and a second readout operation with a second scheme optimized for a relatively short second exposure time.

[0026] FIG. 4 is a simplified circuit diagram of a pixel included in an image sensor according to one embodiment of the present invention. Referring to FIG. 4, a pixel PX according to an embodiment of the present invention includes a photodiode PD and a pixel circuit.

[0027] The pixel circuit includes a floating diffusion node FD, a first transfer transistor TX1, a second transfer transistor TX2, a gain control transistor DRX, a capacitor CAP, a first switch transistor SW1, a second switch transistor SW2, a third switch transistor SW3, a reset transistor RX, an amplification transistor SF, and a selection transistor SX. Control signals (TG1, TG2, RG, SG1, SG2, SG3, DRG, SEL) that control a plurality of transistors included in the pixel circuit are output by a row driver.

[0028] The floating diffusion node FD is connected to the first photodiode PD1 via the first transfer transistor TX1, and when the first transfer transistor TX1 is turned on by the first transmission control signal TG1, the charge of the first photodiode PD1 is stored in the floating diffusion node FD. On the other hand, the floating diffusion node FD is connected to the second photodiode PD2 via the second transfer transistor TX2, the first switch transistor SW1, and the gain control transistor DRX. In an operation of transferring the charges generated in the second photodiode PD2 to the floating diffusion node FD, the second transfer transistor TX2, the first switch transistor SW1, and the gain control transistor DRX are turned on by the row driver.

[0029] The gain control transistor DRX is connected between the floating diffusion node FD and the first node N1. When the gain control transistor DRX is turned on by the gain control signal DCG, the capacitance of the floating diffusion node FD increases, and the conversion gain of the pixel PX decreases. Conversely, when the gain control transistor DRX is turned off, the conversion gain of the pixel PX increases.

[0030] The first switch transistor SW1 is connected between the first node N1 and the second node N2, and the capacitor CAP and the second switch transistor SW2 are connected between the second node N2 and the first power supply node. The first power supply node is a node that supplies a first power supply voltage VDD1. The second switch transistor SW2 and the capacitor CAP are connected in series between the second node N2 and the first power supply node.

[0031] On the other hand, a reset transistor RX is connected between the first node N1 and the second power supply node. The second power supply node is a node that supplies a second power supply voltage VDD2 and is connected to the drain of the reset transistor RX. Depending on the embodiment, the second power supply voltage VDD2 may be the same as the first power supply voltage VDD1 or may be a different voltage from the first power supply voltage VDD1. In one embodiment, the second power supply voltage VDD2 is greater than the first power supply voltage VDD1. The third switch transistor SW3 is connected between the first power supply node and the second power supply node.

[0032] The gate of the amplifier transistor SF is connected to the floating diffusion node FD, and the amplifier transistor SF is connected between the third power supply node and the select transistor SX. The third power supply node is a node that supplies a third power supply voltage VDD3. According to an embodiment, the third power supply voltage VDD3 may be equal to at least one of the first power supply voltage VDD1 and the second power supply voltage VDD2. In one embodiment, the third power supply voltage VDD3 is the same as the second power supply voltage VDD2 and is greater than the first power supply voltage VDD1. In addition, in one embodiment, the third power supply voltage VDD3 may be greater than the first power supply voltage VDD1 and the second power supply voltage VDD2.

[0033] The amplifier transistor SF operates as a source-follower amplifier and amplifies the voltage of the floating diffusion node FD to generate a signal. The signal generated by the amplifier transistor SF is output to the column line COL by turning on the selection transistor SX. The column line COL is connected to one of the inputs of a correlated double sampler, which transmits to a counter an output signal determined by the signal output to the column line COL and the ramp voltage.

[0034] The operations of the pixel PX include a shutter operation, an exposure operation, a read-out operation, and the like. In the shutter operation, the charges on the floating diffusion node FD and the photodiode PD are removed, and in the exposure operation, the photodiode PD is exposed to light for a predetermined exposure time to generate charges. On the other hand, in the readout operation, the voltage of the floating diffusion node FD is amplified and output to the column line COL, and as an example, a reset voltage and a signal voltage are output to the column line COL. The reset voltage is a voltage that the pixel circuit outputs to the column line COL when the floating diffusion node FD is reset, and the signal voltage is a voltage that the pixel circuit outputs to the column line COL when at least a portion of the charge generated in the photodiode PD is stored in the floating diffusion node FD.

[0035] In one embodiment of the present invention, after one exposure time, the pixel circuit outputs a voltage to the column line COL two or more times. For example, a read-out operation performed after one exposure time includes multiple sub-read-out operations that are performed sequentially. In at least some of the plurality of sub-readout operations, the conversion gains of the pixels PX are set to be different from each other. In one embodiment, the readout operation includes an HCG (High Conversion Gain) sub-readout operation performed under conditions in which the pixel PX has a relatively large conversion gain, and an LCG (Low Conversion Gain) sub-readout operation performed under conditions in which the pixel PX has a relatively small conversion gain. Furthermore, in one embodiment, the readout operation includes a Lateral Overflow Integrated Capacitor (LOFIC) readout operation that reads a voltage corresponding to the charge generated above the FWC of the photodiodes (PD1, PD2) during the exposure time and stored in the capacitor CAP due to overflow.

[0036] As described above, by performing two or more sub-readout operations after one exposure time, the signal-to-noise ratio and dynamic range of the image sensor can be improved. In addition, in an embodiment of the present invention, the number of sub-read-out operations performed after the exposure time and the manner in which each of the sub-read-out operations is performed may vary depending on the length of the exposure time. By selecting and combining sub-readout operations in a manner optimized according to the length of the exposure time, the signal-to-noise ratio and dynamic range of the image data generated by the image sensor can be improved regardless of the length of the exposure time.

[0037] 5 and 6 are diagrams illustrating the operation of the image sensor according to one embodiment of the present invention. FIG. 5 is a simplified diagram illustrating the operation of a pixel included in an image sensor according to one embodiment of the present invention. The pixel includes a first photodiode PD1, a second photodiode PD2 having a light-receiving area smaller than that of the first photodiode PD1, and a pixel circuit. In one embodiment, the pixels included in the pixel array are arranged along row and column directions, and are connected to a row driver in the row direction and to a readout circuit in the column direction. The row driver simultaneously drives pixels arranged in the row direction, and therefore the operation shown in FIG. 5 is simultaneously performed on two or more pixels arranged along the row direction.

[0038] The pixel operation includes a first shutter operation SH1, a first exposure time EIT1, a first readout operation RD1, a second shutter operation SH2, a second exposure time EIT2, and a second readout operation RD2. The first exposure time EIT1 and the second exposure time EIT2 are different, and as an example, the first exposure time EIT1 is longer than the second exposure time EIT2. First image data is generated by each pixel performing a first shutter operation SH1, a first exposure time EIT1, and a first readout operation RD1, and second image data is generated by each pixel performing a second shutter operation SH2, a second exposure time EIT2, and a second readout operation RD2. When the image sensor is mounted on a means of transportation, the first image data and the second image data are output in each repeated frame period, or the first image data and the second image data are output in a portion of the frame period.

[0039] For example, the first image data is image data for accurately capturing a light source or the like that causes a flicker phenomenon, and the second image data is image data for accurately capturing a subject without distortion. In one embodiment, the resolution of the first image data is higher than the resolution of the second image data. In one embodiment, the frame rate of the first image data may be smaller than the frame rate of the second image data, and the frame period during which the first image data is output frame by frame may be longer than the frame period during which the second image data is output frame by frame.

[0040] In each of the first shutter operation SH1 and the second shutter operation SH2, a reset operation is performed to remove charges from the photodiode and floating diffusion node of the pixel. As an example, in the first shutter operation SH1 and the second shutter operation SH2, the photodiode and the floating diffusion node are electrically connected to the power supply node. During the first exposure time EIT1 and the second exposure time EIT2, the photodiode is exposed to light and generates an electric charge. As an example, during each of the first exposure time EIT1 and the second exposure time EIT2, the transfer transistor remains turned off, and the photodiode and the floating diffusion node are electrically isolated from each other. Therefore, the charge generated in the photodiode may not be transferred to the floating diffusion node.

[0041] However, in an environment where the intensity of light incident on the photodiode is very strong, the FWC of the photodiode may be exceeded and charges may be generated. In this case, as the voltage of the node connecting the photodiode and the transfer transistor decreases due to excessive charge generated in the photodiode, leakage through the transfer transistor may occur, causing the charge generated in the photodiode to move to the floating diffusion node.

[0042] In one embodiment of the present invention, the pixel is designed such that charge transferred from the photodiode to the floating diffusion node during the first exposure time EIT1 and / or the second exposure time EIT2 moves to a capacitor connected to the floating diffusion node. Therefore, in an environment where the light intensity is very strong, the charges generated in excess of the FWC of the photodiode are stored in the capacitor through the floating diffusion node. After that, in at least one of the first to third readout operations, the pixel circuit outputs a voltage corresponding to the charge stored in the capacitor. Therefore, image data that accurately represents the subject can be generated even in an environment with very high illumination, and the dynamic range of the image sensor is improved.

[0043] FIG. 6 is a diagram simply illustrating the operation of the image sensor during one frame period FT in which the first image data and the second image data are output. Referring to FIG. 6, in the pixel array of the image sensor, pixels are selected along a row line ROW, and a first shutter operation SH1 is performed. The first shutter operation SH1 is performed sequentially from the pixels of the row line for which the second readout operation RD2 in the previous frame period has been completed. As described above, when the first shutter operation SH1 is performed on the pixels arranged along one of the row lines ROW, a reset operation is performed to remove the charges from the floating diffusion nodes and photodiodes of the pixels.

[0044] For example, for pixels arranged in the first row ROW1, when the first shutter operation SH1 is completed, the pixels are exposed to light for a first exposure time EIT1. The first exposure time EIT1 is defined as the time from when the first shutter operation SH1 is completed at a pixel until when the first readout operation RD1 is performed. While the pixels arranged in the first row ROW1 are exposed to light, the first shutter operation SH1 is sequentially performed on each of the remaining rows (ROW2 to ROWm). For pixels for which the first exposure time EIT1 has elapsed, a first readout operation RD1 is executed. The first readout operation RD1 includes a plurality of sub-readout operations that are sequentially performed, and for example, in each of the plurality of sub-readout operations, the pixels output signals using different schemes.

[0045] For the pixels connected to the row line ROW, when the first readout operation RD1 is completed, the second shutter operation SH2 begins. The second shutter operation SH2, like the first shutter operation SH1, includes an operation of selecting pixels along the row line ROW and resetting the charges in the floating diffusion nodes and photodiodes. The pixels for which the second shutter operation SH2 has been completed are exposed to light for a second exposure time EIT2. The second exposure time EIT2 is shorter than the first exposure time EIT1. For pixels for which the second exposure time EIT2 has ended, a second readout operation RD2 is executed. As described above, the first image data generated based on the signal output by the pixel in the first readout operation RD1 and the second image data generated based on the signal output by the pixel in the second readout operation RD2 may be different from each other. For example, the first image data and the second image data may differ from each other in terms of resolution, color information, and the like.

[0046] Furthermore, since the first exposure time EIT1 and the second exposure time EIT2 are different from each other, if the first readout operation RD1 and the second readout operation RD2 are performed using the same scheme, the signal-to-noise ratio, dynamic range, etc. may be degraded in the first image data and / or the second image data. In one embodiment of the present invention, the first readout operation RD1 and the second readout operation RD2 are performed in different ways to improve the signal-to-noise ratio, dynamic range, etc. of each of the first image data and the second image data.

[0047] In the embodiment shown in FIG. 5, the first read-out operation RD1 includes a plurality of main read-out operations (MRD1 to MRD4), and the second read-out operation RD2 includes a plurality of sub-read-out operations (SRD1 to SRD4). In one embodiment, a plurality of main read-out operations (MRD1 to MRD4) may be defined by a plurality of first read-out operations, and a plurality of sub read-out operations (SRD1 to SRD4) may be defined by a plurality of second read-out operations. Referring to FIG. 5, each of the first main readout operation MRD1 and the first sub-readout operation SRD1 is an operation for reading a pixel signal corresponding to the charge generated by the first photodiode PD1 under the condition that the pixel has a high conversion gain.

[0048] Each of the second main readout operation MRD2 and the second sub-readout operation SRD2 is an operation for reading a pixel signal corresponding to the charge generated by the first photodiode PD1 under the condition that the pixel has a low conversion gain. Meanwhile, each of the third main readout operation MRD3 and the third sub-readout operation SRD3 is an operation for reading a pixel signal corresponding to the charge generated by the second photodiode PD2 under the condition that the pixel has a high conversion gain. In the embodiment shown in FIG. 5, the first to third main read-out operations (MRD1 to MRD3) are performed in the same manner as the first to third sub-read-out operations (SRD1 to SRD3).

[0049] The fourth main read-out operation MRD4 and the fourth sub-read-out operation SRD4 are performed in different ways. Referring to FIG. 5, the fourth main readout operation MRD4 is an operation for reading a pixel signal corresponding to the charge generated by exceeding the FWC of the second photodiode PD2 and stored in the capacitor. Meanwhile, the fourth sub-readout operation SRD4 is an operation of reading pixel signals corresponding to charges generated in excess of the FWC and stored in the capacitors in the first and second photodiodes PD1 and PD2, respectively.

[0050] By configuring the second readout operation RD2 after the relatively short second exposure time EIT2 to be different from the first readout operation RD1 after the relatively long first exposure time EIT1, the signal-to-noise ratio and dynamic range of the second image data generated by the second readout operation RD2 are improved. As an example, in the fourth sub-readout operation SRD4, pixel signals corresponding to charges generated in excess of the FWC in each of the first photodiode PD1 and the second photodiode PD2 can be read, thereby securing pixel signals in low-illumination areas instead of unnecessary high-illumination areas. Therefore, the signal-to-noise ratio can be improved within the illumination range required to represent the subject to be photographed in the second image data. In the embodiment shown in FIG. 5, the fourth sub-read-out operation SRD4, which is executed last in the second read-out operation RD2, is executed in a manner different from that of each of the main read-out operations (MRD1 to MRD4).

[0051] In one embodiment of the present invention, while a plurality of sub readout operations SRD1 to SRD4 are being performed, the number of times that the pixel outputs a signal corresponding to the charge generated by the first photodiode PD1 may be greater than the number of times that the pixel outputs a signal corresponding to the charge generated by the second photodiode PD2. Referring to Figure 5, while a plurality of sub readout operations SRD1 to SRD4 are being performed, the signal corresponding to the charge generated by the first photodiode PD1 may be output in the first, second, and fourth sub readout operations SRD1, SRD2, and SRD4, and the signal corresponding to the charge generated by the second photodiode PD2 may be output in the third and fourth sub readout operations SRD3 and SRD4.

[0052] 7 to 15 are diagrams illustrating the operation of the image sensor according to one embodiment of the present invention. Each of the pixels PX included in the image sensor described with reference to FIGS. 7 to 15 has a structure similar to that of the embodiment described above with reference to FIG. FIG. 7 is a timing diagram for explaining the first shutter operation SH1, the first exposure time EIT1, and the first readout operation RD1 previously described with reference to FIG. In the operation of pixel PX, which will be described with reference to Figures 7 to 15, the control signals (TG1, TG2, RG, SG1, SG2, SG3, DRG, SEL) output by the row driver determine whether each of the transistors (TX1, TX2, RX, SW1, SW2, SW3, DRX, SX) included in pixel PX is on or off.

[0053] FIG. 8 is a diagram for explaining the operation of the pixel PX during the first shutter operation time TSH1. During the first shutter operation time TSH1, as shown in FIGS. 7 and 8, the first transfer transistor TX1, the second transfer transistor TX2, the first switch transistor SW1, the second switch transistor SW2, the third switch transistor SW3, the reset transistor RX, and the gain control transistor DRX are turned on, and the selection transistor SX is turned off. Therefore, the charges in the first photodiode PD1, the second photodiode PD2, the floating diffusion node FD, and the capacitor CAP are removed by the first power supply voltage VDD1 and the second power supply voltage VDD2.

[0054] 7 and 9, during the first exposure time EIT1, the first switch transistor SW1 and the second switch transistor SW2 are turned on, and the remaining transistors (TX1, TX2, SW3, RX, DRX, SX) are all turned off. The first photodiode PD1 and the second photodiode PD2 generate charges in response to light, and the generated charges remain in the first photodiode PD1 and the second photodiode PD2. However, in an environment where light of extremely high intensity flows in, charges are generated in excess of the FWC of the first photodiode PD1 and the second photodiode PD2. Hereinafter, for convenience of explanation, the charge generated in excess of the FWC in each of the first photodiode PD1 and the second photodiode PD2 is defined as excess charge.

[0055] As an example, if excess charge is generated in the second photodiode PD2, the voltage of the node where the second transfer transistor TX2 and the second photodiode PD2 are connected to each other, for example, the voltage of the source of the second transfer transistor TX2, may decrease due to the charge. Therefore, even though the second transmission control signal TG2 input to the gate of the second transfer transistor TX2 is maintained at a voltage corresponding to logic low, a charge transfer path is formed through the channel of the second transfer transistor TX2, and the excess charge of the second photodiode PD2 transfers to the second node N2.

[0056] In one embodiment of the present invention, the second switch transistor SW2 connected to the capacitor CAP is turned on during the first exposure time EIT1 so that the excess charge transferred to the second node N2 is transferred to and stored in the capacitor CAP. Meanwhile, the first switch transistor SW1 is turned off to prevent excess charges from moving to the floating diffusion node FD. In some embodiments, the gain control transistor DRX may be turned off together with the first switch transistor SW1 during the first exposure time EIT1.

[0057] 7 and 9, during the first exposure time EIT1, the first transmission control signal TG1 is set to a voltage lower than that of the second transmission control signal TG2. The first transfer transistor TX1 is turned off more strongly than the second transfer transistor TX2, and a transfer path for excess charges generated in the first photodiode PD1 is not created in the first transfer transistor TX1. Therefore, the excess charge generated in the second photodiode PD2 is mainly stored in the capacitor CAP. In the embodiment shown in FIG. 7, the pixel PX performs a first readout operation RD1 after the first exposure time EIT1 has elapsed. As previously described with reference to FIG. 5, the first read-out operation RD1 includes a plurality of main read-out operations (MRD1 to MRD4).

[0058] Referring to FIG. 7, during the first main readout time TMR1, first, the selection transistor SX is turned on and the reset transistor RX is turned off by the selection control signal SEL. When the selection transistor SX is turned on, the amplification transistor SF amplifies the voltage of the floating diffusion node FD and outputs the reset voltage. Referring to FIG. 7, the reset voltage is output twice. The first reset voltage is output when the gain control transistor DRX is turned on, and the second reset voltage is output when the gain control transistor DRX is turned off. The first reset voltage is a reset voltage that is output when the pixel PX has a low conversion gain, and the second reset voltage is a reset voltage that is output when the pixel PX has a high conversion gain.

[0059] When the reset voltage is output, as shown in FIGS. 7 and 10, the first transfer transistor TX1 is turned on, and the charge of the first photodiode PD1 is transferred to the floating diffusion node FD. The amplifier transistor SF amplifies the voltage of the floating diffusion node FD and outputs the amplified signal voltage to the column line COL. A readout circuit connected to the column line COL calculates a first pixel signal from the difference between the reset voltage and the signal voltage. The first pixel signal is a signal for covering a first range of relatively low illumination intensity. 10 and 11, while the pixel PX outputs a signal voltage to the column line COL, the gain control transistor DRX is turned off. Therefore, the capacitance of the floating diffusion node FD can be kept sufficiently small, and the pixel PX can output a signal voltage under the condition that it has a high conversion gain.

[0060] Referring to FIG. 11, the first transfer transistor TX1 is turned on by the first transfer control signal TG1, and some of the charges in the first photodiode PD1 are transferred to the floating diffusion node FD. Meanwhile, since the gain control transistor DRX is turned off and the first node N1 and the floating diffusion node FD are separated, charge is stored in the floating diffusion node FD, which has a relatively small capacitance, and a signal voltage is output to the column line COL under high conversion gain conditions.

[0061] 7 and 12, during the second main readout time TMR2, the gain control transistor DRX is turned on and the first node N1 is connected to the floating diffusion node FD. Therefore, during the second main readout time TMR2, the capacitance of the gain control transistor DRX and the capacitance of the first node N1 are added to the capacitance of the floating diffusion node FD, and the pixel PX outputs a signal under a low conversion gain condition.

[0062] With the gain control transistor DRX turned on and the capacitance of the floating diffusion node FD increased, the first transfer transistor TX1 is turned on, and the residual charge remaining in the first photodiode PD1 is transferred to the floating diffusion node FD. Referring to FIG. 13, residual charges remaining in the first photodiode PD1 that could not be transferred to the floating diffusion node FD during the first main readout time TMR1 are transferred to the floating diffusion node FD as the first transfer transistor TX1 is turned on during the second main readout time TMR2. As shown in FIG. 13, the capacitance of the floating diffusion node FD is the self-capacitance of the floating diffusion node FD plus the capacitance CN1 of the first node N1 and the gain control transistor DRX. In this way, during the second main readout time TMR2, a signal voltage is output to the column line COL under the condition that the pixel PX has a low conversion gain.

[0063] During the first main readout time TMR1, at least a portion of the charge in the first photodiode PD1 is moved to the floating diffusion node FD in advance, so during the second main readout time TMR2, the reset voltage may not be output before the signal voltage. In one embodiment of the present invention, as described above, the reset voltage is output twice during the first main readout time TMR1, and the first reset voltage is the reset voltage output when the pixel PX has a low conversion gain. The readout circuit calculates the second pixel signal under the low conversion gain condition using the difference between the first reset voltage output by the pixel PX during the first main readout time TMR1 and the signal voltage output by the pixel PX during the second main readout time TMR2. The second pixel signal may be a signal for covering a second range of illumination intensity that is higher than the first range.

[0064] Referring to FIG. 7, before or after the second main readout time TMR2 ends, the reset transistor RX is turned on to reset the floating diffusion node FD. Therefore, in the third main readout time TMR3, the pixel PX outputs the reset voltage first. When the reset voltage is output, the second transfer transistor TX2, the first switch transistor SW1, and the gain control transistor DRX are turned on, as shown in FIGS. Therefore, the charge of the second photodiode PD2 moves to the floating diffusion node FD, and the amplifier transistor SF amplifies the voltage of the floating diffusion node FD and outputs a signal voltage. The readout circuit calculates a third pixel signal using the difference between the reset voltage and the signal voltage output by the pixel PX during the third main readout time TMR3. The third pixel signal may be a signal for covering a third range of illumination intensity that is higher than the second range.

[0065] FIG. 15 is a diagram for explaining the operation of the pixel PX in the fourth main read-out time TMR4. Referring to FIGS. 7 and 15, during the fourth main readout time TMR4, the first to third switch transistors SW1 to SW3, the gain control transistor DRX, and the second transfer transistor TX2 are turned on. When the first to third switch transistors SW1 to SW3 and the gain control transistor DRX are turned on, the charge stored in the capacitor CAP moves to the floating diffusion node FD. A signal voltage corresponding to the charge stored in the capacitor CAP is output via the column line COL.

[0066] When the signal voltage is output, the row driver turns on the reset transistor RX. Therefore, a reset operation is performed in which the charge of the floating diffusion node FD is removed, and a reset voltage is output via the column line COL. In the fourth main readout time TMR4, the signal voltage is output before the reset voltage. The readout circuit calculates a fourth pixel signal using the difference between the reset voltage and the signal voltage output by the pixel PX. The fourth pixel signal may be a signal for covering a fourth range of illuminance that is higher than the third range. As described above, the capacitor CAP stores the excess charge generated by the second photodiode PD2 exceeding the FWC during the exposure time. When strong light is incident on the pixel PX, the FWC of the second photodiode PD2 is exceeded and a charge is generated, and the charge is stored in the capacitor CAP. Therefore, it is possible to cover very high illumination levels using the fourth pixel signal generated from the charge stored in the capacitor CAP.

[0067] As in the embodiment described with reference to Figures 7 to 15, when the first shutter operation SH1, the first exposure time EIT1, and the first readout operation RD1 are completed, the pixel PX performs the second shutter operation SH2, the second exposure time EIT2, and the second readout operation RD2. The second exposure time EIT2 is shorter than the first exposure time EIT1.

[0068] For example, first image data is generated from signals output by the pixels PX in the first readout operation RD1, and second image data is generated from signals output by the pixels PX in the second readout operation RD2. The first image data and the second image data may have different characteristics and may be utilized for other purposes. For example, a light source or the like that causes a flicker phenomenon can be accurately photographed using the first image data, and a subject can be accurately photographed without distortion using the second image data. Hereinafter, the second shutter operation SH2, the second exposure time EIT2, and the second readout operation RD2 of the pixel PX will be described with reference to FIGS.

[0069] 16 to 18 are diagrams illustrating the operation of the image sensor according to one embodiment of the present invention. Each of the pixels PX included in the image sensor described with reference to FIGS. 16 to 18 has a structure similar to that of the embodiment described above with reference to FIG. FIG. 16 is a timing diagram for explaining the second shutter operation SH2, the second exposure time EIT2, and the second readout operation RD2.

[0070] In the operation of pixel PX, which will be described with reference to Figures 16 to 18, the control signals (TG1, TG2, RG, SG1, SG2, SG3, DRG, SEL) output by the row driver determine the on / off status of each of the transistors (TX1, TX2, RX, SW1, SW2, SW3, DRX, SX) included in pixel PX. Referring to FIG. 16, the second shutter operation SH2 is performed in a similar manner to the first shutter operation SH1 described above with reference to FIGS. As shown in FIG. 16, during the second shutter operation time TSH2, the first switch transistor SW1, the second switch transistor SW2, the third switch transistor SW3, the reset transistor RX, and the gain control transistor DRX are turned on, and the selection transistor SX is turned off. When the first transfer transistor TX1 and the second transfer transistor TX2 are turned on, the charges in the first photodiode PD1, the second photodiode PD2, the floating diffusion node FD, and the capacitor CAP are removed by the first power supply voltage VDD1 and the second power supply voltage VDD2.

[0071] During the second exposure time EIT2, in pixel PX, as shown in FIG. 17, the first switch transistor SW1, the second switch transistor SW2, and the gain control transistor DRX are turned on, and the remaining transistors (TX1, TX2, SW3, RX, SX) are turned off. The first photodiode PD1 and the second photodiode PD2 generate electric charges in response to light. In an environment where extremely strong light is incident, excess charges may be generated in the first photodiode PD1 and the second photodiode PD2 beyond their FWCs. During the second exposure time EIT2, excess charges generated in the first photodiode PD1 and the second photodiode PD2 are stored in the capacitor CAP. The gain control transistor DRX and the first switch transistor SW1 are turned on so as to provide a charge path through which excess charge in the first photodiode PD1 can move to the capacitor CAP.

[0072] Excess charge in the first photodiode PD1 moves to the capacitor CAP via the first node N1 and the second node N2, and excess charge in the second photodiode PD2 moves to the capacitor CAP via the second node N2. Unlike the first exposure time EIT1, the first transmission control signal TG1 and the second transmission control signal TG2 are set to voltages of the same magnitude. The second readout operation RD2 performed after the second exposure time EIT2 is performed in a different manner from the first readout operation RD1 performed after the first exposure time EIT1. As previously described with reference to Figure 5, the second read-out operation RD2 includes multiple sub-read-out operations (SRD1 to SRD4), and the first to third sub-read-out operations (SRD1 to SRD3) are performed in the same manner as the first to third main read-out operations (MRD1 to MRD3). Therefore, the operation of the pixel PX in each of the first to third sub-read-out times (TSR1 to TSR3) is the same as the operation of the pixel PX in each of the above-described first to third main read-out times (TMR1 to TMR3).

[0073] FIG. 18 is a diagram for explaining the operation of the pixel PX in the fourth sub-read-out time TSR4. 16 and 18, during the fourth sub-readout time TSR4, the first to third switch transistors SW1 to SW3, the gain control transistor DRX, the first transfer transistor TX1, and the second transfer transistor TX2 are turned on. When the first to third switch transistors SW1 to SW3 and the gain control transistor DRX are turned on, the charge stored in the capacitor CAP moves to the floating diffusion node FD. A signal voltage corresponding to the charge stored in the capacitor CAP is output via the column line COL.

[0074] When the signal voltage is output, the row driver turns on the reset transistor RX. Therefore, a reset operation is performed in which the charge of the floating diffusion node FD is removed, and a reset voltage is output via the column line COL. During the fourth sub-read-out time TSR4, the signal voltage is output before the reset voltage. The readout circuit calculates the pixel signal using the difference between the reset voltage and the signal voltage output by the pixel PX.

[0075] As described above, the capacitor CAP stores excess charges generated by the first and second photodiodes PD1 and PD2 exceeding the FWC during the exposure time. When strong light is incident on the pixel PX, which exceeds the FWC of the first photodiode PD1 and the second photodiode PD2 and generates charges, the charges are stored in the capacitor CAP. During the second exposure time EIT1, the charges generated in excess of the FWC in each of the first photodiode PD1 and the second photodiode PD2 are stored in the capacitor CAP, and the pixel signal corresponding to the charges stored in the capacitor CAP is read out during the fourth sub-readout time TSR4. Therefore, the signal-to-noise ratio of pixel signals can be improved in areas of illumination necessary for clearly capturing the subject, instead of in areas of unnecessary high illumination.

[0076] FIG. 19 is a diagram illustrating the operation of the image sensor according to one embodiment of the present invention. FIG. 19 is a simplified diagram illustrating the operation of a pixel included in an image sensor according to one embodiment of the present invention. In one embodiment, the pixels included in the pixel array are arranged along row and column directions, and are connected to a row driver in the row direction and to a readout circuit in the column direction. The operation shown in FIG. 19 is performed simultaneously on two or more pixels arranged along the row direction.

[0077] The pixel operation includes a first shutter operation SH1, a first exposure time EIT1, a first readout operation RD1, a second shutter operation SH2, a second exposure time EIT2, and a second readout operation RD2. The first exposure time EIT1 and the second exposure time EIT2 are different, and as an example, the first exposure time EIT1 is longer than the second exposure time EIT2. Each of the pixels performs a first shutter operation SH1, a first exposure time EIT1, and a first readout operation RD1 to generate first image data, and each of the pixels performs a second shutter operation SH2, a second exposure time EIT2, and a second readout operation RD2 to generate second image data. In one embodiment, the resolution of the first image data is higher than the resolution of the second image data.

[0078] In one embodiment described with reference to FIG. 19, the first shutter operation SH1, the first exposure time EIT1, the first readout operation RD1, the second shutter operation SH2, and the second exposure time EIT2 are the same as those in the embodiment previously described with reference to FIG. 5. As an example, in each of the first shutter operation SH1 and the second shutter operation SH2, a reset operation is performed to remove charges from the photodiode and floating diffusion node of the pixel. During the first exposure time EIT1 and the second exposure time EIT2, the photodiode is exposed to light and generates an electric charge.

[0079] The first read-out operation RD1 includes first to fourth main read-out operations (MRD1 to MRD4), which are the same as those in the embodiment previously described with reference to FIGS. The second read-out operation RD2 includes first to fourth sub-read-out operations (SRD1 to SRD4), and the first to third sub-read-out operations (SRD1 to SRD3) are performed in the same manner as the first to third main read-out operations (MRD1 to MRD3). On the other hand, the fourth sub-read-out operation SRD4 is performed in a different manner from the fourth main read-out operation MRD4.

[0080] In one embodiment, the fourth sub-readout operation SRD4 is an operation of reading from the pixel a signal corresponding to the charge generated by the first photodiode of the pixel exceeding the FWC during the second exposure time EIT2 and stored in the capacitor. The first and second transfer transistors are controlled differently during the second exposure time EIT2 so that the charge generated in the first photodiode in excess of the FWC can be stored predominantly in the capacitor. This will be explained in more detail below with reference to FIGS. 20 and 21.

[0081] On the other hand, in one embodiment of the present invention, while multiple sub-readout operations (SRD1 to SRD4) are being performed, the number of times that the pixel outputs a signal corresponding to the charge generated by the first photodiode PD1 is greater than the number of times that the pixel outputs a signal corresponding to the charge generated by the second photodiode PD2. Referring to Figure 19, while multiple sub-readout operations (SRD1 to SRD4) are being performed, a signal corresponding to the charge generated by the first photodiode PD1 is output in the first, second, and fourth sub-readout operations (SRD1, SRD2, SRD4), and a signal corresponding to the charge generated by the second photodiode PD2 is output in the third sub-readout operation SRD3.

[0082] 20 and 21 are diagrams illustrating the operation of the image sensor according to one embodiment of the present invention. Figure 20 is a diagram simply showing the operation of pixel PX during the second exposure time EIT2 in the embodiment described with reference to Figure 19, and Figure 21 is a diagram for explaining the fourth sub-readout operation SRD4 of pixel PX in the embodiment described with reference to Figure 19.

[0083] First, referring to FIG. 20, during the second exposure time EIT2, the first transfer transistor TX1, the second transfer transistor TX2, the third switch transistor SW3, and the reset transistor RX are turned off. On the other hand, during the second exposure time EIT2, the gain control transistor DRX, the first switch transistor SW1, and the second switch transistor SW2 are turned on. The first photodiode PD1 and the second photodiode PD2 generate electric charges in response to externally incident light. The generated charges do not pass through the first transfer transistor TX1 and the second transfer transistor TX2, but remain in the first photodiode PD1 and the second photodiode PD2. However, in an environment where light of extremely high intensity enters, some of the charges generated in the first photodiode PD1 and the second photodiode PD2 may move.

[0084] For example, charges generated in excess of the FWC in the first photodiode PD1 may cause the voltage at the source of the first transfer transistor TX1 to decrease. Therefore, even though the first transmission control signal TG1 input to the gate of the first transfer transistor TX1 is maintained at a voltage corresponding to logic low, a charge transfer path is formed through the channel of the first transfer transistor TX1. The charge that has exceeded the first transfer transistor TX1 is transferred to the capacitor CAP via the gain control transistor DRX, the first switch transistor SW1, and the second switch transistor SW2, and then stored in the capacitor CAP. In one embodiment shown in FIG. 20, during the second exposure time EIT2, the second transmission control signal TG2 is set to a voltage lower than that of the first transmission control signal TG1, and the second transfer transistor TX2 is turned off more strongly than the first transfer transistor TX1. Therefore, the charges generated in the second photodiode PD exceeding the FWC cannot pass through the second transfer transistor TX2, and the charges transferred from the first photodiode PD1 are mainly stored in the capacitor CAP.

[0085] Next, referring to FIG. 21, to perform the fourth sub-readout operation SRD4, in the pixel PX, the second transfer transistor TX2 and the reset transistor RX are turned off. The charge stored in the capacitor CAP moves to the floating diffusion node FD via the second node N2 and the first node N1, and the residual charge remaining in the first photodiode PD1 when the first transfer transistor TX1 is turned on also moves to the floating diffusion node FD. The amplifier transistor SF amplifies the voltage of the floating diffusion node FD and outputs a signal voltage to the column line COL. In the fourth sub-readout operation SRD4, the reset voltage is output to the column line COL after the signal voltage is output. When the signal voltage is output, the reset transistor RX is turned on before the reset voltage is output, thereby performing a reset operation to remove the charge from the floating diffusion node FD.

[0086] FIG. 22 is a diagram illustrating the operation of the image sensor according to one embodiment of the present invention. FIG. 22 is a simplified diagram illustrating the operation of a pixel included in an image sensor according to one embodiment of the present invention. In one embodiment shown in FIG. 22, the pixel operations include a first shutter operation SH1, a first exposure time EIT1, a first readout operation RD1, a second shutter operation SH2, a second exposure time EIT2, and a second readout operation RD2. The first exposure time EIT1 and the second exposure time EIT2 are different, and as an example, the first exposure time EIT1 is longer than the second exposure time EIT2. Each of the pixels performs a first shutter operation SH1, a first exposure time EIT1, and a first readout operation RD1 to generate first image data, and each of the pixels performs a second shutter operation SH2, a second exposure time EIT2, and a second readout operation RD2 to generate second image data.

[0087] In the embodiment described with reference to FIG. 22, the first shutter operation SH1, the first exposure time EIT1, the first readout operation RD1, the second shutter operation SH2, and the second exposure time EIT2 are the same as those in the embodiment previously described with reference to FIG. 5. As an example, in each of the first shutter operation SH1 and the second shutter operation SH2, a reset operation is performed to remove charges from the photodiode and floating diffusion node of the pixel. During the first exposure time EIT1 and the second exposure time EIT2, the photodiode is exposed to light and generates an electric charge. The first read-out operation RD1 includes first to fourth main read-out operations (MRD1 to MRD4), which are the same as those in the embodiment previously described with reference to FIGS.

[0088] Referring to Figure 22, the second readout operation RD2 includes first to third sub-readout operations (SRD1 to SRD4), and the number of times that pixels output signals in the second readout operation RD2 is less than the number of times that pixels output signals in the first readout operation RD1. In the embodiment shown in FIG. 22, the first sub-readout operation SRD1 is an operation for reading out a pixel signal corresponding to the charge generated by the first photodiode PD1 under the condition that the pixel has a high conversion gain. The second sub-readout operation SRD2 is an operation for reading a pixel signal corresponding to the charge generated by the first photodiode PD1 under the condition that the pixel has a low conversion gain. Meanwhile, the third sub-readout operation SRD3 is an operation of reading pixel signals corresponding to charges generated in excess of the FWC in each of the first photodiode PD1 and the second photodiode PD2 and stored in the capacitor.

[0089] As shown in FIG. 22, by configuring the sub-read-out operations (SRD1 to SRD3) included in the second read-out operation RD2, the signal-to-noise ratio in the low-illuminance region can be increased, the dynamic range can be extended to the low-illuminance region, and the signal-to-noise ratio in the illumination region where the subject is expressed can be improved. On the other hand, in one embodiment of the present invention, while multiple sub-readout operations (SRD1 to SRD3) are being performed, the number of times that the pixel outputs a signal corresponding to the charge generated by the first photodiode PD1 is greater than the number of times that the pixel outputs a signal corresponding to the charge generated by the second photodiode PD2. Referring to Figure 22, while multiple sub-readout operations (SRD1 to SRD3) are being performed, signals corresponding to the charges generated by the first photodiode PD1 are output from the first to third sub-readout operations (SRD1 to SRD3), and signals corresponding to the charges generated by the second photodiode PD2 are output from the third sub-readout operation SRD3.

[0090] FIG. 23 is a diagram illustrating the operation of the image sensor according to one embodiment of the present invention. FIG. 23 is a simplified diagram illustrating the operation of a pixel included in an image sensor according to one embodiment of the present invention. In one embodiment shown in FIG. 23, the pixel operations include a first shutter operation SH1, a first exposure time EIT1, a first readout operation RD1, a second shutter operation SH2, a second exposure time EIT2, and a second readout operation RD2. The first exposure time EIT1 and the second exposure time EIT2 are different, and as an example, the first exposure time EIT1 is longer than the second exposure time EIT2. Each of the pixels performs a first shutter operation SH1, a first exposure time EIT1, and a first readout operation RD1 to generate first image data, and each of the pixels performs a second shutter operation SH2, a second exposure time EIT2, and a second readout operation RD2 to generate second image data.

[0091] In one embodiment described with reference to FIG. 23, the first shutter operation SH1, the first exposure time EIT1, the second shutter operation SH2, the second exposure time EIT2, and the second readout operation RD2 are the same as those in the embodiment previously described with reference to FIG. 22. However, in the embodiment shown in FIG. 23, the first read-out operation RD1 includes first to third main read-out operations (MRD1 to MRD3). Therefore, in the embodiment shown in FIG. 23, the number of times that the pixel outputs a signal in the first readout operation RD1 is the same as the number of times that the pixel outputs a signal in the second readout operation RD2.

[0092] Referring to FIG. 23, the first main readout operation MRD1 is an operation for reading out a pixel signal corresponding to the charge generated by the first photodiode PD1 from the pixel under the condition that the pixel has a high conversion gain. In some embodiments, the first main readout operation MRD1 may also be an operation of reading out a pixel signal corresponding to the charge generated by the first photodiode PD1 from the pixel under conditions where the pixel has a low conversion gain. The second main readout operation MRD2 is an operation for reading, from the pixel, a pixel signal corresponding to the charge generated by the second photodiode PD2 under the condition that the pixel has a high conversion gain. Meanwhile, the third main readout operation MRD3 is an operation of reading a pixel signal corresponding to the charge generated in the second photodiode PD2 exceeding the FWC and stored in the capacitor.

[0093] FIG. 24 is a diagram illustrating the operation of the image sensor according to one embodiment of the present invention. FIG. 24 is a simplified diagram illustrating the operation of a pixel included in an image sensor according to one embodiment of the present invention. The pixel operation includes a first shutter operation SH1, a first exposure time EIT1, a first readout operation RD1, a second shutter operation SH2, a second exposure time EIT2, and a second readout operation RD2. As an example, the first exposure time EIT1 is longer than the second exposure time EIT2. Each of the pixels performs a first shutter operation SH1, a first exposure time EIT1, and a first readout operation RD1 to generate first image data, and each of the pixels performs a second shutter operation SH2, a second exposure time EIT2, and a second readout operation RD2 to generate second image data.

[0094] In one embodiment described with reference to FIG. 24, the first shutter operation SH1, the first exposure time EIT1, the first readout operation, the second shutter operation SH2, and the second exposure time EIT2 are the same as those in the embodiment previously described with reference to FIG. 23. However, in the embodiment shown in FIG. 24, the first to third sub-read-out operations (SRD1 to SRD3) included in the second read-out operation RD2 are executed in a manner different from that of the above-described embodiment. In some embodiments, unlike that shown in FIG. 24, the first main readout operation MRD1 may also be an operation of reading a pixel signal from the pixel corresponding to the charge generated by the first photodiode PD1 under conditions where the pixel has a low conversion gain.

[0095] Referring to FIG. 24, the first sub-readout operation SRD1 is an operation for reading out a pixel signal corresponding to the charge generated by the first photodiode PD1 from the pixel under the condition that the pixel has a high conversion gain. The second sub-readout operation SRD2 is an operation for reading, from the pixel, a pixel signal corresponding to the charge generated by the first photodiode PD1 under the condition that the pixel has a low conversion gain. Meanwhile, the third sub-readout operation SRD3 is an operation of reading a pixel signal corresponding to the charge generated in the first photodiode PD1 exceeding the FWC and stored in the capacitor.

[0096] In an image sensor according to an embodiment of the present invention, a first readout operation is performed after a first exposure time, and a second readout operation is performed after a second exposure time. The first exposure time is longer than the second exposure time, and the first readout operation generates first image data, and the second readout operation generates second image data. As an example, the first image data may have a higher resolution than the second image data, and the second image data may be generated by applying binning to a pixel array.

[0097] In one embodiment, unlike the first image data, the second image data may be generated only for a particular window of interest (WOI). Furthermore, the first image data is generated based on signals acquired by performing a first readout operation on each of the plurality of pixels included in the pixel array, while the second image data is generated based on signals acquired by performing a second readout operation on some of the plurality of pixels.

[0098] The first image data and the second image data can be used for different purposes. For example, when an image sensor is installed in a means of transportation, the first image data can be used to accurately capture and recognize a light source that exhibits flickering, and the second image data can be used to accurately capture and recognize a subject without distortion.

[0099] As described with reference to the various embodiments, the first read-out operation and the second read-out operation are performed in different manners. As an example, the first read-out operation includes a plurality of main read-out operations, and the second read-out operation includes a plurality of sub-read-out operations. When the number of the plurality of main lead-out operations is the same as the number of the plurality of sub lead-out operations, at least one of the plurality of sub lead-out operations is performed in a different manner from the plurality of main lead-out operations. As an example, referring to FIG. 5, the fourth sub-read-out operation SRD4 is performed in a different manner from the first to fourth main read-out operations (MRD1 to MRD4). As yet another example, referring to FIG. 23, the second sub-read-out operation SRD2 and the third sub-read-out operation SRD3 are performed in a manner different from that of the first to third main read-out operations (MRD1 to MRD3).

[0100] Also, the number of the plurality of main lead-out operations and the number of the plurality of sub lead-out operations may be different. As an example, referring to FIG. 22, the first read-out operation RD1 includes first to fourth main read-out operations (MRD1 to MRD4), and the second read-out operation RD2 includes first to third sub-read-out operations (SRD1 to SRD3). The third sub-read-out operation SRD3 is performed in a different manner from the first to fourth main read-out operations (MRD1 to MRD4). By performing the first readout operation and the second readout operation in different manners taking into account the difference between the first exposure time and the second exposure time, the signal-to-noise ratio and the dynamic range of each of the first image data and the second image data can be improved.

[0101] The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the technical scope of the present invention. [Explanation of symbols]

[0102] 10 Image Sensor 20, 50 pixel array 30 Peripheral circuits 31 Low Driver 32 Readout circuit 33 Data output circuit 34 Control Logic FD Floating Diffusion Node ML1 1st micro lens ML2 Second Micro Lens PD1 First photodiode PD2 Second photodiode TX1 First transfer transistor TX2 Second transfer transistor RX reset transistor SF amplifier transistor SX select transistor DRX gain control transistor SW1 First switch transistor SW2 Second switch transistor SW3 Third switch transistor CAP capacitor

Claims

1. a pixel array including a plurality of pixels arranged in a first direction and a second direction intersecting the first direction; a peripheral circuit connected to the plurality of pixels via a plurality of row lines and a plurality of column lines, and driving the plurality of pixels; Each of the plurality of pixels a first photodiode and a second photodiode having a light receiving area smaller than that of the first photodiode; a pixel circuit connecting the first photodiode and the second photodiode to the peripheral circuit; The peripheral circuit includes: performing a first readout operation for each of the plurality of pixels after a first exposure time to obtain a first pixel signal; performing a second readout operation on at least some of the pixels to acquire second pixel signals after a second exposure time that is shorter than the first exposure time; The peripheral circuit includes: generating first image data using the first pixel signals; The image sensor generates second image data using the second pixel signal.

2. The pixel circuit a floating diffusion node; a first transfer transistor connected between the floating diffusion node and the first photodiode; a second transfer transistor connected between the floating diffusion node and the second photodiode; a gain control transistor connected to the floating diffusion node; 2. The image sensor of claim 1, wherein the peripheral circuit turns off the gain control transistor to select a high conversion gain condition and turns on the gain control transistor to select a low conversion gain condition.

3. In the first readout operation, each of the plurality of pixels outputting voltages corresponding to charges generated in the first photodiode under a high conversion gain condition and a low conversion gain condition in sequence; outputting a voltage corresponding to the charge generated by the second photodiode under a high conversion gain condition; 3. The image sensor of claim 2, wherein the image sensor outputs a voltage corresponding to the charge generated by the second photodiode and stored in a capacitor of the pixel circuit.

4. In the second readout operation, each of the at least some pixels outputting voltages corresponding to charges generated in the first photodiode under a high conversion gain condition and a low conversion gain condition in sequence; outputting a voltage corresponding to the charge generated by the second photodiode under a high conversion gain condition; 4. The image sensor of claim 3, wherein the image sensor outputs a voltage corresponding to the charges generated by the first and second photodiodes and stored in the capacitor.

5. In the second readout operation, each of the at least some pixels outputting voltages corresponding to charges generated in the first photodiode under a high conversion gain condition and a low conversion gain condition in sequence; outputting a voltage corresponding to the charge generated by the second photodiode under a high conversion gain condition; 4. The image sensor of claim 3, wherein the image sensor outputs a voltage corresponding to the charge generated by the first photodiode and stored in the capacitor.

6. In the second readout operation, each of the at least some pixels outputting voltages corresponding to charges generated in the first photodiode under a high conversion gain condition and a low conversion gain condition in sequence; 4. The image sensor of claim 3, wherein the image sensor outputs a voltage corresponding to the charge generated by the first photodiode and stored in the capacitor.

7. In the second readout operation, each of the at least some pixels outputting voltages corresponding to charges generated in the first photodiode under a high conversion gain condition and a low conversion gain condition in sequence; 4. The image sensor of claim 3, wherein the image sensor outputs a voltage corresponding to the charges generated by the first and second photodiodes and stored in the capacitor.

8. In the first readout operation, each of the plurality of pixels outputting a voltage corresponding to the charge generated in the first photodiode under a high conversion gain condition or a low conversion gain condition; outputting a voltage corresponding to the charge generated by the second photodiode under a high conversion gain condition; 2. The image sensor of claim 1, wherein the image sensor outputs a voltage corresponding to the charge generated by the second photodiode and stored in a capacitor of the pixel circuit.

9. In the second readout operation, each of the at least some pixels outputting voltages corresponding to charges generated in the first photodiode under a high conversion gain condition and a low conversion gain condition in sequence; 9. The image sensor of claim 8, wherein the image sensor outputs a voltage corresponding to the charge generated by the first photodiode and the second photodiode and stored in a capacitor of the pixel circuit.

10. In the second readout operation, each of the at least some pixels outputting voltages corresponding to charges generated in the first photodiode under a high conversion gain condition and a low conversion gain condition in sequence; 9. The image sensor of claim 8, wherein the image sensor outputs a voltage corresponding to the charge generated by the first photodiode and stored in a capacitor of the pixel circuit.

11. 2. The image sensor according to claim 1, wherein the frame rate of the first image data is slower than the frame rate of the second image data.

12. 2. The image sensor according to claim 1, wherein the resolution of the first image data is higher than the resolution of the second image data.

13. a plurality of pixels each including a first photodiode, a second photodiode having a light receiving area smaller than that of the first photodiode, and a pixel circuit connected to the first photodiode and the second photodiode; a peripheral circuit that sequentially executes a first shutter operation, a first exposure time, a first readout operation, a second shutter operation, a second exposure time, and a second readout operation for each of the plurality of pixels; the first read-out operation includes a plurality of first read-out operations that are sequentially performed; the second read-out operation includes a plurality of second read-out operations that are sequentially performed, The image sensor, wherein the peripheral circuitry performs at least one of the plurality of second readout operations differently from the plurality of first readout operations.

14. the first read-out operation includes a first first read-out operation, a second first read-out operation, a third first read-out operation, and a fourth first read-out operation; the second read-out operation includes a first second read-out operation, a second second read-out operation, a third second read-out operation, and a fourth second read-out operation; 14. The image sensor of claim 13, wherein the peripheral circuit performs the fourth second readout operation differently from each of the first first readout operation, the second first readout operation, the third first readout operation, and the fourth first readout operation.

15. the first read-out operation includes a first first read-out operation, a second first read-out operation, and a third first read-out operation; the second read-out operation includes a first second read-out operation, a second second read-out operation, and a third second read-out operation; 14. The image sensor of claim 13, wherein the peripheral circuit performs the third second readout operation differently from each of the first first readout operation, the second first readout operation, and the third first readout operation.

16. 16. The image sensor of claim 15, wherein the peripheral circuit performs the second second readout operation differently from each of the first first readout operation, the second first readout operation, and the third first readout operation.

17. the first read-out operation includes a first first read-out operation, a second first read-out operation, a third first read-out operation, and a fourth first read-out operation; the second read-out operation includes a first second read-out operation, a second second read-out operation, and a third second read-out operation; 14. The image sensor of claim 13, wherein the peripheral circuit performs the third second readout operation differently from each of the first first readout operation, the second first readout operation, the third first readout operation, and the fourth first readout operation.

18. each of the plurality of pixels includes a capacitor; 14. The image sensor of claim 13, wherein the second readout operation performed last among the plurality of second readout operations is performed differently from the plurality of first readout operations and is an operation of reading a signal corresponding to a charge generated in at least one of the first photodiode and the second photodiode and stored in the capacitor during the second exposure time.

19. a plurality of pixels each including a first photodiode, a second photodiode having a light receiving area smaller than that of the first photodiode, and a pixel circuit connected to the first photodiode and the second photodiode; and a peripheral circuit for driving the plurality of pixels, the pixel circuit performs a plurality of first readout operations to output a signal after a first exposure time; After a second exposure time that is shorter than the first exposure time, a plurality of second readout operations are performed to output signals; In the plurality of second readout operations, the number of times that the pixel circuit outputs a signal corresponding to the charge generated in the first photodiode is greater than the number of times that the pixel circuit outputs a signal corresponding to the charge generated in the second photodiode.

20. 20. The image sensor of claim 19, wherein the number of the second readout operations is equal to or less than the number of the first readout operations.

Images