Systems and methods for frequency domain duplicate mode transmission using orthogonal codes

Abstract

To provide a system for providing duplicate mode orthogonal frequency-division multiple access transmissions while maintaining a relatively low peak-to-average power ratio.SOLUTION: In a system for transmitting long range communication by sending duplicate symbol transmissions using a number of resource units, data to be transmitted is converted into symbols which are duplicated over a number of resource units. Phase shifts are applied to a number of symbols prior to conversion to the time domain for transmission. The phase shifts can be removed at a receiver prior to decoding the signal to the transmitted data.SELECTED DRAWING: None

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of U.S. Provisional Patent Application No. 63 / 644,190, filed May 8, 2024, and also claims the benefit of U.S. Provisional Patent Application No. 63 / 669,053, filed July 9, 2024, the entire contents of both of which are incorporated herein by reference.

[0002] background The present disclosure relates to improving communication reliability (e.g., in long-distance communications) by sending duplicate transmissions of data in different resource units of an Orthogonal Frequency-Domain Multiple Access (OFDMA) signal.

[0003] In certain applications, signals received in OFDMA communication networks may be degraded due to channel impairments (e.g., noise) or long travel distances. To mitigate data loss and / or the need for retransmissions, the same data or symbol may be transmitted in multiple resource units (RUs) of the OFDMA signal spectrum. For example, the RU52 subchannel of an OFDMA frame (e.g., as may be used for Wi-Fi networks) may be duplicated four times, or the RU26 subchannel of an OFDMA frame may be duplicated eight times. Duplicating symbols for transmission may adversely affect signal performance by structurally adding crests to time-domain symbols, resulting in an increase in the peak-to-average power ratio (PAPR). A larger PAPR requires a greater power backoff for signal peaks, which may in turn limit the maximum power of a transmission.

[0004] Various objects, aspects, features, and advantages of the present disclosure will become more apparent and better understood by reference to the detailed description taken in conjunction with the accompanying drawings, in which like reference characters identify corresponding elements throughout and generally indicate identical, functionally similar, and / or structurally similar elements. [Brief explanation of the drawings]

[0005] [Figure 1A] FIG. 1 is a block diagram illustrating a network environment including one or more access points that communicate with one or more devices or stations, according to some embodiments.

[0006] [Figure 1B] FIG. 1 is a block diagram illustrating a computing device useful in connection with the methods and systems described herein, according to some embodiments.

[0007] [Figure 1C] FIG. 2 is another block diagram illustrating a computing device useful in connection with the methods and systems described herein, according to some embodiments.

[0008] [Figure 1D] 10 is a plot of the cumulative distribution function of the peak-to-average power ratio for transmissions with different resource unit allocations, according to some embodiments.

[0009] [Figure 2A] 1 is a block diagram of a system for transmitting orthogonal frequency-division multiple access signals using duplication-mode phase shifting circuits, according to some embodiments.

[0010] [Figure 2B]1 is a block diagram of a system for receiving an orthogonal frequency division multiple access signal using a duplication mode phase shift circuit according to some embodiments.

[0011] [Figure 3A] FIG. 2B is a block diagram of the operation of the duplication mode phase shift circuit of FIG. 2A according to some embodiments.

[0012] [Figure 3B] FIG. 2C is a block diagram of the operation of the duplication mode phase shift circuit of FIG. 2B according to some embodiments.

[0013] [Figure 4A] 1 is a flow diagram for transmitting an Orthogonal Frequency Division Multiple Access signal using phase shifting, according to some embodiments.

[0014] [Figure 4B] 1 is a flow diagram for adding a phase shift to an orthogonal frequency division multiple access signal using a matrix stack, according to some embodiments.

[0015] [Figure 5] 1 is a flow diagram for receiving an Orthogonal Frequency Division Multiple Access signal with an added phase shift according to some embodiments.

[0016] Detailed Description The following IEEE standard(s), including any drafts of the IEEE standard(s), are incorporated herein by reference in their entirety and made a part of this disclosure for all purposes: the Wi-Fi Alliance standard, and the IEEE 802.11 standards, including but not limited to the IEEE 802.11a standard, the IEEE 802.11b standard, the IEEE 802.11g standard, the IEEE P802.11n standard, the IEEE P802.11ac standard, and the IEEE P802.11be standard through the IEEE P802.11bn standard, including but not limited to the IEEE 802.11a standard, the IEEE 802.11b standard, the IEEE 802.11g standard, the IEEE P802.11n standard, the IEEE P802.11ac standard, and the IEEE P802.11be standard through the IEEE P802.11bn standard. While this disclosure may refer to aspects of these standard(s), this disclosure is in no way limited by these standard(s).

[0017] In some embodiments, a phase shift may be applied to symbols of specific subcarriers in the duplicate transmission. The phase shift causes the symbols to not add constructively in the time domain, which may advantageously lead to a reduced PAPR. In some embodiments, selecting a phase shift based on a specific Hadamard matrix may lead to a PAPR similar to that of a non-duplicate mode transmission.

[0018] Some embodiments relate to a system for transmitting long-distance communications by transmitting duplicate symbol transmissions using multiple resource units. The system includes one or more circuits configured to perform operations. The operations include mapping multiple data symbols to amplitudes and phases to generate multiple symbols. The operations also include applying a first set of individual phase shifts to the symbols to generate a first set of shifted symbols. The operations also include applying a second set of individual phase shifts to the symbols to generate a second set of shifted symbols. The operations also include generating a time-domain signal based on the first set of shifted symbols and the second set of shifted symbols. The operations also include transmitting the time-domain signal. The first set of shifted symbols is assigned to a first number of subcarriers from a first resource unit, and the second set of shifted symbols is assigned to a second number of subcarriers from a second resource unit.

[0019] In some embodiments, a resource unit (RU) refers to a specific group of tones within an Orthogonal Frequency-Division Multiple Access (OFDMA) communication channel. For example, a resource unit may refer to 48 subcarriers and 4 pilot subcarriers that make up a 52-tone resource unit in a 20 MHz bandwidth transmission. Resource units with different numbers of tones may also be available, including, but not limited to, 26-tone resource units, 106-tone resource units, and 242-tone resource units. In some embodiments, a data symbol refers to a binary data value (e.g., "1" or "0") or a sequence thereof. For example, a data symbol may refer to a single "1" or "0" (e.g., in binary phase shift keying), or a data symbol may refer to any of the sequences "00," "01," "11," or "10" (e.g., in quadrature phase shift keying). Data symbols, represented by longer sequences of binary data, may be used with other modulation techniques, including various types of 8-PSK or Quadrature Amplitude Modulation (QAM). In some embodiments, a symbol refers to the corresponding amplitude and phase representing a binary sequence in the complex plane. For example, a symbol may be 1 (e.g., 1 at 0°) or -1 (e.g., 1 at 180°) in Binary Phase-Shift Keying (BPSK), and a symbol may be 1 at 45°, 1 at 135°, 1 at 225°, or 1 at 315° in Quadrature Phase-Shift Keying (QPSK). A symbol may also contain amplitudes (magnitudes) other than 1 (e.g., in QAM).In some embodiments, mapping data symbols to symbols refers to converting a binary value or sequence to a corresponding amplitude and phase. For example, mapping data symbols to symbols may refer to using a phase diagram of a modulation scheme to determine the amplitude and phase that corresponds to a particular binary sequence. Those skilled in the art will appreciate that symbols (e.g., 1 at 45°, 1 at 135°, 1 at 225°, or 1 at 315°) may be represented as complex numbers (e.g., e.g., 1 at 45°, 1 at 135°, 1 at 225°, or 1 at 315°). jπ / 4 , e j3π / 4 , e -j3π / 4 , e -jπ / 4 ) can also be used.

[0020] In some embodiments, applying a phase shift refers to changing the phase of a symbol. For example, a phase shift may be applied by multiplying a symbol by a number having an amplitude of 1 and a phase equal to the desired phase shift. In some embodiments, a shifted symbol may refer to a symbol to which a phase shift has been applied. For example, a shifted symbol may refer to a symbol after being appropriately multiplied by a number having an amplitude of 1 and a particular phase (e.g., a shift amount). In some embodiments, a time-domain signal may refer to a signal obtained by performing an inverse Fourier transform of a symbol (or a shifted symbol) at different subcarrier frequencies. For example, a time-domain signal (or a time-domain symbol) may refer to the result of an inverse fast Fourier transform of subcarriers from four 52-tone resource units and represent the combination of all symbols on various subcarriers in a single transmission unit (e.g., 3.2 μs, 12.8 μs, or the amount of time over which a particular time-domain signal is transmitted).

[0021] In some embodiments, the operations also include forming a symbol matrix including a first column including a symbol and a second column including a symbol, and generating a matrix stack including the matrices arranged in a partitioned column format. The number of columns of the symbol matrix is ​​equal to the number of resource units used to transmit duplicate symbol transmissions of the symbol. The elements of the symbol matrix include individual symbols of the symbol, and the elements are defined by columns associated with resource units and rows associated with subcarriers of the resource units. The first set of individual phase shifts and the second set of individual phase shifts are applied by performing element-wise multiplication of the symbol matrix and the matrix stack.

[0022] In some embodiments, a symbol matrix refers to a matrix of symbols for a single transmission unit (e.g., a single time-domain symbol or time-domain signal). Each column of the symbol matrix may include a symbol for a resource unit, and each row of the symbol matrix may represent a subcarrier within the resource unit. For example, a symbol matrix may refer to a 52×4 symbol matrix representing four 52-tone resource units, or a 26×8 symbol matrix representing eight 26-tone resource units. A matrix stack refers to a partitioned matrix, where an individual partitioned matrix is ​​repeated to form a column of multiple instances of the matrix. For example, a matrix stack may refer to a 52×4 matrix where a 4×4 matrix is ​​repeated 13 times and arranged in a column.

[0023] In some embodiments, the elements of the matrix have a magnitude (amplitude) of one.

[0024] In some embodiments, the rows of the matrix are orthogonal vectors.

[0025] In some embodiments, the matrix is ​​a circulant Hadamard matrix.

[0026] In some embodiments, an element of a matrix or matrix stack with an amplitude (magnitude) of 1 means a value that, when multiplied by one of the symbols, changes only the phase of the symbol. For example, an element with an amplitude of 1 is 45°, e -jπ / 2 , or e jπ / 2 The angle of -1 may mean 1, and e -jπ / 2 , or e jπ / 2 will be recognized by those skilled in the art as a complex number representation with a magnitude of 1. In some embodiments, orthogonal vectors refer to a set of vectors where any pair of vectors in the set has a dot product of zero. For example, orthogonal vectors may refer to the set {

[0011] and [1 -1]} because the element-wise multiplication of two vectors (e.g., multiplication of elements retaining the same index or the same position) sums to zero. In some embodiments, a Hadamard matrix refers to a square matrix with orthogonal rows and elements that are either 1 or -1. In some embodiments, a circulant matrix refers to a square matrix where all rows contain the same elements and each row is rotated one element right relative to the previous row. In some embodiments, a circulant Hadamard matrix refers to a square matrix that is both Hadamard and circulant. For example, a Hadamard matrix may refer to the matrix H4. That is, TIFF2025172006000001.tif20165 A circulant matrix is ​​sometimes referred to as matrix C4, i.e. TIFF2025172006000002.tif20165 The cyclic Hadamard matrix is ​​the matrix H C4 It can mean: TIFF2025172006000003.tif22165

[0027] In some embodiments, the elements of the matrix stack that multiply the individual elements of the symbol matrix corresponding to the pilot subcarriers are set to one.

[0028] In some embodiments, an element-wise multiplication is performed on each column of the matrix stack with the complex conjugate of the first column of the matrix stack.

[0029] In some embodiments, a pilot subcarrier refers to a subcarrier in a resource unit with a known amplitude and phase that can be used to synchronize transmitters and receivers in a network. For example, a pilot subcarrier may refer to one of four subcarriers with a known amplitude and phase in a 52-tone resource unit. In some embodiments, a complex conjugate refers to a complex number whose phase angle is multiplied by -1. For example, e jπ / 4 The complex conjugate of is e -jπ / 4 It may mean:

[0030] In some embodiments, the number of subcarriers in each resource unit represented by an individual element of a symbol matrix is ​​not divisible by the number of rows of the matrix, the matrix is ​​repeated to form a matrix stack with a number of stacked rows greater than the number of subcarriers in each resource unit, and the last number of rows of the matrix stack are deleted from the matrix stack.

[0031] In some embodiments, the matrix has more columns than the number of columns in the symbol matrix, and a number of the last columns of the matrix stack are removed from the matrix stack.

[0032] In some embodiments, no phase shift is applied to symbols assigned to pilot subcarriers.

[0033] In some embodiments, there are 52 subcarriers in each resource unit and a symbol is duplicated over 4 resource units, or there are 26 subcarriers in each resource unit and a symbol is duplicated over 8 resource units.

[0034] Some embodiments relate to a method for transmitting long-range communications using multiple resource units (RUs) by transmitting duplicate symbol transmissions. The method includes mapping multiple data symbols to amplitudes and phases to generate multiple symbols. The method also includes applying a first set of individual phase shifts to the symbols to generate a first set of shifted symbols. The method also includes applying a second set of individual phase shifts to the symbols to generate a second set of shifted symbols. The method also includes generating a time-domain signal based on the first set of shifted symbols and the second set of shifted symbols. The method also includes transmitting the time-domain signal. The first set of shifted symbols is assigned to a first number of subcarriers from a first resource unit, and the second set of shifted symbols is assigned to a second number of subcarriers from a second resource unit.

[0035] In some embodiments, the method also includes forming a symbol matrix including a first column of symbols and a second column of symbols and generating a matrix stack including the matrices arranged in a partitioned column format. The number of columns of the symbol matrix is ​​equal to the number of resource units used to transmit duplicate symbol transmissions of the symbol. The elements of the symbol matrix include individual symbols of the symbol, and the elements are defined by columns associated with resource units and rows associated with subcarriers of the resource units. The first set of individual phase shifts and the second set of individual phase shifts are applied by performing element-wise multiplication of the symbol matrix and the matrix stack.

[0036] In some embodiments, the elements of the matrix have an amplitude (magnitude) of one.

[0037] In some embodiments, the matrix is ​​a circulant Hadamard matrix.

[0038] In some embodiments, the elements of the matrix stack that multiply the individual elements of the symbol matrix corresponding to the pilot subcarriers are set to one.

[0039] In some embodiments, an element-wise multiplication is performed on each column of the matrix stack with the complex conjugate of the first column of the matrix stack.

[0040] Some embodiments relate to a system for receiving long-distance communications using duplicate symbol transmissions using multiple resource units. The system includes one or more circuits configured to perform operations. The operations include receiving a time-domain signal representing multiple data symbols. The operations include extracting a first set of shifted symbols from subcarriers of a first resource unit and a second set of shifted symbols from subcarriers of a second resource unit. The operations include applying individual phase shifts of the first set to the first set of shifted symbols to generate a first set of symbols. The operations also include applying individual phase shifts of the second set to the second set of shifted symbols to generate a second set of symbols. The operations also include combining the first set of symbols and the second set of symbols to form a third set of symbols, each symbol of the third set of symbols depending on a first corresponding symbol of the first set of symbols and a second corresponding symbol of the second set of symbols. The amplitude and phase of each of the third set of symbols is mapped to generate a set of data symbols.

[0041] In some embodiments, the operations also include forming a symbol matrix including a first column of the first set of shifted symbols and a second column of the second set of shifted symbols, and generating a matrix stack including the matrices arranged in a partitioned column format. The number of columns of the symbol matrix is ​​equal to the number of resource units used to transmit the duplicate symbol transmissions. Elements of the symbol matrix include individual shifted symbols of the first set of shifted symbols or the second set of shifted symbols, and the elements are defined by columns associated with resource units and rows associated with subcarriers of the resource units. The first set of individual phase shifts and the second set of individual phase shifts are applied by performing element-wise multiplication of the symbol matrix and the matrix stack.

[0042] In some embodiments, the matrix is ​​an orthogonal matrix.

[0043] In some embodiments, the matrix is ​​a circulant Hadamard matrix.

[0044] In some embodiments, extracting symbols from subcarriers of a resource unit means making decisions on the frequency spectrum of a signal. For example, extracting symbols from subcarriers means performing an FFT on the received signal. In some embodiments, combining symbols means generating a set of symbols or data symbols from duplicated symbols or data symbols. For example, combining symbols may mean performing vector averaging over the received duplicate symbols or using the most frequently occurring data symbol over the received duplicate data symbols. In some embodiments, an orthogonal matrix means a matrix whose rows are orthogonal vectors. For example, an orthogonal matrix is TIFF2025172006000004.tif10165

[0045] This summary is illustrative only and is not intended to be in any way limiting. Other aspects, inventive features, and advantages of the devices or processes described herein will become apparent in the detailed description set forth herein when taken in conjunction with the accompanying drawings, in which like reference numerals refer to like elements.

[0046] communication network Before discussing specific embodiments, it may be helpful to describe aspects of the operating environment and associated system components (e.g., hardware elements) associated with the methods and systems described herein. Referring to FIG. 1A, one embodiment of a network environment is shown. In overview, the network environment includes a wireless communication system including one or more access points (APs) or network devices 106, one or more stations or wireless communication devices 102, and network hardware components or network hardware 192. The wireless communication devices 102 may include, for example, laptops, tablets, personal computers, and / or mobile phone devices. Details of one embodiment of each station or wireless communication device 102 and AP or network device 106 are described in more detail in connection with FIGS. 1B and 1C. In one embodiment, the network environment can be an ad-hoc network environment, an infrastructure wireless network environment, a subnet environment, or the like. The network device 106 or AP may be operably coupled to the network hardware 192 via a local area network connection. In some embodiments, the network device 106 is a 5G base station. Network hardware 192, which may include routers, gateways, switches, bridges, modems, system controllers, appliances, etc., can provide local area network connectivity to the communication system. Each network device 106 or AP can have an associated antenna or antenna array for communicating with wireless communication devices in its area. A wireless communication device 102 can register with a particular network device 106 or AP to receive service from the communication system (e.g., via a SU-MIMO or MU-MIMO configuration). In the case of a direct connection (e.g., point-to-point communication), several wireless communication devices can communicate directly via an assigned channel and communication protocol. Some of the wireless communication devices 102 can be mobile or relatively stationary with respect to the network device 106 or AP.

[0047] In some embodiments, a network device 106 or AP includes a device or module (including a combination of hardware and software) that enables a wireless communication device 102 to connect to a wired network using Wireless Fidelity (WiFi) or other standards. A network device 106 or AP may sometimes be referred to as a wireless access point (WAP). A network device 106 or AP may be implemented (e.g., configured, designed, and / or built) to operate in a wireless local area network (WLAN). In some embodiments, a network device 106 or AP may be connected to a router (e.g., via a wired network) as a stand-alone device. In other embodiments, a network device 106 or AP may be a component of a router. A network device 106 or AP may provide multiple devices access to a network. For example, a network device 106 or AP may connect to a wired Ethernet connection and provide wireless connectivity using a radio frequency link to other devices 102 to utilize the wired connection. The network devices 106 or APs may be implemented to support standards for transmitting and receiving data using one or more radio frequencies. These standards and frequencies they use may be defined by the IEEE (e.g., the IEEE 802.11 standard). The network devices 106 or APs may be configured and / or used to support public Internet hotspots and / or extend the Wi-Fi signal range of the network on the network.

[0048] In some embodiments, the access points or network devices 106 may be used in a (e.g., in-home, in-car, or in-building) wireless network (e.g., IEEE 802.11, Bluetooth, ZigBee, or any other type of radio frequency based network protocol and / or variations thereof). Each of the wireless communication devices 102 may include and / or be coupled to a built-in radio. Such wireless communication devices 102 and / or access points or network devices 106 may operate in accordance with various aspects of the disclosure as presented herein to enhance performance, reduce cost and / or size, and / or enhance broadband applications. Each wireless communication device 102 may have the capability to function as a client node seeking access to resources (e.g., data and connections to networked nodes such as servers) via one or more access points or network devices 106.

[0049] The network connection may include any type and / or form of network, including any of the following: point-to-point networks, broadcast networks, telecommunications networks, data communications networks, and computer networks. The topology of the network may be a bus, star, or ring network topology. The network may comprise any such network topology known to those skilled in the art that can support the operations described herein. In some embodiments, different types of data may be transmitted via different protocols. In other embodiments, the same type of data may be transmitted via different protocols.

[0050] The communication device(s) 102 and access point(s) or network device 106 may be configured as and / or implemented on any type and form of computing device, such as a computer, network device, or appliance, capable of communicating over any type and form of network and performing the operations described herein. FIGS. 1B and 1C illustrate block diagrams of computing devices 100 useful for implementing an embodiment of a wireless communication device 102 or network device 106. As shown in FIGS. 1B and 1C, each computing device 100 includes a processor 121 (e.g., a central processing unit) and a main memory device 122. As shown in FIG. 1B, the computing device 100 may include a memory device 128, an installation device 116, a network interface 118, an I / O controller 123, display devices 124a-124n, a keyboard 126, and a pointing device 127, such as a mouse. The memory device 128 may include an operating system and / or software. As shown in FIG. 1C, each computing device 100 may also include additional optional elements, such as a memory port 103, a bridge 170, one or more input / output devices 130a-130n, and a cache memory 140 in communication with a central processing unit or processor 121.

[0051] Central processing unit or processor 121 is any logic circuitry that responds to and processes instructions fetched from main memory 122. In many embodiments, central processing unit or processor 121 is provided by a microprocessor device, such as those manufactured by Intel Corporation of Santa Clara, Calif., International Business Machines of White Plains, New York, or Advanced Micro Devices of Sunnyvale, Calif. Computing device 100 can be based on any of these processors, or any other processor capable of operating as described herein.

[0052] Primary memory 122 can be one or more memory chips capable of storing data and allowing any memory location to be directly accessed by the microprocessor or processor 121, such as any type or variant of static RAM (SRAM), dynamic RAM (DRAM), ferroelectric memory (FRAM), NAND flash memory, NOR flash memory, and solid-state drive (SSD). Primary memory 122 can be based on any of the memory chips described above or any other available memory chip capable of operating as described herein. In the embodiment shown in FIG. 1B, processor 121 communicates with primary memory 122 via system bus 150 (described in more detail below). FIG. 1C shows an embodiment of computing device 100 in which the processor communicates directly with primary memory 122 via memory port 103. For example, in FIG. 1C, primary memory 122 can be DRAM.

[0053] FIG. 1C illustrates an embodiment in which main processor 121 communicates directly with cache memory 140 via a secondary side bus, sometimes referred to as a backside bus. In another embodiment, main processor 121 communicates with cache memory 140 using system bus 150. Cache memory 140 typically has a faster response time than main memory 122 and may be provided, for example, by SRAM, BSRAM, or EDRAM. In the embodiment illustrated in FIG. 1C, processor 121 communicates with various I / O devices 130 via local system bus 150. Various buses can be used to connect either the central processing unit or processor 121 to I / O devices 130, such as a VESA VL bus, an ISA bus, an EISA bus, a Micro Channel Architecture (MCA) bus, a PCI bus, a PCI-X bus, a PCI-Express bus, or a NuBus. For an embodiment in which the I / O device is a video display 124, processor 121 can use an advanced graphics port (AGP) to communicate with display 124. 1C illustrates an embodiment of a computer or computer system 100 in which main processor 121 can communicate directly with I / O device 130b, for example, via HyperTransport, RapidIO, or InfiniBand communication technologies. FIG. 1C also illustrates an embodiment in which local bus and direct communication are mixed, i.e., processor 121 communicates directly with I / O device 130b while simultaneously communicating with I / O device 130a using a local interconnect bus.

[0054] A wide variety of I / O devices 130a-130n may be present in computing device 100. Input devices include keyboards, mice, trackpads, trackballs, microphones, dials, touchpads, touchscreens, and drawing tablets. Output devices include video displays, speakers, inkjet printers, laser printers, projectors, and dye-sublimation printers. The I / O devices may be controlled by I / O controller 123, as shown in FIG. 1B. The I / O controller may control one or more I / O devices, such as keyboard 126 and pointing device 127 (e.g., a mouse or optical pen). Additionally, the I / O devices may provide storage and / or installation media to computing device 100. In yet another embodiment, computing device 100 may provide a USB connection (not shown) for accepting portable USB storage devices, such as the USB flash drive line of devices manufactured by Twintech Industry, Inc. of Los Alamitos, California.

[0055] Referring again to FIG. 1B, computing device 100 may support any suitable installation device 116, such as a disk drive, CD-ROM drive, CD-R / RW drive, DVD-ROM drive, flash memory drive, various formats of tape drives, USB device, hard drive, network interface, or any other device suitable for installing software and programs. Computing device 100 may further include storage devices, such as one or more hard disk drives or a redundant array of independent disks, for storing an operating system and other related software, and for storing application software programs, such as any program or software 120 for implementing (e.g., configured and / or designed for) the systems and methods described herein. If desired, any of installation devices 116 may also be used as storage devices. Furthermore, operating systems and software may be executed from bootable media.

[0056] Additionally, computing device 100 may include network interface 118 for coupling to a network through various connections, including, but not limited to, standard telephone lines, LAN or WAN links (e.g., 802.11, T1, T3, 56kb, X.25, SNA, DECnet), broadband connections (e.g., ISDN, Frame Relay, ATM, Gigabit Ethernet, Ethernet over Sonnet), wireless connections, or some combination of any or all of the above. Connections may be established using a variety of communication protocols (e.g., TCP / IP, IPX, SPX, NetBIOS, Ethernet, ArcNet, SONET, SDH, Fiber Distributed Data Interface (FDDI), RS232, IEEE 802.11, IEEE 802.11a, IEEE 802.11b, IEEE 802.11g, IEEE 802.11n, IEEE 802.11ac, IEEE 802.11ad, CDMA, GSM, WiMax, and direct asynchronous connections). In one embodiment, computing device 100 communicates with other computing devices 100' via any type and / or form of gateway or tunneling protocol, such as Secure Sockets Layer (SSL) or Transport Layer Security (TLS). Network interface 118 may include a built-in network adapter, a network interface card, a PCMCIA network card, a card bus network adapter, a wireless network adapter, a USB network adapter, a modem, or any other device suitable for coupling computing device 100 to any type of network capable of communicating with and performing the operations described herein.

[0057] In some embodiments, computing device 100 may include or be connected to one or more display devices 124a-124n. Accordingly, any of I / O devices 130a-130n and / or I / O controller 123 may include any type and / or form of suitable hardware, software, or combination of hardware and software to support, enable, or effect the connection and use of display device(s) 124a-124n by computing device 100. For example, computing device 100 may include any type and / or form of video adapter, video card, drivers, and / or libraries to interface with, communicate with, connect to, or otherwise use display device(s) 124a-124n. In one embodiment, the video adapter includes multiple connectors for interfacing to display device(s) 124a-124n. In other embodiments, computing device 100 may include multiple video adapters, with each video adapter connected to a display device(s) 124a-124n. In some embodiments, some portion of computing device 100's operating system may be configured to use multiple display devices 124a-124n. In further embodiments, I / O device 130 may be a bridge between system bus 150 and an external communications bus, such as a USB bus, an Apple Desktop bus, an RS-232 serial connection, a SCSI bus, a FireWire bus, a FireWire 800 bus, an Ethernet bus, an AppleTalk bus, a Gigabit Ethernet bus, an Asynchronous Transfer Mode bus, a Fibre Channel bus, a Fiber Optic bus, a Serial Attached SCSI (SAS) bus, a USB connection, or an HDMI bus.

[0058] 1B and 1C can operate under the control of an operating system that controls task scheduling and access to system resources. Computing device 100 can be running any operating system, such as any version of the Microsoft Windows operating system, various publicly available Unix and Linux operating systems, any version of MAC OS for Macintosh computers, any embedded operating system, any real-time operating system, any open source operating system, any proprietary operating system, any operating system for mobile computing devices, or any other operating system capable of running on a computing device and performing the operations described herein. Representative operating systems include, but are not limited to, Android®, produced by Google Inc.; Windows® 7, 8, and 10, produced by Microsoft Corporation of Redmond, Washington; MAC OS, produced by Apple Computer of Cupertino, California; WebOS, produced by Research In Motion (RIM); OS / 2, produced by International Business Machines of Armonk, New York; and Linux, a freely available operating system distributed by Caldera Corp. of Salt Lake City, Utah, or any type and / or form of Unix operating system, among others.

[0059] Computer system or computing device 100 can be any workstation, telephone, desktop computer, laptop or notebook computer, server, portable computer, mobile phone or other portable communication device, media playback device, game console, mobile computing device, or any other type and / or form of computing, communication, or media device capable of communicating. In some embodiments, computing device 100 can have a variety of processors, operating systems, and input devices compatible with the device. For example, in one embodiment, computing device 100 is a smartphone, mobile device, tablet, or personal digital assistant. Furthermore, computing device 100 can be any workstation, desktop computer, laptop or notebook computer, server, portable computer, mobile phone, any other computer, or other form of computing or communication device capable of communicating and having sufficient processor power and memory capacity to perform the operations described herein.

[0060] In some embodiments, the fidelity of long-distance transmissions is improved by duplicating transmissions across multiple resource units. For example, the same symbol may be transmitted, and errors may be corrected at the receiver by comparing subcarriers across multiple resource units transmitted with the same symbol. Duplicate-mode transmissions may enable receiver-side error correction, but may adversely affect the peak-to-average power ratio (PAPR) because duplicate symbols may structurally add crests to the time-domain signal transmission. Referring to FIG. 1D, graph 160 illustrates the effect of duplicate-mode transmissions on the PAPR. Trace 162 represents the cumulative probability distribution function for a transmission using a 242-tone resource unit (e.g., a resource unit in which each tone carries a unique symbol). The distribution of PAPR for a transmission sent over 242-tone resource units without duplication is represented by "RU242" in the legend of Figure 1D and is used as a reference (e.g., baseline, standard) for comparison when investigating the PAPR of duplicate-mode transmissions. Trace 162 shows that the median PAPR for a 242-tone resource unit transmission is slightly greater than 7.5 dB. Trace 164 shows the cumulative probability distribution function for a transmission in which a symbol is duplicated four times and sent over four 52-tone resource units. A transmission directly duplicated over four 52-tone resource units is labeled "52x4 plain" in the legend of Figure 1D. Trace 164 shows that the median PAPR for such a transmission is approximately 11 dB. Therefore, duplicate-mode transmission, in which symbols are directly copied onto duplicate resource units, increases the PAPR by approximately 3.5 dB. A larger PAPR may limit the maximum transmit power and result in a reduced signal-to-noise ratio at the receiver. This disclosure contemplates various systems and methods for transforming symbols that are copied to additional resource units for duplicate mode transmission. By transforming the symbols, structural additions to the transmitted signal are eliminated, and the PAPR may be improved (e.g., reduced).In some embodiments, symbols are duplicated to form a matrix and then multiplied (element-wise) by another matrix (e.g., a matrix generated from several Hadamard matrices). The probability distribution of the PAPR of a transmission that has undergone such a transformation (e.g., multiplication by multiple Hadamard matrices before performing an inverse Fourier transform and transmission) is indicated in the legend of FIG. 1D as "RU52x4 Had" and plotted by trace 166. In some embodiments, using the systems and methods described herein, the PAPR of a duplicate mode transmission can be reduced to the value shown by trace 166, representing a reduction of more than 3.5 dB.

[0061] Transmit and Receive Circuits 2A is an example block diagram of circuitry and interconnections for a system configured to perform duplicate mode transmission of Orthogonal Frequency-Domain Multiple Access (OFDMA) signals with reduced PAPR. The circuitry may be implemented, for example, by any of the devices connected to or communicating with the network shown in FIG. 1A. For example, the circuitry may be implemented within network device 106 and used to communicate with any user device 102. In some embodiments, the circuitry may be implemented using one or more memory devices and one or more processors. In some embodiments, the circuitry may be implemented using an application-specific integrated circuit (ASIC) or a system-on-chip integrated circuit.

[0062] The processor may be a general-purpose or special-purpose processor, an application-specific integrated circuit (ASIC), one or more field-programmable gate arrays (FPGAs), a group of processing components, or other suitable processing components. The processor may be configured to execute computer code and / or instructions stored in memory or received from other computer-readable media (e.g., CD-ROM, network storage, remote server, etc.). The processor may be configured in various computer architectures, such as a graphics processing unit (GPU), a distributed computing architecture, a cloud server architecture, a client-server architecture, or various combinations thereof. One or more first processors may be implemented by a first device, such as an edge device, and one or more second processors may be implemented by a second device, such as a server or other device, communicatively coupled to the first device and which may have greater processor and / or memory resources.

[0063] Memory may include one or more devices (e.g., storage devices, memory devices, etc.) for storing data and / or computer code for performing and / or facilitating the various processes described in this disclosure. Memory may include random access memory (RAM), read-only memory (ROM), hard drive storage, temporary storage, non-volatile memory, flash memory, optical memory, or any other suitable memory for storing software objects and / or computer instructions. Memory may include database components, object code components, script components, or any other type of information structure for supporting the various activities and information structures described in this disclosure. Memory may be communicatively coupled to a processor and may include computer code for executing (e.g., by the processor) one or more processes described herein.

[0064] 2A , in accordance with some embodiments, an Orthogonal Frequency-Domain Multiple Access (OFDMA) transmission system 200 is shown including several interconnected circuits. The OFDMA transmission system 200 may include an Orthogonal Frequency-Domain Multiple Access (OFDMA) transmission circuit 202, a resource unit selection circuit 204, a subcarrier allocation circuit 206, a symbol mapping circuit 208, a duplicate mode phase shift circuit 210, an inverse fast Fourier transform (FFT) circuit 212, an adjustment circuit 214, and a modulation circuit 216. It should be understood that in some embodiments, functionality may be distributed differently across any number of circuits. For example, the functionality of the duplication mode phase shift circuit 210 and the inverse fast Fourier transform (FFT) circuit 212 may be performed in a single circuit.

[0065] The OFDMA transmit circuitry 202 may be configured to control the timing and flow of data through other circuits in the OFDMA transmit system 200. For example, the OFDMA transmit circuitry 202 may cause modules or circuits to execute in a particular order to perform functions of the OFDMA transmit system 200. In some embodiments, the OFDMA transmit circuitry 202 may route information and / or output of other modules that depend on the information or use the information as input. Instructions, modules, portions of memory, etc. described as being configured to perform a function (or described as performing a function) may include embodiments in which the module is configured to cause the function to be performed (or is causing the function to be performed). Similarly, instructions, modules, portions of memory, etc. described as being configured to cause the function to be performed (or described as causing the function to be performed) may include embodiments in which the module is configured to perform the function (or is performing the function).

[0066] The resource unit selection circuit 204 may be configured to receive a duplication mode indication. For example, the resource unit selection circuit 204 may receive an RU26-DUP8 indication, which indicates that a 26-tone set of a data symbol is to be duplicated across eight resource units, or as another example, the resource unit selection circuit 204 may receive an RU52-DUP4 indication, which indicates that a 52-tone set of a data symbol is to be duplicated across four resource units. The resource unit selection circuit 204 may communicate (e.g., transmit, signal, etc.) the resource unit selection to the subcarrier allocation circuit 206.

[0067] The subcarrier allocation circuit 206 may receive data to be transmitted and, given the resource unit allocation, associate data symbols with appropriate subcarriers. The subcarrier allocation circuit 206 may be configured to divide the data stream into data symbols of a length appropriate for the modulation technique. For example, each binary data (e.g., an individual "1" or "0") may be assigned to a BPSK subcarrier. In some embodiments, a longer sequence of binary data may be assigned to a single subcarrier (e.g., a 4-bit sequence may be assigned to a 16-QAM subcarrier). The binary sequences (e.g., data symbols) assigned to individual subcarriers may be communicated (e.g., transmitted, transmitted, etc.) to the symbol mapping circuit 208.

[0068] The subcarrier allocation circuitry 206 may be configured to maintain (e.g., store, create, etc.) a distribution of subcarriers associated with a particular resource unit. For example, in a 52-tone resource unit scheme, 48 data symbols may be assigned to subcarrier indexes -121 through -70, skipping four pilot symbols. If the data is to be duplicated four times, the same data symbol may be further assigned to subcarriers -68 through -17 for two resource units, subcarriers 17 through 68 for three resource units, and subcarriers 70 through 121 for four resource units.

[0069] The symbol mapping circuit 208 may be configured to receive the data symbols and convert each data symbol into a symbol including an amplitude and a phase (e.g., represented by a complex number). The symbol mapping circuit 208 may be configured to map the data symbols to a corresponding amplitude and phase using a phase diagram. For example, in BPSK, the symbol mapping circuit 208 may map a binary "1" to the symbol 1 (e.g., an amplitude of 1 and a phase angle of 0°) and a binary "0" to the symbol -1 (e.g., an amplitude of 1 and a phase angle of 180°). In some embodiments, other mappings may be used. For example, in quadrature phase shift keying, the data symbols "11", "01", "00", and "10" are respectively represented by e jπ / 4 , e j3π / 4 , e -j3π / 4 , e -jπ / 4 In some embodiments, data symbols may also be mapped to symbols of different amplitudes. For example, 16-QAM may map "0001" to a symbol with an amplitude of 0.75 and a phase angle of 161.6°. The symbols associated with each subcarrier may then be conveyed to the duplication mode phase shift circuit 210.

[0070] The duplication mode phase shift circuit 210 may be configured to apply a known phase shift to symbols assigned to multiple subcarriers. Performing a phase shift on symbols of specific subcarriers advantageously limits the structural addition of subcarriers in the time domain, which may lead to improved PAPR. For example, the duplication mode phase shift circuit 210 may be configured to always shift symbols associated with subcarrier index (e.g., tone index) −121 by 180°. The known phase shift may be removed by the receiver before mapping the received symbols back to data symbols. In some embodiments, the receiver may operate based on phase variations rather than specific phase angles, and thus the phase shift may not need to be specifically removed by the receiver.

[0071] In some embodiments, duplication mode phase shift circuit 210 may be configured to maintain (e.g., store, create, etc.) a mapping between different subcarrier indices and respective phase shifts. For example, subcarrier indices (e.g., indices associated with different frequencies) −121 to −70, −68 to −17, 17 to 68, and 70 to 121 may be assigned to duplicate resource units 1, 2, 3, and 4, respectively, and duplication mode phase shift circuit 210 may apply a 180° phase shift to every fourth subcarrier index, starting with the first index of resource unit 1, the second index of resource unit 2, the third index of resource unit 3, and the fourth index of resource unit 4.

[0072] Although the duplication mode phase shift circuit 210 may maintain any mapping between subcarrier indexes and respective phase shifts, some phase shift schemes may have an improved effect on the final PAPR of the transmission. In some embodiments, no phase shift is applied to the pilot signal to avoid requiring modifications to any of the synchronization circuits based on the known subcarrier symbols. In some embodiments, the phase shift can be other than 180°. For example, the phase shift can be 90° or any other phase shift that results in a reduction in PAPR. In some embodiments, the phase shift can be found using a Hadamard matrix, as described herein in connection with FIGS. 3A and 3B. In some embodiments, the phase shift is applied by multiplying the symbol by a complex number having a non-zero phase angle.

[0073] The inverse Fast Fourier Transform (FFT) circuit 212 may be configured to receive the symbols associated with each subcarrier frequency (some of which may have been shifted by the duplication mode phase shift circuit 210) and perform an inverse Fourier transform (e.g., an inverse FFT) to generate a time-domain signal at baseband frequencies. The time-domain signal associated with a current data symbol may last for a particular period. In some embodiments, the duration of the time-domain signal depends on the frequency spacing of the subcarrier tones. For example, the time-domain signal may have a period of 12.8 μs, which is related to the inverse of the subcarrier spacing of 78.125 kHz.

[0074] The time-domain signal may be conveyed to conditioning circuitry 214. In some embodiments, conditioning circuitry 214 may perform additional processing to prepare the time-domain signal for transmission. Conditioning circuitry 214 may be configured to buffer some time-domain signals so that a stream of signals may be transmitted without waiting for previous circuits to complete calculations. In some embodiments, guard periods (e.g., time periods during which no useful data is transmitted) may also be added before and after the duration of the time-domain signal to prevent time-domain signals from one set of data symbols (e.g., data assigned to subcarriers in one iteration by subcarrier allocation circuitry 206) from interfering with time-domain signals from another set of data symbols. Guard periods may be particularly important when multipath interference causes different time delays between the time-domain signals.

[0075] The conditioned time domain signal output from the conditioning circuit 214 may be conveyed to the modulation circuit 216. The modulation circuit 216 may be configured to multiply the time domain signal by a carrier frequency (e.g., one of the channels in the 2.4 GHz band or the 5 GHz band) before being transmitted.

[0076] 2B is an example block diagram of the circuitry and interconnections of a system configured to perform duplication mode reception of Orthogonal Frequency-Domain Multiple Access (OFDMA) signals, embodied as an OFDMA receiver system 250. The circuitry of the OFDMA receiver system 250 may be implemented within a network device 106 and may be used to communicate with any user device 102, and may use components (e.g., processors, ASICs, systems-on-chips) similar to those described with respect to the OFDMA transmission system 200.

[0077] In some embodiments, the circuitry of OFDMA receiver system 250 includes OFDMA receiver circuitry 252, demodulation circuitry 256, FFT circuitry 258, duplication mode phase shift circuitry 260, symbol mapping circuitry 262, comparison circuitry 264, and data streaming circuitry 266. It should be understood that in some embodiments, functionality may be distributed differently across any number of circuits. For example, the functionality of duplication mode phase shift circuitry 260 and fast Fourier transform (FFT) circuitry 258 may be performed by a single circuit. The circuitry of OFDMA receiver system 250 may include a processor executing instructions stored in a memory device, an ASIC, or a system-on-chip architecture, as previously described.

[0078] The OFDMA receiver circuitry 252 includes similar functionality to the OFDMA transmitter circuitry, but in reverse order so that a time-domain signal is received at a carrier frequency and converted into a data stream. The OFDMA receiver circuitry 252 may be configured to control the timing and flow of data through other circuits in the OFDMA receiver circuitry 252. For example, the OFDMA receiver circuitry 252 may cause modules or circuits to execute in a particular order to perform the functions of the OFDMA receiver system 250. In some embodiments, the OFDMA receiver circuitry 252 may route information and / or outputs of other modules that depend on or use the information as input.

[0079] The demodulation circuitry 256 may be configured to receive a time-domain signal (e.g., from an antenna and amplification circuitry) and convert it to a digital signal at baseband frequencies. The demodulation circuitry 256 may include, for example, both demodulation circuitry and an analog-to-digital converter for converting the received analog signal to a digital signal for processing by other circuitry in the OFDMA receiver system 250.

[0080] The demodulation circuit 256 may communicate the baseband time domain signal to an FFT circuit 258. The FFT circuit may be configured to convert the time period (e.g., 12.8 μs, or a time frequency corresponding to the inverse of the subcarrier frequency spacing) of the time domain signal back into a number of phase-shifted symbols at various subcarrier frequencies. For example, the output of the FFT circuit 258 may include a phase-shifted signal (e.g., a phase shift associated with a known phase shift applied by a transmitter) for each subcarrier index (e.g., frequency).

[0081] In some embodiments, the receiver's duplication mode phase shift circuit 260 applies a phase shift that cancels (e.g., reverses or nullifies) the phase shift applied by the transmitter's duplication mode phase shift circuit 210. Similar to the transmitter, the receiver's duplication mode phase shift circuit 260 can be configured to apply a known phase shift to symbols assigned to multiple subcarriers. For example, the known phase shift can be specified to cancel (e.g., cancel, remove, etc.) the phase shift applied by the transmitter. By using the duplication mode phase shift circuit 260 to cancel the phase shift applied by the transmitter, subcarriers transmitted with the same data symbol will again have the same symbol (e.g., assuming no errors are introduced by interference or other channel effects).

[0082] In some embodiments, the phase shift applied by duplication mode phase shift circuit 210 is always 180°. Any subsequent 180° phase shift by duplication mode phase shift circuit 260 cancels the original 180° phase shift. Thus, in a scenario where the transmitter only adds a 180° phase shift, the transmitter and receiver can apply the same phase shift to the same carrier frequency. In some embodiments, a common phase shift is applied by the transmitter, and the receiver may perform a phase shift of the same amount but in the opposite direction to cancel the original phase shift. The phase shifts applied to various subcarriers in different duplicate transmission modes can be pre-arranged (e.g., configured in transmitter and receiver software or firmware), or the transmitter can communicate a mapping between subcarrier frequencies and phase shifts to the receiver (e.g., with an unshifted communication) and then continue to use the communicated phase shift mapping in future communications (e.g., until the end of the transmission or the end of a predetermined time).

[0083] In some embodiments, the phase shift is applied by multiplying the symbol by a complex number having a non-zero phase angle. Specifically, if the transmitter applies a phase shift by multiplying the symbol by a complex number, the receiver may undo the phase shift by multiplying the received symbol by the complex conjugate of the complex number. In some embodiments, a change in phase is used to indicate a symbol (e.g., instead of a specific phase), and it may not be necessary to undo the phase shift added by the transmitter.

[0084] In some embodiments, the symbols for each subcarrier index are transmitted from the duplication mode phase shift circuit 260 to a symbol mapping circuit 262 and a comparison circuit 264. The symbol mapping circuit 262 and comparison circuit 264 may be applied in either order, depending on the technique used. In some embodiments, the symbol mapping circuit 262 is similar to that of a transmitter. The symbol mapping circuit 262 may be configured to convert the symbols to their respective data symbols using the phase diagram of the current modulation scheme. The comparison circuit 264 corrects any discrepancies between the symbols associated with subcarriers that should receive the same data in a given duplication mode, based on the duplication mode. The comparison may be performed on the binary data (e.g., after the symbol mapping circuit 262) or on the symbols (e.g., before the symbol mapping circuit).

[0085] Symbols duplicated across multiple subcarriers may be combined after reception. For example, the comparison circuit 264 may compare data symbols across subcarriers assigned to be duplicated with each other (e.g., specific carrier indices for each resource unit) and determine the data symbols to be combined based on a majority voting system (e.g., the data symbol with the most instances is the combined symbol). In some embodiments, the comparison circuit 264 may find an average symbol (e.g., by taking the vector average of all symbols to be combined) and determine the closest symbol on the phase diagram.

[0086] Data associated with a single resource unit (e.g., duplicates previously combined) may be passed to data streaming circuitry 266. Data streaming circuitry 266 may be configured to sequence the data on the subcarriers of the resource unit into a single stream to complete the reception and decoding of the time domain signal into usable binary data.

[0087] Referring to FIG. 3A, the operation of the duplication mode phase shift circuit 210 is illustrated in accordance with some embodiments. For example, FIG. 3A illustrates applying a phase shift by performing element-wise matrix multiplication with duplicated symbols. Consider a resource unit having N tones (e.g., 26 tones, 52 tones, etc.). The symbols associated with data for each subcarrier (e.g., tone) may be arranged into a single symbol sequence 302 (e.g., after the data symbols are converted to symbols). The symbol sequence 302 may be duplicated D times to fill D resource units. A symbol matrix 311 may include duplicated sequences 304, 306, 308, and 310, as shown in FIG. 3A. The size of the symbol matrix may be N×D.

[0088] Additionally, a matrix 314 (e.g., represented by a square matrix H) including at least D columns can be arranged in a split-column format (e.g., one matrix H on top of the next matrix H) to form a matrix stack 316. In some embodiments, the phase shifts of the duplication mode phase shift circuit 210 are applied by performing element-wise multiplication 312 of a symbol matrix 311 including columns 304-310 by the matrix stack 316. For example, the matrix H can be a matrix of numbers with amplitudes of 1 (e.g., 1, -1, e jπ / 4 After the symbols are shifted by multiplication, the shifted symbol sequence 320-326 may be passed to an inverse FFT to be converted into a time domain signal.

[0089] In some embodiments, matrix H 314 may have more columns than the number of duplicates (D) and / or the number of tones (e.g., subcarriers) in a resource unit may not be divisible by the number of rows of matrix H 314. Matrix stack 316 may be larger than the symbol matrix, and matrix stack 316 may be truncated as shown by removing dashed region 318.

[0090] In some embodiments, the matrix stack may include an element associated with a pilot subcarrier, in which case the element is other than 1 (e.g., a phase shift is specified for the element). The element may be replaced with the numeric value 1 so that no phase shift is applied to the pilot subcarrier.

[0091] In some embodiments, it may be desirable for the first copy (e.g., the first resource unit) to have no phase shift applied to any of its symbols. To eliminate the phase shift associated with the first resource unit while maintaining the desired PAPR reduction, each column of the matrix stack (including the first column) may be element-wise multiplied by the complex conjugate of the first column.

[0092] In some embodiments, the subcarrier indices (e.g., as part of the symbol matrix) may be permuted before multiplication by the matrix stack 316. After multiplication, the permutation may be reversed (e.g., negated or inverted) to ensure that the symbols are in the proper positions before application of the inverse FFT. In some embodiments, a linear transformation of the matrix 314 may be performed before generating the matrix stack 316. For example, the matrix may be multiplied by −1 (e.g., to modify the signal to receive a phase shift). Also, the rows and / or columns of the matrix 314 may be permuted before generating the matrix stack.

[0093] The specification of the matrix H can have a significant impact on the final PAPR reduction for the duplicate mode. Hadamard matrices (e.g., with orthogonal rows) provide a significant reduction in PAPR. For the case of duplicating 52-tone resource units four times (e.g., RU52-DUP4), three different matrices for the matrix H314 were investigated. A standard Hadamard matrix of size 4, i.e. TIFF2025172006000005.tif21165 A circulant Hadamard matrix of size 4, i.e. TIFF2025172006000006.tif21165 A complex Hadamard matrix of size 4, i.e. TIFF2025172006000007.tif22166 Both the 4-circular and standard Hadamard matrices exhibited similar PAPRs, as shown as dashed lines in Figure 1D. The complex Hadamard matrix provided a median PAPR that was approximately 0.5 dB lower than the other Hadamard matrices for values ​​of α = 0 or π, and a median PAPR reduction of approximately 0.25 dB for α = π / 2.

[0094] Additionally, matrices were tested for various phase diagrams (e.g., BPSK and QPSK). All matrices and duplicate modes were able to reduce the median PAPR below the 242-tone resource unit baseline, as shown in Table 1 below. [Table 1] RU242 represents a 242-tone resource unit transmission. RU52 represents a single (e.g., unduplicated) 52-tone resource unit transmission. 4xDUP RU52 represents a 52-tone resource unit transmission that is duplicated four times. 4xDUP RU52 P4 represents a 52-tone resource unit transmission that is duplicated four times, using a standard Hadamard matrix of size 4, and undergoing a phase shift according to the procedure described in connection with FIG. 3A. 8xDUP RU26 P8 represents a 26-tone resource unit transmission that is duplicated eight times, using a standard Hadamard matrix of size 8, and undergoing a phase shift according to the procedure described in connection with FIG. 3A. 9xDUP RU26 P9 represents the following: TIFF2025172006000009.tif46166 3A. 9×DUP RU26 P32 represents a 26-tone resource unit transmission duplicated nine times, undergoing a phase shift according to the procedure described in connection with FIG. 3A, using a polyphase matrix of size 9 defined by: 9×DUP RU26 P32 represents a 26-tone resource unit transmission duplicated nine times, undergoing a phase shift according to the procedure described in connection with FIG. 3A, using a standard Hadamard matrix of size 32.

[0095] It should be understood that although many of the examples herein are described with respect to 52-tone resource units or 26-tone resource units with 4, 8, or 9 duplications, the procedures described may be applied to communication schemes using any number of tones and / or any number of duplications within a resource unit.

[0096] Referring to Figure 3B, the operation of the receiver's duplication mode phase shift circuit 260 is shown in accordance with some embodiments. Figure 3B illustrates applying a phase shift, for example, by performing an element-wise matrix multiplication of symbols received from the FFT circuit 258. The duplication mode phase shift circuit 260 may be configured to order symbols similarly to the transmitter's duplication mode phase shift circuit 210. For example, symbols associated with a resource unit may be ordered into a single column (e.g., columns 352, 354, 356, 358) and combined to form a symbol matrix 359.

[0097] In some embodiments, the matrix H * 362 is generated to nullify or reverse the phase shift applied in the transmitter. * 362 may be defined as the element-wise complex conjugate of the matrix H 314 from the transmitter duplication mode phase shift circuit 210. * 362 is a partitioned column format (e.g., one matrix H * 362 into the following matrix H * 362 ) to form a matrix stack 364 .

[0098] To apply the receiver phase shift, an element-wise matrix multiplication 360 may be performed (e.g., to invert the transmitter phase shift). It should be noted that matrix H 314 and matrix H * If the elements of 362 are complex conjugates, then after performing both multiplications, the symbols may no longer be phase shifted and may be compared to a phase diagram (e.g., in symbol mapping circuit 262). As noted with respect to the transmitter, the matrix H * H.364 may have more columns than D, and / or the number of tones (e.g., subcarriers) in a resource unit may be greater than the matrix H. *The number of rows in 364 may not be divisible by the number of rows in 364. The matrix stack 364 may be larger than the symbol matrix, and the matrix stack 364 may be truncated as shown by removing the region 366 bounded by the dashed line.

[0099] After element-wise matrix multiplication 360, each resource unit should contain the same symbol in its respective column (e.g., columns 368-374). The symbols can be combined into a single symbol column 376, which can be ordered into a useful data stream by data streaming circuitry 266. Due to long-distance attenuation, multipath interference, etc., some of the symbols may be incorrectly recovered, and duplicated versions of the symbols can be used to determine the most likely transmitted symbol. The symbols may first be converted to binary data symbol form using a phase diagram. Each recovered bit may undergo a majority combining scheme. For example, in a four-times duplicated transmission using QPSK, if the symbols received at each resource unit of a given index are "01," "01," "11," and "01," the majority combining scheme will output the recovered data symbol "01" from three of the four subcarriers. The combining can be performed for the entire data symbol (e.g., 2 bits in QPSK), or the combining can be performed bit-by-bit. In some embodiments, the recovered symbols (e.g., amplitude and phase) within each resource unit of a given index (e.g., row of duplicated symbol matrix 361) are averaged by performing vector averaging or other suitable technique before converting them into data symbols using a phase diagram.

[0100] Operation flow The method described herein considers the benefits of duplicate-mode OFDMA transmission, including redundancy and error resilience, while maintaining an acceptable PAPR and allowing signal transmission power similar to that of non-duplicate-mode transmission.

[0101] 4A, operational flow 400 illustrates operations for duplicate mode transmission with phase shifting according to some embodiments. Flow 400 may be performed, for example, by circuitry in OFDMA transmission system 200. Flow 400 may include, in operation 402, mapping multiple data symbols to amplitudes and phases to generate multiple symbols. For example, binary data symbols (e.g., individual bits or sequences of bits) may be assigned to subcarriers (e.g., tones) of a resource unit and translated into respective symbols using a phase diagram of a desired communication technique (e.g., BPSK, QPSK, etc.).

[0102] In some embodiments, flow 400 includes, at operation 404, applying a first set of individual phase shifts to the symbols to form a first set of shifted symbols. Not all symbols necessarily undergo a phase shift. For example, symbols assigned to every fourth subcarrier index may undergo a 180° phase shift (e.g., multiplied by −1). Other phase shifts may also be applied, e.g., a 90° phase shift may be applied to e jπ / 2 In some embodiments, flow 400 includes, at operation 406, applying a second set of individual phase shifts to the symbols to form a second set of shifted symbols. The phase shifts may be applied to different symbols in generating the second set of shifted symbols. For example, every fourth subcarrier index may receive a 180° phase shift (e.g., multiplied by −1), but starting from the second subcarrier (e.g., second tone or resource unit) index rather than the first subcarrier index.

[0103] In some embodiments, the formed shifted symbol sets (e.g., generated in operations 404 and 406) are assigned to subcarriers of different resource units. The same data symbols are used to generate both sets of shifted symbols, so both resource units transmit the same data. Advantageously, the PAPR of the duplicate transmissions is not excessively increased due to the various phase shifts.

[0104] In some embodiments, flow 400 includes, at operation 408, generating a time-domain signal based on the first set of shifted symbols and the second set of shifted symbols. The time-domain signal may be determined by performing an inverse Fourier transform (e.g., an FFT) on the spectrum of the subcarriers to which the associated shifted symbols are assigned. The single time-domain signal may have a duration that depends on the subcarrier frequency spacing. For example, the duration of the time-domain signal may be the inverse of the subcarrier frequency spacing (e.g., 12.8 μs for 78.125 kHz spacing). In some embodiments, guard periods may be added to the beginning and / or end of the time-domain signal, during which useful data may not be transmitted. The guard periods may be used to prevent interference from one time-domain signal to the next when multipath propagation delay is a concern. Flow 400 may include, at operation 410, transmitting the time-domain signal.

[0105] Referring to FIG. 4B, operational flow 420 illustrates operations for applying a phase shift to various symbols by performing matrix multiplication, according to some embodiments. Flow 420 may be performed, for example, by duplication mode phase shift circuitry 210 and / or 260. The phase shift may be applied by multiplying the symbols by a number (e.g., a complex number) having an amplitude of 1 and the desired phase shift. In some embodiments, flow 420 includes, at operation 422, forming a symbol matrix (e.g., symbol matrix 311) including a first column containing symbols and a second column containing symbols. Each column may represent a symbol that will ultimately be assigned to a resource unit. For example, two or more columns may be used, and based on the selected duplication mode, symbols may be duplicated four, eight, nine, etc. times. Each row of the symbol matrix may be a subcarrier index that receives the same symbol as part of the duplication process.

[0106] In some embodiments, flow 420 includes generating, at operation 424, a matrix stack (e.g., matrix stack 316) that includes a matrix (e.g., matrix 314) arranged in a partitioned column format. For example, the matrix may be repeated and organized such that one column of the repeated matrix is ​​above the other. The matrix may have more columns than the symbol matrix and may be repeated multiple times such that the matrix stack has more rows than the symbol matrix. Several suitable matrices have been previously described that, when used to apply phase shifts with the techniques described herein, result in reduced PAPR. For example, the matrix may be a Hadamard matrix of size 4, 8, or 32, a cyclic Hadamard matrix, a complex Hadamard matrix, a polyphase matrix of size 9, or any other suitable matrix.

[0107] Stream 420 may include truncating the matrix stack at operation 426 so that the matrix stack has the same number of rows and columns as the symbol matrix. For example, extra columns and rows may be removed. In some embodiments, stream 420 may include performing an element-wise multiplication of the symbol matrix and the matrix stack at operation 428. After multiplication, phase shifts are applied appropriately to the symbols assigned to the various resource units.

[0108] Referring to FIG. 5, operational flow 500 illustrates operations for receiving a duplicate mode OFDMA transmission with phase shifting in accordance with some embodiments. Flow 500 may be performed, for example, by OFDMA receiver system 250. In some embodiments, at operation 502, a time-domain signal representing a number of data symbols is received. Flow 500 may include extracting a first set of shifted symbols from subcarriers of a first resource unit and a second set of shifted symbols from subcarriers of a second resource unit. For example, the process of extracting the shifted symbols from the subcarriers may be performed using an FFT.

[0109] In some embodiments, flow 500 includes, in operation 506, applying a first set of individual phase shifts to the first set of shifted symbols to generate a first set of symbols. Flow 500 may also include, in operation 508, applying a second set of individual phase shifts to the second set of shifted symbols to generate a second set of symbols. The phase shifts applied in operations 506 and / or 508 may be used to reverse (e.g., nullify) phase shifts applied during transmission. The phase shifts may be predetermined, for example, stored in software or firmware of the transmitter and receiver. In some embodiments, the transmitter determines the phase shifts to be used and sends the necessary information (e.g., the phase shifts or their inverses) to the receiver so that it can undo the shifts and recover the symbols. In some embodiments, the application of the phase shifts in operations 506 and 508 may be performed in parallel by performing element-wise matrix multiplication as described in connection with FIG. 3B and / or by using operations from flow 420.

[0110] In some embodiments, flow 500 includes combining the first set of symbols and the second set of symbols to form a third set of symbols at operation 510. The symbol combining may be performed, for example, by vector averaging the symbols corresponding to the subcarrier indices that are assigned to carry duplicate data. For example, the subcarrier indices carrying the duplicate data may depend on the mode (e.g., duplication mode). After the symbols are combined at operation 510, the resulting symbols from the third set of symbols may be mapped to data symbols (e.g., using the symbol amplitude and phase) at operation 512. The data symbols may be converted into a stream to complete data reception.

[0111] In some embodiments, the symbols are mapped to data symbols before being combined, and the combining is performed bit-wise, e.g., bits generated by combining bits of multiple resource units may be obtained by majority voting.

[0112] Configuration of an exemplary embodiment As used herein, the terms "approximately," "about," "substantially," and similar terms are intended to have broad meanings consistent with common and accepted usage by those of ordinary skill in the art to which the subject matter of this disclosure pertains. It should be understood by those of ordinary skill in the art reviewing this disclosure that these terms are intended to enable description of the particular features described and claimed without limiting their scope to the precise numerical ranges provided. Accordingly, these terms should be interpreted as indicating that minor or insignificant modifications or variations of the subject matter described and claimed are considered to be within the scope of the present disclosure, as set forth in the appended claims.

[0113] It should be noted that the term "exemplary" and variations thereof, as used herein to describe various embodiments, are intended to indicate that such embodiments are possible examples, representations, or illustrations of possible embodiments (and such terms are not intended to imply that such embodiments are necessarily the exceptional or best examples).

[0114] The configurations and arrangements of the systems and methods shown in various exemplary embodiments are merely exemplary. While only a few embodiments have been described in detail in this disclosure, many modifications are possible (e.g., variations in port or destination quantities, data types, methods of reinsertion, reintroduction, etc., parameter values, arrangements, etc.). For example, the positions of elements may be reversed or otherwise changed, connections between elements may be direct or indirect, such that there may be one or more intermediate elements connected therebetween, and the nature, number, or location of separate elements may be modified or changed. Accordingly, all such modifications are intended to be included within the scope of this disclosure. The order or sequence of any process or method steps may be modified or reordered according to alternative embodiments. Other substitutions, changes, replacements, and omissions may be made in the design, operating conditions, and arrangements of the exemplary embodiments without departing from the scope of this disclosure. For example, the embodiments of the present disclosure may be realized by a single device and / or system, or by a combination of separate devices and / or systems.

[0115] As used herein, the term "or" is used in its inclusive sense (rather than its exclusive sense), so that when used to connect a list of elements, the term "or" refers to one, some, or all of the elements in the list. Conjunctive language such as "at least one of X, Y, and Z," unless otherwise specified, is understood to convey that elements may be any of X, Y, Z; X and Y; X and Z; Y and Z; or X, Y, and Z (i.e., any combination of X, Y, and Z). Thus, such conjunctive language generally is not intended to imply that a particular embodiment requires that at least one of X, at least one of Y, and at least one of Z, respectively, be present, unless otherwise specified.

[0116] References herein to the location of elements (i.e., "top," "bottom," "upper," "lower") are used solely to describe the orientation of various elements in the drawings. It should be noted that the orientation of various elements may differ according to other exemplary embodiments, and such variations are intended to be encompassed by the present disclosure.

[0117] Although the figures show a particular order of method steps, the order of steps may differ from that depicted. Also, two or more steps may be performed concurrently or with partial concurrence. Such variations depend on the software and hardware systems selected and on the designer's choice. All such variations are within the scope of this disclosure. Similarly, software implementations may be accomplished with standard programming techniques, using rule-based logic and other logic to perform the various connection, processing, comparison, and decision steps.

[0118] The present disclosure contemplates methods, systems, and program products on any machine-readable medium for performing various operations. Embodiments of the present disclosure may be implemented using an existing computer processor, by a dedicated computer processor for a suitable system incorporated for this or another purpose, or by a hardwired system. Embodiments within the scope of the present disclosure include program products that include machine-readable media for carrying or having machine-executable instructions or data structures stored thereon. Such machine-readable media can be any available medium that can be accessed by a general-purpose or special-purpose computer or other machine with a processor. By way of example, such machine-readable media can include RAM, ROM, EPROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of machine-executable instructions or data structures and that can be accessed by a general-purpose or special-purpose computer (i.e., an ASIC or FPGA) or any other machine with a processor. Combinations of the above are also included within the scope of machine-readable media. For example, machine-executable instructions include instructions and data which cause a general purpose computer, special purpose computer, or special purpose processing machines to perform a certain function or group of functions.

Claims

1. 1. A system comprising: one or more circuits configured to perform operations, the operations including: Mapping the plurality of data symbols to amplitude and phase to generate a plurality of symbols; applying a first set of individual phase shifts to the plurality of symbols to generate a first plurality of shifted symbols; applying a second set of individual phase shifts to the plurality of symbols to generate a second plurality of shifted symbols; generating a time-domain signal based on the first plurality of shifted symbols and the second plurality of shifted symbols; transmitting the time domain signal; the first plurality of shifted symbols are assigned to a first plurality of subcarriers from a first resource unit, and the second plurality of shifted symbols are assigned to a second plurality of subcarriers from a second resource unit.

2. The operation is forming a symbol matrix including a first column including the plurality of symbols and a second column including the plurality of symbols; generating a matrix stack containing the matrices arranged in a partitioned column format; the number of columns of the symbol matrix is ​​equal to the number of resource units used to transmit duplicate symbol transmissions of the plurality of symbols; an element of the symbol matrix includes a respective symbol of the plurality of symbols, the element being defined by a column associated with a resource unit and a row associated with a subcarrier of the resource unit; 2. The system of claim 1, wherein the first set of individual phase shifts and the second set of individual phase shifts are applied by performing an element-wise multiplication of the symbol matrix and the matrix stack.

3. The system of claim 2 , wherein the elements of the matrix have a magnitude of one.

4. The system of claim 3 , wherein the rows of the matrix are orthogonal vectors.

5. The system of claim 4 , wherein the matrix is ​​a circulant Hadamard matrix.

6. 3. The system of claim 2, wherein elements of the matrix stack that multiply individual elements of the symbol matrix corresponding to pilot subcarriers are forced to one.

7. 3. The system of claim 2, wherein element-wise multiplication is performed on each column of the matrix stack with a multiplication of the complex conjugate of the first column of the matrix stack.

8. the number of subcarriers in each of the resource units represented by an individual element of the symbol matrix is ​​not divisible by the number of rows of the matrix; the matrix is ​​repeated to form a matrix stack with a number of stacked rows greater than the number of subcarriers in each of the resource units; The system of claim 2 , wherein the last rows of the matrix stack are deleted from the matrix stack.

9. the matrix has more columns than the number of columns of the symbol matrix; The system of claim 2 , wherein the last columns of the matrix stack are removed from the matrix stack.

10. 10. The system of claim 1, wherein no phase shift is applied to symbols assigned to pilot subcarriers.

11. There are 52 subcarriers in the first resource unit, there are 52 subcarriers in the second resource unit, and the plurality of symbols are duplicated over 4 resource units; or 2. The system of claim 1, wherein there are 26 subcarriers in the first resource unit, there are 26 subcarriers in the second resource unit, and the plurality of symbols are duplicated across 8 resource units.

12. Mapping the plurality of data symbols to amplitude and phase to generate a plurality of symbols; applying a first set of individual phase shifts to the plurality of symbols to generate a first plurality of shifted symbols; applying a second set of individual phase shifts to the plurality of symbols to generate a second plurality of shifted symbols; generating a time-domain signal based on the first plurality of shifted symbols and the second plurality of shifted symbols; transmitting the time domain signal; wherein the first plurality of shifted symbols are assigned to a first plurality of subcarriers from a first resource unit and the second plurality of shifted symbols are assigned to a second plurality of subcarriers from a second resource unit.

13. forming a symbol matrix including a first column including the plurality of symbols and a second column including the plurality of symbols; generating a matrix stack containing the matrices arranged in a partitioned column format; the number of columns of the symbol matrix is ​​equal to the number of resource units used to transmit duplicate symbol transmissions of the plurality of symbols; an element of the symbol matrix includes a respective symbol of the plurality of symbols, the element being defined by a column associated with a resource unit and a row associated with a subcarrier of the resource unit; 13. The method of claim 12, wherein the first set of individual phase shifts and the second set of individual phase shifts are applied by performing an element-wise multiplication of the symbol matrix and the matrix stack.

14. The method of claim 13 , wherein the elements of the matrix have a magnitude of one.

15. The method of claim 14, wherein the matrix is ​​a circulant Hadamard matrix.

16. 14. The method of claim 13, wherein elements of the matrix stack that multiply individual elements of the symbol matrix corresponding to pilot subcarriers are forced to one.

17. 14. The method of claim 13, further comprising performing an element-wise multiplication on each column of the matrix stack with the complex conjugate of the first column of the matrix stack.

18. A device, one or more circuits configured to perform operations, the operations including: receiving a time domain signal representing a plurality of data symbols; extracting a first plurality of shifted symbols from the subcarriers of the first resource unit and a second plurality of shifted symbols from the subcarriers of the second resource unit; applying a first set of individual phase shifts to the first plurality of shifted symbols to generate a first plurality of symbols; applying a second set of individual phase shifts to the second plurality of shifted symbols to generate a second plurality of symbols; combining the first plurality of symbols and the second plurality of symbols to form a third plurality of symbols, each symbol of the third plurality of symbols based at least on a first corresponding symbol of the first plurality of symbols and a second corresponding symbol of the second plurality of symbols; mapping an amplitude and phase of each of the third plurality of symbols to generate the plurality of data symbols.

19. forming a symbol matrix including a first column including the first plurality of shifted symbols and a second column including the second plurality of shifted symbols; generating a matrix stack containing the matrices arranged in a partitioned column format; the number of columns of the symbol matrix is ​​equal to the number of resource units used to transmit duplicate symbol transmissions; an element of the symbol matrix includes an individual shifted symbol of the first plurality of shifted symbols or the second plurality of shifted symbols, the element being defined by a column associated with a resource unit and a row associated with a subcarrier of the resource unit; 20. The device of claim 18, wherein the first set of individual phase shifts and the second set of individual phase shifts are applied by performing an element-wise multiplication of the symbol matrix and the matrix stack.

20. 20. The device of claim 19, wherein the matrix is ​​an orthogonal matrix.

21. 20. The device of claim 19, wherein the matrix is ​​a circulant Hadamard matrix.

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