Control device, drive roller for transport
The control device addresses high power consumption and limited transistor selection by using a dual current supply path and voltage monitoring system to manage currents and detect malfunctions, enhancing reliability and efficiency in motor control devices.
Patent Information
- Application Number
- JP2024226504
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-12-23
- Publication Date
- 2026-07-03
AI Technical Summary
Existing control devices for motors face issues with high power consumption and limited selection of field-effect transistors due to increased power supply voltage, which also require additional circuitry for malfunction detection, leading to increased component count and complexity.
A control device with a switch circuit and power control circuit that includes a first and second current supply path, along with a voltage monitoring circuit, to manage input and output currents, and a control circuit that controls the switches based on monitor signals to reduce power consumption and detect malfunctions.
The solution provides high reliability and efficient power management, reducing power consumption and enhancing the detection of component malfunctions, thereby improving the overall performance and reliability of the control device and transport drive roller.
Smart Images

Figure 2026111245000001_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a control device and a driving roller for conveyance.
Background Art
[0002] Patent Document 1 discloses a control device for controlling a motor. The control device includes a current path including a current detection resistor and a semiconductor switch connected in series on a power line, a current control circuit, and an electrolytic capacitor. The current control circuit monitors the current flowing through the current detection resistor and controls the semiconductor switch. The semiconductor switch controls the supply and cutoff of current to the electrolytic capacitor.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] The current control circuit operates the gate voltage of the field effect transistor to limit the current flowing through the load. Limiting the current increases the power consumption of the field effect transistor.
[0005] When the control device drives a load such as a motor, in order to suppress the current thereof to a small value, it is conceivable to expand the operating power supply range and increase the electric capacitance (DC voltage) of the power supply. The high DC voltage increases the potential difference between the power supply and the capacitor. This increases the inrush current. The amount of this current is limited by operating the gate voltage of the field effect transistor so as to increase the ON resistance of the field effect transistor. This operation increases the power consumption of the field effect transistor. According to an exemplary estimate, when the capacitance of the capacitor is maintained, twice the power supply voltage quadruples the power consumption of the field effect transistor.
[0006] Using a high power supply voltage increases the required voltage withstand capability and power specifications for field-effect transistors (FIELD-EVERYS). These higher specifications lead to larger packages and increased manufacturing costs. Furthermore, the selection of FIELD-EVERYS transistors and the design of their control circuits are crucial for their safe operation. However, considering the above specifications, the range of FIELD-EVERYS transistors available is limited.
[0007] In the selection process, the field-effect transistor (FIELD) is required to have a safe operating area (SOA) that takes into account its voltage withstand capability and power during operation. The control circuit is designed to operate the FIELD transistor within the provided SOA.
[0008] What is required is to detect signs of malfunction in the electronic components within the control unit. However, additional circuitry for detection increases the number of components. This increase necessitates new detection methods.
[0009] This disclosure aims to provide high reliability to a control device including a current control circuit and a transport drive roller including the control device. [Means for solving the problem]
[0010] A control device according to a first aspect of the present disclosure comprises a switch circuit connected between a power input and a power output and including a first current supply path and a second current supply path, wherein the first current supply path provides a current path for supplying power from the power output to a load, and the second current supply path is connected in parallel to the first current supply path; and a power control circuit including a voltage monitoring circuit connected to the power input and the power output, and a control circuit connected to the first current supply path and the second current supply path, wherein the first current supply path includes a first switch connected between the power input and the power output, the second current supply path includes a current limiting resistor and a second switch connected in series, and the voltage monitoring circuit controls the input current at the power input The control circuit is configured to generate a first monitor signal indicating a pressure and a second monitor signal indicating an output voltage at the power supply output, the control circuit is configured to control the first switch and the second switch, the power supply control circuit is configured to test the control device based on at least one of the first monitor signal and the second monitor signal by providing the control circuit with at least one of a first control and a second control that controls the conduction and non-conductivity of the second current supply path and the first current supply path, the first control is to control the control circuit to make the first switch and the second switch non-conductive, and the second control is to control the control circuit to make the first switch non-conductive and the second switch conductive.
[0011] A transport drive roller according to a second aspect of this disclosure comprises a control device according to the first aspect and an electric motor controlled by the control device. [Effects of the Invention]
[0012] According to the above embodiment, high reliability can be provided to the control device including the current control circuit. Furthermore, high reliability can be provided to the transport drive roller including the control device. [Brief explanation of the drawing]
[0013] [Figure 1]Figure 1 is a schematic diagram showing the control device and load device according to this embodiment. [Figure 2] Figure 2 is a diagram showing an exemplary test flow in the control device according to this embodiment. [Modes for carrying out the invention]
[0014] Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.
[0015] Figure 1 is a schematic diagram showing the control device, load device, and actuator according to this embodiment.
[0016] The actuator 11 may include one or more control devices 13 and one or more load devices 15. An exemplary actuator 11 includes a conveying drive roller that drives a roller conveyor by controlling a motor as a drive source. The exemplary conveying drive roller may include a control device 13, which controls an electric motor, such as a motor. The control device 13 and load devices 15 are, for example, built into the conveying drive roller. Alternatively, the exemplary actuator 11 may be an industrial actuator, such an industrial actuator that can move a movable part, such as a rod or slider, by controlling a motor as a drive source. The control device 13 comprises a power input 17, a power output 19, a switch circuit 21, and a power control circuit 23. The power input 17 and power output 19 are connected to a power supply 10 and a load device 15, respectively. The exemplary load device 15 includes a drive circuit that drives an electric motor, which may include an inverter for motor driving. The power control circuit 23 includes a voltage monitoring circuit 29 and a control circuit 31, and the power control circuit 23 controls the switch circuit 21. The voltage monitoring circuit 29 is connected to the power input 17 and the power output 19.
[0017] The switch circuit 21 is connected between the power input 17 and the power output 19 and includes a current supply path 25 as a first current supply path and a test path 27 as a second current supply path. The test path 27 is configured to suppress inrush current. The current supply path 25 provides a current path for supplying power to the load device 15, and the test path 27 is connected in parallel to the current supply path 25 between the power input 17 and the power output 19. The current supply path 25 and the test path 27 are connected to a control circuit 31, which controls the conduction and non-conductivity of the current supply path 25 and the test path 27. An exemplary control circuit 31 includes a first switch circuit 31f, a second switch circuit 31g, and a signal generation circuit 31h. The first switch circuit 31f generates a first control signal SCNT1 that controls the first switch 25b of the current supply path 25. The second switch circuit 31g generates a second control signal SCNT2 that controls the second switch 27b of the test path 27. The signal generation circuit 31h generates a third monitor signal SMON3 in response to the current value flowing through the first resistor element 25c.
[0018] The current supply path 25 includes a first switch 25b and a first resistive element 25c connected in series in any order between the power input 17 and the power output 19. The first resistive element 25c includes, for example, a shunt resistor. The test path 27 includes a second switch 27b and a second resistive element 27c connected in series in any order between the power input 17 and the power output 19. The second resistive element 27c may include a current limiting resistor. Each of the first switch 25b and the second switch 27b may include, for example, a transistor or a relay circuit. Exemplary transistors include field-effect transistors or bipolar transistors.
[0019] The control circuit 31 has a first control output 31b and a second control output 31c. The first control output 31b and the second control output 31c provide a first control signal SCNT1 and a second control signal SCNT2 configured to control the first switch 25b and the second switch 27b respectively. The first switch 25b and the second switch 27b can each include a respective level shifter. Each level shifter generates a signal level that controls the operation of the first switch 25b and the second switch 27b, specifically the transistors, in response to the first control signal SCNT1 and the second control signal SCNT2. The control circuit 31 can further have a monitor terminal 31d, and the monitor terminal 31d outputs a third monitor signal SMON3 representing the value of the current flowing through the shunt resistor.
[0020] In the exemplary switch circuit 21, the second resistor element 27c can have a resistance value greater than the resistance value of the first resistor element 25c. The large resistance value of the second resistor element 27c can limit the current flowing through the test path 27 in the test operation to be described subsequently.
[0021] The voltage monitoring circuit 29 can include an input voltage monitoring circuit 29b and an output voltage monitoring circuit 29c. The input voltage monitoring circuit 29b is connected to the input terminal of the switch circuit 21, for example, the power input 17, and monitors the input voltage VIN applied to the input terminal of the switch circuit 21. The output voltage monitoring circuit 29c is connected to the output terminal of the switch circuit 21, for example, the power output 19, and monitors the output voltage VOUT generated at the output terminal of the switch circuit 21. The voltage monitoring circuit 29 is configured to generate a first monitor signal SMON1 indicating the input voltage VIN at the power input 17 and a second monitor signal SMON2 indicating the output voltage VOUT at the power output 19.
[0022] The power control circuit 23 performs a test of the control device 13 based on at least one of the first monitor signal SMON1 and the second monitor signal SMON2 using the conduction and non - conduction of the current supply path 25 and the test path 27. This test can be performed when the manufacture of the control device 13 is completed or when the power is turned on for the control device 13, i.e., at power - on startup.
[0023] The control device 13 can further include a capacitor 33 connected to the power output 19. An exemplary capacitor 33 includes a large-capacity electrolytic capacitor. Further, the control device 13 includes a control power generation circuit 22, and the control power generation circuit 22 provides a voltage VP to the power control circuit 23.
[0024] In an exemplary control device 13, the power control circuit 23 can include a digital processing device 23b and a storage device 23c. The digital processing device 23b can control an electric motor such as a motor. The digital processing device 23b can further include a processor 24b, a memory 24c, and one or more AD converters (24f, 24g, 24h). The AD converters (24g, 24f, 24h) convert the first monitor signal SMON1, the second monitor signal SMON2, and the third monitor signal SMON3 from analog values to digital values. Also, the test of the control device 13 is described to be performed by digital control using the processor 24b and the memory 24c in the following description. However, the present disclosure is not limited to digital control. The digital processing device 23b provides signals from the operations of the modules described in the following description to the power control circuit 23, specifically, the control circuit 31.
[0025] The digital processing device 23b can be connected to a voltage monitoring circuit 29 and a control circuit 31, receives a monitor signal from the voltage monitoring circuit 29, and the processor 24b generates a signal for controlling the control circuit 31 based on the received signal. The memory 24c is configured to temporarily store program code 24d to be executed by the processor 24b. An exemplary memory 24c includes a static random access memory (RAM).
[0026] The storage device 23c can nonvolatilically store program code that triggers a desired operation in the digital processing device 23b, and may include non-volatile semiconductor memories such as flash memory and FRAM® (ferroelectric random access memory).
[0027] The control device 13 controls the conduction and non-conductivity of the test path 27 when the current supply path 25 is non-conductive, and performs a self-test of the control device 13 based on at least one of the first monitor signal SMON1 and the second monitor signal SMON2.
[0028] In addition, the power control circuit 23 can be configured to perform an additional self-test of the control device 13 using the conduction and non-conductivity of the current supply path 25 in addition to the conduction and non-conductivity of the test path 27. This test is similarly performed based on at least one of the first monitor signal SMON1 and the second monitor signal SMON2. In the operation of the control device 13, the power control circuit 23 provides the following exemplary controls to the control circuit 31. First control: To provide non-conductivity to the first switch 25b and the second switch 27b. Second control: De-conduct the first switch 25b of the current supply path 25 and conduct the second switch 27b of the test path 27. Third control: The first switch 25b of the current supply path 25 is made conductive, and the second switch 27b of the test path 27 is made non-conductive.
[0029] The control device 13 may optionally have a test operation mode and a normal operation mode. Various test operations of the control device 13 will be described next. These test operations are made possible by causing the processor 24b to execute a program stored in the memory device 23c. The program in the exemplary test operation will also be referred to as a module in the following description. The exemplary control device 13 receives an exemplary voltage of 48 volts from the power supply 10. The exemplary test operation can render the load device 15 inoperable. The exemplary inoperable state is described below. Until the capacitor 33 is fully charged and the first switch 25b is turned on, the power control circuit 23, for example, a microcomputer, uses a motor drive signal to de-conduct, for example, six drive field-effect transistors in the drive circuit. After turning on the first switch 25b to complete this sequence, turning on the three lower-side (e.g., low-side) field-effect transistors makes the load device 15, for example, the drive circuit, operational, and then turning on the remaining field-effect transistors drives the motor. Furthermore, the control device 13, which has been identified as "normal," can partially or fully charge the capacitor 33 through the normal conduction of the second switch 27b during the test operation. After this, the control device 13 can transition from the test operation mode to the normal operation mode.
[0030] The exemplary program 26 includes a first module 26b, a second module 26c, a third module 26d, a fourth module 26f, a fifth module 26g, and a sixth module 26h. In these test modules (26b, 26c, 26d, 26f, 26g, and 26h), the processor 24b can perform any one operation selected from multiple operations within these modules, or any two or more operations selected from multiple operations. The individual operations of the exemplary modules will be described thereafter. Prior to the operation of the exemplary program 26, the normal operation of the load device 15 is disabled.
[0031] First, when the program code of the first module 26b is executed, it causes at least one of the following actions in the processor 24b. To provide the control circuit 31 with a first control (a control that provides non-conductivity to the first switch 25b and the second switch 27b). When the control circuit 31 is provided with the first control, it receives the first value of the first monitor signal SMON1 and the second value of the second monitor signal SMON1. The first determination is made as to whether the first value of the first monitor signal SMON1 and the second value of the second monitor signal SMON1 have achieved the fulfillment of the first condition. When the first judgment indicates that the first condition has been met, "normal" is identified. Identify "alert processing" when the first judgment does not indicate that the first condition has been met.
[0032] Here, the first condition is identified by the following statement: The first value of the first monitor signal SMON1 is equal to or greater than the first threshold, and the second value of the second monitor signal SMON1 is less than the second threshold which is less than the first threshold.
[0033] According to the control device 13, a short circuit in at least one of the first switch 25b and the second switch 27b can be detected based on whether the first condition is met or not. Here, the first threshold and the second threshold are predetermined. The first threshold and the second threshold are changed according to the circuit constants and the power supply voltage.
[0034] Specifically, if at least one of the first switch 25b and the second switch 27b is short-circuited, the first monitor signal SMON1 may indicate a change in the voltage of the power input 17, specifically a drop in the voltage of the power input 17. This is detected by monitoring whether the first value of the first monitor signal SMON1 is equal to or greater than the first threshold (e.g., 33.6, unit volts). In addition, the above short-circuit may manifest as an increase in the second monitor signal SMON2. This is detected by monitoring whether the second value of the second monitor signal SMON2 is less than the second threshold (e.g., 24, unit volts). Detecting both of these increases the accuracy of the detection.
[0035] A "normal" first switch 25b and second switch 27b provide appropriate values for the first value of the first monitor signal SMON1 and the second value of the second monitor signal SMON2, respectively. When the first switch 25b and second switch 27b are not short-circuited, the first value of the first monitor signal SMON1 is equal to or greater than the first threshold. Also, when there is no short circuit, the second value of the second monitor signal SMON1 is less than the second threshold which is less than the first threshold.
[0036] Next, when the program code of the second module 26c is executed, the processor 24b is prompted to perform at least one of the following actions: To perform the first determination that the first condition has been met. When the first condition is met, the second control (a control that deactivates the first switch 25b of the current supply path 25 and activates the second switch 27b of the test path 27) is provided to the control circuit 31. When the control circuit 31 is provided with the second control, a second determination is made regarding whether the change in the value of the second monitor signal SMON2, for example, an increase, within the first period from the time of conduction of the second switch 27b has achieved the fulfillment of the second condition. When the second judgment indicates that the second condition has been met, identify it as "normal." If the second judgment does not indicate that the second condition has been met, specify that "alert processing" should be performed.
[0037] Here, the second condition is specified by the following statement: The above increase must be equal to or greater than the third threshold. Furthermore, performing the first specification includes performing the second module 26c after the execution of the first module 26b.
[0038] The change in the value of the second monitor signal SMON2 is identified by following the exemplary procedure below.
[0039] Obtain the third value of the second monitor signal SMON2 at the time of conduction of the second switch 27b or at a starting time after conduction. Deactivate the second switch 27b during the first period (e.g., 10 msec) after the starting time. Obtain the fourth value of the second monitor signal SMON2 at the time of this deactivation or at a certain time after deactivation. Perform a second determination regarding whether the difference value generated by subtracting the third value from the fourth value of the second monitor signal SMON2 indicates that the second condition has been met.
[0040] Alternatively, the third value of the second monitor signal SMON2 is obtained when the second switch 27b conducts or at a starting time before conduction. The fourth value of the second monitor signal SMON2 is obtained at one or more elapsed times after the starting time. A second determination is made regarding whether the change generated by subtracting the third value from the fourth value of the second monitor signal SMON2 achieves the fulfillment of the second condition, specifically, that the difference value is equal to or greater than the third threshold (e.g., 1, in volts), within the first period from the starting time (e.g., 10 to 50 msec). Here, the value for the first period and the third threshold are changed according to circuit constants.
[0041] According to the control device 13, after the first determination, it can detect whether the second switch 27b is open, the capacitor 33 is short-circuited, and the second resistor element 27c is open, based on whether the second condition is met or not. If the second switch 27b is open, the capacitor 33 is short-circuited, or the second resistor element 27c is open, the second monitor signal SMON2 may become significantly lower. This can be detected by monitoring whether the difference value of the second monitor signal SMON2 is equal to or greater than the third threshold. A "normal" second switch 27b shows a change within an appropriate range. Furthermore, once "normal" is determined, the control device 13 allows the capacitor 33 to be fully or partially charged by the conduction of the normal second switch 27b.
[0042] Next, when the program code of the third module 26d is executed, the processor 24b is prompted to perform at least one of the following actions: To perform a second determination that at least one of the first and second conditions has been met. When the first and second conditions are met, provide the control circuit 31 with a second control. When the control circuit 31 is provided with the second control, the fifth value of the first monitor signal SMON1 and the sixth value of the second monitor signal SMON2 are obtained at the end of the second period from the conduction of the second switch 27b. The first difference value, generated by subtracting the sixth value of the second monitor signal SMON2 from the fifth value of the first monitor signal SMON1, is used to determine whether the third condition has been met within the second period after the second switch 27b has been made conductive. When the third judgment indicates that the third condition has been met, "normal" is identified. If the third judgment does not indicate that the third condition has been met, specify that "alert processing" should be performed.
[0043] Here, the third condition is identified by the following statement: The first difference value mentioned above must be equal to or less than the fourth threshold during the second period. Furthermore, performing the second specification includes performing the third module 26d after the execution of the first module 26b and the second module 26c.
[0044] According to the control device 13, after the second determination, an open circuit of capacitor 33 and a short circuit of the second resistor element 27c can be detected based on whether the third condition has been met or not. If capacitor 33 is open or the second resistor element 27c is short, the first difference value may become smaller than the expected value. Specifically, the first difference value may become smaller than the expected value sooner than expected. Detection of an open circuit or short circuit becomes possible when the first difference value falls below the fourth threshold within the first time (e.g., 100 milliseconds), which is the lower limit of the second period. On the other hand, due to a short circuit in at least one of the first switch 25b and the second switch 27b, an open circuit in the second switch 27b, a short circuit in capacitor 33, an open circuit in the second resistor element 27c, and the occurrence of any other abnormality other than an open circuit in capacitor 33 and a short circuit in the second resistor element 27c, the first difference value may not become smaller than the expected value even after a certain amount of time has elapsed. The occurrence of such anomalies can be detected when the first difference value does not fall below the fourth threshold even after the second time (e.g., 1600 milliseconds), which is the upper limit of the second period. These detections can be determined individually by the generation of each alarm signal. A "normal" second switch 27b generates a difference within an appropriate range. Furthermore, a control device 13 that has been identified as "normal" can partially or fully charge the capacitor 33 through the conduction of the normal second switch 27b. Here, the value of the second period and the fourth threshold are predetermined values and can be changed according to the circuit constants. Note that when the capacitor 33 deteriorates, the capacitance decreases and the charging time also shortens. Therefore, when the first difference value falls below the fourth threshold within the first time (e.g., 100 milliseconds), which is the lower limit of the second period, it may be detected that the capacitance of the capacitor 33 is not within an acceptable range, i.e., that the capacitor 33 has deteriorated.
[0045] Next, when the program code of the fourth module 26f is executed, it causes the processor 24b to perform at least one of the following actions: To make a third determination that at least one of the first, second, and third conditions has been met. When the first, second, and third conditions are met, a third control (a control that makes the first switch 25b of the current supply path 25 conductive and the second switch 27b of the test path 27 non-conductive) is provided to the control circuit 31.
[0046] Furthermore, performing the third specification includes performing the fourth module 26f after performing the first module 26b, the second module 26c, and the third module 26d.
[0047] A short circuit in at least one of the first switch 25b and the second switch 27b, an open circuit in the second switch 27b, a short circuit in the capacitor 33, an open circuit in the second resistor 27c, and a portion of the open circuit in the capacitor 33 and the short circuit in the second resistor 27c can be detected when any of the first, second, and third conditions are not met. After the detection result indicates that the conditions are met, specifically after the third determination, power can be supplied to the load device 15. This allows the time before operating the load device 15 when the actuator 11 is started to be used for testing. In addition, the control device 13, which has been determined to be "normal", allows the capacitor 33 to be partially or fully charged by the normal conduction of the second switch 27b.
[0048] Next, when the program code of the fifth module 26g is executed, the processor 24b will be subjected to at least one of the following actions: To perform a fourth determination that the first, second, and third conditions have been met. When the first, second, and third conditions are met, the third control is provided to the control circuit 31. When the control circuit 31 is provided with the third control, the seventh value of the first monitor signal SMON1 and the eighth value of the second monitor signal SMON2 are obtained. The fourth determination is made to determine whether the second difference value, generated by subtracting the eighth value of the second monitor signal SMON2 from the seventh value of the first monitor signal SMON1, satisfies the fourth condition. When the fourth determination indicates that the fourth condition has been met, normality is identified. When the fourth judgment does not indicate the fulfillment of the fourth condition, specify that an alert should be executed.
[0049] Here, the fourth condition is identified by the following statement: The second difference value is equal to or less than the fifth threshold, which is less than the fourth threshold. Furthermore, performing the fourth specification includes performing the fifth module 26g after performing the first module 26b, the second module 26c, and the third module 26d.
[0050] According to the control device 13, after the fourth determination, the open state of the first switch 25b can be detected based on whether the fourth condition has been met or not. When the first switch 25b is open, the second difference value becomes large. When the first switch 25b is normal, the second difference value is, for example, substantially 0 volts, and a fifth threshold (e.g., 0.3 volts) is determined considering the range of variation. A "normal" first switch 25b generates a second difference value within an appropriate range.
[0051] When the program code of module 6, 26h is executed, it causes processor 24b to perform at least one of the following actions: To specify that at least the first and second conditions have been met. When the above conditions are met, provide the control circuit 31 with a second control. When the control circuit 31 is provided with second control, the characteristics (e.g., capacitance) of the capacitor 33 are estimated based on the time difference between the time when the first difference value of the third module 26d satisfies the third condition and the time when the second switch 27b is provided with conduction to the test path 27. The fifth determination is made to determine whether the estimated characteristics have achieved the fulfillment of the fifth condition. When the fifth judgment indicates that the fifth condition has been met, identify it as "normal." If the fifth judgment does not indicate that the fifth condition has been met, specify that "alert processing" should be performed.
[0052] Here, the fifth condition is identified by the following statement: The estimated characteristic (e.g., capacitance) is greater than the sixth threshold. Furthermore, performing the fifth specification includes performing the sixth module 26h after the execution of the first module 26b and the second module 26c.
[0053] Specifically, obtaining the fifth value of the first monitor signal SMON1 and the sixth value of the second monitor signal SMON2 in the third module 26d can be encompassed by obtaining the fifth value of the first monitor signal SMON1 and the sixth value of the second monitor signal SMON2 at one or more time points. Furthermore, determining whether the first difference value has achieved the fulfillment of the third condition within the second period after the second switch 27b has been activated can be encompassed by identifying the time at which the third condition changed from unfulfilled to fulfilled among the multiple time points at which the sixth value of the second monitor signal SMON2 was obtained.
[0054] According to the control device 13, after the fifth determination, changes in the capacitor characteristics can be detected based on whether the fifth condition has been met or not. When the capacitor 33 exhibits characteristics greater than the sixth threshold, the change in the characteristics of the capacitor 33 can be within an acceptable range. Once "normal" has been determined, the control device 13 allows the capacitor 33 to be fully or partially charged by normal conduction of the second switch 27b.
[0055] In the exemplary program 26 modules (26b, 26c, 26d, 26f, 26g, and 26h), the processor 24b may be prompted to generate an alert signal in response to the result of a determination in each module (26b, 26c, 26d, 26f, 26g, and 26h) not indicating that the condition has been met.
[0056] The exemplary program 26 may include a module 26i that performs normal operation, in addition to test modules (26b, 26c, 26d, 26f, 26g, and 26h). The control unit 13 may include any one, two, three, four, five, or all of these modules (26b, 26c, 26d, 26f, 26g, 26h, and 26i).
[0057] In a normally operating module 26i, supplying power to the load device 15 causes the processor to perform the following actions when the program code is executed. To disable the load device 15. When the control device 13 is started, the first switch 25b of the current supply path 25 and the second switch 27b of the test path 27 are provided to be non-conductive. Maintain the non-conductive state of the second switch 27b, and change the state of the first switch 25b from non-conductive to conductive. To enable operation of the load device 15.
[0058] When module 26i is started consecutively after the execution of modules (26b, 26c, 26d, 26f, and 26g), capacitor 33 is at least partially charged prior to the start of normal operation.
[0059] In module 26i, maintaining the non-conductivity of the second switch 27b and changing the first switch 25b from non-conductivity to conduction may cause the processor to perform the following actions when the program code is executed. Maintaining the non-conductivity of the first switch 25b and changing the second switch 27b from non-conductivity to conduction, thereby providing an output voltage to the power supply output 19 via the second switch 27b and the second resistor element 27c. After providing non-conductivity in the first switch 25b and continuity in the second switch 27b, provide continuity in the first switch 25b and non-conductivity in the second switch 27b, thereby supplying power to the power output 19 while monitoring the current flowing through the first resistive element 25c.
[0060] Figure 2 is a diagram showing an exemplary test flow in the control device according to this embodiment. The exemplary control device 13 receives a power supply voltage of 48 volts.
[0061] Part (a) of Figure 2 shows a fault detection flowchart. Operation S101 (Measurement 1): Measurement of the first monitor signal SMON1 and the second monitor signal SMON2 when the current supply path 25 and the test path 27 are non-conductive. Operation S102 (Decision 1): Whether (voltage value of the first monitor signal SMON1) ≥ 33.6 volts and (voltage value of the second monitor signal SMON2) ≤ 24 volts. If the criteria are not met, proceed to operation S103. Operation S103: Generate alarm (1). If the criteria are met, proceed to operation S104. Operation S104 (Measurement 2): Measurement of the second monitor signal SMON2 at the start and end times of the non-conductivity of the current supply path 25 and the temporary continuity (e.g., 10 to 50 msec) of the test path 27. Operation S105 (Decision 2): Whether the voltage value at the termination time is greater than the voltage value at the start time by, for example, 1 volt or more. If the criteria are not met, proceed to operation S106. Operation S106: Generate alarm (2). If the criteria are met, proceed to operation S107. Operation S107 (Measurement 3): After the current supply path 25 is deconducted and the test path 27 is made continuous, the voltage value of the first monitor signal SMON1 and the voltage value of the second monitor signal SMON2 are measured. Operation S108 (Decision 3): Whether the sum of (voltage value of first monitor signal SMON1) - (voltage value of second monitor signal SMON2) becomes, for example, 1.4 volts or less during the second period after the test path 27 is established (for example, from 100 msec after the test path 27 is established until 1600 msec has elapsed). If the criteria are not met, proceed to operation S109. Operation S109: Generate alarm (3). When judgment 3 is not met, that is, when the first difference value ((voltage value of the first monitor signal SMON1) - (voltage value of the second monitor signal SMON2)) falls below the fourth threshold (e.g., 1.4 volts) within the lower limit time of the second period (e.g., 100 msec), or when the first difference value does not fall below the fourth threshold even after exceeding the upper limit time of the second period (e.g., 1600 msec), an alarm (3) is generated. The control device 13 may also generate an alarm indicating an open circuit of capacitor 33 or a short circuit of the second resistor element 27c when the first difference value falls below the fourth threshold within the lower limit time of the second period. On the other hand, the control device 13 may also generate an alarm indicating the occurrence of some kind of abnormality when the first difference value does not fall below the fourth threshold even after exceeding the upper limit time of the second period. If the criteria are met, proceed to operation S110. Operation S110: Power is supplied to the load device 15 upon completion of the test or when the current supply path 25 is restored to continuity and the test path 27 is restored to non-continuity (third control) (execution of fourth module 26f).
[0062] Part (b) of Figure 2 shows another fault diagnosis flowchart. Operations S101, S102, S103, S104, S105, S106, S107, and S108 have already been described. In operation S108 (Judgment 3), the judgment criteria are met, and the process proceeds to operation S111. Operation S111 (Measurement 4): Measurement of the voltage value of the first monitor signal SMON1 and the voltage value of the second monitor signal SMON2 when the current supply path 25 is continuing and the test path 27 is not continuing. Due to the electrical characteristics of test path 27, the second monitor signal SMON2 may not rise fully during charging using test path 27, and may be lower, for example, by about 1 volt, than the expected value during normal operation. This lower voltage value may rise to a value close to the expected value in response to conduction in the current supply path 25. The following shows a specific example of the electrical characteristics of test path 27 that may be the reason why the second monitor signal SMON2 does not rise completely. The resistance value of the current limiting resistor (e.g., the second resistor element 27c) in test path 27 should be relatively large to suppress inrush current. When the load device 15 is inoperable, the load current is, for example, about 5mA, and a voltage drop occurs across the current limiting resistor (for example, the second resistor element 27c). Operation S112 (Decision 4): Is the difference between (voltage value of the first monitor signal SMON1) and (voltage value of the second monitor signal SMON2) approximately 0 volts, specifically, for example, 0.3 volts or less? If the judgment criterion is not met, operation S113 generates an alarm (4). If the criteria are met, proceed to operation S114. Operation S114: Power is supplied to the load device 15 upon completion of the test or when the current supply path 25 is restored to continuity and the test path 27 is restored to non-continuity (third control) (execution of fourth module 26f).
[0063] Section (c) of Figure 2 shows yet another fault diagnosis flowchart. Operations S101, S102, S103, S104, S105, S106, S107, and S108 have already been described. In operation S108 (Judgment 3), the judgment criteria are met, and the process proceeds to operation S115. Operation S115 (judgment 5): The charging characteristics of capacitor 33 are estimated from the change in measured voltage. This estimation is performed using the capacitance (C) of capacitor 33 and the resistance (R) of the current-limiting resistor (e.g., the second resistor element 27c) that constitute the RC circuit. When charging with a constant voltage in an RC circuit, the voltage curve is determined by the time constant (R × C). Estimation of capacitance (C) is possible by measuring the voltage value of the voltage curve at multiple time points. The calculations for this estimate are performed when the capacitor 33, for example, an electrolytic capacitor, is charged upon power-up. The voltage values and measurement times of the voltage curve are stored in a rewritable non-volatile memory, such as FRAM® (ferroelectric random access memory). For example, the voltage curve is represented by the following formula: Vc = Vm (1 - exp(-t / RC)). (where "exp(x)" represents the exponential function and x represents the argument.) C = -t / (R × ln(1 - Vc / Vm)). ("ln(x)" represents the logarithmic function, and x represents the argument.) The capacitor implemented as capacitor 33 consists of two electrolytic capacitors (capacitance: 390 μF, variation from -20 to +20%). Here, R, t, Vc, Vm, and C are as follows: R: Current limiting resistor (e.g., 200 (unit: ohms)) (e.g., second resistor element 27c) t: Time since the start of charging (for example, the time when the judgment criteria were met in operation S108 (judgment 3)) Vc: Voltage value of the second monitor signal SMON2 at time t Vm: Power supply voltage (e.g., 48.00 (in volts)) C: Estimated capacitance (unit: microfarads) The estimated capacitance C is used to predict the lifespan (degradation determination) of the capacitor 33. For example, the determination criterion is met when the estimated capacitance C is 70% or more of the initial capacitance of the capacitor 33 (e.g., 390 μF x 2 = 780 μF). If the criteria are not met, proceed to operation S117. Operation S117: Generate alarm (5). If the criteria are met, proceed to operation S116. Operation S116: Power is supplied to the load device 15 upon completion of the test or when the current supply path 25 is restored to continuity and the test path 27 is restored to non-continuity (third control) (execution of fourth module 26f).
[0064] Furthermore, after the completion of the tests according to the fault detection flowchart described above, the module 26i in normal operation may be started up immediately. In this case, the capacitor 33 is at least partially charged prior to the start of normal operation.
[0065] An exemplary test flow in the control device according to this embodiment has been described with reference to Figure 2. However, the disclosure is not limited to the test flow shown in Figure 2, and any two or more decisions shown in Figure 2 can be combined in any order. An example of further combinations in Figure 2 is the combination of decision 4 (operation S112) and decision 5 (operation S115). The combination of decision 4 and decision 5 may also include, for example, executing decision 5 after decision 4.
[0066] As described above, according to this embodiment, the control device including the current control circuit and the transport drive roller including the control device can be provided with high reliability in operation over a wide range of power supply voltages. In the apparatus according to this embodiment, a high power supply voltage is used for the apparatus. The use of a high power supply voltage may increase the inrush current. The number of components in the apparatus increases in order to reduce the inrush current using a test path. The apparatus is required to detect potentially occurring malfunctions. By detecting component malfunctions, the control device and the transport drive roller can be provided with high reliability in operation over a wide range of power supply voltages. [Explanation of Symbols]
[0067] 10...Power supply, 11...Actuator, 13...Control device, 15...Load device, 17...Power input, 19...Power output, 21...Switch circuit, 22...Control power generation circuit, 23...Power control circuit, 23b...Processor, 23b...Digital processing unit, 23c...Storage device, 24b...Processor, 24c...Memory, 24d...Program code, 25...Current supply path, 25b...First switch, 25c...First resistor, 26...Program, 27...Test path, 27b...Second switch, 27c...Second resistor, 29...Voltage monitoring circuit, 31...Control circuit, 33...Capacitor.
Claims
1. A control device, A switch circuit connected between a power input and a power output, and including a first current supply path and a second current supply path, wherein the first current supply path provides a current path for supplying power from the power output to a load, and the second current supply path is connected in parallel to the first current supply path, A power control circuit including a voltage monitoring circuit connected to the power input and the power output, and a control circuit connected to the first current supply path and the second current supply path, Equipped with, The first current supply path includes a first switch connected between the power input and the power output. The second current supply path includes a current limiting resistor and a second switch connected in series. The voltage monitoring circuit is configured to generate a first monitor signal indicating the input voltage at the power supply input and a second monitor signal indicating the output voltage at the power supply output. The control circuit is configured to control the first switch and the second switch, The power supply control circuit is configured to perform a test of the control device based on at least one of the first monitor signal and the second monitor signal by providing the control circuit with at least one of a first control and a second control that controls the conduction and non-conductivity of the second current supply path and the first current supply path, wherein the first control controls the control circuit to make the first switch and the second switch non-conductive, and the second control controls the control circuit to make the first switch non-conductive and the second switch conductive. Control device.
2. The power control circuit further comprises a voltage monitoring circuit, a processor connected to the control circuit, and a memory for storing program code to be run by the processor. The aforementioned program code is sent to the processor, When the first control is provided to the control circuit, it receives a first value of the first monitor signal and a second value of the second monitor signal, The first value of the first monitor signal and the second value of the second monitor signal are used to determine whether the first condition has been met. This causes the first condition, The first value of the first monitor signal is equal to or greater than the first threshold, and The second value of the second monitor signal is less than the second threshold which is less than the first threshold. The control device according to claim 1.
3. The aforementioned program code is sent to the processor, When the second control is provided to the control circuit, a determination is made as to whether the increase in the value of the second monitor signal indicates that the second condition has been met within the first period from the time the second switch becomes conductive. This causes the following, where the second condition is: The aforementioned increase is equal to or greater than the third threshold. And, The aforementioned increase is determined based on the value of the second monitor signal before the second switch is turned on. The control device according to claim 2.
4. The aforementioned program code is sent to the processor, When the second control is provided to the control circuit, the fifth value of the first monitor signal and the sixth value of the second monitor signal are obtained at one or more time points after the second switch is activated. The first difference value generated by subtracting the sixth value of the second monitor signal from the fifth value of the first monitor signal indicates whether the third condition was met within the second period after the second switch was activated, This causes the aforementioned third condition, The first difference value becomes equal to or less than the fourth threshold during the second period. The control device according to claim 3.
5. The aforementioned program code is sent to the processor, To supply power to the load, the control circuit is provided with the control to open the first switch and deactivate the second switch. to cause The control device according to claim 4.
6. The power supply control circuit is configured to provide the control circuit with a third control that controls the conduction of the first current supply path in addition to the non-conductivity of the second current supply path, and to test the control device based on at least one of the first monitor signal and the second monitor signal. The aforementioned program code is sent to the processor, When the third control is provided to the control circuit, the seventh value of the first monitor signal and the eighth value of the second monitor signal are obtained, The second difference value, generated by subtracting the eighth value of the second monitor signal from the seventh value of the first monitor signal, is used to determine whether or not the fourth condition has been met. This causes the following, where the fourth condition is: The second difference value is equal to or less than a fifth threshold that is less than the fourth threshold. That is, The control device according to claim 4.
7. The power supply output is further equipped with a capacitor connected to the power supply output, The aforementioned program code is sent to the processor, When the second control is provided to the control circuit, the characteristics of the capacitor are estimated based on the time difference between the time when the first difference value satisfies the third condition and the time when the second switch provides conduction to the second current supply path, To determine whether the estimated characteristics met the fifth condition, This causes the following, where the fifth condition is: The estimated characteristic is greater than the sixth threshold. The control device according to claim 4.
8. When the aforementioned program code is executed, the processor will, In response to the result of the aforementioned determination not indicating the achievement, an alert signal is generated. A control device according to any one of claims 2 to 7, which causes the following:
9. The control device described in claim 1, An electric motor controlled by the control device, A drive roller for conveying, equipped with the following features.
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JP1989072322A
