On-chip EMF isolation of integrated circuits coupled with photoconductive semiconductor switches under an on-chip Faraday cage

Abstract

The integrated circuit structure (10) includes a substrate (16) having a top surface (18), a gallium nitride layer (20) disposed on the top surface of the substrate, a photoconductive semiconductor switch (14) disposed laterally alongside a transistor (12) on the gallium nitride layer (20) integrated into the integrated circuit structure, an EMF shield (40) surrounding the substrate, the gallium nitride layer, and the photoconductive semiconductor switch disposed laterally alongside the transistor on the gallium nitride layer integrated into the integrated circuit structure, and a signal line (56) electronically coupled to the photoconductive semiconductor switch, the signal line (56) passing through the EMF shield (40).

Description

[Technical field]

[0001] The present disclosure relates to electromagnetic field (EMF) protection for integrated circuit technology, and in particular to structures including GaN photoconductive semiconductor switches (PCSS) and / or photoconductive switch transistors and conductive EMF shielding for both the GaN transistors and associated integrated circuit structures. [Background technology]

[0002] Electromagnetic field (EMF) interference is a serious concern for sensitive electronic devices, including many radio frequency (RF) devices. Stray or too strong electromagnetic fields can cause devices to malfunction or even fail catastrophically.

[0003] One common way to shield devices from EMF is to use a Faraday cage. A Faraday cage is typically a conductive metal that absorbs incoming EMF and disperses it throughout the cage, preventing the EMF from interacting with the internal circuitry. A perfect cage would completely surround all of the electronic devices. However, for on-chip devices, signal or power lines may extend outside the cage. The signal lines present a potential problem as a source of EMF leakage through the protective cage. EMF may interact with this signal line outside the Faraday cage, and interference may propagate through the signal line and affect the internal circuitry. This "crack" can cause the EMF shield to fail.

[0004] One common method of forming interconnects with Si CMOS integrated circuits is to form copper wire interconnects within dielectric structures. Damascene processes (which are subtractive) have been developed to process copper. In Cu damascene processes, the host insulating material for copper, typically an underlying insulating layer (usually silicon dioxide), is patterned with open trenches where copper is to be formed. A thick coating of copper is deposited on the insulating layer, overfilling the trenches, and chemical mechanical planarization (CMP) is used to remove the excess copper that extends beyond the top of the insulating layer. The Cu that is filled within the trenches in the insulating layer is not removed, resulting in the patterned conductive interconnects. A barrier layer completely surrounds all copper interconnects, since copper's properties deteriorate if it diffuses into the surrounding material. Typically, the trenches are lined with a thin tantalum (Ta) and / or tantalum nitride (TaN) metal layer (as part of a Ta / TaN / Cu plated seed metal stack) that acts as a diffusion barrier along the bottom and sides of the Cu metal interconnects. After Cu CMP, the top of the interconnect metal is coated with SiN, which acts as a top interface diffusion barrier, prevents oxidation during interlayer oxide deposition, and acts as a stop etch layer (during silicon dioxide trench etch) for additional interconnect formation. As known in the art, this is not commonly used in compound semiconductor manufacturing since compound semiconductor manufacturing is typically lift-off and gold based.

[0005] Photoconductive semiconductor switches (PCSS) and photoconductive switch transistors are different devices that offer high voltage switching capabilities, ultrafast switching speeds, or fast energy pulses that are switched by light rather than a bias applied by a metal gate, thus leading to the possibility of increasing operating voltages compared to conventional GaN HEMT switches and RF devices.

[0006] What is needed is a compactly integrated photoconductive semiconductor switch and photoconductive switch transistor protected by a structure that shields electronic devices from EMF. Summary of the Invention

[0007] In accordance with the present disclosure, there is provided an EMF shielded integrated circuit structure including a substrate having a top surface, a semiconductor layer disposed on the top surface of the substrate, a photoconductive semiconductor switch disposed laterally alongside a transistor on the semiconductor layer integrated in the integrated circuit structure, an EMF shield surrounding the substrate, the semiconductor layer, and the photoconductive semiconductor switch disposed laterally alongside the transistor on the semiconductor layer integrated in the integrated circuit structure, and a signal line electronically coupled to the photoconductive semiconductor switch, the signal line passing through the EMF shield.

[0008] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include that the substrate comprises at least one of a silicon material and a silicon carbide material.

[0009] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include that the substrate and the semiconductor layer comprise a wafer.

[0010] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include that the transistor comprises a field effect transistor.

[0011] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include that the photoconductive semiconductor switch includes a first electrical contact and a second electrical contact disposed on the GaN layer.

[0012] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include the EMF shield including a temporary portion, the temporary portion delivering radiation from the light source through the EMF shield to the photoconductive semiconductor switch.

[0013] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include that the temporary portion is selected from the group consisting of a mesh, holes, a transparent material, a translucent material, and combinations thereof.

[0014] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include that the EMF shield is configured to prevent EMF radiation from passing through a wall of the EMF shield.

[0015] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include that the EMF shielded integrated circuit structure further includes a light source optically coupled to the photoconductive semiconductor switch and a controller in electronic communication with the light source, the controller configured to deactivate the light source in response to detecting EMF radiation.

[0016] In accordance with the present disclosure, there is provided a laterally integrated circuit having an EMF shield, the laterally integrated circuit comprising: a substrate having a top surface; a gallium nitride layer disposed on the top surface of the substrate; a photoconductive semiconductor switch disposed laterally alongside a transistor on the gallium nitride layer integrated into an integrated circuit structure; and an EMF shield including an enclosure having a wall forming an interior and an exterior opposite the interior, the enclosure including the EMF shield enclosing the substrate, the gallium nitride layer, and the photoconductive semiconductor switch disposed laterally alongside the transistor on the gallium nitride layer integrated into the integrated circuit structure; a signal line electronically coupled to the photoconductive semiconductor switch, the signal line penetrating the wall of the EMF shield enclosure; a light source optically coupled to the photoconductive semiconductor switch; and a temporary portion formed in the wall, the temporary portion configured to deliver radiation from the light source through the EMF shield to the photoconductive semiconductor switch.

[0017] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include that the integrated circuit structure further includes a controller in electronic communication with the light source, the controller configured to shut off the light source in response to EMF radiation detection.

[0018] Further embodiments of any of the aforementioned embodiments may additionally and / or alternatively include that the integrated circuit structure further includes an EMF detector in electronic communication with the controller, the EMF detector configured to detect EMF radiation.

[0019] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include that the photoconductive semiconductor switch includes a first electrical contact and a second electrical contact disposed on the GaN layer.

[0020] According to the present disclosure, there is provided a process for protecting a laterally integrated circuit from EMF, the process including: enclosing the laterally integrated circuit with an EMF shield, the laterally integrated circuit including a substrate having a top surface, a semiconductor layer disposed on the top surface of the substrate, and a photoconductive semiconductor switch disposed laterally alongside a transistor on the semiconductor layer integrated in an integrated circuit structure, the EMF shield including an enclosure having a wall forming an interior and an exterior opposite the interior, the enclosure enclosing the substrate, the semiconductor layer, and the photoconductive semiconductor switch disposed laterally alongside the transistor on the semiconductor layer integrated in an integrated circuit structure, and a temporary portion formed in the wall, the temporary portion configured to allow radiation from a light source to pass through the wall to reach the photoconductive semiconductor switch; coupling a signal line to the photoconductive semiconductor switch, the signal line penetrating the wall of the EMF shielding enclosure; and optically coupling the light source to the photoconductive semiconductor switch through the temporary portion.

[0021] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include the process further including coupling a controller in electronic communication with the light source, the controller configured to shut off the light source in response to EMF radiation detection.

[0022] Further embodiments of any of the aforementioned embodiments may additionally and / or alternatively include the process further including coupling an EMF detector in electronic communication with the controller, the EMF detector configured to detect EMF radiation.

[0023] Further embodiments of any of the aforementioned embodiments may additionally and / or alternatively include that the process further includes preventing EMF radiation from passing through a wall of the EMF shield via the signal line in response to detecting the EMF radiation.

[0024] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include that the photoconductive semiconductor switch includes a first electrical contact and a second electrical contact disposed on the GaN layer.

[0025] Further embodiments of any of the aforementioned embodiments may additionally and / or alternatively include that the process further includes actuating the photoconductive semiconductor switch in response to optically coupling the light source to the photoconductive semiconductor switch through the transient portion.

[0026] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include where the metal interconnects and EMF shielding are formed from copper (Cu) damascene integration, with the copper traces embedded in a dielectric material.

[0027] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include where the metal interconnect and the EMF shield are formed from a Au-based metal interconnect.

[0028] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include where the transistors are formed from elemental semiconductors.

[0029] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include where the transistor is formed from a compound semiconductor other than GaN.

[0030] Further embodiments of any of the foregoing embodiments may additionally and / or alternatively include where the PCSS is formed from a direct bandgap semiconductor other than GaN.

[0031] Further details of the EMF shielded integrated circuit with photoconductive semiconductor switches are set forth in the following detailed description and accompanying drawings, in which like reference numbers refer to like elements. [Brief description of the drawings]

[0032] [Figure 1] 1 is a schematic cross-sectional view of an exemplary laterally integrated circuit structure having a Faraday cage; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0033] Referring to FIG. 1, a laterally integrated circuit structure 10 is shown. The laterally integrated circuit structure 10 includes transistors 12 electrically coupled to a PCSS 14, each laterally integrated and supported on a common substrate 16. The transistors 12 may be elemental or compound semiconductor field effect transistors (FETs), here for example silicon (Si) complementary metal oxide semiconductor (CMOS) transistors, gallium nitride (GaN), indium phosphide (InP) based transistors, gallium arsenide (GaAs), and silicon carbide (SiC), and associated integrated circuit structures. The PCSS 14 may include a direct bandgap compound semiconductor PCSS, here for example GaN, GaAs, or InP. The substrate 16 may include elemental or compound semiconductors, here for example silicon Si or SiC or GaAs or GaN or InP materials. It is noted that in many applications, an indirect bandgap substrate, such as Si or SiC, may be preferred to confine carrier activation to the PCSS 14. Alternatively, a substrate having a bandgap larger than the bandgap of light source 32 can be utilized to limit carrier generation in substrate 16. Substrate 16 includes a top surface 18.

[0034] In an exemplary embodiment, a gallium nitride (GaN) layer 20 is disposed on an upper surface 18 of the substrate 16 to form a GaN-on-Si wafer 22. The GaN layer 20 supports the transistor 12 and the PCSS 14 in tandem such that the transistor 12 and the PCSS 14 are laterally integrated together on the same integrated circuit. The exemplary GaN embodiment and additional exemplary alternative embodiments may be formed from various materials as previously described, and these embodiments are described in the following paragraphs.

[0035] The FET 12 includes an aluminum gallium nitride (AlGaN) layer 24 disposed on the GaN layer 20. The FET 12 includes a silicon nitride dielectric (SiN / dielectric) layer 26 disposed on the AlGaN layer 24 adjacent each of the drain D, gate G, and source S of the FET 12. A silicon dioxide dielectric (SiO2 / dielectric) layer 28 insulates the transistor 12 circuitry and an intermediate layer 30, here, for example, SiNx, and a conductive interconnect 31 disposed within the silicon dioxide dielectric layer 28. The dielectrics 28, 26, and intermediate layer 30 can be transparent to a light source 32 utilized to trigger the PCSS 14 conduction path. In an exemplary embodiment, if the dielectric or intermediate layer is not transparent, a window can be opened in the film to transmit light.

[0036] The PCSS 14 may include a first electrical contact 34 (PCSS-1) and a second electrical contact 36 (PCSS-2) disposed on the GaN layer 20. In an exemplary embodiment, a silicon dioxide dielectric layer 28 insulates each of the first electrical contact 34 and the second electrical contact 36 of the photoconductive semiconductor switch 14. In an exemplary embodiment, the dielectric layer 28 may be a silicon nitride, or silicon dioxide material, or the like. In other exemplary embodiments, the first electrical contact 34 and the second electrical contact 36 do not have a dielectric insulation. The photoconductive semiconductor switch 14 is a region of semiconductor material (e.g., GaN) that is typically very resistive, e.g., unintentionally doped or doped at deep levels, e.g., with carbon or iron. This allows the material to block a significant amount of voltage with very little leakage. However, when illuminated by a light source 32 with energy above or close to the band gap energy, a large amount of excited carriers are generated. These excited carriers now form a low resistance conduction path used for switching. The PCSS 14 provides high voltage switching capability, ultra-fast switching speed, or fast energy pulses. The input voltage to the transistor 12 can be controlled by the on / off state of the PCSS 14, or vice versa.

[0037] A Faraday cage or EMF shield 40 is disposed around the laterally integrated circuit 10. The EMF shield 40 may surround the laterally integrated circuit 10 such that electric fields and EMF radiation 42 cannot penetrate the EMF shield 40 and adversely affect the laterally integrated circuit 10. The EMF shield 40 may be a container 44 defining an interior 46 and an exterior 48. The EMF shield 40 may be formed of a conductive material, such as a wire mesh, a metal plate, etc., configured to prevent the EMF radiation 42 from passing through the container 44. The EMF shield 40 is configured to protect the laterally integrated circuit 10 from the external electric fields / EMF radiation 42. The EMF shield 40 may be used to prevent external electromagnetic interference (EMI) or electrical noise from interfering with the laterally integrated circuit 10. The EMF shield 40 includes a temporary portion 50 optically coupled to the light source 32. The temporary portion 50 is configured to allow radiation 52 of the light source 32 to pass through the EMF shield 40 and trigger the PCSS 14. The temporary portion 50 may include holes, slots, physical penetrations, transparent / translucent material, etc. in the walls 54 of the enclosure 44 of the EMF shield 40 that may allow the radiation 52 to pass through the EMF shield 40 .

[0038] The signal line 56 is electrically coupled to the PCSS 14. The signal line 56 may be in series with the PCSS 14 and the external circuit 58. The signal line 56 penetrates the wall 54 of the EMF shield 40. The signal line 56 is configured to transmit a signal from the external circuit 58 outside the laterally integrated circuit 10 through the EMF shield 40 into the PCSS 14 and pass through the PCSS 14 when the PCSS 14 is activated. When the PCSS 14 is not activated, the signal line 56 blocks the passage of the signal or even the EMF radiation 42 through the EMF shield 40, thereby preventing the EMF radiation 42 from interfering with the laterally integrated circuit 10.

[0039] It should be noted that the EMF shield 40, conductive interconnects 31 and signal lines 56 can be Cu damascene or gold based. The Cu damascene process embodiment has the advantage of being a planar process with Cu metal traces embedded in a dielectric. This also allows additional Cu layers to be added sequentially to form the conductive interconnects 31 of the complex EMF shield 40 with vertical and horizontal elements. Other embodiments may include gold based interconnects and EMF shields formed by lift-off and / or plating of metal by e-beam deposition, with the EMF shield formed by metal deposition into structures such as dielectric trenches, air bridges, or by bonding the EMF shield to cavities on the integrated circuit including the PCSS.

[0040] The placement of the EMF shield 40 coupled with the PCSS 14 and the signal lines 56 prevents EMF radiation 42 from emitting from the laterally integrated circuit 10 outside the EMF shield 40, thus protecting any other circuitry from radiation from the laterally integrated circuit 10.

[0041] In an exemplary embodiment, the controller 60 can be in electronic communication with the light source 32. The controller 60 can include a processor 62 for automatic activation of the light source 32. The light source controller 60 can include one or more processors 62 (e.g., a computer system having a central processing unit and memory) for recording, processing, and storing received data. The processor 62 can include a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof. The EMF detector 64 can be in electronic communication with the controller 60. The EMF detector 64 can be configured to detect the EMF radiation 42. The controller 60 can be configured to prevent activation of the light source 32 upon detection of the EMF radiation 42 to prevent inadvertent activation of the PCSS 14 that would allow unwanted EMF radiation 42 to be transmitted along the signal line 54 into the laterally integrated circuit 10.

[0042] The light source 32 may be external to the entire integrated circuit structure 10 or may be located in an upper layer of the planar Cu damascene structure of the embodiment. Cu damascene allows for die-to-wafer or wafer-to-wafer bonding of materials, devices, or combinations thereof into the upper layer of the structure, which is then connected to control circuitry using additional Cu conductive interconnects.

[0043] Technical advantages of the present disclosure include the direct integration of optically gated switches into a GaN-on-Si process flow to enable the inherent high voltage capability and fast response time of optically gated switches while preventing unwanted EMF radiation.

[0044] Another technical advantage of the present disclosure includes an EMF protection structure for integrated circuits that includes a high resistance PCSS in series with the signal / power lines, which prevents stray signals from outside the Faraday cage from interfering with the integrated circuits inside.

[0045] Another technical advantage of the present disclosure includes a structure that includes a Faraday cage that encloses an integrated circuit having a photoconductive semiconductor switch.

[0046] Another technical advantage of the present disclosure includes PCSS devices controlling or being controlled by GaN plus Si devices that are homogeneously integrated within the same wafer.

[0047] Another technical advantage of the present disclosure includes a structure having a Faraday cage material that is transparent to the radiation required to control the PCSS but protects against EMFs of wavelengths that could damage integrated circuits.

[0048] Another technical advantage of the present disclosure includes a PCSS device that relays signals to a local FET / integrated circuit.

[0049] Another technical advantage of the present disclosure includes that fabricating GaN PCSS can be layer subtractive based using techniques traditional to Si foundries.

[0050] Another technical advantage of the present disclosure includes that both GaN PCSS transistors and GaN / Si transistors are fabricated simultaneously using the same processing steps.

[0051] Another technical advantage of the present disclosure includes the addition of PCSS to GaN-on-Si, which is not a trivial addition since it utilizes layers and structures not used in standalone GaN-on-Si, or standalone PCSS devices.

[0052] Another technical advantage of the present disclosure includes a structure that can function with a wide variety of integrated circuit or FET applications.

[0053] Another technical advantage of the present disclosure is that the use of Cu damascene allows for 3D integration of multiple layers of light sources, transistors, and PCSS within the fabricated wafer cross-section. Thus, there may be multiple layers containing EMF shielding circuitry that can communicate with other EMF shielding circuitry. Alternatively, one or more non-shielded area(s) may communicate with one or more shielded area(s) and / or one or more external light sources and detectors.

[0054] An EMF shielded integrated circuit with a photoconductive semiconductor switch has been provided. Although the EMF shielded integrated circuit with a photoconductive semiconductor switch has been described in the context of specific embodiments thereof, other unforeseen alternatives, modifications, and variations will be apparent to those skilled in the art upon reading the above description. It is therefore intended to cover such alternatives, modifications, and variations that fall within the broad scope of the appended claims.

Claims

1. 1. An EMF shielded integrated circuit structure comprising: a substrate having a top surface; a semiconductor layer disposed on the top surface of the substrate; a photoconductive semiconductor switch disposed laterally alongside a transistor on the semiconductor layer integrated in the integrated circuit structure; an EMF shield surrounding the substrate, the semiconductor layer, and the photoconductive semiconductor switch disposed laterally alongside the transistor on the semiconductor layer integrated into the integrated circuit structure; a signal line electronically coupled to the photoconductive semiconductor switch, the signal line passing through the EMF shield; An EMF shielded integrated circuit structure comprising:

2. 10. The EMF shielded integrated circuit structure of claim 1, wherein the substrate comprises at least one of a silicon material and a silicon carbide material.

3. 10. The EMF shielded integrated circuit structure of claim 1, wherein said substrate and said semiconductor layer form a wafer.

4. 2. The EMF shielded integrated circuit structure of claim 1, wherein said transistor comprises a field effect transistor.

5. 2. The EMF shielded integrated circuit structure of claim 1, wherein said photoconductive semiconductor switch includes a first electrical contact and a second electrical contact disposed on said semiconductor layer.

6. 10. The EMF shielded integrated circuit structure of claim 1, wherein the EMF shield includes a transitory portion, the transitory portion configured to deliver radiation from a light source through the EMF shield to the photoconductive semiconductor switch.

7. 7. The EMF shielded integrated circuit structure of claim 6, wherein the temporary portion is selected from the group consisting of a mesh, a hole, a transparent material, a translucent material, and combinations thereof.

8. 10. The EMF shielded integrated circuit structure of claim 1, wherein the EMF shield is configured to prevent EMF radiation from passing through a wall of the EMF shield.

9. a light source optically coupled to the photoconductive semiconductor switch; a controller in electronic communication with the light source, the controller configured to deactivate the light source in response to detecting EMF radiation; 10. The EMF shielded integrated circuit structure of claim 1 further comprising:

10. A laterally integrated circuit with EMF shielding, comprising: a substrate having a top surface; a gallium nitride layer disposed on the top surface of the substrate; a photoconductive semiconductor switch disposed laterally alongside a transistor on the gallium nitride layer integrated into the laterally integrated circuit; an EMF shield including a container having a wall forming an interior and an exterior opposite the interior, the container enclosing the substrate, the gallium nitride layer, and the photoconductive semiconductor switch disposed laterally alongside the transistor on the gallium nitride layer integrated into the laterally integrated circuit; a signal line electronically coupled to the photoconductive semiconductor switch, the signal line passing through the wall of the enclosure of the EMF shield; a light source optically coupled to the photoconductive semiconductor switch; a temporary portion formed in the wall, the temporary portion configured to deliver radiation from the light source through the EMF shield to the photoconductive semiconductor switch; A laterally integrated circuit comprising:

11. a controller in electronic communication with the light source, the controller configured to deactivate the light source in response to detecting EMF radiation; The laterally integrated circuit of claim 10 further comprising:

12. an EMF detector in electronic communication with the controller, the EMF detector configured to detect EMF radiation; The laterally integrated circuit of claim 11 further comprising:

13. The laterally integrated circuit of claim 10 , wherein the photoconductive semiconductor switch includes a first electrical contact and a second electrical contact disposed on the gallium nitride layer.

14. A process for EMF protection of laterally integrated circuits, comprising: surrounding the laterally integrated circuitry with an EMF shield, the laterally integrated circuitry comprising: a substrate having a top surface; a semiconductor layer disposed on the top surface of the substrate; a photoconductive semiconductor switch disposed laterally alongside a transistor on the semiconductor layer integrated in the laterally integrated circuit; Including, The EMF shield comprises: a container having a wall defining an interior and an exterior opposite the interior, the container enclosing the substrate, the semiconductor layer, and the photoconductive semiconductor switch disposed laterally alongside the transistor on the semiconductor layer integrated in the laterally integrated circuit; and a temporary portion formed in the wall, the temporary portion configured to deliver radiation from a light source through the wall to the photoconductive semiconductor switch. Including, enclosing, coupling a signal line to the photoconductive semiconductor switch, the signal line passing through the wall of the enclosure of the EMF shield; optically coupling the light source to the photoconductive semiconductor switch; A process including.

15. coupling a controller in electronic communication with the light source, the controller configured to deactivate the light source in response to detecting EMF radiation; The process of claim 14 further comprising:

16. coupling an EMF detector in electronic communication with the controller, the EMF detector configured to detect EMF radiation; The process of claim 15 further comprising:

17. in response to detecting EMF radiation, preventing the EMF radiation from passing through the signal wire to the wall of the EMF shield; The process of claim 16 further comprising:

18. The process of claim 14 , wherein the photoconductive semiconductor switch comprises a first electrical contact and a second electrical contact disposed on the semiconductor layer.

19. actuating the photoconductive semiconductor switch in response to optically coupling the light source to the photoconductive semiconductor switch through the transient portion; The process of claim 14 further comprising:

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