Semiconductor device and manufacturing method thereof

Abstract

To improve the positioning accuracy of wire bonding.SOLUTION: A semiconductor device (1) has a semiconductor element (7), a control terminal (19) electrically connected to the top electrode of the semiconductor element via a wiring member, and a case member (4) integrally molded with the control terminal to define a space for housing the semiconductor element. The control terminal has a bonding pad (19a) that serves as a connection point for wiring components. The case member has a convex positioning portion (41d) that serves as a reference point for positioning the wiring component relative to the pad.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]

[0002] 2. Description of the Related Art Semiconductor devices have substrates on which semiconductor elements such as IGBTs (Insulated Gate Bipolar Transistors), power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), and FWDs (Free Wheeling Diodes) are provided, and are used in inverter devices and the like.

[0003] In this type of semiconductor device, for example, in Patent Documents 1 and 2, a laminated substrate is placed on the top surface of a heat sink, and a semiconductor element is placed via solder on a circuit pattern on the laminated substrate. Wire bonding is widely used as an electrical wiring method in such semiconductor devices. In wire bonding, the positions of the connection objects (e.g., the semiconductor element and electrode terminals) are detected to identify the exact bonding points. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-134552 [Patent Document 2] Japanese Patent Application Laid-Open No. 2002-299551 Summary of the Invention [Problem to be solved by the invention]

[0005] In general, wire bonding machines automatically detect the bonding position by using, for example, image recognition technology to recognize the reference point of the machine. In this case, if there is an error in the recognition of the reference point, it may affect the positional accuracy of the bonding. If the wire bonding position is misaligned, the strength of the wire connection may decrease, making the wire more susceptible to peeling.

[0006] The present invention has been made in view of the above points, and one of its objects is to provide a semiconductor device and a method for manufacturing the semiconductor device that can improve the positional accuracy of wire bonding. [Means for solving the problem]

[0007] A semiconductor device according to one embodiment of the present invention comprises a semiconductor element, a control terminal electrically connected to an upper surface electrode of the semiconductor element via a wiring member, and a case member integrally molded with the control terminal and defining a space for accommodating the semiconductor element, wherein the control terminal has a pad that serves as a connection point for the wiring member, and the case member has a convex positioning portion that serves as a reference point for positioning the wiring member relative to the pad.

[0008] Furthermore, one aspect of the present invention provides a method for manufacturing a semiconductor device comprising: a semiconductor element; a control terminal electrically connected to an upper surface electrode of the semiconductor element via a wiring member; and a case member integrally molded with the control terminal and defining a space for accommodating the semiconductor element, wherein the control terminal has a pad that serves as a connection point for the wiring member, and the case member has a convex positioning portion that serves as a reference point for positioning the wiring member relative to the pad, and in the step of connecting the wiring member to the pad, a planar image of the area around the pad is captured, and the wiring member is connected to the pad based on the relative coordinates of the positioning portion and the pad in the planar image. [Effects of the Invention]

[0009] According to the present invention, it is possible to improve the positional accuracy of wire bonding. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a plan view of a semiconductor device according to an embodiment of the present invention; [Figure 2] FIG. 2 is a plan view in which the sealing resin in FIG. 1 is omitted. [Figure 3] FIG. 3 is a partially enlarged view of FIG. 2. [Figure 4] FIG. 2 is a cross-sectional view taken along line AA in FIG. [Figure 5] FIG. 5 is a partially enlarged view of FIG. [Figure 6] 1 is a schematic diagram illustrating an example of a circuit configuration of a semiconductor device according to an embodiment of the present invention; [Figure 7] 10A to 10C are schematic diagrams showing a wire bonding method according to a comparative example. [Figure 8] 1 is a perspective view of the periphery of a control terminal of a semiconductor device according to an embodiment of the present invention; [Figure 9] 1A to 1C are schematic diagrams illustrating a wire bonding method according to an embodiment of the present invention. [Figure 10] 2 is a schematic side view of the periphery of a control terminal of the semiconductor device according to the present embodiment. FIG. [Figure 11] 10A and 10B are schematic diagrams showing a positioning section according to a modified example. DETAILED DESCRIPTION OF THE INVENTION

[0011] Semiconductor devices to which the present invention can be applied will be described below. FIG. 1 is a plan view of a semiconductor device according to this embodiment. FIG. 2 is a plan view in which the sealing resin of FIG. 1 is omitted. FIG. 3 is a partially enlarged view of FIG. 2. FIG. 4 is a cross-sectional view taken along line AA of FIG. 1. FIG. 5 is a partially enlarged view of FIG. 4. FIG. 6 is a schematic diagram showing an example of a circuit configuration of a semiconductor device according to this embodiment. Note that the semiconductor device shown below is merely an example, and is not limited to this and can be modified as appropriate.

[0012] In the following figures, the longitudinal direction of the semiconductor device (cooler) is defined as the X direction, the lateral direction of the semiconductor device (cooler) as the Y direction, and the height direction (thickness direction of the board) as the Z direction. The longitudinal direction of the semiconductor device indicates the direction in which multiple semiconductor modules (unit modules) are arranged. The X, Y, and Z axes shown in the figures are perpendicular to each other and form a right-handed system. In some cases, the X direction may be referred to as the left-right direction, the Y direction as the front-back direction, and the Z direction as the up-down direction. These directions (front-back, left-right, up-down) are terms used for convenience of explanation, and their correspondence with the X, Y, and Z directions may change depending on the mounting orientation of the semiconductor device. For example, the heat dissipation surface (cooler side) of the semiconductor device will be referred to as the bottom side, and the opposite side will be referred to as the top side. In this specification, a plan view refers to the top or bottom of the semiconductor device as viewed from the Z direction.

[0013] A semiconductor device 1 according to this embodiment is applied to a power conversion device such as a power control unit, and is a power semiconductor module that constitutes an inverter circuit. As shown in Figures 1 to 5, the semiconductor device 1 includes a plurality of unit modules 2 (three in this embodiment), a cooler 3 that cools these unit modules 2, a case member 4 that houses the plurality of unit modules 2, and a sealing resin 5 that is poured into the case member 4.

[0014] The unit module 2 includes an insulating substrate 6 and a semiconductor element 7 disposed on the insulating substrate 6. In this embodiment, three unit modules 2 are arranged side by side in the X direction. The three unit modules 2 constitute, for example, U phase, V phase, and W phase from the positive side in the X direction, and together form a three-phase inverter circuit. The unit modules 2 may also be called power cells or semiconductor units.

[0015] The cooler 3 includes a base plate 8 formed in a rectangular shape when viewed from above. The base plate 8 has a rectangular shape when viewed from above and is formed of a plate-like body of a predetermined thickness. The longitudinal direction of the base plate 8 extends in the left-right direction (X direction) of the semiconductor device 1, and the lateral direction of the base plate 8 extends in the front-rear direction (Y direction) of the semiconductor device 1. The base plate 8 has one surface (bottom surface) and the other surface (top surface). One surface forms the heat dissipation surface of the unit module 2. The other surface forms the bonding surface of the unit module 2.

[0016] The base plate 8 is made of an alloy of, for example, aluminum or copper, which has good heat dissipation properties. A plated layer of a predetermined thickness is formed on the surface of the base plate 8. The plated layer is preferably made of metal plating such as nickel. An insulating substrate 6 is placed on the upper surface of the base plate 8 via a bonding material S such as solder. A plurality of fins may be provided on the lower surface of the base plate 8.

[0017] The insulating substrate 6 is formed of, for example, a DCB (Direct Copper Bonding) substrate, an AMB (Active Metal Brazing) substrate, or a metal-based substrate. Specifically, the insulating substrate 6 has an insulating plate 60, a heat sink 61 disposed on the lower surface of the insulating plate 60, and a plurality of circuit boards 62 disposed on the upper surface of the insulating plate 60. The insulating substrate 6 is formed, for example, in a rectangular shape when viewed from above.

[0018] The insulating plate is formed of an insulating material such as a ceramic material such as alumina (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), a resin material such as epoxy, or an epoxy resin material using a ceramic material as a filler. The insulating plate may also be called an insulating layer or an insulating film.

[0019] The heat sink has a predetermined thickness in the Z direction and is formed to cover the lower surface of the insulating plate. The heat sink is made of a metal plate with good thermal conductivity, such as copper or aluminum.

[0020] A plurality of circuit boards 62 are formed on the upper surface of the insulating plate. In FIG. 2, for convenience, three circuit boards 62 are formed per insulating substrate 6, but one or more circuit boards 62 may be formed on the upper surface of the insulating plate. These circuit boards are metal layers such as copper foil, and are formed in the shape of islands on the insulating plate while being electrically insulated from one another. The circuit boards 62 may also be called circuit layers.

[0021] A semiconductor element 7 is disposed on the upper surface of the insulating substrate 6 (circuit board 62) via a bonding material S such as solder. For convenience, two semiconductor elements 7 are shown per insulating substrate 6 in FIG. 1, but more semiconductor elements 7 may be disposed on the insulating substrate 6. The semiconductor element 7 is formed into a square or rectangular shape in plan view and is made of a semiconductor substrate such as silicon (Si), silicon carbide (SiC), gallium nitride (GaN), or diamond.

[0022] The semiconductor element 7 may be a switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor), or a diode such as an FWD (Free Wheeling Diode). The switching element and the diode may be connected in anti-parallel. Alternatively, the semiconductor element 7 may be an RC (Reverse Conducting)-IGBT element in which an IGBT and an FWD are integrated, a power MOSFET element, or an RB (Reverse Blocking)-IGBT element having sufficient withstand voltage against reverse bias.

[0023] The shape, number, and location of the semiconductor elements 7 can be changed as appropriate. The semiconductor elements 7 in this embodiment are vertical switching elements in which functional elements such as transistors are formed on a semiconductor substrate, but are not limited to this and may be horizontal switching elements.

[0024] The upper surface electrodes of the semiconductor element 7 are conductively connected to a predetermined circuit board 62 via a metal wiring board 10. The metal wiring board 10 is formed by bending a metal material such as copper, copper alloy, aluminum alloy, or iron alloy by press working or the like. For example, one end of the semiconductor element 7 and the metal wiring board 10 are joined by a bonding material S such as solder. The other end of the predetermined circuit board 62 and the metal wiring board 10 are joined by a bonding material S such as solder. These metal wiring boards 10 may be called lead frames.

[0025] 6 may be configured using the above-described metal wiring board 10, multiple circuit boards 62, and semiconductor elements 7. In this case, P represents a positive terminal, N represents a negative terminal, and M represents an intermediate terminal, and this shows an example in which two semiconductor elements 7 are connected in series.

[0026] A case member 4 is disposed on the outer periphery of the upper surface of the base plate 8. The case member 4 is joined to the base plate 8, for example, via an adhesive. The case member 4 has a shape that follows the outline of the base plate 8. More specifically, the case member 4 is formed in the shape of a rectangular frame having an opening 4a in the center. The rectangular opening 4a accommodates the above-mentioned three unit modules 2. In other words, the three unit modules 2 are accommodated in a space defined by the frame-shaped case member 4.

[0027] The case member 4 is provided with main terminals for external connection (P terminal 16, N terminal 17, M terminal 18) and a control terminal 19 for control. Of a pair of wall portions 40, 41 facing each other in the short side direction (Y direction) of the case member 4, the wall portion 40 located on the negative side in the Y direction is formed with recesses 42, 43 that are rectangular in plan view.

[0028] A P terminal 16 (a nut portion 16a, which will be described later) is disposed in the recess 42. One P terminal 16 is disposed for each unit module 2. The P terminal 16 is connected to the insulating substrate 6 (a predetermined circuit board) via a bonding material S, such as solder.

[0029] The P terminal 16 is formed by integrally molding a nut portion 16a and a plate-like portion 16b. The nut portion 16a is formed as a square nut with a predetermined thickness. A screw hole 16c is formed in the center of the nut portion 16a, penetrating in the thickness direction. The nut portion 16a is provided on one end (base end) side of the plate-like portion 16b.

[0030] The plate-shaped portion 16b has a flat plate shape with an upper surface and a lower surface. The plate-shaped portion 16b has an elongated shape that is long in the Y direction in a plan view. The other end (tip) of the plate-shaped portion 16b is bonded to the circuit layer of the insulating substrate 6 via a bonding material S.

[0031] Similarly, an N terminal 17 (a nut portion 17a, which will be described later) is arranged in the recess 43. One N terminal 17 is arranged for each unit module 2. The N terminal 17 is connected to the insulating substrate 6 (a predetermined circuit board) via a bonding material S such as solder.

[0032] The N terminal 17 is formed by integrally molding a nut portion 17a and a plate-like portion 17b. The nut portion 17a is formed as a square nut with a predetermined thickness. A screw hole 17c is formed in the center of the nut portion 17a, penetrating in the thickness direction. The nut portion 17a is provided on one end (base end) side of the plate-like portion 17b.

[0033] The plate-shaped portion 17b has a flat plate shape with an upper surface and a lower surface. The plate-shaped portion 17b has an elongated shape that is long in the Y direction in a plan view. The other end (tip) of the plate-shaped portion 17b is bonded to the circuit layer of the insulating substrate 6 via a bonding material S.

[0034] Of the pair of wall portions 40, 41 facing each other in the short-side direction (Y direction) of the case member 4, the wall portion 41 on the positive side in the Y direction has a recessed portion 44 that is rectangular in plan view. An M terminal 18 (a nut portion 18a described below) is arranged in the recessed portion 44. One M terminal 18 is arranged for each unit module 2. An end portion (plate-shaped portion 18b) of the M terminal 18 is connected to the insulating substrate 6 (a predetermined circuit board) via a bonding material S such as solder.

[0035] The M terminal 18 is formed by integrally molding a nut portion 18a and a plate-like portion 18b. The nut portion 18a is formed as a square nut with a predetermined thickness. A screw hole 18c is formed in the center of the nut portion 18a, penetrating in the thickness direction. The nut portion 18a is provided on one end (base end) side of the plate-like portion 18b.

[0036] The plate-shaped portion 18b has a flat plate shape with an upper surface and a lower surface. The plate-shaped portion 18b has an elongated shape that is long in the Y direction in a plan view. The other end (tip) of the plate-shaped portion 18b is joined to the circuit layer of the insulating substrate 6 via a joining material S.

[0037] The P terminal 16 may be called a positive terminal (input terminal), the N terminal 17 a negative terminal (output terminal), and the M terminal 18 an intermediate terminal (output terminal). These terminals constitute a metal wiring board through which a main current flows. One ends of the P terminal 16, the N terminal 17, and the M terminal 18 constitute main terminals connectable to an external conductor, and one ends of the P terminal 16, the N terminal 17, and the M terminal 18 are bonded to a predetermined circuit layer of the insulating substrate 6 via a bonding material S. The P terminal 16, the N terminal 17, and the M terminal 18 correspond to P, N, and M in FIG. 6.

[0038] These terminals are formed from metal materials such as copper, copper alloy, aluminum alloy, iron alloy, etc. The shape, arrangement, number, etc. of these terminals are not limited to those described above and can be changed as appropriate.

[0039] Furthermore, control terminals 19 are provided on the wall portion 41 on the positive side in the Y direction. For example, ten control terminals 19 are arranged per unit module 2. More specifically, in one unit module 2, the ten control terminals 19 are arranged five at a time so as to sandwich the M terminal 18 in the left-right direction (X direction). The ten control terminals are arranged along the outer periphery of the opening 4a. Note that the number of control terminals 19 arranged is not limited to this and can be changed as appropriate.

[0040] A pair of pillars 41a are formed on the edge of the wall 41, protruding perpendicularly in the Z direction from the top surface of the wall 41 along the opening 4a. The pair of pillars 41a are arranged to sandwich the M terminal 18. Furthermore, a step 41b is formed on the inside (negative side in the Y direction) of the pillars 41a, which is one step lower than the top surface of the wall 41 and follows the opening 4a. A pair of step portions 41b are also arranged per unit module 2, sandwiching the M terminal 18 in the left-right direction (X direction).

[0041] The control terminal 19 is formed from a metal material such as copper, copper alloy, aluminum alloy, iron alloy, etc. The control terminal 19 is integrally molded (insert molded) so as to be embedded in the case member 4.

[0042] More specifically, five control terminals 19 are embedded in a step portion 41b corresponding to one pillar portion 41a. The control terminals 19 have a substantially L-shaped cross section cut along the YZ plane. Each control terminal 19 has an inner terminal portion 19a (one end) connected to the inner semiconductor element 7, and an outer terminal portion 19b (the other end) for external connection. The control terminal 19 is formed in an L-shape when viewed from the side, with the inner terminal portion 19a and the outer terminal portion 19b joined together.

[0043] An inner terminal portion 19a, which is one end of the control terminal 19, has a flat plate shape that is aligned with the surface of the semiconductor element 7. The inner terminal portion 19a extends inward in the Y direction from the inner surface of the case member 4 (opening 4a). The inner terminal portion 19a has a predetermined thickness in the Z direction.

[0044] Furthermore, most of the inner terminal portion 19a, excluding its upper surface, is embedded in the step portion 41b. The upper surface of the inner terminal portion 19a is flush with the upper surface of the step portion 41b. In other words, the upper surface of the inner terminal portion 19a is exposed to the step portion 41b. As will be described in detail later, the upper surface of the inner terminal portion 19a serves as a connection point (bonding point) for a wiring member W (bonding wire). The inner terminal portion 19a may also be called a bonding pad 19a. The inner terminal portion 19a is connected to an upper surface electrode of the semiconductor element 7 via the wiring member W (which may also be called a control wiring).

[0045] The outer terminal portion 19b, which is the other end of the control terminal 19, extends vertically and is connected to the inner terminal portion 19a within the pillar portion 41a (see FIG. 8). The intermediate portion (base end) of the outer terminal portion 19b, which rises upward, is embedded in the pillar portion 41a. Meanwhile, the upper end, which is the tip of the outer terminal portion 19b, protrudes a predetermined length from the upper surface of the pillar portion 41a. The cross section of the outer terminal portion 19b may be polygonal or circular. The outer terminal portion 19b may also be formed as a press-fit pin.

[0046] Furthermore, a plurality of protrusions 41c are formed on the inner surface of the opening 4a between the column portion 41a and the step portion 41b to improve the adhesion of the sealing resin 5. Furthermore, a protruding positioning portion 41d is formed on the upper surface of the step portion 41b to serve as a target point during bonding. These will be described later.

[0047] Furthermore, a plurality of through holes 20 are formed along the outer periphery of the case member 4. The through holes 20 are holes for inserting screws (not shown) for fixing the semiconductor device 1. The through holes 20 penetrate all the way to the base plate 8 of the cooler 3.

[0048] The resin for the case member 4 may be selected from PPS, as well as insulating resins such as polybutylene terephthalate (PBT), polybutyl acrylate (PBA), polyamide (PA), acrylonitrile butadiene styrene (ABS), liquid crystal polymer (LCP), polyether ether ketone (PEEK), polybutylene succinate (PBS), urethane, and silicone. The selected resin may also be a mixture of two or more resins. The resin may contain a filler (e.g., glass filler) to improve strength and / or functionality.

[0049] Conductor wire (bonding wire) is used for the wiring member W. The material of the conductor wire can be any one of gold, copper, aluminum, gold alloy, copper alloy, and aluminum alloy, or a combination thereof. It is also possible to use a material other than conductor wire as the wiring member. For example, a ribbon can be used as the wiring member.

[0050] The internal space defined by the frame-shaped case member 4 is filled with sealing resin 5. This seals the insulating substrate 6 and the semiconductor element 7 mounted thereon within the space. The case member 4 defines a space that accommodates the multiple unit modules 2 (insulating substrate 6, semiconductor element 7) and sealing resin 5.

[0051] The sealing resin 5 is made of a thermosetting resin. The sealing resin 5 preferably contains at least one of epoxy, silicone, urethane, polyimide, polyamide, and polyamideimide. For example, an epoxy resin mixed with a filler is suitable for the sealing resin 5 in terms of insulation, heat resistance, and heat dissipation.

[0052] In semiconductor devices, electrical wiring between semiconductor elements and terminals is achieved by wire bonding. For example, an automatic wire bonding machine is used to connect the bonding wires. This type of wire bonding machine usually has a function to automatically correct the wire bonding points.

[0053] For example, conventionally, a camera of a wire bonding device detects a planar image of a chip and a bonding pad, and the device is programmed to bond a wire onto the bonding pad based on a predetermined point.

[0054] Here, a conventional wire bonding method will be described with reference to Fig. 7. Fig. 7 is a schematic diagram showing a wire bonding method according to a comparative example. Figs. 7A and 7B are schematic plan views of the periphery of a bonding pad (inner terminal portion). In Fig. 7, the same reference numerals as above are used to denote the previously mentioned components, and their description will be omitted where appropriate.

[0055] 7A, in the comparative example, a corner of bonding pad 19a is set to reference point O(0,0). Here, the values ​​in parentheses represent coordinates on the XY plane. In this case, the bonding location (connection point A) can be expressed at approximately the center of bonding pad 19a with coordinates A(-a,-b) relative to reference point O.

[0056] As mentioned above, the control terminal 19 and the case are molded as a single unit (insert molding). For this reason, as shown in FIG. 7B, resin burrs C may form at the corners of the bonding pad 19a, which is the boundary between the resin and the metal. In this case, it is expected that the bonding device will erroneously recognize the tip of the burr C as the reference point O1 (0, -b1) during image recognition. As a result, the actual bonding point will be shifted to the connection point A1 (-a, -(b+b1)), making it impossible to bond the wire to the correct position.

[0057] In this way, when wire bonding to the bonding pad 19a of the control terminal 19 integrated into the case member 4, if the boundary between the resin and the metal is used as the reference point, there is a risk that the accuracy of the bonding will be affected depending on the quality of the molded product.

[0058] The bonding accuracy also affects the bond strength of the wire. Specifically, misalignment of the wire bond reduces the bond strength of the wire. In this case, the wire becomes more likely to peel off from the bonding pad 19a, which can affect the endurance of reliability tests such as thermal shock tests, heat cycle tests, and ΔTj power cycle tests, and can also significantly affect the product lifespan.

[0059] Therefore, the present inventors focused on the relationship between the location of burrs generated by integral molding of the case and the terminal and the reference position for bonding, and came up with the present invention. The gist of the present invention is to provide a reference position for bonding at a location different from the location where burrs are generated. Specifically, in this embodiment, a convex positioning portion 41d is disposed near the bonding pad 19a, which serves as a reference point for positioning the connection point of the wiring member W to the bonding pad 19a.

[0060] 8 is a perspective view of the periphery of the control terminal of the semiconductor device according to this embodiment. As shown in FIG. 8, two positioning portions 41d are arranged per unit module 2. These two positioning portions 41d are arranged on the upper surface of the step portion 41b, at both left and right ends of the five bonding pads 19a arranged side by side. The positioning portion 41d has, for example, a cylindrical shape that protrudes upward.

[0061] Here, a wire bonding method according to this embodiment will be described. Fig. 9 is a schematic diagram showing the wire bonding method according to this embodiment. For convenience of explanation, Fig. 9 shows only a single bonding pad 19a. In this embodiment, it is assumed that before the bonding step is carried out, the insulating substrate 6 and the semiconductor element 7 are mounted on the upper surface of the base plate 8, and the case member 4 with the control terminals 19 integrally molded thereon is arranged around them (for example, the wiring member W in Fig. 2 is omitted).

[0062] When wire bonding to each bonding pad 19a, the bonding device captures a planar image of the area around the bonding pad 19a. For example, as shown in Fig. 9A, the bonding device predetermines the relative coordinates of the target point (connection point A) of each bonding location with the positioning unit 41d as the reference (reference point O2). If the reference point O2 (0,0) is the origin, the coordinates of the target bonding location are expressed as connection point A (-a, -b).

[0063] As shown in FIG. 9B, even if a burr C occurs at the corner of bonding pad 19a, positioning portion 41d, which is reference point O2, is located at a position on the side of bonding pad 19a that is different from the location where burr C occurs. This allows the bonding device to clearly distinguish between burr C and reference point O2 in the captured image. Therefore, the bonding device can scan the tip of the bonding tool to the target point (connection point A) based on the preset relative coordinates without being affected by burr C. As a result, it is possible to improve the accuracy of the bonding location.

[0064] In this manner, in this embodiment, the bonding reference point O2 is set at a location different from the location where burrs C may occur. This makes it possible to improve the positional accuracy of the bonding location regardless of the quality of the integrally molded case member 4. This makes it possible to improve the bonding strength of the bonding wire and suppress a decrease in the tolerance of reliability tests due to wire breakage.

[0065] It is also possible to improve defects that occurred in the assembly process (bonding process) when accurate bonding points could not be detected due to burrs C, as in the comparative example. Furthermore, because the presence of burrs C does not affect bonding accuracy, the burr removal process required when molding the case member 4 is simplified. As a result, the number of steps is reduced, and costs can be reduced.

[0066] Furthermore, because the positioning portion 41d has a pin shape that protrudes upward, the worker can easily recognize (visually check) the positioning portion 41d. In this case, it is preferable that the surface of the positioning portion 41d and the case member 4 around it have a glossy surface. The surface roughness Ra of the surface of the positioning portion 41d and the case member 4 around it may be 0.1 μm to 5.0 μm. It is more preferable that it is 0.5 μm to 1.5 μm. This makes it easier for the bonding device to distinguish between light and dark in the image (for example, the boundary between the positioning portion 41d, the bonding pad 19a, and the surrounding case member 4) when capturing a planar image, thereby further improving the positional accuracy of bonding.

[0067] 10 is a schematic side view of the periphery of the control terminal of the semiconductor device according to this embodiment, and is a side view taken in the direction of arrow Y1 in FIG. 8. As described above, the positioning portion 41d has a pin shape that protrudes upward, and the sealing resin 5 is filled into the case member 4 so as to cover this positioning portion 41d. The protruding positioning portion 41d ensures a large contact area between the case member 4 and the sealing resin 5, which makes it possible to improve adhesion (anchor effect) between the case member 4 and the sealing resin 5.

[0068] 10, when filling the case member 4 with the sealing resin 5, it is preferable that a coating film 9 of a predetermined thickness is applied to the upper surface of the case member 4 in advance. The coating film 9 is applied to the entire upper surface of the case member 4, and then the sealing resin 5 is filled. As a result, the coating film 9 of a predetermined thickness is interposed between the positioning portion 41d and the sealing resin 5.

[0069] In this case, the thickness of the coating film 9 may be 0.1 μm to 20 μm, and preferably 1 μm to 10 μm. The material of the coating film 9 may be polyamide resin, polyamideimide resin, or polyetheramide resin. The material of the coating film 9 may be silica. This coating film can further improve adhesion.

[0070] 8, the positioning portions 41d are disposed on both the left and right ends of the five adjacent bonding pads 19a. That is, the two positioning portions 41d are disposed so as to sandwich the five adjacent bonding pads 19a in the left-right direction (X direction). In this manner, by disposing the positioning portions 41d on both the left and right ends of the adjacent bonding pads 19a, the coating film 9 does not spread to unnecessary areas when formed, and is more likely to remain uniformly on the bonding pads 19a and the surrounding case member 4. This makes it easier to form the coating film 9 with a predetermined thickness, and further improves the adhesion between the bonding pads 19a, the surrounding case member 4, and the sealing resin 5.

[0071] 8, a plurality of protrusions 41c are formed on the inner surface of the wall portion 41. The protrusions 41c protrude from the inner surface of the wall portion 41 toward the negative side in the Y direction by a predetermined thickness. The arrangement of the plurality of protrusions 41c forms an uneven shape on the inner surface of the wall portion 41. This uneven shape constitutes an anchor portion for improving adhesion between the case member 4 and the sealing resin 5. That is, by covering the plurality of protrusions 41c with the sealing resin 5, a large contact area between the case member 4 and the sealing resin 5 is ensured, and a further anchor effect can be obtained. In particular, by arranging the plurality of protrusions 41c near the connection point (bonding point) between the bonding pad 19a and the wiring member W, it is possible to ensure sufficient bonding strength of the wiring member W.

[0072] 8, a fillet may be formed at the corner of the upper end of the protrusion 41c. By forming the fillet, it is possible to reduce the wear of the mold and reduce the running costs.

[0073] As described above, according to this embodiment, by providing a reference point for bonding at a location different from the location where burrs occur on the case member 4 of the integrally molded product, it is possible to improve the positional accuracy of wire bonding without being affected by burrs.

[0074] In the above embodiment, the number and arrangement of the semiconductor elements 7 are not limited to the above configuration, and can be changed as appropriate.

[0075] Furthermore, in the above embodiment, the number and layout of the circuit boards are not limited to the above configuration, and can be changed as appropriate.

[0076] In the above embodiment, the insulating substrate 6 and the semiconductor element 7 are configured to be rectangular or square in plan view, but are not limited to this configuration. These elements may be configured to be polygonal shapes other than those described above.

[0077] Furthermore, in the above embodiment, the unit module 2 is described as being configured by arranging three unit modules in the X direction in the order of U phase, V phase, and W phase, but is not limited to this configuration. The number and arrangement direction of the unit modules can be changed as appropriate. Furthermore, although the case member 4 is formed by integrating three phases, namely, U phase, V phase, and W phase, this is not limited to this and can be changed as appropriate. The case member 4 may be provided separately for each unit module.

[0078] Furthermore, in the above-described embodiment, the shape, number, arrangement location, and arrangement pitch of the positioning portions 41d can be changed as appropriate. For example, the positioning portion 41d is not limited to a cylindrical shape, but may have a polygonal or spherical shape. Alternatively, the positioning portion 41d may be a positioning portion 45 as shown in the modified example of FIG. 11. The positioning portion 45 of FIG. 11 has a circular recess 45b formed on the upper surface (upper end) of a cylindrical portion 45a that protrudes upward. By covering the entire positioning portion 45 with the sealing resin 5, the contact area between the case member 4 and the sealing resin can be further increased, and a stronger anchoring effect can be expected.

[0079] In the above embodiment, the two positioning portions 41d are arranged on both the left and right ends of the five bonding pads 19a arranged side by side. However, this is not limited to this, and the positioning portions 41d may be arranged on one side of one bonding pad 19a. Alternatively, the positioning portions 41d may be arranged on one side or both sides of a plurality of bonding pads 19a arranged side by side. Preferably, the positioning portions 41d are arranged on both the left and right ends of a plurality of bonding pads 19a arranged side by side. This makes it possible to provide a compact semiconductor device while improving the positional accuracy of wire bonding.

[0080] In the above-described embodiment, the shape, number, arrangement location, and arrangement pitch of the protrusions 41c that constitute the anchor portion can be changed as appropriate.

[0081] Furthermore, although the present embodiment and modifications have been described, other embodiments may be combinations of the above-described embodiments and modifications in whole or in part.

[0082] Furthermore, the present embodiment is not limited to the above-described embodiments and modifications, and may be variously changed, substituted, or modified within the scope of the spirit of the technical idea. Furthermore, if the technical idea can be realized in a different way due to technological advances or derived other technologies, it may be implemented using that method. Therefore, the claims cover all embodiments that may fall within the scope of the technical idea.

[0083] The features of the above embodiment are summarized below. The semiconductor device according to the above embodiment comprises a semiconductor element, a control terminal electrically connected to an upper surface electrode of the semiconductor element via a wiring member, and a case member integrally molded with the control terminal and defining a space for accommodating the semiconductor element, wherein the control terminal has a pad that serves as a connection point for the wiring member, and the case member has a convex positioning portion that serves as a reference point for positioning the wiring member relative to the pad.

[0084] Furthermore, in the semiconductor device according to the above embodiment, the case member is formed in a rectangular frame shape having an opening in the center, the control terminal is arranged along the wall portion of the rectangular frame-shaped case member, a step portion is formed on the wall portion that is one step lower than the upper surface of the wall portion, a part of the control terminal is arranged so as to be flush with the upper surface of the step portion, the upper surface of the step portion forms the pad, and the positioning portion is arranged to the side of the pad.

[0085] Furthermore, in the semiconductor device according to the above embodiment, the control terminal has an outer terminal portion for external connection and an inner terminal portion connected to the upper surface electrode of the semiconductor element via a wiring member, the upper surface of the inner terminal portion forms the pad, the middle portion of the outer terminal portion is embedded in a pillar portion protruding upward from the upper surface of the wall portion, and the tip of the outer terminal portion protrudes from the upper surface of the pillar portion.

[0086] The semiconductor device according to the above embodiment further includes a sealing resin filled in the space, and a coating film having a predetermined thickness is interposed between the positioning portion and the sealing resin.

[0087] The semiconductor device according to the above embodiment further includes a sealing resin filled in the space, and an anchor portion having an uneven shape is formed on the inner surface of the wall portion.

[0088] In the semiconductor device according to the above embodiment, the positioning portion has a cylindrical shape.

[0089] In the semiconductor device according to the above embodiment, a recess is formed at the upper end of the positioning portion.

[0090] In the semiconductor device according to the above embodiment, the pads are arranged in a line in a predetermined direction, and the two positioning portions are arranged to sandwich the pads in the predetermined direction.

[0091] Furthermore, the semiconductor device according to the above embodiment further includes a metal wiring plate having one end forming a main terminal connectable to an external conductor and the other end joined via a bonding material to a circuit layer of an insulating substrate electrically connected to the semiconductor element, wherein the case member is formed in a rectangular frame shape having an opening in the center and has a pair of wall portions opposing each other in a predetermined direction, the metal wiring plate being composed of an intermediate terminal, a positive terminal, and a negative terminal, the positive terminal and the negative terminal being arranged on one of the pair of wall portions, the intermediate terminal being arranged on the other of the pair of wall portions, and the control terminal being arranged on the other wall portion.

[0092] Furthermore, the manufacturing method of the semiconductor device according to the above embodiment is a manufacturing method of a semiconductor device including a semiconductor element, a control terminal electrically connected to an upper surface electrode of the semiconductor element via a wiring member, and a case member integrally molded with the control terminal and defining a space for accommodating the semiconductor element, wherein the control terminal has a pad that serves as a connection point for the wiring member, and the case member has a convex positioning portion that serves as a reference point for positioning the wiring member relative to the pad, and in the process of connecting the wiring member to the pad, a planar image of the area around the pad is captured, and the wiring member is connected to the pad based on the relative coordinates of the positioning portion and the pad in the planar image. [Industrial Applicability]

[0093] As described above, the present invention has the effect of improving the positional accuracy of wire bonding, and is particularly useful for semiconductor devices with integrated coolers. [Explanation of symbols]

[0094] 1: Semiconductor device 2: Unit module 3:Cooler 4: Case material 4a: Opening 5: Sealing resin 6: Insulating substrate 7: Semiconductor elements 8: Base plate 9: Coating film 10: Metal wiring board (lead frame) 16 :P terminal 16a: Nut part 16b: Plate-shaped part 16c: screw hole 17 :N terminal 17a: Nut part 17b: Plate-shaped part 17c: screw hole 18 :M terminal 18a: Nut part 18b: Plate-shaped part 18c: screw hole 19: Control terminal 19a: Inner terminal part (bonding pad) 19b:Outer terminal part 20:Through hole 40: Wall 41 :Wall part 41a: Column part 41b: Stepped section 41c: Convex part 41d: Positioning part 42: Recess 43: Recess 44: Recess 45: Positioning section 45a: Cylindrical part 45b: Circular recess 60: Insulating plate 61: Heat sink 62: Circuit board A: Connection point A1: Connection point C: Bali O:Reference point O1: Reference point O2:Reference point S: Bonding material W: Wiring material

Claims

1. A semiconductor element; a control terminal electrically connected to the upper surface electrode of the semiconductor element via a wiring member; a case member that is integrally molded with the control terminal and defines a space for accommodating the semiconductor element; the control terminal has a pad serving as a connection point for the wiring member, the case member has a convex positioning portion that serves as a reference point for positioning the wiring member relative to the pad, The pads are arranged in a plurality of rows in a predetermined direction, The two positioning portions are arranged to sandwich the plurality of pads in the predetermined direction, one of the two positioning portions is disposed on a side opposite to a side on which the pads are disposed, the pad being located at an end on one side in the predetermined direction among the plurality of pads; A semiconductor device in which one of the two positioning portions is arranged on the side opposite to the side on which the pads are arranged, the pad located at the end on the other side of the specified direction among the pads.

2. The case member is formed in a rectangular frame shape having an opening in the center, The control terminal is arranged along a wall portion of the rectangular frame-shaped case member, The wall portion has a step portion that is one step lower than the upper surface of the wall portion, 2. The semiconductor device according to claim 1, wherein a part of said control terminal is disposed so as to be flush with an upper surface of said step portion, and said upper surface constitutes said pad.

3. The control terminal is an outer terminal portion for external connection; an inner terminal portion connected to the upper surface electrode of the semiconductor element via a wiring member; an upper surface of the inner terminal portion constitutes the pad; an intermediate portion of the outer terminal portion is embedded in a pillar portion that protrudes upward from the upper surface of the wall portion; The semiconductor device according to claim 2 , wherein a tip of each of said outer terminals protrudes from an upper surface of said pillar.

4. Further, a sealing resin is filled in the space, 4. The semiconductor device according to claim 2, wherein a coating film having a predetermined thickness is interposed between said positioning portion and said sealing resin.

5. Further, a sealing resin is filled in the space, 5. The semiconductor device according to claim 2, wherein an anchor portion having an uneven shape is formed on an inner surface of said wall portion.

6. 6. The semiconductor device according to claim 1, wherein the positioning portion has a cylindrical shape.

7. 7. The semiconductor device according to claim 1, wherein a recess is formed in an upper end of the positioning portion.

8. A semiconductor device described in any one of claims 1 to 7, wherein three or more of the pads are arranged in a row.

9. A semiconductor device described in any one of claims 1 to 8, wherein the positioning portion has a pin shape that protrudes upward.

10. A semiconductor device described in any one of claims 1 to 9, wherein the surface roughness Ra of the surface of the positioning portion and the surrounding case member is 0.1 μm to 5.0 μm.

11. a metal wiring plate having one end constituting a main terminal connectable to an external conductor and the other end joined via a bonding material to a circuit layer of an insulating substrate electrically connected to the semiconductor element; The case member is formed in a rectangular frame shape having an opening at the center and has a pair of wall portions facing each other in a predetermined direction, the metal wiring board is composed of an intermediate terminal, a positive terminal, and a negative terminal; the positive electrode terminal and the negative electrode terminal are disposed on one of the pair of wall portions, the intermediate terminal is disposed on the other wall portion of the pair of wall portions, The semiconductor device according to claim 1 , wherein the control terminal is disposed on the other wall portion.

12. A semiconductor element; a control terminal electrically connected to the upper surface electrode of the semiconductor element via a wiring member; a case member that is integrally molded with the control terminal and defines a space for accommodating the semiconductor element; A method for manufacturing a semiconductor device comprising: the control terminal has a pad serving as a connection point for the wiring member, the case member has a convex positioning portion that serves as a reference point for positioning the wiring member relative to the pad, The pads are arranged in a plurality of rows in a predetermined direction, The two positioning portions are arranged to sandwich the plurality of pads in the predetermined direction, one of the two positioning portions is disposed on a side opposite to a side on which the pads are disposed, the pad being located at an end on one side in the predetermined direction among the plurality of pads; one of the two positioning portions is disposed on a side opposite to a side on which the pads are disposed, the pad being located at an end on the other side in the predetermined direction among the plurality of pads; A manufacturing method of a semiconductor device, in a process of connecting the wiring member to the pad, capturing a planar image of the area around the pad, and connecting the wiring member to the pad based on the relative coordinates of the positioning portion and the pad in the planar image.

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