Semiconductor manufacturing equipment and manufacturing method thereof

The semiconductor manufacturing apparatus addresses substrate bonding issues by using units to measure and control magnification and deformation for precise alignment, preventing defects and ensuring reliable bonding.

JP7765271B2Active Publication Date: 2025-11-06KIOXIA CORP
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Patent Information

Application Number
JP2021204521
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-12-16
Publication Date
2025-11-06
Estimated Expiration
2041-12-16

AI Technical Summary

Technical Problem

The challenge in semiconductor manufacturing is properly bonding substrates together when there is a magnification difference between them, which can lead to defects such as high resistance or disconnection due to improper alignment.

Method used

A semiconductor manufacturing apparatus that includes a magnification difference acquisition unit, deformation amount determination unit, and bonding control unit to adjust the chuck deformation and gap between substrates to ensure proper alignment and bonding.

Benefits of technology

The apparatus effectively corrects magnification differences between substrates, preventing bonding defects by controlling chuck deformation and gap settings, ensuring precise and reliable substrate bonding.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To provide a semiconductor manufacturing device capable of suitably sticking substrates and a manufacturing method thereof.SOLUTION: According to one embodiment, a semiconductor manufacturing device comprises a magnification difference acquisition unit which acquires a magnification difference value between a first substrate and a second substrate. The device also comprises a deformation volume determination unit which determines a deformation volume value of a chuck holding the first or second substrate on the basis of the magnification difference value. In addition, the device comprises a gap determination unit which determines a gap value between the first substrate and the second substrate on the basis of the deformation volume value. Furthermore, the device comprises a sticking control unit which controls the deformation volume to the determined value and the gap to the determined value before sticking the first substrate and the second substrate.SELECTED DRAWING: Figure 6
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Description

[Technical Field]

[0001] FIELD Embodiments of the present invention relate to a semiconductor manufacturing apparatus and a manufacturing method thereof. [Background technology]

[0002] When bonding substrates together, the chuck holding one of the substrates may be deformed to correct the magnification difference between the substrates. In this case, if the amount of deformation of the chuck is too large or too small, the substrates may not be bonded together properly. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Patent Application No. WO2020 / 045148 [Patent Document 2] Patent No. 6407803 [Patent Document 3] Patent No. 6640546 [Patent Document 4] Special Publication No. 2016-526299 Summary of the Invention [Problem to be solved by the invention]

[0004] A semiconductor manufacturing apparatus and a manufacturing method thereof are provided that are capable of suitably bonding substrates together. [Means for solving the problem]

[0005] According to one embodiment, a semiconductor manufacturing apparatus includes a magnification difference acquisition unit that acquires a value of a magnification difference between a first substrate and a second substrate. The apparatus further includes a deformation amount determination unit that determines a value of a deformation amount of a chuck that holds the first or second substrate based on the value of the magnification difference. The apparatus further includes a gap determination unit that determines a value of a gap between the first substrate and the second substrate based on the value of the deformation amount. The apparatus further includes a bonding control unit that controls the deformation amount to the determined value and controls the gap to the determined value before bonding the first substrate and the second substrate. [Brief explanation of the drawings]

[0006] [Figure 1] 2A to 2C are cross-sectional views illustrating a method for manufacturing the semiconductor device according to the first embodiment. [Figure 2] 1 is a plan view showing the configuration of a semiconductor manufacturing apparatus according to a first embodiment. [Figure 3] FIG. 2 is a cross-sectional view showing the configuration of a processing block 25 according to the first embodiment. [Figure 4] FIG. 2 is a cross-sectional view showing the configuration of an upper chuck 51 and the like in the first embodiment. [Figure 5] FIG. 2 is a cross-sectional view showing the configuration of a lower chuck 52 and the like in the first embodiment. [Figure 6] 3A to 3C are cross-sectional views showing the operation of the semiconductor manufacturing apparatus of the first embodiment. [Figure 7] 5A and 5B are cross-sectional views showing the operation of a semiconductor manufacturing apparatus according to a comparative example of the first embodiment. [Figure 8] 10 is an enlarged cross-sectional view showing the operation of a semiconductor manufacturing apparatus according to a comparative example of the first embodiment. FIG. [Figure 9] 3A to 3C are cross-sectional views showing the operation of the semiconductor manufacturing apparatus of the first embodiment. [Figure 10] 4 is a graph for explaining the operation of the semiconductor manufacturing apparatus of the first embodiment. [Figure 11] 4 is a flowchart showing the operation of the semiconductor manufacturing apparatus of the first embodiment. [Figure 12] FIG. 2 is a block diagram showing the functional configuration of a control unit 30 according to the first embodiment. [Figure 13] 5A to 5C are cross-sectional views showing a method for manufacturing a semiconductor device according to a modified example of the first embodiment. [Figure 14] 10A to 10C are cross-sectional views showing a method for manufacturing a semiconductor device according to another modified example of the first embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings. In Figures 1 to 14, the same components are denoted by the same reference numerals, and redundant description will be omitted.

[0008] (First embodiment) 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to a first embodiment.

[0009] The semiconductor device of this embodiment is manufactured by bonding an upper wafer 1 shown in FIG. 1(a) to a lower wafer 2 shown in FIG. 1(b). The upper wafer 1 is an example of a first substrate, and the lower wafer 2 is an example of a second substrate. FIG. 1(c) shows a bonded wafer 3 including the upper wafer 1 and the lower wafer 2 bonded together. The bonded wafer 3 is then diced into a plurality of chips (semiconductor devices).

[0010] 1(a) to 1(c) show mutually perpendicular X, Y, and Z directions. In this specification, the +Z direction is treated as the upward direction, and the -Z direction is treated as the downward direction. The -Z direction may or may not coincide with the direction of gravity.

[0011] As shown in FIG. 1(a), the upper wafer 1 includes a wafer 1a, an interlayer insulating film 1b formed on the wafer 1a, and a plurality of metal pads 1c formed in the interlayer insulating film 1b. The wafer 1a is, for example, a semiconductor wafer such as a silicon (Si) wafer. The interlayer insulating film 1b is, for example, a stacked insulating film including a silicon oxide (SiO2) film and a silicon nitride (SiN) film. The interlayer insulating film 1b may include various devices such as a memory cell array and a transistor, and may also include various conductive layers such as a wiring layer and a plug layer. The metal pads 1c are, for example, a metal layer including a copper (Cu) layer.

[0012] 1(b), the lower wafer 2 includes a wafer 2a, an interlayer insulating film 2b formed on the wafer 2a, and a plurality of metal pads 2c formed in the interlayer insulating film 2b. The materials and structures of the wafer 2a, the interlayer insulating film 2b, and the metal pads 2c are similar to those of the wafer 1a, the interlayer insulating film 1b, and the metal pads 1c, respectively. For example, the upper wafer 1 includes a memory cell array, and the lower wafer 2 includes transistors that control this memory cell array.

[0013] As shown in Fig. 1(c), the bonded wafer 3 includes a lower wafer 2 and an upper wafer 1 disposed on the lower wafer 2. The orientation of the upper wafer 1 shown in Fig. 1(c) is opposite to the orientation of the upper wafer 1 shown in Fig. 1(a). In Fig. 1(c), the lower surface of the interlayer insulating film 1b is bonded to the upper surface of the interlayer insulating film 2b, and the lower surface of each metal pad 1c is bonded to the upper surface of the corresponding metal pad 2c.

[0014] When manufacturing the semiconductor device of this embodiment, the magnification of the pattern formed on wafer 1a may not be the same as the magnification of the pattern formed on wafer 2a. For example, the magnification of metal pad 1c may not be the same as the magnification of metal pad 2c. In this case, each metal pad 1c may not be properly bonded to the corresponding metal pad 2c, which may result in bonding defects such as high resistance at the bonded portion or disconnection.

[0015] Therefore, when manufacturing the semiconductor device of this embodiment, the chuck holding the upper wafer 1 or the lower wafer 2 is deformed to correct the difference in magnification between the upper wafer 1 and the lower wafer 2. Then, with this chuck deformed, the upper wafer 1 and the lower wafer 2 are bonded together. This makes it possible to properly bond each metal pad 1c to the corresponding metal pad 2c. For example, about 0 to 10 ppm degree It is possible to correct misalignment. Further details of correcting the magnification difference will be described later.

[0016] 2 is a plan view showing the configuration of the semiconductor manufacturing apparatus of the first embodiment. The semiconductor manufacturing apparatus of this embodiment is a bonding apparatus that bonds an upper wafer 1 and a lower wafer 2 together.

[0017] As shown in FIG. 2, the semiconductor manufacturing apparatus of this embodiment includes a wafer transport unit 10, a wafer processing unit 20, and a control unit 30. The wafer transport unit 10 transports the upper wafer 1 and the lower wafer 2 from the outside to the inside of the housing of the semiconductor manufacturing apparatus, and transports the bonded wafer 3 from the inside to the outside of the housing of the semiconductor manufacturing apparatus. The wafer processing unit 20 processes the upper wafer 1, the lower wafer 2, and the bonded wafer 3, for example, bonding the upper wafer 1 and the lower wafer 2 together. The control unit 30 controls various operations of the semiconductor manufacturing apparatus, for example, controlling the transport of each wafer by the wafer transport unit 10 and the processing of each wafer by the wafer processing unit 20.

[0018] The wafer transfer unit 10 includes a mounting unit 11 on which each wafer is placed and a transfer unit 12 that transfers each wafer. The mounting unit 11 includes a plurality of mounting tables 11a. The transfer unit 12 includes a transfer path 12a and a transfer robot 12b.

[0019] The mounting table 11a is used to mount the cassette 4 containing the upper wafer 1, the cassette 5 containing the lower wafer 2, and the cassette 6 for containing the bonded wafer 6. The two cassettes 6 shown in FIG. 2 are the cassette 6 for containing the normal bonded wafer 3 and the cassette 6 for containing the abnormal bonded wafer 3.

[0020] The transport path 12a extends in the X direction. The transport robot 12b can move on the transport path 12a in the ±X directions and rotate on the transport path 12a in the ±θ directions around the Z direction. The transport robot 12b can transport each wafer between the mounting table 11a located in the -Y direction and the wafer processing unit 20 located in the +Y direction. This allows each wafer to be loaded into the housing and unloaded from the housing.

[0021] The wafer processing section 20 includes a transfer block 21 for transferring each wafer, and processing blocks 22, 23, 24, and 25 for processing each wafer. The transfer block 21 includes a transfer robot 21a.

[0022] The transport robot 21a in the transport block 21 can transport each wafer between the wafer transport section 10 and processing blocks 22 to 25. The processing block 22 moves the upper wafer 1, the lower wafer 2, and the bonded wafer 3 in the ±Z direction. The processing block 23 modifies the surfaces of the upper wafer 1 and the lower wafer 2. The processing block 24 makes the surfaces of the upper wafer 1 and the lower wafer 2 hydrophilic. The processing block 25 bonds the upper wafer 1 and the lower wafer 2 together.

[0023] FIG. 3 is a cross-sectional view showing the configuration of the processing block 25 of the first embodiment.

[0024] The processing block 25 includes a transport area 40 and a bonding area 50, which are separated by an inner wall 25a of the processing block 25. The transport area 40 and the bonding area 50 are connected by an entrance / exit 25b provided in the inner wall 25a. The transport area 40 is an area for transporting each wafer between the inside and outside of the processing block 25. The bonding area 50 is an area for bonding the upper wafer 1 and the lower wafer 2 together. The bonding area 50 is an example of a bonding section.

[0025] The transport area 40 includes a transport module 41, a position adjustment module 42, and an inversion module 43. The position adjustment module 42 includes a base 42a and a detection unit 42b. The inversion module 43 includes a holding arm 43a, multiple holding members 43b, a drive unit 43c, and a support 43d.

[0026] The transport module 41 transports each wafer in the X direction, Y direction, Z direction, etc. Specifically, the transport module 41 transports the upper wafer 1 and the lower wafer 2 from the outside to the inside of the bonding area 50, and transports the bonded wafer 3 from the inside of the bonding area 50 to the outside.

[0027] The position adjustment module 42 adjusts the orientation of the notch of each wafer. Specifically, the position adjustment module 42 supports the wafer on a base 42a, detects the position of the notch of the wafer on the base 42a using a detector 42b, and rotates the wafer using the base 42a in accordance with the detected notch position. This adjusts the orientation of the notch.

[0028] The inversion module 43 inverts the orientation of the upper wafer 1. Specifically, the inversion module 43 holds the upper wafer 1 with a holding member 43b on a holding arm 43a, and inverts the orientation of the upper wafer 1 with the holding arm 43a. The holding arm 43a is supported by a support 43d via a drive unit 43c, and is driven by the drive unit 43c. This inverts the orientation of the upper wafer 1. For example, if the metal pads 1c of the upper wafer 1 before inversion face the +Z direction, the metal pads 1c of the upper wafer 1 after inversion face the -Z direction.

[0029] The bonding area 50 includes an upper chuck 51, a lower chuck 52, an upper chuck support portion 53, a lower chuck moving portion 54, two rails 55 extending in the Y direction, a lower chuck moving portion 56, two rails 57 extending in the X direction, and a mounting table 58. The upper chuck support portion 53 includes an upper imaging portion 53a, a support member 53b, a plurality of support columns 53c, and a striker 53d. The lower chuck moving portion 54 includes a lower imaging portion 54a. The upper chuck support portion 53 is an example of a first support portion. The lower chuck moving portion 54, the rails 55, the lower chuck moving portion 56, the rails 57, and the mounting table 58 are examples of a second support portion. The striker 53d is an example of a pressing portion.

[0030] The upper chuck 51 is supported by an upper chuck support part 53 and holds the upper wafer 1 from above. The upper chuck support part 53 is provided on the ceiling surface of the container of the processing block 25 and supports the upper chuck 51 from above. Specifically, the upper chuck support part 53 supports the upper chuck 51 by a support member 53b, and the support member 53b is supported by a support column 53c. The upper imaging part 53a is provided on the support member 53b, Lower wafer 2 This allows Lower wafer 2 The striker 53d is provided on the support member 53b and presses the upper wafer 1. This allows the upper wafer 1 and the lower wafer 2 to be bonded together.

[0031] The lower chuck 52 is supported by a lower chuck moving part 54, rails 55, lower chuck moving part 56, rails 57, and mounting table 58, and holds the lower wafer 2 from below. The lower chuck moving part 54, rails 55, lower chuck moving part 56, rails 57, and mounting table 58 are provided on the floor of the vessel of the processing block 25 and support the lower chuck 52 from below. The lower chuck moving part 54 can move the lower chuck 52 in the ±Y directions by moving on the rails 55 provided on the lower chuck moving part 56. The lower chuck moving part 56 can move the lower chuck 52 in the ±X directions by moving on the rails 57 provided on the mounting table 58. Furthermore, the lower chuck moving part 54 can move the lower chuck 52 up and down and rotate it by moving in the ±Z directions and rotating around an axis parallel to the Z direction. This allows the gap between the upper wafer 1 and the lower wafer 2 to be increased or decreased. The lower imaging unit 54a is provided on the lower chuck moving unit 54, Upper wafer 1 This allows Upper wafer 1 The state can be detected.

[0032] FIG. 4 is a cross-sectional view showing the configuration of the upper chuck 51 and other components of the first embodiment.

[0033] As shown in FIG. 4, the bonding area 50 of this embodiment further includes a through hole 61, a plurality of suction pipes 62, a plurality of suction pipes 63, an actuator 64, a cylinder 65, a vacuum pump 66, and a vacuum pump 67.

[0034] The through-hole 61 penetrates the upper chuck 51 and the support member 53b. The actuator 64 and the cylinder 65 constitute a striker 53d that presses the upper wafer 1. Specifically, the cylinder 65 is provided on the support member 53b. The actuator 64 includes an upper part provided within the cylinder 65 and a lower part provided within the through-hole 61. When the upper part of the actuator 64 moves up and down within the cylinder 65, the lower part of the actuator 64 also moves up and down within the through-hole 61. As a result, the lower part of the actuator 64 presses the upper wafer 1 held by the upper chuck 51. The striker 53d in this embodiment is driven by air supplied from a regulator (not shown).

[0035] The suction pipes 62 and 63 pass through the upper chuck 51 and are used to suck the upper wafer 1. The upper chuck 51 of this embodiment holds the upper wafer 1 by sucking the upper wafer 1 through the suction pipes 62 and 63. The vacuum pumps 66 and 67 are connected to the suction pipes 62 and 63, respectively, and draw a vacuum from the upper wafer 1 through the suction pipes 62 and 63. The upper wafer 1 is held by this vacuum action. In the bonding region 50 of this embodiment, the vacuum pumps 66 and 67 can be driven independently of each other. The suction pipes 62 and 63 and the vacuum pumps 66 and 67 are examples of suction units.

[0036] In the bonding area 50 of this embodiment, an upward force can be applied from the suction pipes 62 and 63 to the upper wafer 1, and a downward force can be applied from the actuator 64 (striker 53d) to the upper wafer 1. Further details of these forces will be described later.

[0037] FIG. 5 is a cross-sectional view showing the configuration of the lower chuck 52 and other components of the first embodiment.

[0038] 5(a) and 5(b) show different states of the same lower chuck 52. Details of the lower chuck 52 will be described below with reference to Fig. 5(a). In this description, Fig. 5(b) will also be referred to as appropriate.

[0039] 5(a), the lower chuck 52 of this embodiment includes a base 71, a mounting portion 72, a measuring portion 73, a plurality of suction pipes 74, and an air vent 75. In addition, the bonding area 50 of this embodiment further includes a vacuum pump 76 and a deformation portion 77 as components for the lower chuck 52. The deformation portion 77 includes a switching valve 77a, a regulator 77b, and a vacuum pump 77c.

[0040] The base 71 supports from below a mounting portion 72 on which the lower wafer 2 is placed. A space S exists between the substrate 71 and the mounting portion 72. The mounting portion 72 has a diameter equal to or greater than the diameter of the lower wafer 2 in a plan view. As shown in FIG. 5(a), the thickness of the mounting portion 72 increases toward the center of the mounting portion 72 and decreases away from the center of the mounting portion 72. The mounting portion 72 is formed, for example, from a ceramic material.

[0041] The placement portion 72 can be deformed as shown in FIGS. 5(a) and 5(b). The bonding area 50 of this embodiment can deform the lower wafer 2 placed on the placement portion 72 by deforming the placement portion 72. This makes it possible to correct the magnification difference between the upper wafer 1 and the lower wafer 2. The bonding area 50 of this embodiment can correct misalignment between the metal pads 1c and 2c by bonding the upper wafer 1 and the lower wafer 2 together while the lower wafer 2 is deformed by the placement portion 72. The placement portion 72 shown in FIG. 5(a) has a flat upper surface, and as a result, Lower wafer 2 The mounting portion 72 shown in FIG. 5(b) has an upper surface that is curved in an upward convex shape. Lower wafer 2 The shape of the curved portion is also convex upward.

[0042] The measuring unit 73 is provided at the center of the base 71 and measures the displacement (deformation) of the mounting unit 72. The suction pipe 74 passes through the base 71 and the mounting unit 72 and is used to suck the lower wafer 2. The lower chuck 52 of this embodiment holds the lower wafer 2 by sucking the lower wafer 2 through the suction pipe 74. The vacuum pump 76 is connected to the suction pipe 74 and draws a vacuum from the lower wafer 2 through the suction pipe 74. The lower wafer 2 is held by this vacuum action.

[0043] The ventilation hole 75 penetrates the base 71 and is used to supply air to the space S and exhaust air from the space S. The deformation portion 77 deforms the placement portion 72 by supplying air to the space S and exhausting air from the space S. Specifically, the deformation portion 77 supplies air to the space S using a regulator 77b and exhausts air from the space S using a vacuum pump 77c. Switching between supplying air and exhausting air is performed by a switching valve 77a.

[0044] 6A to 6D are cross-sectional views showing the operation of the semiconductor manufacturing apparatus of the first embodiment. 6A to 6D show how the upper wafer 1 held by the upper chuck 51 and the lower wafer 2 held by the lower chuck 52 are bonded together.

[0045] Figure 6(a) shows the upper wafer 1 and the lower wafer 2 before the start of bonding. Figure 6(a) shows the suction force Fa acting on the upper wafer 1 from the suction pipe 62 (Figure 4) and the suction force Fb acting on the upper wafer 1 from the suction pipe 63 (Figure 4). At this point, the striker 53d is not in contact with the upper wafer 1, and no pressing force is acting on the upper wafer 1 from the striker 53d.

[0046] FIG. 6(a) further shows the gap G between the upper wafer 1 and the lower wafer 2 before the start of bonding. In this embodiment, the gap G corresponds to the distance between the lower surface of the upper wafer 1 and the upper surface of the lower wafer 2 (see FIG. 14). The gap G shown in FIG. 6(a) is the distance between the center of the upper wafer 1 and the center of the lower wafer 2. The center of the upper wafer 1 is located on the central axis of the upper wafer 1, and the center of the lower wafer 2 is located on the central axis of the lower wafer 1.

[0047] 6(a) may be deformed by the mounting part 72. By bonding the lower wafer 2 in a deformed state, it is possible to correct the magnification difference between the upper wafer 1 and the lower wafer 2.

[0048] When bonding the upper wafer 1 and the lower wafer 2 together, the vacuum pump 66 (FIG. 4) is stopped, and the vacuum pumping from the suction pipe 62 is stopped. Thereafter, the upper wafer 1 is pressed by the striker 53d while being sucked by the suction pipe 63 (FIG. 6(b)). In this embodiment, the striker 53d presses the center of the upper wafer 1 against the center of the lower wafer 2, and the suction pipe 63 sucks the portions of the upper wafer 1 other than the center. Therefore, the bonding of the upper wafer 1 and the lower wafer 2 progresses from the centers of the upper wafer 1 and the lower wafer 2 to their outer peripheries. In other words, the contact area between the upper wafer 1 and the lower wafer 2 expands from the centers of the upper wafer 1 and the lower wafer 2 to their outer peripheries.

[0049] The progress of bonding stops after that. This is called the wait state. Figure 6(b) shows the upper wafer 1 and the lower wafer 2 in the wait state.

[0050] In the semiconductor manufacturing apparatus of this embodiment, when the bonding reaches the wait state, the vacuum pump 67 (FIG. 4) is stopped while the striker 53d is pressing the upper wafer 1, and the vacuum pumping from the suction pipe 63 is stopped. As a result, the upper wafer 1 falls onto the lower wafer 2, and the bonding of the upper wafer 1 and the lower wafer 2 progresses further (FIG. 6(c)).

[0051] In this way, the bonding of the upper wafer 1 and the lower wafer 2 progresses to the ends of the upper wafer 1 and the lower wafer 2, and the bonding is completed (FIG. 6(d)). FIG. 6(d) shows the bonded wafer 3 obtained by bonding the upper wafer 1 and the lower wafer 2 together.

[0052] Here, the operation of the control unit 30 (FIG. 1) of this embodiment will be described.

[0053] Before starting bonding, the control unit 30 acquires the value of the magnification difference between the upper wafer 1 and the lower wafer 2. Then, the control unit 30 determines the value of the deformation amount of the mounting unit 72 (lower chuck 52) based on the value of the magnification difference, determines the value of the gap G based on the value of the deformation amount, and determines the value of the pressing force of the striker 53d based on the value of the gap G.

[0054] Before starting bonding, the control unit 30 controls the deformation amount of the mounting unit 72 to the determined value, and also controls the gap G between the upper wafer 1 and the lower wafer 2 to the determined value. Then, the control unit 30 controls the operation of the bonding region 50 to bond the upper wafer 1 and the lower wafer 2 together, as shown in FIGS. 6(a) to 6(d). During this bonding, the control unit 30 controls the deformation amount of the mounting unit 72 to the determined value, and also controls the pressing force of the striker 53d to the determined value. Furthermore, the gap G between the upper wafer 1 and the lower wafer 2 is set to the determined value at the time when bonding starts (the time shown in FIG. 6(a)).

[0055] According to this embodiment, by controlling the deformation amount, the gap G, and the pressing force to these values, it is possible to suitably bond the upper wafer 1 and the lower wafer 2. Further details of this effect will be described later.

[0056] [Comparative Example] FIG. 7 is a cross-sectional view showing the operation of a semiconductor manufacturing apparatus according to a comparative example of the first embodiment.

[0057] Figures 7(a), 7(b), and 7(c) all show the upper wafer 1 and the lower wafer 2 in the wait state shown in Figure 6(b). Lines A1 and A2 pass through points near the ends of the upper wafer 1 and the lower wafer 2. Lines B1 and B2 pass through points between the center and the ends of the upper wafer 1 and the lower wafer 2.

[0058] In Fig. 7(a), the amount of deformation of the lower chuck 52 is small, and as a result, the lower wafer 2 is hardly deformed. Fig. 7(a) shows the edge Pa of the contact area between the upper wafer 1 and the lower wafer 2 and the height Ha of the upper edge of the upper wafer 1 relative to the edge Pa. The edge Pa is located outside the lines B1 and B2.

[0059] In Fig. 7(b), the amount of deformation of the lower chuck 52 is moderate, resulting in slight deformation of the lower wafer 2. Fig. 7(b) shows the edge Pb of the contact area between the upper wafer 1 and the lower wafer 2 and the height Hb of the upper edge of the upper wafer 1 relative to the edge Pb. The edge Pb is located on the straight lines B1 and B2.

[0060] In Fig. 7(c), the deformation amount of the lower chuck 52 is large, resulting in large deformation of the lower wafer 2. Fig. 7(c) shows the edge Pc of the contact area between the upper wafer 1 and the lower wafer 2 and the height Hc of the upper edge of the upper wafer 1 relative to the edge Pc. The edge Pc is located inside the lines B1 and B2.

[0061] Ends Pa, Pb, and Pc are progression stop positions where the progress of bonding between the upper wafer 1 and the lower wafer 2 stops. Straight lines B1 and B2 indicate appropriate progression stop positions. Therefore, the amount of deformation of the lower chuck 52 shown in FIG. 7(a) is too small, and the amount of deformation of the lower chuck 52 shown in FIG. 7(c) is too large. On the other hand, the amount of deformation of the lower chuck 52 shown in FIG. 7(b) is appropriate.

[0062] When the upper wafer 1 and the lower wafer 2 are bonded together, the lower chuck 52 is deformed to correct the difference in magnification between the upper wafer 1 and the lower wafer 2. Therefore, the amount of deformation of the lower chuck 52 is determined based on the difference in magnification between the upper wafer 1 and the lower wafer 2. However, if the amount of deformation of the lower chuck 52 is too small or too large, the advancement stop position will be in an inappropriate position.

[0063] As shown in FIG. 7(a), if the bonding progresses too much, the upper wafer 1 will peel off from the upper chuck 51 before the waiting state is reached, which will result in a large error in the bonding position between the upper wafer 1 and the lower wafer 2. become On the other hand, as shown in Fig. 7(c), if the progress of bonding is too small, there is a risk that the error in the bonding position between the upper wafer 1 and the lower wafer 2 will become large.

[0064] FIG. 8 is an enlarged cross-sectional view showing the operation of a semiconductor manufacturing apparatus according to a comparative example of the first embodiment.

[0065] In Fig. 8, the upward arrow indicates the suction force acting on the upper wafer 1, and the diagonal arrow indicates the tension force acting on the upper wafer 1. The tension force can be broken down into the force indicated by the downward arrow and the force indicated by the horizontal arrow. Fig. 8 also shows the angle α between the diagonal arrow and the horizontal arrow.

[0066] When the bonding between the upper wafer 1 and the lower wafer 2 progresses to a location near the edge of the upper wafer 1, the angle α increases. As a result, the downward force acting on the upper wafer 1 to peel the upper wafer 1 from the upper chuck 51 becomes greater than the upward force acting on the upper wafer 1. As a result, the upper wafer 1 peels off from the upper chuck 51 before it reaches the weight state.

[0067] FIG. 9 is a cross-sectional view showing the operation of the semiconductor manufacturing apparatus of the first embodiment.

[0068] 9(a), 9(b), and 9(c) all show the upper wafer 1 and the lower wafer 2 in the weighted state shown in FIG. 6(b). In FIG. 9(a), the deformation amount of the lower chuck 52 is small, resulting in almost no deformation of the lower wafer 2. In FIG. 9(b), the deformation amount of the lower chuck 52 is medium, resulting in slight deformation of the lower wafer 2. In FIG. 9(c), the deformation amount of the lower chuck 52 is large, resulting in significant deformation of the lower wafer 2. In this embodiment, the ends Pa, Pb, and Pc are all located on the straight lines B1 and B2.

[0069] Here, the gap G (see FIG. 6(a)) between the upper wafer 1 and the lower wafer 2 before the start of bonding will be described.

[0070] Before starting the bonding in the comparative example, the value of the gap G is set to the same value in the cases of Figures 7(a), 7(b), and 7(c). That is, in the comparative example, even if the value of the deformation amount of the lower chuck 52 is different, the value of the gap G is set to the same value.

[0071] On the other hand, before starting the bonding process of this embodiment, the value of gap G is set to different values ​​in the cases of Figures 9(a), 9(b), and 9(c). That is, in this embodiment, when the value of the deformation amount of the lower chuck 52 is different, the value of gap G is also set to different values. Specifically, the value of gap G is set so that gap G decreases as the deformation amount of the lower chuck 52 increases. For example, gap G is set to a large value in the case of Figure 9(a), and gap G is set to a small value in the case of Figure 9(c).

[0072] When the gap G becomes larger, it becomes more difficult for the upper wafer 1 to come into contact with the lower wafer 2 during bonding. Therefore, the edge Pa shown in FIG. 9(a) becomes less likely to approach the edges of the upper wafer 1 and the lower wafer 2 than the edge Pa shown in FIG. 7(a). On the other hand, when the gap G becomes smaller, it becomes more likely for the upper wafer 1 to come into contact with the lower wafer 2 during bonding. Therefore, the edge Pc shown in FIG. 9(c) becomes more likely to approach the edges of the upper wafer 1 and the lower wafer 2 than the edge Pc shown in FIG. 7(c).

[0073] Therefore, according to this embodiment, by decreasing the gap G as the deformation amount of the lower chuck 52 increases, it is possible to bring the ends Pa, Pb, and Pc closer to the straight lines B1 and B2. That is, according to this embodiment, even when the deformation amount of the lower chuck 52 is too small or too large, it is possible to set the advancement stop position at an appropriate position. The ends Pa, Pb, and Pc shown in FIGS. 9(a), 9(b), and 9(c) are all located on the straight lines B1 and B2. This makes it possible to prevent the upper wafer 1 from peeling off the upper chuck 51 before entering the wait state and to prevent an increase in the error in the bonding position between the upper wafer 1 and the lower wafer 2.

[0074] The heights Ha, Hb, and Hc are all equalized by decreasing the value of the gap G as the deformation amount of the lower chuck 52 increases, which makes it possible to align the positions of the ends Pa, Pb, and Pc.

[0075] FIG. 10 is a graph for explaining the operation of the semiconductor manufacturing apparatus of the first embodiment.

[0076] 10, the horizontal axis represents the deformation amount of the lower chuck 52, and the vertical axis represents the gap G between the upper wafer 1 and the lower wafer 2 before the start of bonding. Fig. 10 shows the relationship between the deformation amount and the gap G in this embodiment.

[0077] In this embodiment, the value of the gap G is set so that the gap G decreases as the deformation amount of the lower chuck 52 increases. This makes it possible to set the advancement stop position at an appropriate position even if the deformation amount of the lower chuck 52 changes to various values. Note that although the gap G is a linear function of the deformation amount in Fig. 10, it may also be a function that depends on the deformation amount in other ways.

[0078] FIG. 11 is a flowchart showing the operation of the semiconductor manufacturing apparatus of the first embodiment.

[0079] First, the control unit 30 (FIG. 1) acquires the value of the magnification difference between the upper wafer 1 and the lower wafer 2 (step S1). For example, a measuring device within the semiconductor manufacturing equipment of this embodiment measures the value of the magnification difference between the upper wafer 1 and the lower wafer 2 and transmits the measured value to the control unit 30. Alternatively, a measuring device outside the semiconductor manufacturing equipment of this embodiment may measure the value of the magnification difference between the upper wafer 1 and the lower wafer 2 and transmit the measured value to the control unit 30. Alternatively, a user of the semiconductor manufacturing equipment of this embodiment may input the value of the magnification difference between the upper wafer 1 and the lower wafer 2 to the control unit 30. The value of the magnification difference between the upper wafer 1 and the lower wafer 2 can be measured, for example, by detecting alignment marks on the upper wafer 1 and the lower wafer 2.

[0080] Next, the control unit 30 determines the value of the deformation amount of the lower chuck 52 based on the value of the magnification difference (step S2). In this embodiment, the value of the deformation amount is determined so that the magnification difference is reduced by controlling the deformation amount to the determined value. For example, if the value of the magnification difference acquired in step S1 is small, the value of the deformation amount is determined to be small. On the other hand, if the value of the magnification difference acquired in step S1 is large, the value of the deformation amount is determined to be large. According to this embodiment, by determining the value of the deformation amount in this manner, it is possible to correct the magnification difference between the upper wafer 1 and the lower wafer 2. In this embodiment, the value of the magnification difference after correction is smaller than the value of the magnification difference before correction.

[0081] Next, the control unit 30 determines the value of the gap G between the upper wafer 1 and the lower wafer 2 based on the value of the deformation amount (step S3). In this embodiment, the value of the gap G is determined so that the gap G decreases as the deformation amount increases. For example, if the value of the deformation amount determined in step S2 is small, the value of the gap G is determined to be large. On the other hand, if the value of the deformation amount determined in step S2 is large, the value of the gap G is determined to be small. According to this embodiment, by determining the value of the gap G in this way, it is possible to set an appropriate position as the progress stop position where the progress of bonding of the upper wafer 1 and the lower wafer 2 stops in the wait state.

[0082] Next, the control unit 30 determines the value of the pressing force with which the striker 53d (FIG. 6, etc.) presses the upper wafer 1 based on the value of the gap G (step S4). In this embodiment, the value of the pressing force is determined so that the pressing force increases as the gap G increases. For example, if the value of the gap G determined in step S3 is small, the value of the pressing force is determined to be small. On the other hand, if the value of the gap G determined in step S3 is large, the value of the pressing force is determined to be large. According to this embodiment, by determining the value of the pressing force in this manner, it is possible to press the upper wafer 1 with an appropriate pressing force.

[0083] Next, the control unit 30 controls the operation of the semiconductor manufacturing apparatus of this embodiment to bond the upper wafer 1 and the lower wafer 2 together (step S5). Specifically, before starting the bonding, the control unit 30 controls the deformation amount of the lower chuck 52 to the value determined in step S2, and also controls the gap G between the upper wafer 1 and the lower wafer 2 to the value determined in step S3. Then, the control unit 30 controls the operation of the bonding region 50 to bond the upper wafer 1 and the lower wafer 2 together, as shown in FIGS. 6(a) to 6(d). During this bonding, the control unit 30 controls the deformation amount of the lower chuck 52 to the value determined in step S2, and also controls the pressing force of the striker 53d to the value determined in step S4. Furthermore, the gap G between the upper wafer 1 and the lower wafer 2 is set to the value determined in step S3 when the bonding starts (the time shown in FIG. 6(a)). This enables the upper wafer 1 and the lower wafer 2 to be bonded together in an appropriate manner.

[0084] The semiconductor manufacturing apparatus of this embodiment bonds a plurality of upper wafers 1 and a plurality of lower wafers 2 together in pairs of upper wafer 1 and lower wafer 2. For example, the first upper wafer 1 and the first lower wafer 2 are bonded together, then the second upper wafer 1 and the second lower wafer 2 are bonded together, and then the third upper wafer 1 and the third lower wafer 2 are bonded together.

[0085] In this embodiment, the value of the gap G is determined for each pair of upper wafer 1 and lower wafer 2. For example, the gap G when bonding the first upper wafer 1 and the first lower wafer 2 is set to a first value, the gap G when bonding the second upper wafer 1 and the second lower wafer 2 is set to a second value, and the gap G when bonding the third upper wafer 1 and the third lower wafer 2 is set to a third value.

[0086] FIG. 12 is a block diagram showing the functional configuration of the control unit 30 of the first embodiment.

[0087] The control unit 30 includes a magnification difference acquisition unit 81 that executes step S1, a deformation amount determination unit 82 that executes step S2, a gap determination unit 83 that executes step S3, a pressing force determination unit 84 that executes step S4, and a bonding control unit 85 that executes step S5. Each of these functional blocks (81 to 85) may be realized by hardware or software.

[0088] These functional blocks are realized, for example, by a computer program that causes a processor in the control unit 30 to execute steps S1 to S5. In this case, the control unit 30 is provided with a computer-readable recording medium on which this program is installed. The entire program or a part of it may be downloaded to the recording medium from a network.

[0089] [Variations] 13A to 13C are cross-sectional views showing a method for manufacturing a semiconductor device according to a modification of the first embodiment.

[0090] 13(a) shows an upper wafer 1, a lower wafer 2, and an upper wafer 1' that has been previously bonded to the upper wafer 1. In this way, the upper wafer 1 that is the subject of bonding in this embodiment may be previously bonded to another upper wafer 1'.

[0091] 13(b) shows an upper wafer 1, a lower wafer 2, and a lower wafer 2' that has been previously bonded to the lower wafer 2. In this way, the lower wafer 2 that is the subject of bonding in this embodiment may be previously bonded to another lower wafer 2'.

[0092] 13(c) shows an upper wafer 1, a lower wafer 2, an upper wafer 1' previously bonded to the upper wafer 1, and a lower wafer 2' previously bonded to the lower wafer 2. In this way, the upper wafer 1 and the lower wafer 2 to be bonded in this embodiment may be previously bonded to another upper wafer 1' and another lower wafer 2', respectively.

[0093] The upper wafer 1 in Figure 13(a) or 13(c) may be bonded to two or more upper wafers 1' in advance, and the lower wafer 2 in Figure 13(b) or 13(c) may be bonded to two or more lower wafers 2' in advance.

[0094] 14A to 14C are cross-sectional views showing a method for manufacturing a semiconductor device according to another modified example of the first embodiment.

[0095] 14 shows gap G1 and gap G2 as examples of gap G. Gap G1 is a gap between the center of upper wafer 1 and the center of lower wafer 2. Gap G2 is a gap between a location other than the center of upper wafer 1 and a location other than the center of lower wafer 2. In this way, gap G in this embodiment may be defined at the centers of upper wafer 1 and lower wafer 2, or may be defined at a location other than the centers of upper wafer 1 and lower wafer 2.

[0096] As described above, the control unit 30 of this embodiment determines the value of the deformation amount of the lower chuck 52 based on the value of the magnification difference between the upper wafer 1 and the lower wafer 2, and determines the value of the gap G between the upper wafer 1 and the lower wafer 2 based on the value of the deformation amount. Furthermore, the control unit 30 of this embodiment controls the deformation amount to the determined value and controls the gap G to the determined value before starting bonding.

[0097] Therefore, according to this embodiment, it is possible to suitably bond the upper wafer 1 and the lower wafer 2. For example, it is possible to set an appropriate stop position where the progress of bonding between the upper wafer 1 and the lower wafer 2 stops in the wait state, thereby making it possible to prevent the upper wafer 1 from peeling off the upper chuck 51 before entering the wait state and to prevent an increase in the error in the bonding position between the upper wafer 1 and the lower wafer 2.

[0098] Specifically, if the bonding progresses too much, the upper wafer 1 will peel off from the upper chuck 51 before the waiting state is reached, which will result in a large error in the bonding position between the upper wafer 1 and the lower wafer 2. becomeOn the other hand, if the progress of bonding is too small, there is a risk of a large error in the bonding position between the upper wafer 1 and the lower wafer 2. According to this embodiment, these problems can be solved by setting the progress stop position, where the progress of bonding between the upper wafer 1 and the lower wafer 2 stops in the wait state, to an appropriate position.

[0099] Although several embodiments have been described above, these embodiments are presented only as examples and are not intended to limit the scope of the invention. The novel apparatus and method described herein may be embodied in various other forms. Furthermore, various omissions, substitutions, and modifications may be made to the forms of the apparatus and method described herein without departing from the spirit of the invention. The appended claims and their equivalents are intended to cover such forms and modifications that fall within the scope and spirit of the invention. [Explanation of symbols]

[0100] 1: upper wafer, 1': upper wafer, 1a: wafer, 1b: interlayer insulating film, 1c: metal pad, 2: lower wafer, 2': lower wafer, 2a: wafer, 2b: interlayer insulating film, 2c: metal pad, 3: Bonded wafer, 4: Cassette, 5: Cassette, 6: Cassette, 10: wafer transport unit, 11: placement unit, 11a: placement table, 12: Transport unit, 12a: Transport path, 12b: Transport robot, 20: wafer processing section, 21: transport block, 21a: transport robot, 22: Processing block, 23: Processing block, 24: Processing block, 25: processing block, 25a: inner wall, 25b: entrance / exit, 30: control unit, 40: conveying area, 41: conveying module, 42: position adjustment module, 42a: base, 42b: detector, 43: reversal module, 43a: holding arm, 43b: holding member, 43c: driving part, 43d: support, 50: bonding area, 51: upper chuck, 52: lower chuck, 53: upper chuck support portion, 53a: upper imaging unit, 53b: support member, 53c: support column, 53d: striker, 54: Lower chuck moving part, 54a: Lower imaging part, 55: Rail, 56: Lower chuck moving part, 57: Rail, 58: Placement table, 61: through hole, 62: suction pipe, 63: suction pipe, 64: actuator, 65: Cylinder, 66: Vacuum pump, 67: Vacuum pump, 71: base, 72: placement part, 73: measurement part, 74: suction tube, 75: Ventilation hole, 76: Vacuum pump, 77: Deformed portion, 77a: switching valve, 77b: regulator, 77c: vacuum pump, 81: Magnification difference acquisition unit, 82: Deformation amount determination unit, 83: Gap determination unit, 84: Pressing force determination unit, 85: Bonding control unit

Claims

1. a magnification difference acquisition unit that acquires a value of the magnification difference between the first substrate and the second substrate; a deformation amount determining unit that determines a value of a deformation amount of a chuck that holds the first or second substrate based on the value of the magnification difference; a gap determination unit that determines a value of a gap between the first substrate and the second substrate based on the value of the deformation amount; a bonding control unit that controls the deformation amount to the determined value and controls the gap to the determined value before bonding the first substrate and the second substrate together; Equipped with The gap determination unit determines the value of the gap so that the combination of the deformation amount and the gap is an optimal combination that reduces an error in the bonding position between the first substrate and the second substrate.

2. 2. The semiconductor manufacturing apparatus according to claim 1, wherein the deformation amount determining unit determines the value of the deformation amount so that the magnification difference is reduced by controlling the deformation amount to the determined value.

3. A magnification difference acquisition unit that acquires a value of the magnification difference between the first substrate and the second substrate; a deformation amount determining unit that determines a value of a deformation amount of a chuck that holds the first or second substrate based on the value of the magnification difference; a gap determination unit that determines a value of a gap between the first substrate and the second substrate based on the value of the deformation amount; a bonding control unit that controls the deformation amount to the determined value and controls the gap to the determined value before bonding the first substrate and the second substrate together; Equipped with The gap determination unit determines a value of the gap so that the gap decreases as the amount of deformation increases.

4. 4. The semiconductor manufacturing apparatus according to claim 1, wherein the gap determining unit determines a value of the gap between the center of the first substrate and the center of the second substrate.

5. a pressing force determination unit that determines a value of a pressing force to press the first or second substrate based on the value of the gap; The semiconductor manufacturing apparatus according to claim 1 , wherein the bonding control unit controls the pressing force to the determined value when bonding the first substrate and the second substrate together.

6. 6. The semiconductor manufacturing apparatus according to claim 5, wherein the pressing force determining unit determines a value of the pressing force used to press the center of the first or second substrate.

7. 7. The semiconductor manufacturing apparatus according to claim 5, wherein the pressing force determination unit determines a value of a pressing force for pressing the first substrate, and the deformation amount determination unit determines a value of a deformation amount of a chuck that holds the second substrate.

8. The semiconductor manufacturing apparatus according to claim 1 , further comprising a bonding unit that is controlled by the bonding control unit and bonds the first substrate and the second substrate together.

9. 9. The semiconductor manufacturing apparatus according to claim 8, wherein the bonding unit comprises a suction unit that sucks the first substrate and a pressing unit that presses the first substrate.

10. the lamination unit includes a first support unit that supports a chuck that holds the first substrate, and a second support unit that supports a chuck that holds the second substrate, 10. The semiconductor manufacturing apparatus according to claim 8, wherein the gap is controlled to the determined value by the bonding control section controlling the first or second support section.

11. Obtaining a value of the magnification difference between the first substrate and the second substrate; determining a value of a deformation amount of a chuck that holds the first or second substrate based on the value of the magnification difference; determining a gap value between the first substrate and the second substrate based on the deformation amount; before bonding the first substrate and the second substrate together, controlling the deformation amount to the determined value and controlling the gap to the determined value; This includes: A method for manufacturing a semiconductor device, wherein the value of the gap is determined so as to provide an optimal combination of the deformation amount and the gap that reduces an error in the bonding position between the first substrate and the second substrate.

12. The method for manufacturing a semiconductor device according to claim 11 , wherein the value of the gap is determined for each pair of the first and second substrates.

13. Obtaining a value of the magnification difference between the first substrate and the second substrate; determining a value of a deformation amount of a chuck that holds the first or second substrate based on the value of the magnification difference; determining a gap value between the first substrate and the second substrate based on the deformation amount; before bonding the first substrate and the second substrate together, controlling the deformation amount to the determined value and controlling the gap to the determined value; This includes: A method for manufacturing a semiconductor device, wherein a value of the gap is determined so that the gap decreases as the amount of deformation increases.

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