Load drive system and method, railway vehicle and operation method

Abstract

To provide a load drive system capable of reducing a torque shock by reactivating the system at a motor rotational speed accurately estimated by suppressing a current off-set error at a free running.SOLUTION: A load drive system comprises: an inverter control circuit that controls an inverter and a switching of the inverter; a current detection circuit that detects a current flowing in a load when a terminal of a load is short-circuited by them; a plurality of frequency filters into which the current detected is input; a selection circuit that selects any one of a plurality of outputs by a determination reference based on a band and an output of each filter. In the load drive system that a free running reactivation is performed by the inverter frequency based on the selection output, an inverter frequency calculation circuit that is connected to an output side of each of the frequency filters, and calculates an inverter frequency for performing the free running reactivation is provided, in which the selection circuit after the step selects one output of the plurality of inverter frequency calculation circuits.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a load drive system that allows smooth restart of a free run, a railway vehicle equipped with the same, a load drive method, and a railway vehicle operation method that applies the same. [Background technology]

[0002] In systems using a motor as a drive source, there are cases where the motor continues to rotate even when its power supply is off. Examples include coasting periods in railways and periods when the accelerator pedal is off in electric vehicles. This state (typically, a state in which the motor continues to rotate by inertia even when the power supply from the inverter to the motor is cut off while the motor is rotating) is called "free-running," and restarting a free-running motor is called "free-run restart." In free-run restart, the rotor position or rotational speed of the motor is estimated, and the inverter is controlled based on this estimated value. If there is an error in the estimated speed value, torque shock occurs, resulting in a deterioration in ride comfort, so high estimation accuracy is required. Therefore, technology has been disclosed that suppresses torque pulsation by removing offset errors, which cause torque shock, from three-phase AC current (for example, Patent Document 1).

[0003] The motor control device in Patent Document 1 is equipped with a filter section that blocks specific frequency components from passing through the three-phase AC current input from the motor's three-phase AC current detection circuit to the current conversion section. It also proposes using a high-pass filter that changes its passband according to the motor rotation speed as the filter section. This removes offset errors superimposed on the three-phase AC current, thereby suppressing torque pulsation.

[0004] To detect the motor rotation speed that serves as the reference for the passband, a resolver can be installed, or it can be estimated from the three-phase AC current flowing through the motor, as in Reference 1, with the latter being preferable from a cost perspective. However, with coast-to-coast restart, three-phase AC current does not flow until restart begins, and the motor rotation speed is unknown. As a result, the passband of the filter cannot be set, and the offset error in the three-phase AC current cannot be removed. If coast-to-coast restart is initiated in this state, the offset error in the three-phase AC current will cause an error in the estimated motor rotation speed. As a result, restarting at a motor rotation speed based on an inaccurate estimate will generate a torque shock, resulting in vibration and noise. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-273302 Summary of the Invention [Problem to be solved by the invention]

[0006] The object of the present invention has been made in consideration of the above-mentioned problems, and its purpose is to provide a load drive system that can reduce torque shock that causes vibration and noise by suppressing current offset error during free running and restarting at an estimated motor rotation speed. [Means for solving the problem]

[0007] The present invention, which solves the above problems, comprises an inverter, an inverter control circuit which controls the switching of the inverter, a current detection circuit which detects the current flowing through the load when the inverter control circuit shorts the terminals of the load, a plurality of frequency filters which receive the detected current as an input, and a selection circuit which selects one of the plurality of outputs based on criteria based on the band and output of each of the plurality of frequency filters, and which free-runs and restarts the load using an inverter frequency based on the selected output as the drive frequency, and further comprises inverter frequency calculation circuits which are connected to the output side of each of the plurality of frequency filters and which calculate the inverter frequency for free-run restart, and the selection circuit is provided after the plurality of inverter frequency calculation circuits and selects one output. [Effects of the Invention]

[0008] According to the present invention, a load drive system can be provided that can reduce torque shock that causes vibration and noise by suppressing current offset error during free-running and restarting at an accurately estimated motor rotation speed. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a configuration diagram of a load driving system according to a first embodiment of the present invention. [Figure 2] FIG. 2 is an internal configuration diagram of an inverter frequency calculation circuit 6a. [Figure 3] FIG. 10 is a waveform diagram at the time of restarting the free run. [Figure 4] FIG. 10 is a waveform diagram relating to the first HPF 5a to the third HPF 5c. [Figure 5] 4 is a flowchart showing the operation of the selection circuit 7. [Figure 6] FIG. 10 is a configuration diagram of a main part of a load driving system according to a second embodiment. [Figure 7A] FIG. 10 is a waveform comparison diagram when there is no phase overflow detector 62c. [Figure 7B] FIG. 10 is a waveform comparison diagram when a phase overflow detector 62c is provided. [Figure 8] FIG. 10 is an explanatory diagram relating to the current value / past value of the phase difference. [Figure 9] FIG. 10 is a configuration diagram of a load driving system according to a third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. [Example]

[0011] FIG. 1 is a configuration diagram of a load driving system according to a first embodiment. Each component will be described below. A motor 1 is a driving source for the load driving system. An inverter 2 generates a DC voltage E cf The DC voltage is converted to AC voltage using a switching element and applied to the motor 1. The capacitor 3 converts the DC voltage E cf The current detection circuit 4 detects the U-phase current i of the motor 1. u ,V phase current i v , W phase current i w The detected values ​​of the current detection circuit 4 for each phase are hereinafter referred to as the current detection values ​​i uf ,i vf ,i wf Or simply the detected value i uf ,i vf ,i wf Let's say.

[0012] The high-pass filter (HPF) group 5 includes a first HPF 5a, a second HPF 5b, and a third HPF 5c. Each of the first to third HPFs receives a detection value i uf ,i vf ,i wf The U-phase, V-phase, and W-phase outputs of the first HPF 5a are respectively input as i us ,i vs ,i ws and the HPF output i us ,i vs ,i ws The high-pass filter (HPF) group 5 illustrated in the first to third embodiments may also be referred to as a frequency filter (band-pass filter) 5 as a higher-level concept.

[0013] The inverter frequency calculation circuit group 6 includes a first inverter frequency calculation circuit 6a, a second inverter frequency calculation circuit 6b, and a third inverter frequency calculation circuit 6c, and calculates an inverter frequency ω based on inputs of the high-pass filters HPF 5a, 5b, and 5c. a ,ω b ,ω c Calculate the following.

[0014] 2 shows the internal configuration of the first inverter frequency calculation circuit 6a. The first inverter frequency calculation circuit 6a is composed of a current phase calculation unit 61 and a PLL unit 62. First, in the current phase calculation unit 61, a three-phase / two-phase conversion unit 61a converts the α-axis current i α , β-axis current i β is calculated, and the current phase θ i is calculated.

[0015] Here, the current phase θ i is the HPF output i us ,i vs ,i ws Since it is equivalent to the phase of the current vector defined by i The rate of change of the HPF output i us ,i vs ,i ws Next, in the PLL unit 62, a PLL (Phase Locked Loop) consisting of a PI control unit 62a and an integration unit 62b determines the phase difference Δθ and the inverter frequency ω inv , PLL output phase θ PLL is calculated. Depending on the stability of the PLL, θ PLL is θ i In order to synchronize with θ PLL The rate of change of the inverter frequency ω inv is the HPF output i us ,i vs ,i ws The frequency of the

[0016] However, in this system, the HPF output i us ,i vs ,iws Even if the frequencies of the HPFs 5a to 5c are the same, if a phase difference occurs depending on the difference in the set frequencies of the HPFs 5a to 5c, it can cause a shock when switching. To avoid this, this system uses the inverter frequency calculation circuit group 6 in Figure 2 to convert AC amounts into DC amounts so that the phase difference component does not affect inverter control. The selection circuit 7 selects the inverter frequency ω a ,ω b ,ω c Select one of these and set the selected inverter frequency to ω inv The three inverter frequencies ω a ,ω b ,ω c is a DC voltage proportional to the frequency, and the AC quantity is converted into a DC quantity.

[0017] In this system, when the selection circuit 7 switches between the three HPFs 5a to 5c, the phase difference caused by the differences between the HPFs 5a to 5c is an AC quantity and is not converted into a DC quantity, so it does not have any adverse effects. Similarly, the inverter frequency calculation circuit group 6 converts DC voltages based on the same frequency into roughly the same voltage. Therefore, even if the selection circuit 7 switches between the three HPFs 5a to 5c, the inverter frequency ω inv Therefore, motor 1 is not subjected to any shock.

[0018] The inverter control circuit 8 receives the restart signal g on When g is Low, all of the gate signals g1 to g6 are turned off, and the switching of the inverter 2 is stopped. on When is High, the terminals of the motor 1 are shorted by turning on the gate signals g1, g3, and g5 of the upper arms of the U, V, and W phases, or the gate signals g2, g4, and g6 of the lower arms for a certain period of time. After that, the fundamental frequency of the output voltage of the inverter 2 becomes equal to the inverter frequency ω inv The gate signals g1 to g6 are determined based on PWM control so that: The above are the components of Example 1. Next, free-run restart will be described.

[0019] Figure 3 shows the waveform diagram of the free-run restart. Until time t1, the restart signal g on is Low, and gate signals g1 to g6 are OFF. In FIG. 3, only the gate signals g1 and g2 of the upper and lower arms of the U phase are shown among g1 to g6. Since all the switching elements of the inverter 2 are OFF, u ,i v ,i w are all zero, and the torque of motor 1 is also zero, but the driving frequency ω r is not necessarily zero.

[0020] Free-run restart means that the drive frequency ω r This is a technology that restarts the inverter in an unknown state, and in order to smoothly start up the torque of motor 1, the drive frequency ω r and inverter frequency ω inv It is necessary to start PWM control by the inverter control circuit 8 with these two signals being matched.

[0021] Therefore, by some means, the driving frequency ω r is estimated and used as the inverter frequency ω inv It is required to set the initial value of the drive frequency ω r To estimate g at time t1 in Figure 3, on After the signal changes to High, the inverter control circuit 8 turns on g2, g4, and g6, and the terminals of the motor 1 are short-circuited.

[0022] As a result, for example, (1) when motor 1 is a magnet motor, or (2) when motor 1 is an induction motor and there is residual magnetic flux in the rotor, the drive frequency ω r i with the same frequency as u is playing.

[0023] i u The offset i is calculated according to the phase of the residual magnetic flux at time t1. ofs Since it contains i ofsThe signal after removing the influence of is input to the inverter frequency calculation circuit group 6, and the selection circuit 7 a ,ω b ,ω c By selecting either one of the inverter frequency ω inv is the driving frequency ω r The time when this convergence is completed is set to t2, and PWM control by the inverter control circuit 8 is started at this timing, allowing the torque of the motor 1 to rise smoothly. This is the outline of the coast-to-restart.

[0024] We will explain the free-run restart issue. ofs To remove,i u The frequency of the drive frequency ω r However, an HPF with a passband of ω is required. r is unknown at time t1 in FIG. 3, and the passband cannot be set at that time.

[0025] Therefore, offset i ofs is not removed, and the driving frequency ω r and inverter frequency ω inv This frequency error causes the inverter frequency ω inv Even if the passband is variable based on ofs is not eliminated and causes further frequency errors.

[0026] In this way i ofs The passband of the HPF to remove the driving frequency ω r is known, but the drive frequency ω r To estimate the offset i ofs This is the issue when restarting a free run.

[0027] In the present invention, the driving frequency ω r Even if the state is unknown, ofs The driving frequency ω r and inverter frequency ω invThe frequency filter 5, inverter frequency calculation circuit group 6, and selection circuit 7 are provided as components for matching the frequencies, and the operating principles of these components will be explained below. Note that the frequency filter 5 is a generic term for the HPF group 5, which includes the first HPF 5a to the third HPF 5c.

[0028] FIG. 4 shows waveform diagrams relating to the first HPF 5a to the third HPF 5c. HPF1 ~ω HPF3 is, "ω HPF1 < ω HPF2 < ω HPF3 ", and ω HPF2 The highest driving frequency ω r In the first HPF 5a, the HPF1 < ω r ", so an offset remains in the HPF output.

[0029] For this reason, the θ i As shown in Figure 4, the distortion and drive frequency ω r and the first inverter frequency ω a In the second HPF 5b, an error of "ω HPF2 ≒ ω r " to offset the HPF output. ofs does not remain, and the driving frequency ω r and the second inverter frequency ω b matches.

[0030] In the third HPF 5c, "ω HPF3 > ω r Since the HPF output is zero, the θ i becomes zero as shown at B in Figure 4, and the third inverter frequency ω c The selection circuit 7 selects the appropriate inverter frequency as ω a ,ω b ,ω c To select from the above, the operation is performed according to the flowchart shown in Fig. 5. In steps S1 and S2 of Fig. 5, the criteria for switching the selection circuit 7 are based on the outputs of the first to third HPFs 5a to 5c.

[0031] In step S1, the output is set to the threshold i th The inverter frequency calculated based on the HPF having a passband of ω 1 or more is selected. r In the following HPF, the output is non-zero, so ω a ,ω b is selected in step S1. In step S2, the inverter frequency calculated based on the HPF with the largest bandwidth among the inverter frequencies selected in step S1 is selected. That is, ω a ,ω b ω b In this way, the selection circuit 7 utilizes the following property shown in FIG.

[0032] (1) The passband is at the driving frequency ω r Above this, the HPF output becomes zero. (2) The passband is at the driving frequency ω r The following HPFs have non-zero outputs: (3) The higher the passband of the HPF, the greater the offset i ofs can be removed.

[0033] In step S1, inverter frequencies based on HPFs corresponding to (1) above are excluded, and inverter frequencies based on HPFs corresponding to (2) are left. In step S2, inverter frequencies based on HPFs corresponding to (3) are selected from among inverter frequencies based on HPFs corresponding to (2).

[0034] These steps result in a drive frequency ω r Below, and the lowest driving frequency ω r Therefore, the inverter frequency ω selected by the selection circuit 7 can be selected based on the HPF having a passband close to inv is the driving frequency ω r It is possible to converge to

[0035] The above is the operating principle of the HPF group 5, inverter frequency calculation circuit group 6 and selection circuit 7. r Even if the offset i is unknown, ofs The driving frequency ω r and inverter frequency ω inv As a result, torque shock when restarting from a coasting state is prevented, contributing to the reduction of vibration and noise in the load drive system.

[0036] The HPF group 5 in Figure 1 has multiple HPFs with different passbands, and in addition, the detection value i uf ,i vf ,i wf In other words, an HPF with a passband of 0 Hz can be added. In the free-run restart, motor 1 may be stopped. If motor 1 is an induction motor and there is residual magnetic flux in the rotor, the detected value i uf ,i vf ,i wf This is because it is observed as a DC component.

[0037] In this case, the flowchart in Figure 5 can be applied as is, and the detected value i uf ,i vf ,i wf Since is a DC component, only the inverter frequency based on the HPF with a passband of 0 Hz is selected in step S1, and that inverter frequency is uniquely selected in step S2.

[0038] DC component detection value i uf ,i vf ,i wf is input to the first inverter frequency calculation circuit 6a, the inverter frequency ω a is zero, and since this is selected, the inverter frequency ω inv In this way, the selection circuit 7 can also detect the stop of the motor 1 by including the current detection value as one of the options.

[0039] The residual magnetic flux of motor 1 is converted into a short-circuit current, which is gradually lost as Joule heat. Therefore, strictly speaking, the U-phase current in Figure 3 is i u Its amplitude and offset i' are shown in ofs 5 changes over time, but by calculating multiple inverter frequencies in parallel in the inverter frequency calculation circuit group 6, it is possible to reduce the shock at the time of switching.

[0040] Offset i ofs If it is only necessary to eliminate the influence of the inverter frequency ω, the selection circuit 7 may be provided between the high-pass filter group 5 and the inverter frequency calculation circuit group 6, and the high-pass filters 5a to 5c may be selected. inv There is a problem of shock occurring.

[0041] Similarly, it is also conceivable to divide the inverter control circuit 8 and the inverter 2 into several types of functions (not shown), and provide a selection circuit 7 between the inverter control circuit 8 and the inverter 2 to select the inverter control circuit 8, or to provide a selection circuit 7 between the inverter 2 and the motor 1 to select the inverter 2.

[0042] However, the inverter frequency ω inv is a DC amount, while the gate signals g1 to g6, U-phase current i u ,V phase current i v , W phase current i w Since all of the inverters are AC, they cannot be switched smoothly at any time. When switching AC power, not only the frequency but also the phase must be matched before switching, otherwise a switching shock will occur. To avoid this, the inverter frequency ω inv It is best to convert it to a DC value before switching.

[0043] By doing so, even if the selection circuit 7 is switched multiple times when shifting from coasting to powering once, the shocks that occur before and after the switching can be reduced. For this reason, it is desirable to provide the selection circuit 7 between the inverter frequency calculation circuit group 6 and the inverter controller 8. As a result, this system can reduce the inverter frequency ω selected by the selection circuit 7. inv is the driving frequency ω r This increases the effect of reducing the impact when converging. [Example]

[0044] 6 is a configuration diagram of the main parts of a load driving system according to Example 2. In Example 2, a PLL unit 62 includes a phase overflow (hereinafter sometimes abbreviated as "phase OF" or simply "OF") detection unit 62c, an OF count calculation unit 63, and a phase difference correction unit 64, and the internal configuration of each will be described below.

[0045] The phase OF detection unit 62c includes a delay element 62d, absolute value calculation units 62e and 62f, threshold value determination units 62g and 62h, and a logical product unit 62i. Figures 7A and 7B show waveform comparison diagrams with and without the phase OF detection unit 62c. However, in the range shown in Figures 7A and 7B, the selection circuit 7 a is selected, and "ω inv = ω a "

[0046] As shown in FIG. 7A, when the phase OF detector 62c is not provided, the inverter frequency ω inv is the driving frequency ω r In the process of converging to , it is possible that Δθ exceeds +π [rad] and changes discontinuously to -π [rad].

[0047] The time when this discontinuous change occurs is ta. After time ta, while Δθ is negative, the inverter frequency ω inv decreases, and the driving frequency ω r When Δθ becomes positive, the difference between the inverter frequency ω invHowever, the same phenomenon is repeated thereafter, and Δω remains at the predetermined time t2, causing a torque shock. To prevent this, the phase OF detection unit 62c sets the phase OF detection flag F when Δθ exceeds ±π. ovr Set to 1. Below, F ovr This shows that it can be output correctly.

[0048] In Figure 6, "F ovr = 1" when the following (x) and (y) are both established by the threshold value determination units 62g and 62h and the logical product unit 62i. (x) Current value of Δθ now and past value Δθ old The positive and negative signs of are different. (y)Δθ now and Δθ old The sum S of the absolute values ​​of each is greater than or equal to π [rad]. If (x) holds, then Δθ now ,Δθ old The signs of are negative and positive or positive and negative, which are represented by cases A and B in Figure 8, respectively.

[0049] 8 is an explanatory diagram of the current value / past value of the phase difference. Here, Δθ in FIG. old ,Δθ now The arc that passes through the reference axis (Δθ = 0) is called p (dotted line), and the arc that does not pass through the reference axis is called q (solid line). old From Δθ now The change to takes either path p or q, and if the calculation period of the phase OF detection unit 62c is sufficiently short, it is reasonable to consider that the change takes the shorter path.

[0050] Since S of (y) is the angle formed by p, if (y) is true, q is shorter than p. Therefore, Δθ old From Δθ now The change to is q, and since the change includes ±π [rad], OF occurs. Conversely, the cases in which OF occurs are either Case A or B in Figure 8, so if OF occurs, then "F ovr= 1. From the above, with the configuration shown in Figure 6, ovr can be output correctly.

[0051] As shown in FIG. 6, the OF count calculation unit 63 is composed of threshold determination units 63a and 63b, logical product units 63c and 63d, and a delay element 63e. pn represents the direction of increase or decrease of Δθ when OF occurs, and is defined as 1 and -1 when Δθ is increasing or decreasing, respectively. cnt represents the cumulative number of OFs. However, the number of OFs in the Δθ increasing and decreasing directions are counted offsetting each other. Below, F pn and N cnt This shows that it is possible to calculate

[0052] "F pn = 1" is the case when "F ovr = 1" holds, and Δθ now is negative. This corresponds to case A in Figure 8, and Δθ old From Δθ now The direction of change to is represented by arrows j and k. As the arrow direction shows, Δθ in Case A is increasing, and conversely, the direction of increase in Δθ when OF occurs is limited to Case A. Therefore, following the discussion in reverse, we can say that "F pn = 1" holds true.

[0053] Therefore, "F pn "F = 1" is equivalent to Δθ increasing when OF occurs. pn The same is true for "N = -1". cnt is fed back using a delay element 63e as shown in FIG. pn It is clear that the cumulative number of OFs can be counted by calculating the integral value of F. pn and N cnt can be calculated correctly.

[0054] The phase difference correction unit 64 is cnt Based on the expanded phase difference Δθ c Calculate Δθ cis a variable that allows Δθ to be calculated beyond ±π [rad]. As shown in Figure 7B, when Δθ exceeds π [rad] at time ta, "F ovr :0→1", "F pn :0→1", "N cnt :0→1".

[0055] Here, as shown in Figure 6, c = Δθ + 2π N cnt " Therefore, Δθ c changes continuously over π [rad]. c is input to the PI control unit 62a in FIG. 6, the stability of the PLL is maintained, and the inverter frequency ω inv is the driving frequency ω r Finally, at time tb in Figure 7B, Δθ c is less than π [rad], and "F ovr :0→1", "F pn :0→-1", "N cnt1 →0". After tb, "N cnt = 0' and Δθ c and Δθ coincide and converge to zero. As a result, at t2, the inverter frequency ω inv is the driving frequency ω r converges to.

[0056] As described above, by providing the phase OF detection unit 62c, the OF count calculation unit 63, and the phase difference correction unit 64, the inverter frequency ω inv is the driving frequency ω r This makes it possible to prevent torque shock in the following cases:

[0057] (1) When motor 1 is designed for high speed in order to achieve high efficiency. (2) When the calculation period of the PI control unit 62a is set long to reduce the CPU load, and KP (proportional gain) and KI (integral gain) are reduced to ensure the stability of the PLL. (3) Detected value i uf ,i vf,i wf θ due to detection error or quantization error i When KP and KI are decreased to reduce Δω due to the error of

[0058] The above is the effect of the second embodiment, and the processing required for this can be summarized as follows: Phase OF detector 62c: θ i and θ PLL It is detected that the difference Δθ is ±π [rad]. OF count calculation unit 63:N cnt Count. ·Phase difference correction section 64:N cnt Add the product of and 2π [rad] to Δθ. [Example]

[0059] 9 is a configuration diagram of a load drive system according to Example 3. The load drive system according to Example 3 includes a plurality of motors 1, wheels 9 connected to the motors 1, a wheel wear amount detection unit 10, and a railway vehicle 11, and receives power from an overhead line 12. The wheel wear amount detection unit 10 detects inverter frequencies ω inv1 ~ω inv4 If there is a variation in these, it is determined that wear has occurred on a specific wheel 9, and a wear detection flag F is set. w The inverter frequency ω inv1 ~ω inv4 This section explains why wear can be detected from variations in the

[0060] Unless the wheels 9 spin, the amount of rotation of the wheels 9 per unit time is the same for all wheels. Therefore, if only a specific wheel 9 is worn, the rotation speed of that wheel 9 becomes relatively high, and the inverter frequency ω invj (j = 1~4) also becomes relatively high.

[0061] Therefore, the inverter frequency ω invjBy detecting the variation in (j = 1 to 4), it can be determined that wear has occurred in a specific wheel 9. r Even if there is no detection unit, it is possible to detect wear on a specific wheel 9 and extend the maintenance interval. This makes it possible to reduce the maintenance costs of the railway vehicle 11.

[0062] The load driving system (this system) according to the embodiment of the present invention can be summarized as follows. [1] This system comprises an inverter 2, an inverter control circuit 8 that controls the switching of the inverter 2, an inverter frequency calculation circuit group 6, a current detection circuit 4, a frequency filter (band-pass filter) 5, and a selection circuit 7. This system coasts and restarts a load motor 1 using an inverter frequency based on the output selected by the selection circuit 7 as the drive frequency. This system is characterized in that it further comprises an inverter frequency calculation circuit group 6 that is connected to the output side of each of multiple frequency filters HPF 5a, 5b, 5c and calculates the inverter frequency for coasting and restarting, and that the selection circuit 7 is provided after the multiple inverter frequency calculation circuits 6a to 6c and selects one output.

[0063] Instead of being equipped with a resolver, the motor 1, which has residual magnetic flux in the rotor, can detect the rotation speed from the three-phase AC current that accompanies the rotation. In this system, when the motor 1 is restarted while coasting, the drive frequency ω r Estimate.

[0064] Therefore, the inverter control circuit 8 shorts the terminals of the motor 1 while stopping the inverter output, thereby preventing the three-phase AC current i generated from the motor 1 during coasting and idling. u ,i v ,i w In this short-circuit state, the current detection circuit 4 detects the current i generated by the idling of the motor 1. u ,i v ,i w Detection value i for uf ,i vf ,i wfDetect.

[0065] Current i generated by idling of motor 1 u ,i v ,i w The offset i according to the phase of the residual magnetic flux is ofs The frequency filter 5 includes the detected value i uf ,i vf ,i wf The output of the frequency filter 5 is divided into different passbands and output. Of the divided outputs, the output that has passed through the desired passband has an offset i ofs The desired passband is the drive frequency ω of the motor 1. r passes through, but offset i ofs This refers to the frequency band that eliminates

[0066] The inverter frequency calculation circuit group 6 calculates the output i distributed by the frequency filters HPF 5a, 5b, and 5c. us ,i vs ,i ws From each, the inverter frequency ω a ,ω b ,ω c The selection circuit 7 selects one of the outputs from a plurality of frequency filters HPF 5a, 5b, 5c that receive the detected current as input, based on a judgment criterion based on the band and output of each of the plurality of frequency filters. The selection circuit 7 calculates the inverter frequency ω calculated by the inverter frequency calculation circuit group 6 based on the outputs corresponding to the pass bands of the frequency filters HPF 5a, 5b, 5c. a ,ω b ,ω c Select one of the outputs ω inv The selection circuit 7 is provided at the subsequent stage of the plurality of inverter frequency calculation circuits 6a, 6b, 6c and selects one output.

[0067] That is, the inverter frequency ω is output from the frequency filters HPF 5a, 5b, and 5c having different passbands. a ,ω b ,ω cis calculated, and the detected value i that has passed through the desired passband is uf ,i vf ,i wf Inverter frequency ω based on inv is selected.

[0068] Thus, offset i ofs In order to eliminate the influence of the inverter frequency ω based on the output signal of the frequency filter HPF 5 with the desired passband, inv is the appropriate driving frequency ω r In other words, when the free-run restart occurs, the driving frequency ω r The inverter frequency ω is synchronized to match the phase inv is obtained.

[0069] Once this convergence is complete, PWM control by the inverter control circuit 8 begins, allowing for a smooth rise in the torque of the motor 1. As a result, this system can reduce torque shocks that cause vibrations and noise by suppressing current offset errors during free-running and restarting the motor at an accurately estimated motor rotation speed.

[0070] [2] The selection circuit 7 may perform a selection operation multiple times during one initial speed estimation. In this case, the criterion for switching is based on the output of the HPF 5, but the objects of switching are the sets of the HPFs 5a to 5c and the corresponding first to third inverter frequency calculation circuits 6a to 6c provided in the subsequent stages. In this system, the frequency filters HPFs 5a to 5c having the optimum passbands are selected multiple times during one initial speed estimation, thereby reducing the offset i ofs The influence of

[0071] This system allows for more precise optimal control and can enhance the torque shock reduction effect. For example, when this system is applied to a railway vehicle 11, the selection circuit 7 performs fine switching multiple times during the initial speed estimation each time the vehicle shifts from coasting to powering, thereby enhancing the shock mitigation effect and achieving a good ride comfort with reduced torque shock.

[0072] [3] The selection circuit 7 selects the inverter frequency ω based on the outputs of the frequency filters HPF 5a, 5b, and 5c that are assigned to different passbands. a ,ω b ,ω c Among these, the outputs of the frequency filters HPF 5a to HPF 5c are equal to or greater than a predetermined value, and the inverter frequency ω is determined based on the output having the highest frequency band. inv It is preferable to select the drive frequency ω r Regardless of the offset i ofs The noise related to this often contains low frequency components.

[0073] In addition, the frequency filter 5 in this system has a higher passband setting for the HPF, which reduces the offset i ofs is easily removed, and the inverter frequency selected by the selection circuit 7 is referenced by the output of the frequency filter 5, and the offset i ofs The noise components related to the driving frequency ω r As a result, this system can reduce torque shock more effectively.

[0074] [4] The frequency filter 5 filters the input detection value i, which also contains a direct current (DC) component. uf ,i vf ,i wf However, it would be good to have the option to output it directly without passing it through the filter function. In particular, when motor 1 is stopped, the detected value of the DC component i uf ,i vf ,i wf is input to one inverter frequency calculation circuit in the inverter frequency calculation circuit group 6.

[0075] The inverter frequency calculation circuit group 6 calculates and outputs the inverter frequency as zero. Since the selection circuit 7 selects such a calculation output of frequency zero, the inverter frequency ω inv In this system, the selection circuit 7 selects the inverter frequency ω based on the current detection value of the DC component. inv By including this as one of the options, it is also possible to detect the stop of motor 1.

[0076] [5] The inverter frequency calculation circuit group 6 is the HPF output i of the frequency filter 5. us ,i vs ,i ws Based on the current phase θ i and a current phase calculation unit 61 that calculates the current phase θ i It is preferable to provide a PLL unit 62 that receives the current phase θ i The rate of change of the HPF output i us ,i vs ,i ws The frequency of the

[0077] In the PLL unit 62, a phase difference Δθ and an inverter frequency ω are calculated by a PLL consisting of a PI control unit 62a and an integration unit 62b. inv , PLL output phase θ PLL The PLL output phase θ PLL is the current phase θ i In order to synchronize with θ PLL The rate of change of the inverter frequency ω inv is the HPF output i us ,i vs ,i ws The frequency of the

[0078] By providing this PLL unit 62 and employing PLL control, the present system can improve its ability to respond to reality. For example, in an implemented environment, if there is a lot of noise and the S / N ratio is degraded, the present system stabilizes by lowering the KP (proportional gain) and KI (integral gain) provided in the PLL unit 62. Conversely, if there is little noise and the S / N ratio is good, the present system improves responsiveness by increasing the KP and KI. As a result, the present system is more practical and can reduce torque shock.

[0079] [6] In the above-mentioned first embodiment, the first inverter frequency calculation circuit 6a shown in Fig. 2 does not have the phase OF detection unit 62c shown in Fig. 6. In this case, as shown in Fig. 7A, when Δθ exceeds +π [rad] and discontinuously changes to -π [rad], the ability to distinguish between forward and reverse directions is lost, and the true drive frequency ω r As a result, the inverter frequency ω inv is the driving frequency ω r may not be able to converge to

[0080] Therefore, as shown in Fig. 6 as a second embodiment, in the present system described in [5] above, it is preferable that the PLL unit 62 includes a phase OF detection unit 62c, an OF count calculation unit 63, and a phase difference correction unit 64. In the phase OF detection unit 62c, F is calculated every time Δθ exceeds ±π. ovr The OF count calculation unit 63 can correctly output the cumulative number of OFs N cnt Count.

[0081] The phase difference correction unit 64 calculates the cumulative number N of OFs. cnt Based on the expanded phase difference Δθ c Calculate Δθ c is a variable that allows Δθ to be calculated beyond ±π [rad]. As shown in Figure 7B, when Δθ exceeds π [rad] at time ta, "F ovr :0→1", "F pn :0→1", "N cnt :0→1”. Here, as shown in Figure 6, “Δθ c = Δθ + 2π N cnt" Therefore, the expanded phase difference Δθ c varies continuously over π [rad].

[0082] The expanded phase difference Δθ is calculated by processing each part of the PLL unit 62. c The phase difference correction unit 64 can obtain the ability to distinguish between the forward and reverse directions. c is input to the PI control unit 62a in FIG. 6, the stability of the PLL is maintained, and the inverter frequency ω inv is the driving frequency ω r Continue to follow.

[0083] As a result, at time t2 in FIG. 7B, the inverter frequency ω inv is the driving frequency ω r This makes it possible to prevent torque shock not only when the response speed slows down due to a decrease in KP (proportional gain) and KI (integral gain), but also when the phase difference Δθ is prone to go OFF at ±π [rad] because motor 1 is fast. Note that in an actual train, power supply to motor 1 is started several seconds after convergence time t2, with a margin of, for example, 2 seconds.

[0084] [7] A railway vehicle 11 according to a third embodiment of the present invention includes a motor 1 driven by the load drive system described in any one of [1] to [6] above, and wheels 9 connected to the motor 1. As a result, the railway vehicle 11 can reduce torque shock that causes vibration and noise by restarting at an accurately estimated motor rotation speed by suppressing current offset error during free running.

[0085] [8] In the railway vehicle 11 described in [7] above, there are a plurality of motors 1, and the wheels 9 connected to each of the motors 1 and the inverter frequencies ω inv In a railway vehicle 11 in which multiple wheels 9 are driven by a plurality of motors 1, when only a specific wheel 9 is worn, the rotation speed of that wheel 9 becomes relatively high, and the inverter frequency ω of the motor 1 connected to that wheel 9 increases.invj (j = 1~4) also becomes relatively high.

[0086] Therefore, in the railway vehicle 11 to which this system is applied, the inverter frequency ω invj By detecting the variations in (j = 1 to 4), it is possible to continuously monitor the occurrence of wear unevenly distributed on a specific wheel 9 in real time and appropriately determine the timing for performing maintenance. As a result, the drive frequency ω r Even if there is no detection unit, it is possible to detect wear on a specific wheel 9 and extend the maintenance interval. As a result, the maintenance cost of the railway vehicle 11 can be reduced. [Explanation of symbols]

[0087] 1...motor (load), 2...inverter, 3...capacitor, 4...current detection circuit, 5...frequency filter (bandpass filter or HPF group), 5a to 5c...first to third HPF, 6...inverter frequency calculation circuit group, 6a to 6c...first to third inverter frequency calculation circuit, 61...current phase calculation unit, 61a...three-phase / two-phase conversion unit, 61b...arctangent function, 62...PLL unit, 62a...PI control unit, 62b...integration unit, 62c...phase OF detection unit, 62d...delay element, 62e, 62f...absolute value calculation unit, 62i, 63c, 63d...logical product unit, 63...OF count calculation unit, 63a, 63b, 62g, 62h...threshold value calculation unit, 63e...delay element, 64...phase difference correction unit, 7...selection circuit, 8...inverter control circuit, 9...wheel, 10...wheel wear amount detection unit, 11...railroad vehicle, 12...overhead wire, F ovr …Phase OF detection flag, F w ...Wear detection flag, g1 to g6...Gate signal, g on ...(inverter control circuit 8) restart signal, i ofs …(Remaining in HPF output) offset, i us ,i vs ,i ws …HPF output, i u ,i v ,i w …Three-phase AC current (generated by motor 1), i u …U phase current,i v …V phase current,i w…W phase current,i uf ,i vf ,i wf ...(current detection circuit 4) detection value for each phase, i us ,i vs ,i ws ...(each of the first HPF 5a to the third HPF 5c) output, i α ...α-axis current (by the three-phase / two-phase conversion unit 61a), i β …β-axis current, N cnt …cumulative number of OF, ω a ,ω b ,ω c …(based on the input of HPF 5a, 5b, 5c) DC converted inverter frequency, ω HPF1 ~ω HPF3 ...(each of the first HPF 5a to the third HPF 5c) passband, ω invj … inverter frequency, ω r …Drive frequency, θ PLL …PLL output phase, θ i …Current phase, Δθ…Phase difference, Δθ c ...Expanded phase difference

Claims

1. An inverter, an inverter control circuit that controls switching of the inverter; a current detection circuit that detects a current flowing through the load when the inverter control circuit shorts the terminals of the load; a plurality of frequency filters that receive the detected current as an input; a selection circuit that selects one of the outputs of the plurality of frequency filters based on a determination criterion that is based on the band and output of each of the plurality of frequency filters; and a load drive system for restarting the load by free-running with an inverter frequency based on the selected output as a drive frequency, Further, an inverter frequency calculation circuit is connected to the output side of each of the plurality of frequency filters and calculates the inverter frequency for the coast-restart, the selection circuit is provided at a subsequent stage of the plurality of inverter frequency calculation circuits, and selects one output for removing an offset corresponding to a phase of residual magnetic flux of a rotor of a motor driven by the load drive system. Load drive system.

2. An inverter, an inverter control circuit that controls switching of the inverter; a current detection circuit that detects a current flowing through the load when the inverter control circuit shorts the terminals of the load; a plurality of frequency filters that receive the detected current as an input; a selection circuit that selects one of the outputs of the plurality of frequency filters based on a determination criterion that is based on the band and output of each of the plurality of frequency filters; and a load drive system for restarting the load by free-running with an inverter frequency based on the selected output as a drive frequency, Further, an inverter frequency calculation circuit is connected to the output side of each of the plurality of frequency filters and calculates the inverter frequency for the coast-restart, The selection circuit is provided in a subsequent stage of the plurality of inverter frequency calculation circuits, and selects one output of the inverter frequency calculation circuit based on an output that is equal to or greater than a predetermined value and has the highest frequency band from among the outputs of the frequency filters assigned to different pass bands. Load drive system.

3. The selection circuit performs a plurality of selection operations during one initial speed estimation.

3. The load driving system according to claim 1 or 2.

4. The frequency filter has an option of outputting the input current detection value including the DC component as is.

3. The load driving system according to claim 1 or 2.

5. The inverter frequency calculation circuit includes a current phase calculation unit that calculates a current phase based on the output of the frequency filter, and a PLL unit that receives the current phase as an input.

3. The load driving system according to claim 1 or 2.

6. An inverter; an inverter control circuit that controls switching of the inverter; a current detection circuit that detects a current flowing through the load when the inverter control circuit shorts the terminals of the load; a plurality of frequency filters that receive the detected current as an input; a selection circuit that selects one of the outputs of the plurality of frequency filters based on a determination criterion that is based on the band and output of each of the plurality of frequency filters; and a load drive system for restarting the load by free-running with an inverter frequency based on the selected output as a drive frequency, Further, an inverter frequency calculation circuit is connected to the output side of each of the plurality of frequency filters and calculates the inverter frequency for the coast-restart, the selection circuit is provided at a subsequent stage of the plurality of inverter frequency calculation circuits and selects one output, The inverter frequency calculation circuit includes a current phase calculation unit that calculates a current phase based on an output of the frequency filter, and a PLL unit that receives the current phase as an input, The PLL unit includes a phase overflow detection unit that detects when a phase difference between the current phase and a PLL output phase by the PLL unit overflows ±π [rad], an overflow count calculation unit that counts the number of overflows, and a phase difference correction unit that adds the product of the number of overflows and 2π [rad] to the phase difference. Load drive system.

7. A railway vehicle comprising a motor driven by the load drive system according to any one of claims 1 to 6 and wheels connected to the motor.

8. 8. The railway vehicle according to claim 7, wherein the motors are multiple, and the railway vehicle is provided with a wheel connected to each of the motors, and a wheel wear detection unit that detects the amount of wear of the wheel from the variation in the inverter frequency corresponding to each of the motors.

9. The load is driven by an inverter whose switching is controlled by an inverter control circuit. The terminals of the load are short-circuited, and a current detection value of the current flowing through the load is detected and distributed to different passbands using a plurality of frequency filters, and output. a selection circuit that selects an output by switching based on a judgment criterion based on the band and output of each of the plurality of frequency filters; In a load drive system that restarts a load of the inverter by coasting using any one of the selected frequencies, an inverter frequency calculation circuit connected to the output side of each of the plurality of frequency filters calculates an inverter frequency to set it as a drive frequency; the selection circuit provided at a subsequent stage of the plurality of inverter frequency calculation circuits selects one of the plurality of outputs to remove an offset corresponding to a phase of residual magnetic flux of a rotor of a motor driven by the load drive system; restarting the load by coasting with the inverter frequency generated based on the selected one output; Load driving method.

10. The load is driven by an inverter whose switching is controlled by an inverter control circuit. The terminals of the load are short-circuited, and a current detection value of the current flowing through the load is detected and distributed to different passbands using a plurality of frequency filters, and output. a selection circuit that selects an output by switching based on a judgment criterion based on the band and output of each of the plurality of frequency filters; In a load drive system that restarts a load of the inverter by coasting using any one of the selected frequencies, an inverter frequency calculation circuit connected to the output side of each of the plurality of frequency filters calculates an inverter frequency to set it as a drive frequency; The selection circuit provided in the subsequent stage of the plurality of the inverter frequency calculation circuits selects, as a selected output, one output of the inverter frequency calculation circuit based on the output of the frequency filter having the highest band among the outputs in which the output of the frequency filter is equal to or greater than a predetermined value, from the plurality of outputs; restarting the load by coasting with the inverter frequency generated based on the selected one output; Load driving method.

11. The selection circuit performs a plurality of selection operations during one initial speed estimation.

11. The load driving method according to claim 9 or 10.

12. The frequency filter is substantially short-circuited, and the input current detection value including the DC component is output as is.

11. The load driving method according to claim 9 or 10.

13. The inverter frequency calculation circuit causes a phase calculation unit to calculate a current phase based on the output of the frequency filter, and inputs the current phase to a PLL unit.

11. The load driving method according to claim 9 or 10.

14. A load is driven by an inverter whose switching is controlled by an inverter control circuit, The terminals of the load are short-circuited, and a current detection value of the current flowing through the load is detected and distributed to different passbands using a plurality of frequency filters, and output. a selection circuit that selects an output by switching based on a judgment criterion based on the band and output of each of the plurality of frequency filters; In a load drive system that restarts a load of the inverter by coasting using any one of the selected frequencies, an inverter frequency calculation circuit connected to the output side of each of the plurality of frequency filters calculates an inverter frequency to set it as a drive frequency; The selection circuit provided in a subsequent stage of the plurality of inverter frequency calculation circuits selects one of the plurality of outputs, restarting the load by coasting with the inverter frequency generated based on the selected one output; The inverter frequency calculation circuit causes a phase calculation unit to calculate a current phase based on the output of the frequency filter, and inputs the current phase to a PLL unit. The PLL unit executes the following process: a phase overflow detection unit that detects that the phase difference between the current phase and the PLL output phase by the PLL unit has overflowed ±π [rad]; causing an overflow count calculation unit to count the number of overflows; a phase difference correction unit that adds the product of the number of overflows and 2π [rad] to the phase difference; Load driving method.

15. A method for operating a railway vehicle, comprising driving a motor connected to a wheel by the load driving method according to any one of claims 9, 10 and 14, to run the vehicle.

16. detecting the amount of wear of the wheels based on variations in the wheels connected to each of the plurality of motors and the inverter frequencies corresponding to each of the motors; The method for operating a railway vehicle according to claim 15.

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