Power amplifier module for implementing average power protection, electronic device, and method

Abstract

Disclosed in the present invention are a power amplifier module for implementing average power protection, an electronic device, and a method. The power amplifier module comprises: a controller, configured to provide logic control and bias voltage for a radio frequency power amplifier; the radio frequency power amplifier, configured to amplify the power of a radio frequency signal and then output the amplified radio frequency signal to a filter; and a filter for frequency bands, configured to filter the amplified radio frequency signal to obtain a radio frequency signal of a required specific frequency band. When the detected power of the radio frequency power amplifier is greater than or equal to a first power threshold, and the time during which the detected power is greater than or equal to the first power threshold reaches a first time threshold, the power amplifier module enters an average power protection operating mode, and the controller adjusts the gain of a power amplification unit, so as to protect the filter in the power amplifier module from being burnt out.

Description

Power amplifier module, electronic equipment and method for realizing average power protection Technical Field

[0001] The present invention relates to a power amplifier module for realizing average power protection, and also relates to an electronic device including the power amplifier module and an average power protection method of the power amplifier module, belonging to the technical field of radio frequency integrated circuits. Background Art

[0002] In the existing technology, the mainstream RF front-end integration solutions are PAMiD and L-PAMiD. PAMiD modularizes the power amplifier, RF switch, and filter, while L-PAMiD modularizes the power amplifier, RF switch, filter, and low-noise amplifier. While the use of PAMiD and L-PAMiD achieves a smaller RF front-end module, it also brings new problems. The need to integrate and miniaturize the filter in the module reduces its stability and reliability, which in turn makes it easy for the filter to burn out when the power amplifier outputs abnormally high power. This not only increases the stability and reliability risks of PAMiD and L-PAMiD, but also may affect the evolution of high integration and miniaturization of RF front-end modules. Therefore, how to protect the filter in the module from burning out when the power amplifier outputs abnormally high power has become a problem that must be solved for RF front-end modules. In other words, when the power amplifier outputs abnormally high power, how to limit or reduce the power output is a problem that needs to be solved urgently.

[0003] Summary of the Invention

[0004] The primary technical problem to be solved by the present invention is to provide a power amplifier module that realizes average power protection.

[0005] Another technical problem to be solved by the present invention is to provide an electronic device including the power amplifier module.

[0006] Another technical problem to be solved by the present invention is to provide an average power protection method for a power amplifier module.

[0007] In order to achieve the above object, the present invention adopts the following technical solutions:

[0008] According to a first aspect of an embodiment of the present invention, a power amplifier module for implementing average power protection is provided, comprising a controller for providing logic control and bias voltage for a radio frequency power amplifier; a radio frequency power amplifier for amplifying radio frequency signal power and outputting it to a filter; and filters for each frequency band for filtering the amplified radio frequency signal to obtain a radio frequency signal of a desired specific frequency band; wherein,

[0009] When the detection power of the RF power amplifier is greater than or equal to a first power threshold, and the time during which the detection power is greater than or equal to the first power threshold reaches a first time threshold, the power amplifier module enters an average power protection working mode, and the controller adjusts the gain of the power amplifier unit.

[0010] Preferably, when the time for the power amplifier module to enter the average power protection working mode reaches a second time threshold, the power amplifier module exits the average power protection working mode; then determines whether the detection power of the RF power amplifier is less than or equal to the second power threshold; when the detection power is less than or equal to the second power threshold, the power amplifier module continues to exit the average power protection working mode; otherwise, the power amplifier module continues to enter the average power protection working mode.

[0011] Preferably, the controller includes:

[0012] a power comparison unit, configured to compare and determine whether the detected power reaches a set power threshold, and output a first control signal;

[0013] A bandgap reference is used to provide a reference voltage for each related unit;

[0014] A frequency oscillator, used to generate a clock signal and provide it to the timing unit;

[0015] a timing unit, which uses the clock signal to count time, compares it with a set time threshold, and then outputs a second control signal;

[0016] A VBIAS LDO circuit is configured to output a first bias voltage to a bias unit of the radio frequency power amplifier;

[0017] RF input switch unit, used to switch between two RF paths with different attenuation;

[0018] A logic control unit is used to perform a logical combination according to the first control signal and the second control signal, output a third control signal, and control related functional units to adjust the gain of the power amplifier unit to achieve protection purposes.

[0019] Preferably, the controller further comprises:

[0020] A VLPM LDO circuit is configured to output a second bias voltage, which is provided to the bias unit of the RF power amplifier as a node potential, thereby changing the bias voltage output by the bias unit;

[0021] An Efuse calibration unit outputs a digital signal for calibrating the reference voltage of the bandgap reference to ensure the accuracy of the reference voltage.

[0022] Preferably, the power comparison unit includes a first voltage comparator and a second voltage comparator; wherein the input end of the first voltage comparator is respectively connected to the first reference voltage end and the output end of the power detection unit, and the input end of the second voltage comparator is respectively connected to the fifth reference voltage end and the output end of the power detection unit; the output ends of the first voltage comparator and the second voltage comparator are both connected to the output end of the power comparison unit; wherein,

[0023] The first voltage comparator is used to compare the first voltage output by the power detection unit with the first reference voltage; the second voltage comparator is used to compare the first voltage output by the power detection unit with the fifth reference voltage in different time periods; the comparison result outputs the first control signal.

[0024] Preferably, the power comparison unit includes an analog-to-digital converter and a digital logic unit; wherein the input end of the analog-to-digital converter is connected to the output end of the power detection unit, the output end of the analog-to-digital converter is connected to the first input end of the digital logic unit, the second input end and the third input end of the digital logic unit are both connected to the Efuse calibration unit, and the output end of the digital logic unit serves as the output end of the power amplification unit; wherein,

[0025] The analog-to-digital converter is used to convert the first voltage output by the power detection unit into a fourth digital signal; the digital logic unit is used to compare the fourth digital signal with the second digital signal and the third digital signal provided by the Efuse calibration unit in different time periods; the comparison result outputs the first control signal.

[0026] Preferably, the radio frequency power amplifier comprises:

[0027] A bias unit, used to provide a DC operating point for the power amplifier unit;

[0028] a power detection unit, configured to detect the power of the radio frequency signal output by the power amplification unit, and output a first voltage corresponding to the detection result;

[0029] The power amplifier unit is used to amplify the input RF signal and then output it.

[0030] Preferably, the third control signal output by the logic control unit controls the RF input switch unit; wherein,

[0031] When the power amplifier module enters the average power protection working mode, the radio frequency input signal is output after passing through the radio frequency path provided with the attenuation network, so that the gain of the power amplifier unit is reduced;

[0032] When the power amplifier module exits the average power protection working mode, the radio frequency input signal is output after passing through the radio frequency path without the attenuation network. At this time, the power amplifier unit maintains normal gain.

[0033] Preferably, in the RF input switch unit, the RF path with the attenuation network and the RF path without the attenuation network are connected in parallel with each other; the RF path with the attenuation network includes a first switch, an attenuation network, and a second switch, and the first switch, the attenuation network, and the second switch are connected in series in sequence; wherein the control ends of the first switch and the second switch are both connected to the third control signal end; the RF path without the attenuation network includes a third switch, and the control end of the third switch is connected to the inverse signal end of the third control signal.

[0034] Preferably, the third control signal output by the logic control unit controls the VBIAS LDO circuit; wherein,

[0035] When the power amplifier module enters the average power protection working mode, the VBIAS LDO circuit outputs the reduced first bias voltage, which is provided to the bias unit of the power amplifier to reduce the gain of the power amplifier unit;

[0036] When the power amplifier module exits the average power protection working mode, the VBIAS LDO circuit outputs the normal first bias voltage and provides it to the bias unit of the power amplifier. At this time, the power amplifier unit maintains normal gain.

[0037] Preferably, the VBIAS LDO circuit includes an error amplifier, a power tube, a feedback resistor network, and a first resistor, a second resistor, and a PMOS tube connected in series at the output end; wherein the source and drain of the PMOS tube are respectively connected to the two ends of the second resistor, and the gate of the PMOS tube is connected to the third control signal terminal.

[0038] Preferably, the VBIAS LDO circuit includes an error amplifier, a power tube, and a feedback resistor network; wherein the feedback resistor network includes a third resistor, a fourth resistor, and a fifth resistor connected in series between the output terminal and the ground potential terminal, as well as a first transmission gate and a second transmission gate; wherein the connection point between the third resistor and the fourth resistor is a first node, and the connection point between the fourth resistor and the fifth resistor is a second node; the first node and the second node are respectively connected to the feedback input terminal of the error amplifier through the first transmission gate and the second transmission gate, the enable control terminal of the first transmission gate is connected to the third control signal terminal, and the enable control terminal of the second transmission gate is connected to the inverted signal terminal of the third control signal.

[0039] Preferably, the third control signal output by the logic control unit controls the VLPM LDO circuit; wherein,

[0040] When the power amplifier module enters the average power protection working mode, the VLPM LDO circuit outputs a high-potential second bias voltage, which is provided to the bias unit of the power amplifier, changing the node potential in the bias unit so that the bias unit outputs a reduced bias voltage, thereby reducing the gain of the power amplifier unit.

[0041] When the power amplifier module exits the average power protection working mode, the VLPM LDO circuit outputs a low-potential second bias voltage, which is provided to the bias unit of the power amplifier, so that the bias unit outputs a normal bias voltage and the power amplifier maintains normal gain.

[0042] According to a second aspect of an embodiment of the present invention, an electronic device is provided, wherein the electronic device includes the power amplifier module for implementing average power protection.

[0043] According to a third aspect of an embodiment of the present invention, there is provided a method for average power protection of a power amplifier module, comprising the following steps:

[0044] (1) Detecting the power in the power amplifier module;

[0045] (2) Determine whether the detected power is greater than or equal to a first power threshold; when the detected power is greater than or equal to the first power threshold, proceed to the next step; otherwise, return to step (1) and continue to detect the power;

[0046] (3) starting timing after the detection power is greater than or equal to the first power threshold, which is the first timing time;

[0047] (4) Determine whether the first timing time reaches the first time threshold; when the first timing time reaches the first time threshold, proceed to the next step; otherwise, return to step (1);

[0048] (5) The power amplifier module enters the average power protection working mode; the control circuit adjusts the gain of the power amplifier unit to protect the power amplifier module;

[0049] (6) The timing starts after the power amplifier module enters the average power protection working mode, and this timing is the second timing time;

[0050] (7) Determine whether the second timing time reaches the second time threshold; when the second timing time reaches the second time threshold, proceed to the next step; otherwise, return to step (6) and continue timing;

[0051] (8) The power amplifier module exits the average power protection working mode;

[0052] (9) Determine whether the detected power is less than or equal to the second power threshold; when the detected power is less than or equal to the second power threshold, proceed to the next step; otherwise, return to step (5), and the power amplifier module continues to enter the average power protection working mode;

[0053] (10) The power amplifier module continues to exit the average power protection working mode; return to step (1).

[0054] Preferably, in step (5), the control circuit controls the RF input switch unit; when the power amplifier module enters the average power protection working mode, the RF input signal is output after passing through the RF path provided with an attenuation network, so that the gain of the power amplifier unit is reduced.

[0055] Preferably, in step (5), the control circuit controls the VBIAS LDO circuit; when the power amplifier module enters the average power protection working mode, the VBIAS LDO circuit outputs a reduced first bias voltage, which is provided to the bias unit of the power amplifier, thereby reducing the gain of the power amplifier unit.

[0056] Preferably, in step (5), the control circuit controls the VLPM LDO circuit; when the power amplifier module enters the average power protection working mode, the VLPM LDO circuit outputs a second bias voltage with a high potential, which is provided to the bias unit of the power amplifier, and changes the node potential in the bias unit, so that the bias unit outputs a reduced bias voltage, thereby reducing the gain of the power amplifier unit.

[0057] Compared to existing technologies, the power amplifier module with average power protection provided by the present invention utilizes real-time power detection and compares it with a set threshold to generate a control signal, controlling related functional units to adjust the power amplifier unit gain. This technical solution protects the power amplifier module in the event of abnormally high power. This allows the RF front-end module to continue evolving towards high integration and miniaturization. Therefore, the power amplifier module with average power protection provided by the present invention has the advantages of a clever and reasonable structural design, low design cost, and high reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] FIG1 is a block diagram of a power amplifier module for implementing average power protection provided by the present invention;

[0059] FIG2 is a circuit diagram of a power comparison unit according to a first embodiment of the present invention;

[0060] FIG3 is a circuit diagram of a power comparison unit according to a second embodiment of the present invention;

[0061] FIG4 is a schematic diagram of a circuit for implementing average power protection in the first embodiment of the present invention;

[0062] FIG5 is a schematic diagram of a circuit for implementing average power protection in a second embodiment of the present invention;

[0063] FIG6 is a schematic diagram of a circuit for implementing average power protection in a third embodiment of the present invention;

[0064] FIG7 is a schematic diagram of an electronic device using a power amplifier module for implementing average power protection provided by the present invention;

[0065] FIG8 is a flow chart of an average power protection method for a power amplifier module according to an embodiment of the present invention. DETAILED DESCRIPTION

[0066] The technical content of the present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

[0067] As shown in Figure 1, an embodiment of the present invention provides a power amplifier module for implementing average power protection, including a controller for providing logic control and bias voltage for the RF power amplifier; an RF power amplifier for amplifying the power of the RF signal and outputting it to the filter; and filters for each frequency band for filtering the amplified RF signal to obtain the RF signal of the required specific frequency band.

[0068] The controller includes a power comparison unit, a bandgap reference, a frequency oscillator, a timing unit, a VBIAS LDO circuit, a VLPM LDO circuit, a RF input switch unit, an Efuse calibration unit and a logic control unit. The above units of the controller are integrated together to form a controller chip.

[0069] The functions and effects of each functional unit are described below.

[0070] The power comparison unit is used to compare and determine whether the detected power reaches a set power threshold. It compares the first voltage VDET, which indicates the power level, fed back by the power detection unit, with the set power threshold and outputs a first control signal EN_1 based on the comparison result. The set power thresholds include a first power threshold Vth1 and a second power threshold Vth2. The first power threshold Vth1 is set based on the power tolerance of the filter integrated in the power amplifier module. The high or low level of the first control signal EN_1 indicates whether the first voltage VDET has reached the set first power threshold Vth1 or second power threshold Vth2.

[0071] The main function of the bandgap reference is to provide reference voltages Vref for various related units. Specifically, it provides a first reference voltage Vref_1 and a fifth reference voltage Vref_5 for the power comparison unit, a second reference voltage Vref_2 for the frequency oscillator, a third reference voltage Vref_3 for the VBIAS LDO circuit, and a fourth reference voltage Vref_4 for the VLPM LDO circuit.

[0072] The frequency oscillator is used to generate a clock signal CLK and provide it to the timing unit. In one embodiment of the present invention, the frequency oscillator is implemented using a voltage comparison circuit structure. This has the advantage of being able to utilize an Efuse calibration unit to ensure the accuracy of the second reference voltage Vref_2 output by the bandgap reference, thereby ensuring the accuracy of the clock signal CLK generated by the frequency oscillator. This embodiment of the present invention does not limit the circuit structure of the frequency oscillator; other circuit structures may also be used, as long as the generated clock signal meets the requirements.

[0073] The timing unit uses the clock signal CLK provided by the frequency oscillator to measure time and compares it with a set time threshold. The comparison result outputs a second control signal EN_2. The set time threshold includes a first time threshold Tth1 and a second time threshold Tth2. The magnitude of the first time threshold Tth1 is determined based on the time the filter can withstand high power and the time the filter needs to cover during normal application. The timing of the timing unit includes the time t1 when the first power threshold Vth1 is reached and the time t2 when the average power protection operating mode is entered. The high and low levels of the second control signal EN_2 respectively indicate whether the timing time has reached the set first time threshold Tth1 or the second time threshold Tth2. The timing unit can be implemented using a D flip-flop and a logic gate circuit.

[0074] The VBIAS LDO circuit is used to output a first bias voltage VBIAS in a normal operating mode, which is provided to the bias unit of the RF power amplifier as a bias power supply to establish a DC operating point of the bias unit.

[0075] The VLPM LDO circuit is used to output a second bias voltage VLPM in low power mode, which is provided to the bias unit in the RF power amplifier chip as a node potential to change the bias voltage output by the bias unit.

[0076] The RF input switch unit is used to switch between two RF paths with different attenuation amounts, one of which is provided with an attenuation network and the other is not. Selecting different RF paths can achieve different amplification gains of the RF signal.

[0077] The logic control unit is configured to logically combine the first control signal EN_1 output by the power comparison unit and the second control signal EN_2 output by the timing unit to output a third control signal ODP_EN, which is used to control related functional units to adjust the gain of the power amplifier to achieve average power protection. The high and low levels of the third control signal ODP_EN correspond to whether the power amplifier module is in average power protection mode.

[0078] The Efuse calibration unit is used to calibrate the reference voltage of the bandgap reference, wherein the first digital signal Vbit is outputted <v:0>Ensure the accuracy of the first reference voltage Vref_1, the second reference voltage Vref_2, the third reference voltage Vref_3, the fourth reference voltage Vref_4 and the fifth reference voltage Vref_5 output by the bandgap reference. Further, by ensuring the accuracy of the first reference voltage Vref_1 and the fifth reference voltage Vref_5, the accuracy of the set first power threshold Vth1 and the second power threshold Vth2 is guaranteed; by ensuring the accuracy of the second reference voltage Vref_2, the accuracy of the clock signal CLK output by the frequency oscillator is guaranteed, that is, the accuracy of the set first time threshold Tth1 and the second time threshold Tth2 is guaranteed. Therefore, the use of the Efuse calibration unit can greatly reduce the deviation caused by process manufacturing, thereby ensuring the accuracy of the average power protection of each chip. In addition, in some embodiments of the present invention, the Efuse calibration unit outputs the second digital signal Ebit <e:0>and the third digital signal Fbit <f:0>, providing the power comparison unit with the digital values ​​of the set first power threshold Vth1 and the second power threshold Vth2.

[0079] The RF power amplifier includes a bias unit, a power amplification unit, and a power detection unit. These units are integrated together to form an RF power amplifier chip. The following describes the functions and effects of each unit.

[0080] The bias unit is used to provide a DC operating point for the power amplifier unit. Its operating power supply is provided by the controller, which is a first bias voltage VBIAS in normal operating mode and a second bias voltage VLPM in low power mode.

[0081] The power detection unit is used to detect the radio frequency signal RFOUT_2 output by the power amplification unit. The detection result corresponds to the output first voltage VDET. The power of the radio frequency signal RFOUT_2 and the magnitude of the first voltage VDET are positively correlated. That is, the greater the power of RFOUT_2, the greater the first voltage VDET.

[0082] The power amplifier unit is used to amplify the input radio frequency signal RFIN_2 and output the radio frequency signal RFOUT_2. The radio frequency signal RFOUT_2 output by the power amplifier unit is filtered and then output as the radio frequency signal RFOUT_1 of the required specific frequency band.

[0083] It should be noted that the power comparison unit in the embodiment of the present invention can adopt any one of the following two technical solutions.

[0084] The first solution, shown in Figure 2, implements the power comparison unit using an analog circuit. A first voltage comparator A compares the first voltage VDET output by the power detection unit with a first reference voltage Vref_1. The comparison result outputs a first control signal EN_1. The high and low levels of the first control signal EN_1 correspond to whether the power reaches a set first power threshold Vth1. A second voltage comparator B compares the first voltage VDET output by the power detection unit with a fifth reference voltage Vref_5. The comparison result outputs a first control signal EN_1. The high and low levels of the first control signal EN_1 correspond to whether the power reaches a set second power threshold Vth2.

[0085] The input terminals of the first voltage comparator A are connected to the first reference voltage Vref_1 and the first voltage VDET, respectively. The input terminals of the second voltage comparator B are connected to the fifth reference voltage Vref_5 and the first voltage VDET, respectively. The output terminals of the first voltage comparator A and the second voltage comparator B are both connected to the output terminal of the power comparison unit. Furthermore, the operation of the first voltage comparator A and the second voltage comparator B are both controlled by a system enable signal, and they operate in different time periods.

[0086] When the detected power is greater than or equal to the first power threshold Vth1 , that is, the first voltage VDET ≥ the first reference voltage Vref_1 , the first voltage comparator A operates, and the first control signal EN_1 output by the power comparison unit is a high level signal.

[0087] When the detected power is less than or equal to the second power threshold Vth2, that is, the first voltage VDET≤the fifth reference voltage Vref_5, the second voltage comparator B operates, and the first control signal EN_1 output by the power comparison unit is a low level signal.

[0088] The magnitudes of the first reference voltage Vref_1 and the fifth reference voltage Vref_5 are designed and determined according to the set first power threshold Vth1 and the second power threshold Vth2 respectively, that is, voltage is used to represent power magnitude.

[0089] The second solution, as shown in Figure 3, implements the power comparison unit using a digital circuit. Specifically, the power comparison unit consists of an analog-to-digital converter (ADC) and a digital logic unit. The ADC's input is connected to the power detection unit's output, the ADC's output is connected to the first input of the digital logic unit, and both the second and third inputs of the digital logic unit are connected to the Efuse calibration unit (as indicated by the dashed line ① in Figure 1). The output of the digital logic unit serves as the output of the power amplification unit.

[0090] The analog-to-digital converter ADC converts the first voltage VDET output by the power detection unit into a fourth digital signal Dbit <d:0>, and then the fourth digital signal Dbit <d:0>and the second digital signal Ebit provided by the Efuse calibration unit <e:0>and the third digital signal Fbit <f:0>The digital logic unit performs comparisons at different time periods, and the comparison results are output as the first control signal EN_1. <d:0>and the second digital signal Ebit <e:0>The high and low levels of the first control signal EN_1 output after comparison correspond to whether the detection power reaches the set first power threshold Vth1. <d:0>and the third digital signal Fbit <f:0>The high and low levels of the first control signal EN_1 output after comparison correspond to whether the detection power reaches a set second power threshold Vth2.

[0091] Among them, the second digital signal Ebit <e:0>and the third digital signal Fbit <f:0>The value of is designed and determined according to the set first power threshold Vth1 and the second power threshold Vth2, that is, a number is used to represent the power size.

[0092] When the detection power is greater than or equal to the first power threshold Vth1, that is, the fourth digital signal Dbit <d:0>Greater than or equal to the second digital signal Ebit <e:0>, the first control signal EN_1 output by the power comparison unit is a high level signal.

[0093] When the detection power is less than or equal to the second power threshold Vth2, that is, the fourth digital signal Dbit <d:0>Less than or equal to the third digital signal Fbit <f:0>When , the first control signal EN_1 output by the power comparison unit is a low level signal.

[0094] Compared with the above two technical solutions for realizing the power amplification unit, the circuit structure of the first solution is relatively simple, but the precision is not high; the circuit structure of the second solution is relatively complex, but the precision is high. In practical applications, an appropriate selection can be made according to actual needs.

[0095] The working principle of the power amplifier module for implementing average power protection provided by the present invention is generally described below in combination with different embodiments.

[0096] The RF power amplifier's power detection unit detects the output power in real time and outputs a first voltage VDET representing the power level. When the first voltage VDET is greater than or equal to a set first power threshold Vth1, the power comparison unit outputs a high-level first control signal EN_1 to the logic control unit. Simultaneously, the timing unit begins counting. When the count reaches the first time threshold Tth1, the timing unit outputs a high-level second control signal EN_2 to the logic control unit. At this point, the power amplifier module enters average power protection mode. Simultaneously, the logic control unit logically combines the first and second control signals EN_1 and EN_2 to output a high-level third control signal ODP_EN. This third control signal ODP_EN controls relevant functional units to adjust the power amplifier's gain (primarily, but not exclusively, to reduce it) to achieve protection. Furthermore, the timing unit begins counting from the time the module enters average power protection mode. When the count reaches the second time threshold Tth2, the second control signal EN_2 becomes low, and the power amplifier module exits average power protection mode. The power comparison unit then continues to compare and determine whether the first voltage VDET detected in real time is less than or equal to the set second power threshold Vth2. If so, the first control signal EN_1 becomes low, and the power amplifier module continues to exit the average power protection mode. Otherwise, the power amplifier module returns to (i.e., continues to enter) the average power protection mode. This cycle, with real-time control, prevents the RF power amplifier from continuously outputting abnormally high power, thereby achieving the purpose of protecting the module.

[0097] The set first power threshold Vth1 is usually greater than the set second power threshold Vth2 by a certain margin, so as to ensure that there is a certain hysteresis width between entering and exiting the average power protection working mode.

[0098] In the first embodiment of the present invention, as shown in FIG4 , the average power protection working mode controls the RF input switch unit through the third control signal ODP_EN to adjust the gain of the power amplifier to achieve the protection purpose.

[0099] First, the third control signal ODP_EN is converted into its inverse signal ODP_ENB through an inverter circuit. In the RF input switch unit, the RF path with an attenuation network and the RF path without an attenuation network are connected in parallel. The RF path with an attenuation network includes a first switch K1, an attenuation network, and a second switch K2, which are connected in series. The control terminals of the first and second switches K1 and K2 are both connected to the third control signal ODP_EN. The RF path without an attenuation network includes only the third switch K3, and its control terminal is connected to the inverse signal ODP_ENB of the third control signal.

[0100] When the power amplifier module enters average power protection mode, the third control signal ODP_EN is high, and its inverse signal, ODP_ENB, is low. Consequently, the first and second switches K1 and K2 are closed, connecting the RF path with the attenuation network. The third switch K3 is opened, disconnecting the RF path without the attenuation network. At this point, the RF input signal RFIN_1, after passing through the RF path with the attenuation network, outputs an attenuated RF signal RFIN_2. After passing through the power amplifier unit, the RF signal RFOUT_2 output by RFIN_2 is also attenuated. This reduces the output power (i.e., the gain) of the power amplifier unit, thereby achieving the protection objective.

[0101] When the power amplifier module exits the average power protection working mode, the third control signal ODP_EN is a low-level signal, the RF input switch unit opens the path without the attenuation network and closes the path with the attenuation network, and the RF input signal RFIN_1 outputs the RF signal RFIN_2 after passing through the path without the attenuation network.

[0102] In a second embodiment of the present invention, as shown in FIG5 , the average power protection working mode controls the first bias voltage VBIAS output by the VBIAS LDO circuit through the third control signal ODP_EN (i.e., as shown by the dotted line ② in FIG1 ), adjusts the gain of the power amplifier, and achieves the protection purpose.

[0103] The VBIAS LDO circuit includes an error amplifier, a power transistor, a feedback resistor network, and a first resistor R1 and a second resistor R2 connected in series at the output terminal, as well as a PMOS transistor M1. The source and drain of the PMOS transistor M1 are respectively connected to the two ends of the second resistor R2, and the gate of the PMOS transistor M1 is connected to the third control signal ODP_EN terminal.

[0104] When the power amplifier module enters the average power protection working mode, the third control signal ODP_EN is a high-level signal. Therefore, the PMOS tube M1 is turned off, and the VBIAS LDO circuit outputs the first bias voltage VBIAS after passing through the first resistor R1 and the second resistor R2. At this time, the first bias voltage VBIAS is reduced due to the voltage division of the second resistor R2. That is, the bias unit provides a small DC operating point to the power amplifier unit, reducing its amplification capability (that is, the gain is reduced), causing the RF signal RFOUT_2 to attenuate and reduce the gain, thereby achieving the protection purpose.

[0105] When the power amplifier module exits the average power protection working mode, the third control signal ODP_EN is a low-level signal, the PMOS tube M1 is turned on, the second resistor R2 is short-circuited, and the VBIAS LDO circuit outputs the first bias voltage VBIAS after passing through the first resistor R1. At this time, the power amplifier unit operates normally and maintains normal gain.

[0106] In the third embodiment of the present invention, as shown in FIG6 , the average power protection working mode still controls the first bias voltage VBIAS output by the VBIAS LDO circuit through the third control signal ODP_EN (i.e., as shown by the dotted line ② in FIG1 ), thereby adjusting the gain of the power amplifier to achieve the protection purpose.

[0107] First, the third control signal ODP_EN is converted into an inverted signal ODP_ENB through an inverter circuit.

[0108] The VBIAS LDO circuit includes an error amplifier, a power transistor, and a feedback resistor network. The feedback resistor network includes a third resistor R3, a fourth resistor R4, and a fifth resistor R5 connected in series between the output terminal and the ground potential terminal, as well as a first transmission gate CM1 and a second transmission gate CM2. The connection point between the third resistor R3 and the fourth resistor R4 is a first node, and the connection point between the fourth resistor R4 and the fifth resistor R5 is a second node. The first node and the second node are connected to the feedback input of the error amplifier via the first transmission gate CM1 and the second transmission gate CM2, respectively. The enable control terminal of the first transmission gate CM1 is connected to the third control signal ODP_EN, and the enable control terminal of the second transmission gate CM2 is connected to the inverted signal ODP_ENB of the third control signal.

[0109] When the power amplifier module enters the average power protection operating mode, the third control signal ODP_EN is a high-level signal, and the inverse signal of the third control signal ODP_ENB is a low-level signal. Therefore, the first transmission gate CM1 is turned on, the second transmission gate CM2 is turned off, the first node in the feedback resistor network is connected to the feedback input terminal of the error amplifier, and the VBIAS LDO circuit outputs a first bias voltage VBIAS with a smaller piezoelectric value. That is, the bias unit provides a small DC operating point to the power amplifier unit, reducing its amplification capability (that is, reducing the gain), causing the RF signal RFOUT_2 to attenuate and reduce the gain, thereby achieving the protection purpose.

[0110] When the power amplifier module exits the average power protection working mode, the third control signal ODP_EN is a low-level signal, and the inverse signal ODP_ENB of the third control signal is a high-level signal. Therefore, the first transmission gate CM1 is disconnected, the second transmission gate CM2 is turned on, the second node in the feedback resistor network is connected to the feedback input terminal of the error amplifier, and the VBIAS LDO circuit outputs the first bias voltage VBIAS with a larger piezoelectric value. At this time, the power amplifier unit operates normally and maintains normal gain.

[0111] In the fourth embodiment of the present invention, the average power protection working mode controls the second bias voltage VLPM output by the VLPM LDO circuit through the third control signal ODP_EN (i.e., as shown by the dotted line ③ in Figure 1), adjusts the gain of the power amplifier, and achieves the protection purpose.

[0112] When the power amplifier module enters the average power protection working mode, the third control signal ODP_EN is a high-level signal, which turns on the VLPM LDO circuit and outputs a high-potential second bias voltage VLPM, which is provided to the bias unit of the RF power amplifier, changing the node potential in the bias unit so that the bias unit outputs a lower bias voltage, that is, the bias unit provides a small DC operating point to the power amplifier unit, reducing its amplification capability (that is, the gain is reduced), causing the RF signal RFOUT_2 to attenuate and reduce the gain, thereby achieving the protection purpose.

[0113] When the power amplifier module exits the average power protection working mode, the third control signal ODP_EN is a low-level signal, which turns off the VLPM LDO circuit and outputs a low-potential second bias voltage VLPM, which is provided to the bias unit of the power amplifier, so that the bias unit outputs a normal bias voltage. At this time, the power amplifier unit operates normally and maintains normal gain.

[0114] In the above four embodiments, the power amplifier module controls the RF input switch unit, the VBIAS LDO circuit and the VLPM LDO circuit respectively through the third control signal ODP_EN, and adjusts the power of the power amplifier module entering the average power protection working mode with four different technical solutions. The technical solutions provided in the above four embodiments can be used individually or in combination.

[0115] Based on the above-mentioned power amplifier module that implements average power protection, an embodiment of the present invention further provides an electronic device, which includes a power amplifier module that implements average power protection as an important component of the communication component. The electronic device referred to here refers to a computer device that can be used in a mobile environment and supports multiple communication standards such as GSM, EDGE, CDMA, TD_SCDMA, WCDMA, TDD_LTE, FDD_LTE, NR, etc., including mobile phones, laptops, tablets, car computers, etc. In addition, the technical solution provided by the present invention is also applicable to other applications of radio frequency integrated circuits, such as communication base stations and intelligent connected vehicles.

[0116] As shown in Figure 7, the electronic device includes at least a processor, a memory and a communication component, and may further include a sensor component, a power component, a multimedia component and an input / output interface according to actual needs. Among them, the memory, communication component, sensor component, power component, multimedia component and input / output interface are all connected to the processor. The memory can be a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic memory, a flash memory, etc., and the processor can be a central processing unit (CPU), a graphics processing unit (GPU), a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), a digital signal processing (DSP) chip, etc. Other communication components, sensor components, power components, multimedia components, etc. can all be implemented using general components and are not specifically described here.

[0117] In addition, an embodiment of the present invention further provides an average power protection method for a power amplifier module, the working process of which is shown in FIG8 and includes the following steps:

[0118] S1: Detect the power in the power amplifier module to obtain a first voltage VDET.

[0119] In this embodiment, the output power is detected. In other embodiments, the input power or the output power of a certain stage or a certain branch of the power amplifier may also be detected.

[0120] S2: Determine whether the first voltage VDET obtained by detecting the power is greater than or equal to the first power threshold Vth1; when the first voltage VDET is greater than or equal to the first power threshold Vth1, proceed to the next step; otherwise, return to step S1 and continue detecting the power.

[0121] The first power threshold Vth1 is set according to the power that the filter integrated in the power amplifier module can withstand. The power that filters in different frequency bands can withstand is different.

[0122] S3: When the first voltage VDET is greater than or equal to the first power threshold Vth1, timing is started, and the timing is the first timing time t1.

[0123] In this embodiment, a clock signal is used for timing, and the frequency of the clock signal is designed accordingly according to the length of the time threshold to be set.

[0124] S4: Determine whether the first timing time t1 reaches the first time threshold Tth1; when the first timing time reaches the first time threshold Tth1, go to the next step; otherwise, return to step S1.

[0125] When the timing starts after the first power threshold Vth1 is reached and the first timing time t1 does not reach the first time threshold Tth1, if the detected power is less than the first power threshold Vth1, the timing is stopped and the process returns to step S1 to continue detecting power.

[0126] The value of the first time threshold Tth1 is determined and set based on the time the filter can withstand high power and the time the filter needs to cover during normal application.

[0127] S5: The power amplifier module enters the average power protection working mode. The control circuit adjusts the gain of the power amplifier unit (mainly reducing the gain, but not limited to this) to protect the power amplifier module.

[0128] Among them, the first solution to reduce the gain of the power amplifier unit is to control the RF input switch unit by the control circuit; when the power amplifier module enters the average power protection working mode, the RF input signal is output after passing through the RF path equipped with an attenuation network, so that the output power of the power amplifier unit is reduced and the gain is reduced, thereby achieving the protection purpose.

[0129] Among them, the second solution to reduce the gain of the power amplifier unit is to control the VBIAS LDO circuit by the control circuit; when the power amplifier module enters the average power protection working mode, the VBIAS LDO circuit outputs a reduced first bias voltage and provides it to the bias unit of the power amplifier, thereby reducing the gain of the power amplifier unit and achieving the protection purpose.

[0130] Among them, the third solution for reducing the gain of the power amplifier unit is to control the VLPM LDO circuit by the control circuit; when the power amplifier module enters the average power protection working mode, the VLPM LDO circuit outputs a high-potential second bias voltage, which is provided to the bias unit of the power amplifier, changing the node potential in the bias unit, so that the bias unit outputs a reduced bias voltage, reducing the gain of the power amplifier unit, thereby achieving the protection purpose.

[0131] S6: The power amplifier module starts timing after entering the average power protection working mode, and this timing is the second timing time t2.

[0132] S7: Determine whether the second timing time t2 reaches the second time threshold Tth2; when the second timing time t2 reaches the second time threshold Tth2, go to the next step; otherwise, return to step S6 and continue timing.

[0133] S8: The power amplifier module exits the average power protection working mode.

[0134] S9: Determine whether the first voltage VDET obtained by detecting the power is less than or equal to the second power threshold Vth2; when the obtained first voltage VDET is less than or equal to the second power threshold Vth2, proceed to the next step; otherwise, return to step S5, and the power amplifier module continues to enter the average power protection working mode.

[0135] The set first power threshold Vth1 is usually greater than the set second power threshold Vth2 by a certain margin, so as to ensure that there is a certain hysteresis width between entering and exiting the average power protection working mode.

[0136] S10: The power amplifier module continues to exit the average power protection working mode; and returns to step S1.

[0137] After the power amplifier module determines to exit the average power protection working mode, it returns to step S1 to continue detecting the power, and performs cyclic protection and real-time control in steps S1 to S10 to prevent the RF power amplifier from continuously outputting abnormally high power, thereby achieving the purpose of protecting the power amplifier module.

[0138] In summary, compared with the prior art, the power amplifier module implementing average power protection provided by the present invention utilizes real-time power detection and compares it with a set threshold to generate a control signal to control the relevant functional units to adjust the power amplifier unit gain. This technical solution protects the power amplifier module in the event of abnormally high power. This allows the RF front-end module to continue to evolve in the direction of high integration and miniaturization. Therefore, the power amplifier module implementing average power protection provided by the present invention has the beneficial effects of ingenious and reasonable structural design, low design cost, and high reliability.

[0139] It should be noted that the above embodiments are merely examples, and the technical solutions of the various embodiments may be combined and are all within the scope of protection of the present invention.

[0140] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0141] The above describes in detail the power amplifier module, electronic device, and method for implementing average power protection provided by the present invention. Any obvious modification made to the present invention without departing from its essence would constitute an infringement of the present invention's patent rights and would incur corresponding legal liability.

Claims

1. A power amplifier module for realizing average power protection, characterized in that include: A controller for providing logic control and bias voltage for the RF power amplifier; A radio frequency power amplifier, used to amplify the radio frequency signal power and output it to the filter; The filter for each frequency band is used to filter the amplified RF signal to obtain the RF signal of the required specific frequency band; wherein, When the detected power of the RF power amplifier is greater than or equal to a first power threshold, and the time during which the detected power is greater than or equal to the first power threshold reaches a first time threshold, the power amplifier module enters an average power protection operating mode, and the controller adjusts the gain of the power amplifier unit.

2. The power amplifier module for realizing average power protection according to claim 1, characterized in that: When the time for the power amplifier module to enter the average power protection working mode reaches a second time threshold, the power amplifier module exits the average power protection working mode; then determines whether the detection power of the RF power amplifier is less than or equal to the second power threshold; when the detection power is less than or equal to the second power threshold, the power amplifier module continues to exit the average power protection working mode; otherwise, the power amplifier module continues to enter the average power protection working mode.

3. The power amplifier module for realizing average power protection as claimed in claim 1, characterized in that The controller comprises: A power comparison unit, used to compare and determine whether the detected power reaches a set power threshold, and output a first control signal; A bandgap reference, used to provide a reference voltage for each relevant unit; A frequency oscillator, used to generate a clock signal and provide it to the timing unit; A timing unit, which uses the clock signal to perform timing and outputs a second control signal after comparing it with a set time threshold; A VBIAS LDO circuit, configured to output a first bias voltage and provide the first bias voltage to a bias unit of the RF power amplifier; A radio frequency input switch unit, used to switch between two radio frequency paths with different attenuations; A logic control unit is configured to control the first control signal and the second control signal according to the first control signal and the second control signal. Perform logical combination, output a third control signal, control related functional units to adjust the gain of the power amplifier unit, and achieve the protection purpose.

4. The power amplifier module for realizing average power protection as claimed in claim 3, characterized in that The controller further comprises: A VLPM LDO circuit, configured to output a second bias voltage, which is provided to the bias unit of the RF power amplifier as a node potential, and to change the bias voltage output by the bias unit; An Efuse calibration unit outputs a digital signal for calibrating a reference voltage of the bandgap reference to ensure the accuracy of the reference voltage.

5. The power amplifier module for realizing average power protection according to claim 3, characterized in that: The power comparison unit includes a first voltage comparator and a second voltage comparator; wherein the input end of the first voltage comparator is respectively connected to the first reference voltage end and the output end of the power detection unit, and the input end of the second voltage comparator is respectively connected to the fifth reference voltage end and the output end of the power detection unit; the output ends of the first voltage comparator and the second voltage comparator are both connected to the output end of the power comparison unit; wherein, The first voltage comparator is used to compare the first voltage output by the power detection unit with the first reference voltage; the second voltage comparator is used to compare the first voltage output by the power detection unit with the fifth reference voltage in different time periods; the comparison result outputs the first control signal.

6. The power amplifier module for realizing average power protection according to claim 3, characterized in that: The power comparison unit includes an analog-to-digital converter and a digital logic unit; wherein the input end of the analog-to-digital converter is connected to the output end of the power detection unit, the output end of the analog-to-digital converter is connected to the first input end of the digital logic unit, the second input end and the third input end of the digital logic unit are both connected to the Efuse calibration unit, and the output end of the digital logic unit serves as the output end of the power amplification unit; wherein, The analog-to-digital converter is used to convert the first voltage output by the power detection unit into a fourth digital signal; the digital logic unit is used to compare the fourth digital signal with the second digital signal and the third digital signal provided by the Efuse calibration unit in different time periods; the comparison result is used to output the first control signal.

7. The power amplifier module for realizing average power protection as claimed in claim 1, characterized in that The radio frequency power amplifier comprises: A bias unit, used for providing a DC operating point for the power amplifier unit; A power detection unit, used to detect the power of the radio frequency signal output by the power amplification unit, and the detection result corresponds to the output of the first voltage; The power amplifier unit is used to amplify the input RF signal and then output it.

8. The power amplifier module for realizing average power protection according to claim 3, characterized in that: The third control signal output by the logic control unit controls the RF input switch unit; wherein, When the power amplifier module enters the average power protection working mode, the RF input signal is output after passing through the RF path provided with the attenuation network, so that the gain of the power amplifier unit is reduced; When the power amplifier module exits the average power protection working mode, the RF input signal is output after passing through the RF path without the attenuation network. At this time, the power amplifier unit maintains normal gain.

9. The power amplifier module for realizing average power protection according to claim 3 or 8, characterized in that: In the RF input switch unit, the RF path with the attenuation network and the RF path without the attenuation network are connected in parallel with each other; the RF path with the attenuation network includes a first switch, an attenuation network, and a second switch, and the first switch, the attenuation network, and the second switch are connected in series in sequence; wherein the control ends of the first switch and the second switch are both connected to the third control signal end; the RF path without the attenuation network includes a third switch, and the control end of the third switch is connected to the anti-signal end of the third control signal.

10. The power amplifier module for realizing average power protection according to claim 3, characterized in that: The third control signal output by the logic control unit controls the VBIAS LDO circuit; wherein, When the power amplifier module enters the average power protection working mode, the VBIAS LDO circuit outputs the reduced first bias voltage, which is provided to the bias unit of the power amplifier to reduce the gain of the power amplifier unit; When the power amplifier module exits the average power protection working mode, the VBIAS LDO circuit outputs the normal first bias voltage and provides it to the bias unit of the power amplifier. At this time, the power amplifier unit maintains normal gain.

11. The power amplifier module for realizing average power protection according to claim 3 or 10, characterized in that: The VBIAS LDO circuit includes an error amplifier, a power tube, a feedback resistor network, and a first resistor, a second resistor, and a PMOS tube connected in series at an output end; wherein the source and the drain of the PMOS tube are respectively connected to the two ends of the second resistor, and the gate of the PMOS tube is connected to the third control signal terminal.

12. The power amplifier module for realizing average power protection according to claim 3 or 10, characterized in that: The VBIAS LDO circuit includes an error amplifier, a power tube, and a feedback resistor network; wherein the feedback resistor network includes a third resistor, a fourth resistor, and a fifth resistor connected in series between an output terminal and a ground potential terminal, and a first transmission gate and a second transmission gate; wherein a connection point between the third resistor and the fourth resistor is a first node, and a connection point between the fourth resistor and the fifth resistor is a second node; the first node and the second node are respectively connected to a feedback input terminal of the error amplifier through a first transmission gate and a second transmission gate, an enable control terminal of the first transmission gate is connected to a third control signal terminal, and an enable control terminal of the second transmission gate is connected to an inverted signal terminal of the third control signal.

13. The power amplifier module for realizing average power protection according to claim 3 or 4, characterized in that: The third control signal output by the logic control unit controls the VLPM LDO circuit; wherein, When the power amplifier module enters the average power protection working mode, the VLPM LDO circuit outputs a second bias voltage with a high potential, which is provided to the bias unit of the power amplifier, and the node potential in the bias unit is changed, so that the bias unit outputs a reduced bias voltage, thereby reducing the gain of the power amplifier unit; When the power amplifier module exits the average power protection working mode, the VLPM LDO circuit outputs a second bias voltage of a low potential, which is provided to the bias unit of the power amplifier, so that the bias unit outputs a normal bias voltage and the power amplifier maintains a normal gain.

14. An electronic device, characterized in that A power amplifier module for realizing average power protection comprising any one of claims 1 to 13.

15. A method for protecting the average power of a power amplifier module, characterized in that The steps include: (1) Detecting the power in the power amplifier module; (2) determining whether the detected power is greater than or equal to a first power threshold; when the detected power is greater than or equal to the first power threshold, proceeding to the next step; Otherwise, return to step (1) and continue to detect power; (3) starting timing after the detection power is greater than or equal to the first power threshold, and this timing is the first timing time; (4) determining whether the first timing time reaches a first time threshold; when the first timing time reaches the first time threshold, proceeding to the next step; Otherwise, return to step (1); (5) The power amplifier module enters the average power protection working mode; the control circuit adjusts the gain of the power amplifier unit to protect the power amplifier module; (6) The power amplifier module starts timing after entering the average power protection working mode, and this timing is the second timing time; (7) Determine whether the second timing time reaches the second time threshold; when the second timing time reaches the second time threshold, proceed to the next step; otherwise, return to step (6) and continue timing; (8) The power amplifier module exits the average power protection working mode; (9) Determine whether the detected power is less than or equal to the second power threshold; when the detected power is less than or equal to the second power threshold, proceed to the next step; otherwise, return to step (5), and the power amplifier module continues to enter the average power protection working mode; (10) The power amplifier module continues to exit the average power protection working mode; return to step (1).

16. The average power protection method of the power amplifier module according to claim 15, characterized in that In the step (5): The control circuit controls the RF input switch unit; when the power amplifier module enters the average power protection working mode, the RF input signal is output after passing through the RF path provided with an attenuation network, so that the gain of the power amplifier unit is reduced.

17. The average power protection method of the power amplifier module according to claim 15, characterized in that In the step (5): The control circuit controls the VBIAS LDO circuit; when the power amplifier module enters the average power protection working mode, the VBIAS LDO circuit outputs a reduced first bias voltage The voltage is provided to the bias unit of the power amplifier to reduce the gain of the power amplifier unit.

18. The average power protection method of the power amplifier module according to claim 15, characterized in that In the step (5): The control circuit controls the VLPM LDO circuit; when the power amplifier module enters the average power protection working mode, the VLPM LDO circuit outputs a second bias voltage with a high potential, which is provided to the bias unit of the power amplifier, and the node potential in the bias unit is changed, so that the bias unit outputs a reduced bias voltage, thereby reducing the gain of the power amplifier unit.

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