Improved vector pulse control method for t-type three-level inverter, and related device

Abstract

The present application is applicable to the technical field of inverter control, and provides an improved vector pulse control method for a T-type three-level inverter, and a related device. The method comprises: constructing a dynamic equation of alternating current sides of a plurality of parallel T-type three-level inverters; determining a reference voltage vector within a control cycle on the basis of the dynamic equation; determining a zero-sequence duty ratio difference of two parallel inverters on the basis of the reference voltage vector and an SVPWM switching time sequence in sector areas, the SVPWM switching time sequence comprising a control variable for vector time adjustment; determining circulating current of each sector area and the control variable on the basis of the dynamic equation, the reference voltage vector and the zero-sequence duty ratio difference; and performing circulating current control on the basis of the control variable. According to the present invention, the control variable for vector time adjustment can be accurately calculated, and compared with direct giving of the variable, the precision is higher, the control strategy is simple, the output current waveform can be better improved, the harmonic of the output current of a system is reduced, and the stability of grid-connected operation of the system is improved.

Description

Improved vector pulse control method and related equipment for T-type three-level inverter

[0001] This application claims priority to the Chinese patent application with application number 202311381241.0 and application name “Improved vector pulse control method and related equipment for T-type three-level inverter” filed with the State Intellectual Property Office of China on October 23, 2023, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application belongs to the technical field of inverter control, and in particular relates to an improved vector pulse control method for a T-type three-level inverter and related equipment. Background Art

[0003] As one of the most common converter topologies for bidirectional energy flow, the T-type three-level inverter offers advantages such as fewer power devices, low switching losses, and high efficiency. Typically, in energy conversion systems, operating multiple low-power inverters in parallel is a common practice to increase system power. This parallel operation of converters offers several advantages: First, it allows for flexible coordination of power levels; second, in systems with the same power level, operating multiple low-power converters in parallel can reduce the current stress on individual converters and increase overall system efficiency. Therefore, the T-type three-level inverter is often used in DC-AC energy conversion systems.

[0004] When operating multiple T-type three-level inverters in parallel, the main issues to consider are current sharing control, circulating current suppression, and neutral point potential (NPP) balancing. Existing methods for controlling circulating currents typically employ feedforward control based on the difference in the non-zero vector duty cycles of the two inverters' SVPWM (Space Vector Pulse Width Modulation) to suppress circulating currents, or by varying the duration of the small vector action. However, these methods only address two-level systems and are not applicable to three-level systems, effectively preventing circulating currents in three-level systems.

[0005] Application Contents

[0006] The present invention addresses the existing art of suppressing circulating current by introducing feedforward control based on the difference in the non-zero vector duty cycles of the two inverter SVPWMs, or by varying the duration of a small vector pulse, which is not applicable to three-level systems and cannot effectively suppress circulating current in three-level systems. Therefore, an improved vector pulse control method for a T-type three-level inverter is provided, aiming to address the circulating current problem in a parallel T-type three-level inverter system, improve the system's conversion efficiency, reduce the harmonics of the system's output current, and enhance the stability of the system's grid-connected operation.

[0007] In a first aspect, an embodiment of the present application provides an improved vector pulse control method for a T-type three-level inverter, comprising the following steps:

[0008] Model multiple parallel-connected T-type three-level inverters and determine the dynamic equations on the AC side;

[0009] determining a reference voltage vector within a control period based on the dynamic equation;

[0010] Determining a zero-sequence duty cycle difference between two parallel T-type three-level inverters based on an SVPWM switching timing sequence of the reference voltage vector in a sector area of ​​the SVPWM vector diagram in combination with the reference voltage vector, wherein the SVPWM switching timing sequence includes a control variable for vector time adjustment;

[0011] Determining the circulating current and the control variable of each sector in the SVPWM vector diagram according to the dynamic equation, the reference voltage vector and the zero-sequence duty cycle difference;

[0012] Based on the control variable, circulating current control is performed on any one of the plurality of parallel-connected T-type three-level inverters.

[0013] Furthermore, the modeling of multiple parallel T-type three-level inverters to determine the dynamic equations on the AC side includes:

[0014] The dynamic equation of the AC side is constructed based on the circuit element parameters in the T-type three-level inverter circuit, the AC electromotive force on each circuit, and the output electrical signal parameters of each inverter. The dynamic equation is expressed as follows:

[0015] Where, L f 、R f Respectively represent the filter inductance and equivalent resistance; i an 、i bn 、i cn Respectively represent the output current of the nth inverter; v can ,v cbn ,v ccn Represent the output voltage of the nth inverter respectively; e a 、e b 、e c They represent the AC electromotive force in the T-type three-level inverter circuit respectively.

[0016] Furthermore, determining the reference voltage vector within the control period based on the dynamic equation includes:

[0017] According to the voltage vectors of each sector in the SVPWM vector diagram of the dynamic equation, the reference voltage vector within the control period is determined. The expression of the reference voltage vector is as follows:

[0018] Where, v x 、v y 、v z is the voltage vector of each sector in the SVPWM vector diagram; d x d y d z is the duty cycle of the voltage vector in each sector area.

[0019] Furthermore, the determining of the zero-sequence duty cycle difference of two parallel T-type three-level inverters based on the SVPWM switching timing of the reference voltage vector in the sector area of ​​the SVPWM vector diagram in combination with the reference voltage vector includes:

[0020] When two T-type three-level inverters are connected in parallel, obtaining the SVPWM switching timing of the reference voltage vector in the sector area of ​​the SVPWM vector diagram, wherein the SVPWM switching timing includes a control variable for vector time adjustment;

[0021] determining a zero-sequence duty cycle of any one of two parallel-connected T-type three-level inverters according to the SVPWM switching timing and the reference voltage vector;

[0022] Where λ represents the control variable; d 01 represents the zero-sequence duty cycle of one T-type three-level inverter; d x1 d y1 Respectively represent the corresponding d 01 Zero-sequence duty cycle in different dimensions;

[0023] Based on the symmetry of the zero-sequence circulating current of the parallel inverters, the zero-sequence duty cycle difference of the two parallel T-type three-level inverters is determined. The expression of the zero-sequence duty cycle difference is as follows:

[0024] Where, d x2 d y2 They respectively represent the zero-sequence duty cycle of another inverter in different dimensions.

[0025] Furthermore, determining the circulating current and the control variable of the SVPWM vector diagram in each sector area according to the dynamic equation, the reference voltage vector and the zero-sequence duty cycle difference includes:

[0026] According to the reference voltage vector and the conversion equation of the motion equation in the dq coordinate system, a zero-sequence duty cycle difference conversion equation is determined; wherein,

[0027] The transformation equation of motion is as follows:

[0028] The zero-sequence duty cycle difference equation is as follows:

[0029] Where, d 02 is the zero-sequence duty cycle of the other inverter in the two parallel T-type three-level inverters;

[0030] According to the zero-sequence duty cycle difference conversion equation and the zero-sequence duty cycle difference, the circulating current in each sector and the control variable are determined; wherein,

[0031] The circulation expression after introducing the control variables is as follows:

[0032] The expression of the control variable is as follows:

[0033] Among them, the expressions of circulating current and output current in each phase are as follows:

[0034] Where, v dc Indicates the DC bus voltage.

[0035] Furthermore, the performing circulating current control on any one of the plurality of parallel T-type three-level inverters based on the control variable includes:

[0036] According to the circulating current symmetry of the parallel inverters, the circulating current of one of the two parallel T-type three-level inverters is controlled based on the improved vector pulse with the control variable introduced, and the circulating current of the other T-type three-level inverter is controlled by the original SVPWM algorithm.

[0037] In a second aspect, an embodiment of the present application further provides an improved vector pulse control system for a T-type three-level inverter, comprising:

[0038] A modeling unit, used to model multiple parallel-connected T-type three-level inverters and determine the dynamic equations on the AC side;

[0039] a voltage vector determining unit, configured to determine a reference voltage vector within a control period based on the dynamic equation;

[0040] a zero-sequence duty cycle difference determining unit, configured to determine a zero-sequence duty cycle difference between two parallel T-type three-level inverters based on an SVPWM switching timing sequence of the reference voltage vector in a sector area of ​​the SVPWM vector diagram and in combination with the reference voltage vector, wherein the SVPWM switching timing sequence includes a control variable for vector time adjustment;

[0041] a circulating current and control variable determining unit, configured to determine the circulating current and the control variable of each sector in the SVPWM vector diagram according to the dynamic equation, the reference voltage vector, and the zero-sequence duty cycle difference;

[0042] A control unit is used to perform circulating current control on any one of a plurality of parallel T-type three-level inverters based on the control variable.

[0043] In a third aspect, an embodiment of the present application further provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, the steps of the improved vector pulse control method for the T-type three-level inverter described in the first aspect are implemented.

[0044] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, comprising: the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the improved vector pulse control method for the T-type three-level inverter described in the first aspect above are implemented.

[0045] The present invention achieves the following beneficial effects: The present invention first models multiple parallel T-type three-level inverters, determines the dynamic equations for the AC side, determines a reference voltage vector within a control cycle based on the dynamic equations, determines the SVPWM switching timing of the reference voltage vector in a sector of the SVPWM vector diagram, and combines the reference voltage vector to determine the zero-sequence duty cycle difference of the two parallel T-type three-level inverters. Furthermore, a control variable for vector time adjustment is introduced into the SVPWM switching timing. Finally, the circulating current and control variables for each sector of the SVPWM vector diagram are determined based on the dynamic equations, the reference voltage vector, and the zero-sequence duty cycle difference. The above method accurately calculates the control variables for vector time adjustment. Compared with directly specifying the variables for vector time adjustment, the control strategy is more precise, simpler, and more convenient for calculation based on current line parameters, thereby accurately controlling the circulating current of any of the multiple parallel T-type three-level inverters. Furthermore, the circulating current control can better reduce device losses, improve system conversion efficiency, significantly improve the output current waveform, reduce harmonics in the system output current, and enhance the stability of the system's grid-connected operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0047] FIG1 is a schematic diagram of a parallel system of two T-type three-level inverters provided in an embodiment of the present application;

[0048] 2 is a flow chart of an improved vector pulse control method for a T-type three-level inverter provided by an embodiment of the present invention;

[0049] FIG3 is a control block diagram of parallel inverters including circulating current control provided in an embodiment of the present application;

[0050] 4 is a timing diagram of an improved SVPWM switch of two parallel T-type three-level inverters in sector I provided by an embodiment of the present application;

[0051] FIG5 is a structural diagram of an improved vector pulse control system for a T-type three-level inverter provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0053] This application accurately calculates the control variables used for vector adjustment time. Compared with directly specifying the variables used to adjust the vector time, it has higher accuracy and a simpler control strategy. It is more conducive to calculation based on the current line parameters, so as to accurately control the circulating current of any one of multiple parallel T-type three-level inverters. Circulating current control can better reduce device losses, improve system conversion efficiency, and significantly improve the output current waveform, reduce system output current harmonics, and improve the stability of the system's grid-connected operation.

[0054] Example 1

[0055] In conjunction with Figure 1, Figure 1 shows a schematic diagram of a parallel system of two T-type three-level inverters provided in an embodiment of the present application. The improved vector pulse control method for a T-type three-level inverter provided in this application is applicable to the circulating current control of the parallel system of two T-type three-level inverters shown in Figure 1. As shown in Figure 2, Figure 2 is a flow chart of the improved vector pulse control method for a T-type three-level inverter provided in an embodiment of the present invention. The method specifically includes steps S10 to S50. The specific implementation principles of each step are as follows:

[0056] S10. Model multiple parallel-connected T-type three-level inverters and determine the dynamic equations on the AC side.

[0057] Specifically, in the embodiment of the present application, two T-type three-level inverters are connected in parallel as an example. As shown in FIG1 , the two T-type three-level inverters are connected in parallel, and the DC side includes bus capacitors C1 and C2 connected in series at both ends of the bus. One of the T-type three-level inverters includes a transistor S a11 、S b11 、S c11 , S a21 、S b21 、S c21 , S a31 、S b31 、S c31 , S a41 、S b41 、S c41 There is an inductor L in series on each phase line. f1 and resistor R f1 Another T-type three-level inverter includes transistor S a12 、S b12 、S c12 , S a22 、S b22 、S c22 , S a32 、S b32 、S c3 2, S a42 、S b42 、S c42 There is an inductor L in series on each phase line. f2 and resistor R f2 The same phase of two T-type three-level inverters is connected. The DC bus voltage V can be sampled on the DC bus. dc .

[0058] Based on Figure 1, the circuit component parameters of the two parallel T-type three-level inverters can be used to model the AC side dynamic equations. Specifically, the AC side dynamic equations can be constructed based on the circuit component parameters in the T-type three-level inverter circuit, the AC electromotive force on each circuit, and the output electrical signal parameters of each inverter. The dynamic equations are expressed as follows:

[0059] Where, L f 、R f Respectively represent the filter inductance and equivalent resistance; i an 、i bn 、i cn Respectively represent the output current of the nth inverter; v can 、v cbn 、vccn Represent the output voltage of the nth inverter respectively; e a 、e b 、e c They represent the AC electromotive force in the T-type three-level inverter circuit. The output voltage of the inverter can be calculated by sampling the output voltage of each phase, and the output current of the inverter can be calculated by sampling the output current of each phase.

[0060] S20. Determine a reference voltage vector within a control period based on a dynamic equation.

[0061] Specifically, there is an SVPWM vector diagram corresponding to SVPWM control, which includes multiple sectors. Based on the voltage vector in each sector in the above formula (1), the three closest vectors can be used to generate the reference voltage vector in each control cycle. The expression of the reference voltage vector is as follows:

[0062] Where, v x 、v y 、v z is the voltage vector of each sector in the SVPWM vector diagram; d x d y d z is the duty cycle of the voltage vector in each sector.

[0063] S30, determining a zero-sequence duty cycle difference between two parallel-connected T-type three-level inverters based on an SVPWM switching timing sequence in a sector area of ​​the SVPWM vector diagram in combination with the reference voltage vector, wherein the SVPWM switching timing sequence includes a control variable for vector time adjustment;

[0064] Specifically, in this embodiment, in order to accurately perform circulating current control through the SVPWM method, a control variable for vector time adjustment is introduced to control the zero-sequence duty cycle. Δ The value of d0 is 0. According to the various parameters in the system, the corresponding control variables can be accurately calculated to perform circulation control, thereby obtaining an improved SVPWM control method. The non-traditional SVPWM is to introduce control variables by giving fixed variables.

[0065] The reference voltage vector can be mapped to the sector of the SVPWM vector diagram, and the SVPWM switching timing corresponding to the reference voltage vector can be obtained. Combined with the control variables, the zero-sequence duty cycle of the two parallel T-type three-level inverters can be determined based on the SVPWM switching timing, and the zero-sequence duty cycle difference between the two T-type three-level inverters can be calculated.

[0066] S40. Determine the circulating current and control variables of each sector in the SVPWM vector diagram according to the dynamic equation, the reference voltage vector, and the zero-sequence duty cycle difference.

[0067] S50 , performing circulating current control on any one of the plurality of parallel-connected T-type three-level inverters based on the control variable.

[0068] Specifically, by performing a coordinate transformation on the equation of motion and combining the reference voltage vector with the transformed equation, we can derive the relationship between the zero-sequence duty cycle difference and the various parameters in the equation of motion. Then, by combining the zero-sequence duty cycle difference of two T-type three-level inverters with the control variables introduced, we can derive the relationship between the circulating current and various system parameters, as well as the relationship between the control variables and various system parameters.

[0069] More specifically, after calculating the control variable, the control variable can be substituted into the circulating current expression to control the circulating current. As shown in Figure 3, the circulating current of the parallel inverters is symmetrical. It is only necessary to suppress the circulating current of one inverter using the improved vector pulse control method for T-type three-level inverters provided by this application (the improved SVPWM modulation in Figure 3). The other inverter can then use the grid-connected current control algorithm for SVPWM modulation.

[0070] In an embodiment of the present invention, multiple parallel T-type three-level inverters are first modeled to determine the dynamic equations for the AC side. A reference voltage vector within a control cycle is determined based on the dynamic equations. The SVPWM switching timing of the reference voltage vector in a sector of the SVPWM vector diagram is then combined with the reference voltage vector to determine the zero-sequence duty cycle difference of the two parallel T-type three-level inverters. A control variable for vector time adjustment is introduced into the SVPWM switching timing. Finally, the circulating current and control variables for each sector of the SVPWM vector diagram are determined based on the dynamic equations, the reference voltage vector, and the zero-sequence duty cycle difference. This method accurately calculates the control variables for vector time adjustment. Compared to directly specifying the variables for vector time adjustment, the control strategy is more precise, simpler, and more conducive to calculation based on current line parameters. This allows for precise circulating current control of any of the multiple parallel T-type three-level inverters. Circulating current control can also reduce device losses, improve system conversion efficiency, significantly improve the output current waveform, reduce harmonics in the system output current, and enhance the stability of the system's grid-connected operation.

[0071] Example 2

[0072] 4 , in this embodiment, based on the first embodiment, step S30 of determining the zero-sequence duty cycle difference of two parallel T-type three-level inverters according to the SVPWM switching timing of the reference voltage vector in the sector area of ​​the SVPWM vector diagram in combination with the reference voltage vector specifically includes:

[0073] S301, when two T-type three-level inverters are connected in parallel, obtaining an SVPWM switching timing sequence of a reference voltage vector in a sector area of ​​an SVPWM vector diagram, wherein the SVPWM switching timing sequence includes a control variable for vector time adjustment;

[0074] S302, determining a zero-sequence duty cycle of any one of two parallel-connected T-type three-level inverters according to the SVPWM switching timing and the reference voltage vector;

[0075] Where λ represents the control variable; d 01 represents the zero-sequence duty cycle of one T-type three-level inverter; d x1 d y1 Respectively represent the corresponding d 01 Zero-sequence duty cycle in different dimensions;

[0076] S303. Based on the symmetry of the zero-sequence circulating current of the parallel inverters, determine the zero-sequence duty cycle difference of the two parallel T-type three-level inverters. The expression of the zero-sequence duty cycle difference is as follows:

[0077] Where, d x2 d y2 They respectively represent the zero-sequence duty cycle of another inverter in different dimensions.

[0078] Specifically, Figure 4 shows the improved SVPWM switching timing diagram for the reference voltage vector of two parallel T-type three-level inverters in sector I of the SVPWM vector diagram. Compared to SVPWM, Figure 4 introduces a control variable λ, which can change the adjustment time of each vector to ensure that the zero-sequence duty cycle Δd0 is zero.

[0079] More specifically, by combining the SVPWM switching timing in the improved SVPWM switching timing diagram and the above formula (2), the zero-sequence duty cycle d of any one of the two parallel T-type three-level inverters can be determined. 01 , zero sequence duty cycle d 01 The expression is shown in the above formula (3). Similarly, the zero-sequence duty cycle d of another T-type three-level inverter can also be determined. 02 Based on the symmetry of the zero-sequence circulating current of the parallel inverter, the zero-sequence duty cycle d 01 and zero sequence duty cycle d02 , determine the zero-sequence duty cycle difference of the two parallel T-type three-level inverters, as shown in the above formula (4).

[0080] More specifically, the relationship between the control variable λ and the zero-sequence duty cycle difference Δd0 can be obtained according to the above formula (4). The zero-sequence duty cycle difference Δd0 can be accurately calculated based on the control variable, thereby changing each vector adjustment time to make the value of the zero-sequence duty cycle Δd0 0, ultimately improving the output current waveform, significantly reducing the harmonics of the system output current, and improving the stability of the system's grid-connected operation.

[0081] Example 3

[0082] In this embodiment, based on the above-mentioned embodiment 2, the above-mentioned step S40: determining the circulating current and control variables of the SVPWM vector diagram in each sector according to the dynamic equation, the reference voltage vector and the zero-sequence duty cycle difference, includes:

[0083] S401, determine the zero-sequence duty cycle difference conversion equation based on the reference voltage vector and the conversion equation of the motion equation in the dq coordinate system; wherein,

[0084] The transformation equation of the motion equation is shown in equation (5):

[0085] The zero-sequence duty cycle difference equations are shown in equations (6) and (7):

[0086] Where, d 02 is the zero-sequence duty cycle of the other inverter in the two parallel T-type three-level inverters;

[0087] S402, determining the circulating current and control variables in each sector according to the zero-sequence duty cycle difference conversion equation and the zero-sequence duty cycle difference; wherein,

[0088] The circulation expression after the control variables are introduced is shown in the following formula (8):

[0089] The above formula (8) can be transformed into the following formula (9) through Laplace transformation:

[0090] The expression of the control variable is shown in the following formula (10):

[0091] The expressions of the circulating current and the output current in each phase are shown in the following equation (11):

[0092] Where, v dc Indicates the DC bus voltage.

[0093] Specifically, the above equation (1) can be transformed into the dq coordinate system, and the conversion equation after the transformation is shown in the above equation (5). Substituting the above equation (2) into the above equation (5), the above equation (6) is transformed. Transforming equation (6) can obtain the above zero-sequence duty cycle difference equation (7), thereby obtaining the correlation between the zero-sequence duty cycle and the various parameters in the motion equation. The generation of circulating current is mainly caused by the difference in zero-sequence duty cycle. Therefore, when Δd0 is controlled to be around 0, the circulating current in the system can be better suppressed.

[0094] More specifically, by substituting equation (4) into equation (7), we can obtain equation (8), which represents the circulation in each sector after the control variable is introduced. Laplace transforming equation (8) yields equation (9), which, after transforming equation (9), yields the expression for the control variable shown in equation (10). Equation (10) allows for the precise calculation of the control variable.

[0095] In this embodiment, an improved SVPWM method for circulating current control in a parallel T-type three-level inverter is developed by introducing a control variable for vector time adjustment. This method accurately calculates the control variable λ used for vector time adjustment. Compared with directly specifying the variable for adjusting vector time, this method can better suppress system circulating current, improve the output waveform, and reduce output current harmonics, achieving a better circulating current suppression effect. Furthermore, suppressing circulating current can reduce device losses, further improving system conversion efficiency.

[0096] Example 4

[0097] 5 , which is a schematic diagram of the structure of an improved vector pulse control system for a T-type three-level inverter according to an embodiment of the present invention. The improved vector pulse control system M10 for a T-type three-level inverter includes:

[0098] Modeling unit M100, used to model multiple parallel-connected T-type three-level inverters and determine the dynamic equations on the AC side;

[0099] A voltage vector determination unit M200 is configured to determine a reference voltage vector within a control period based on a dynamic equation;

[0100] A zero-sequence duty cycle difference determination unit M300 is configured to determine a zero-sequence duty cycle difference between two parallel T-type three-level inverters based on an SVPWM switching timing sequence in a sector of an SVPWM vector diagram according to a reference voltage vector, in combination with the reference voltage vector. The SVPWM switching timing sequence includes a control variable for vector time adjustment.

[0101] The circulating current and control variable determination unit M400 is used to determine the circulating current and control variables of each sector in the SVPWM vector diagram according to the dynamic equation, the reference voltage vector and the zero-sequence duty cycle difference;

[0102] The control unit M500 is used to perform circulating current control on any one of the multiple parallel-connected T-type three-level inverters based on the control variable.

[0103] Preferably, the modeling unit M100 is specifically used to:

[0104] The dynamic equation of the AC side is constructed based on the circuit component parameters in the T-type three-level inverter circuit, the AC electromotive force on each circuit, and the output electrical signal parameters of each inverter. The dynamic equation is expressed as follows:

[0105] Where, L f 、R f Respectively represent the filter inductance and equivalent resistance; i an 、i bn 、i cn Respectively represent the output current of the nth inverter; v can ,v cbn ,v ccn Represent the output voltage of the nth inverter respectively; e a 、e b 、e c They represent the AC electromotive force in the T-type three-level inverter circuit respectively.

[0106] Preferably, the voltage vector determination unit M200 is specifically configured to:

[0107] According to the voltage vector of each sector in the SVPWM vector diagram of the dynamic equation, the reference voltage vector within the control cycle is determined. The expression of the reference voltage vector is as follows:

[0108] Where, v x 、v y 、v z is the voltage vector of each sector in the SVPWM vector diagram; d x d y d z is the duty cycle of the voltage vector in each sector.

[0109] Preferably, the zero-sequence duty cycle difference determining unit M300 is specifically configured to:

[0110] When two T-type three-level inverters are connected in parallel, an SVPWM switching timing sequence of a reference voltage vector in a sector area of ​​an SVPWM vector diagram is obtained, wherein the SVPWM switching timing sequence includes a control variable for vector time adjustment;

[0111] Determine the zero-sequence duty cycle of any one of the two parallel T-type three-level inverters based on the SVPWM switching timing and the reference voltage vector;

[0112] Where λ represents the control variable; d 01 represents the zero-sequence duty cycle of one T-type three-level inverter; d x1 d y1 Respectively represent the corresponding d 01 Zero-sequence duty cycle in different dimensions;

[0113] Based on the symmetry of the zero-sequence circulating current of the parallel inverters, the zero-sequence duty cycle difference of the two parallel T-type three-level inverters is determined. The expression of the zero-sequence duty cycle difference is as follows:

[0114] Where, d x2 d y2 They respectively represent the zero-sequence duty cycle of another inverter in different dimensions.

[0115] Preferably, the circulation and control variable determination unit M400 is specifically configured to:

[0116] According to the reference voltage vector and the conversion equation of the motion equation in the dq coordinate system, the zero-sequence duty cycle difference conversion equation is determined; where,

[0117] The transformation equations of motion are shown below:

[0118] The zero-sequence duty cycle difference equation is as follows:

[0119] Where, d 02 is the zero-sequence duty cycle of the other inverter in the two parallel T-type three-level inverters;

[0120] According to the zero-sequence duty cycle difference conversion equation and the zero-sequence duty cycle difference, the circulating current and control variables in each sector are determined; wherein,

[0121] The circulation expression after the control variables are introduced is as follows:

[0122] The expressions of the control variables are as follows:

[0123] Among them, the expressions of circulating current and output current in each phase are as follows:

[0124] Where, v dc Indicates the DC bus voltage.

[0125] Preferably, the control unit M500 is specifically configured to perform circulating current control on one of the two parallel T-type three-level inverters based on the improved vector pulse with the control variable introduced according to the circulating current symmetry of the parallel inverters, and perform circulating current control on the other T-type three-level inverter using the original SVPWM algorithm.

[0126] The improved vector pulse control system for a T-type three-level inverter provided in the embodiments of the present invention can implement each process implemented by the improved vector pulse control method for a T-type three-level inverter in the above-mentioned method embodiment, and can achieve the same beneficial effects. To avoid repetition, it will not be described here.

[0127] An embodiment of the present application also provides an electronic device comprising: at least one processor, a memory, a network interface, and a computer program stored in the memory and executable on the at least one processor. The processor is configured to invoke the computer program stored in the memory and execute various implementations of the improved vector pulse control method for a T-type three-level inverter described in the above-described embodiment, thereby achieving the corresponding beneficial effects. To avoid repetition, these are not further described here.

[0128] It should be understood that the processor may be a central processing unit (CPU) in some embodiments, or may be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc.

[0129] In some embodiments, the memory may be an internal storage unit of an electronic device, such as a hard disk or memory of the electronic device. In other embodiments, the memory may also be an external storage device of the electronic device, such as a plug-in hard disk equipped on the electronic device, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), etc. Furthermore, the memory may also include both an internal storage unit of the electronic device and an external storage device. The memory is used to store an operating system, an application, a boot loader (BootLoader), data and other programs, such as the program code of a computer program. The memory may also be used to temporarily store data that has been output or is to be output. The network interface may include a wireless network interface or a wired network interface, which is generally used to establish a communication connection between the electronic device and other electronic devices.

[0130] The present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the computer program implements the various processes of the embodiment of the improved vector pulse control method for a T-type three-level inverter provided in the embodiment of the present invention, and can achieve the same technical effects. To avoid repetition, these are not described here.

[0131] An embodiment of the present application provides a computer program product. When the computer program product is run on an electronic device, the electronic device can implement the steps in the embodiment of the improved vector pulse control method for a T-type three-level inverter when the computer program product is executed.

[0132] Computer-readable media may include at least any entity or device capable of carrying computer program code to a camera / terminal device, recording medium, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, such as a USB flash drive, a removable hard drive, a magnetic disk, or an optical disk.

[0133] The terms "first", "second", etc. in the specification and claims of this application or the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. Reference to "embodiment" in this article means that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0134] The above disclosure is only a preferred embodiment of the present application, and certainly cannot be used to limit the scope of rights of the present application. Therefore, equivalent changes made according to the claims of the present application are still within the scope covered by the present application.

Claims

1. An improved vector pulse control method for a T-type three-level inverter, characterized in that: The following steps are involved: Model multiple parallel-connected T-type three-level inverters and determine the dynamic equations on the AC side; Determining a reference voltage vector within a control period based on the dynamic equation; Determine the zero-sequence duty ratio difference of two parallel T-type three-level inverters according to the SVPWM switch timing of the reference voltage vector in the sector area of ​​the SVPWM vector diagram, in combination with the reference voltage vector, wherein the SVPWM switch timing includes a control variable for vector time adjustment; Determine the circulating current and the control variable of each sector in the SVPWM vector diagram according to the dynamic equation, the reference voltage vector and the zero-sequence duty cycle difference; Based on the control variable, circulating current control is performed on any one of a plurality of parallel-connected T-type three-level inverters.

2. The improved vector pulse control method for a T-type three-level inverter according to claim 1, characterized in that: The method of modeling a plurality of parallel T-type three-level inverters and determining the dynamic equations on the AC side includes: The dynamic equation of the AC side is constructed according to the circuit element parameters in the T-type three-level inverter circuit, the AC electromotive force on each circuit, and the output electrical signal parameters of each inverter. The dynamic equation expression is as follows: Where, L f , R f Respectively represent the filter inductance and equivalent resistance; i an 、i bn 、i cn They represent the output current of the nth inverter respectively; v can ,v cbn ,v ccn They represent the output voltage of the nth inverter respectively; e a 、e b 、e c They respectively represent the AC electromotive force in the T-type three-level inverter circuit.

3. The improved vector pulse control method for a T-type three-level inverter according to claim 2, characterized in that: The determining of a reference voltage vector within a control period based on the dynamic equation comprises: According to the voltage vector of each sector in the SVPWM vector diagram of the dynamic equation, the reference voltage vector within the control period is determined, and the expression of the reference voltage vector is as follows: In the formula, v x 、v y 、v z is the voltage vector of each sector in the SVPWM vector diagram; d x d y d z is the duty cycle of the voltage vector in each sector area.

4. The improved vector pulse control method for a T-type three-level inverter according to claim 3, characterized in that: The method of determining the zero-sequence duty cycle difference of two parallel T-type three-level inverters according to the SVPWM switch timing in the sector area of ​​the SVPWM vector diagram in combination with the reference voltage vector comprises: When two T-type three-level inverters are connected in parallel, obtaining the SVPWM switching timing of the reference voltage vector in the sector area of ​​the SVPWM vector diagram, wherein the SVPWM switching timing includes a control variable for vector time adjustment; Determining a zero-sequence duty cycle of any one of two parallel-connected T-type three-level inverters according to the SVPWM switch timing and the reference voltage vector; In the formula, λ represents the control variable; d 01 represents the zero-sequence duty cycle of one T-type three-level inverter; d x1 d y1 Respectively represent the corresponding d 01 Zero-sequence duty cycle in different dimensions; Based on the symmetry of the zero-sequence circulating current of the parallel inverter, the The zero-sequence duty cycle difference is expressed as follows: Where, d x2 d y2 They respectively represent the zero-sequence duty cycle of another inverter in different dimensions.

5. The improved vector pulse control method for a T-type three-level inverter according to claim 4, characterized in that: Determining the circulating current and the control variable of the SVPWM vector diagram in each sector area according to the dynamic equation, the reference voltage vector and the zero-sequence duty cycle difference includes: According to the reference voltage vector and the conversion equation of the motion equation in the dq coordinate system, a zero-sequence duty cycle difference conversion equation is determined; wherein, The transformation equation of the equation of motion is as follows: The zero-sequence duty cycle difference equation is as follows: Where, d 02 is the zero-sequence duty cycle of the other inverter in the two parallel T-type three-level inverters; According to the zero-sequence duty cycle difference conversion equation and the zero-sequence duty cycle difference, the circulating current in each sector area and the control variable are determined; wherein, The circulation expression after introducing the control variables is as follows: The expression of the control variable is as follows: Among them, the expressions of circulating current and output current in each phase are as follows: In the formula, v dc Indicates the DC bus voltage.

6. The improved vector pulse control method for a T-type three-level inverter according to any one of claims 1 to 5, characterized in that: The performing circulating current control on any one of a plurality of parallel T-type three-level inverters based on the control variable comprises: According to the circulation symmetry of the parallel inverters, the circulation control of one of the two parallel T-type three-level inverters is performed based on the improved vector pulse with the control variable introduced, and the circulation control of the other T-type three-level inverter is performed through the original SVPWM algorithm.

7. The improved vector pulse control system of T-type three-level inverter is characterized in that: include: A modeling unit, used to model multiple parallel-connected T-type three-level inverters and determine the dynamic equations on the AC side; a voltage vector determination unit, configured to determine a reference voltage vector within a control period based on the dynamic equation; A zero-sequence duty cycle difference determination unit is used to determine the zero-sequence duty cycle difference according to the reference voltage vector in the SVPWM vector diagram. The SVPWM switching timing in the sector area is combined with the reference voltage vector to determine the zero-sequence duty cycle difference of two parallel T-type three-level inverters, and the SVPWM switching timing includes a control variable for vector time adjustment; A circulating current and control variable determination unit, used to determine the circulating current and the control variable of each sector area in the SVPWM vector diagram according to the dynamic equation, the reference voltage vector and the zero-sequence duty cycle difference; A control unit is used to perform circulating current control on any one of a plurality of parallel T-type three-level inverters based on the control variable.

8. An electronic device, characterized in that: include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the steps in the improved vector pulse control method for a T-type three-level inverter as claimed in any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in the improved vector pulse control method for a T-type three-level inverter according to any one of claims 1 to 6 are implemented.

Images