Memory safety protection system and method, computer device, and storage medium

Abstract

The present application relates to the technical field of memory protection, and discloses a memory safety protection system and method, a computer device, and a storage medium. The system comprises: a baseboard management controller, memory modules, and a memory cooling fan; each memory module comprises a plurality of memory units, and each memory unit comprises a power management circuit; the power management circuits are used for collecting memory state information of the memory units, and uploading the memory state information to the baseboard management controller; the baseboard management controller is used for receiving the memory state information uploaded by the power management circuits in the memory units, determining a target fan rotating speed control instruction on the basis of the memory state information, and sending the target fan rotating speed control instruction to the memory cooling fan; and the memory cooling fan is used for receiving the target fan rotating speed control instruction, and performing rotating speed adjustment according to the target fan rotating speed control instruction. By sending a command by means of a baseboard management controller, the present application guarantees memory safety and improves the stability of the whole server.

Description

Memory security protection system, method, computer device and storage medium

[0001] Cross-reference to Related Applications

[0002] The present application claims priority to the Chinese patent application No. 202410644209.5, filed on May 23, 2024, and entitled "Memory security protection system, method, computer device and storage medium", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present application relates to the field of memory protection technology, in particular to a memory security protection system, method, computer device and storage medium. BACKGROUND

[0004] At present, since the fifth generation double data rate synchronous dynamic random access memory (DDR5) has the functions of memory power-on and power-off control and temperature threshold control, it is beneficial to the safety protection of the memory. Therefore, DDR5 is widely used in servers.

[0005] In related technologies, the DDR5 usually reports temperature warning information to the relevant technical personnel when the memory temperature is too high, and the relevant technical personnel issues a corresponding memory cooling fan speed control command according to the obtained temperature warning information to quickly cool the DDR5.

[0006] However, in the case of a large number of servers, the speed control of the memory cooling fan by manually sending commands cannot achieve timely and rapid cooling of the DDR5, which cannot guarantee the safety of the memory and reduces the stability of the server as a whole. SUMMARY

[0007] Therefore, the present application provides a memory security protection system, method, computer device and storage medium to solve the problem that the speed control of the memory cooling fan by manually sending commands cannot achieve timely and rapid cooling of the DDR5, which cannot guarantee the safety of the memory and reduces the stability of the server as a whole.

[0008] In a first aspect, the present application provides a memory security protection system, the system comprising: a baseboard management controller, a memory module and a memory cooling fan, the memory module comprising a plurality of memory units, and the memory unit comprising a power management circuit.

[0009] The power management circuit is configured to collect memory state information of the memory unit and upload the memory state information to the baseboard management controller.

[0010] The substrate management controller is configured to receive memory state information uploaded by the power management circuit in each memory unit, determine a target fan speed control instruction according to the memory state information, and send the target fan speed control instruction to the memory cooling fan.

[0011] The memory cooling fan is configured to receive the target fan speed control instruction and adjust the speed according to the target fan speed control instruction.

[0012] In some embodiments, the memory safety protection system receives memory state information uploaded by the power management circuit in each memory unit through the substrate management controller, determines a target fan speed control instruction according to the memory state information, and sends the target fan speed control instruction to the memory cooling fan. The memory cooling fan receives the target fan speed control instruction and adjusts the speed according to the target fan speed control instruction. By determining the target fan speed control instruction according to the memory state information through the substrate management controller and sending the target fan speed control instruction to the memory cooling fan, the speed control of the memory cooling fan is realized, the memory is quickly and timely cooled, the safety of the memory is ensured, and the stability of the server is improved.

[0013] In some embodiments, the memory state information includes a memory temperature, and the substrate management controller is configured to:

[0014] determine whether the memory temperature of each memory unit exceeds a first temperature threshold according to the memory state information uploaded by the power management circuit in each memory unit;

[0015] determine a first memory unit as a memory unit whose memory temperature exceeds the first temperature threshold;

[0016] determine the first fan speed control instruction as a target fan speed control instruction corresponding to the first memory unit;

[0017] The first fan speed control instruction is configured to adjust the speed of the first memory cooling fan corresponding to the first memory unit to a first speed.

[0018] In some embodiments of the memory safety protection system, the substrate management controller determines a first memory unit whose memory temperature exceeds a first temperature threshold according to the memory state information uploaded by the power management circuit in each memory unit, to determine a target fan speed control instruction corresponding to the first memory unit, and the first memory cooling fan adjusts the speed according to the target fan speed control instruction. The memory is quickly and timely cooled, the safety of the memory is ensured, and the stability of the server is improved.

[0019] In some embodiments, the substrate management controller is further configured to:

[0020] monitor the memory temperature of the first memory unit in a preset time period after the rotating speed of the first memory cooling fan is adjusted to the first rotating speed;

[0021] in a case where the memory temperature of the first memory unit still exceeds the first temperature threshold in the preset time period, send a memory power-off command to the first power management circuit of the first memory unit;

[0022] The first power management circuit is further configured to:

[0023] receive the memory power-off command and perform power-off processing on the first memory unit according to the memory power-off command.

[0024] In some embodiments of the memory safety protection system, the baseboard management controller sends a memory power-off command to the first power management circuit of the first memory unit in a case where the memory temperature of the first memory unit still exceeds the first temperature threshold in the preset time period. The first power management circuit performs power-off processing on the first memory unit. This avoids damage to the memory unit due to high temperature and ensures the safety of the memory and improves the stability of the server.

[0025] In some embodiments, the baseboard management controller is further configured to:

[0026] in a case where the memory temperature of the first memory unit decreases to a second temperature threshold in the preset time period, determine the second fan rotating speed control instruction as the target fan rotating speed control instruction corresponding to the first memory unit;

[0027] The second fan rotating speed control instruction is used to adjust the rotating speed of the first memory cooling fan corresponding to the first memory unit to a second rotating speed, the second rotating speed is lower than the first rotating speed, and the second temperature threshold is lower than the first temperature threshold.

[0028] In some embodiments of the memory safety protection system, the baseboard management controller determines the second fan rotating speed control instruction as the target fan rotating speed control instruction of the first memory unit in a case where the memory temperature of the first memory unit decreases to a second temperature threshold in the preset time period, so that the rotating speed of the first memory cooling fan corresponding to the first memory unit is adjusted to a second rotating speed. This effectively controls the power consumption of the server and prolongs the service life of the memory.

[0029] In some embodiments, the memory state information includes a memory voltage, and the baseboard management controller is configured to:

[0030] determine whether the memory voltage of each memory unit exceeds a first voltage threshold according to the memory state information uploaded by the power management circuit in each memory unit;

[0031] determine the memory unit whose memory voltage exceeds the first voltage threshold as a second memory unit;

[0032] the first fan speed control instruction is used to adjust the speed of the second memory cooling fan corresponding to the second memory unit to the first speed.

[0033] The first fan speed control instruction is used to adjust the speed of the second memory cooling fan corresponding to the second memory unit to the first speed.

[0034] In some embodiments of the memory safety protection system, the baseboard management controller determines the second memory unit of the memory unit whose memory voltage exceeds the first voltage threshold based on the memory state information uploaded by the power management circuit in each memory unit, determines the target fan speed control instruction corresponding to the second memory unit, and adjusts the speed of the second memory cooling fan according to the target fan speed control instruction. The timely and rapid cooling of the memory is realized, the safety of the memory is ensured, and the stability of the server is improved.

[0035] In some embodiments, the baseboard management controller is further configured to:

[0036] monitor the memory voltage of the second memory unit within a preset time period after adjusting the speed of the second memory cooling fan to the first speed;

[0037] if the memory voltage of the second memory unit still exceeds the first voltage threshold within the preset time period, send a memory power-off command to the second power management circuit of the second memory unit;

[0038] The second power management circuit is further configured to:

[0039] receive the memory power-off command and perform power-off processing on the second memory unit according to the memory power-off command.

[0040] In some embodiments of the memory safety protection system, the baseboard management controller sends a memory power-off command to the second power management circuit of the second memory unit if the memory voltage of the second memory unit still exceeds the first voltage threshold within the preset time period. The second power management circuit performs power-off processing on the second memory unit. The problem of damage to the memory unit due to high temperature is avoided, the safety of the memory is ensured, and the stability of the server is improved.

[0041] In some embodiments, the baseboard management controller is configured to:

[0042] determine whether the memory voltage of each memory unit is lower than a second voltage threshold based on the memory state information uploaded by the power management circuit in each memory unit;

[0043] determine the memory unit whose memory voltage is lower than the second voltage threshold as a third memory unit;

[0044] The second fan speed control instruction is used as a target fan speed control instruction corresponding to the third memory unit.

[0045] The second fan speed control instruction is used to adjust the speed of the third memory cooling fan corresponding to the third memory unit to the second speed.

[0046] In some embodiments of the memory safety protection system, the baseboard management controller determines the third memory unit of the memory unit whose voltage is lower than the second voltage threshold according to the memory state information uploaded by the power management circuit in each memory unit, determines the target fan speed control instruction corresponding to the third memory unit, and adjusts the speed of the third memory cooling fan according to the target fan speed control instruction, thereby ensuring the safety of the memory and improving the stability of the server.

[0047] In some embodiments, the baseboard management controller is further configured to:

[0048] monitor the memory voltage of the third memory unit within a preset time period after adjusting the speed of the third memory cooling fan to the second speed;

[0049] send a memory power-off command to the third power management circuit of the third memory unit in a case where the memory voltage of the third memory unit within the preset time period is still lower than the second voltage threshold;

[0050] The third power management circuit is further configured to:

[0051] receive the memory power-off command and perform power-off processing on the third memory unit according to the memory power-off command.

[0052] In some embodiments of the memory safety protection system, the baseboard management controller sends a memory power-off command to the third power management circuit of the third memory unit in a case where the memory voltage of the third memory unit within the preset time period is still lower than the second voltage threshold. The third power management circuit performs power-off processing on the third memory unit, thereby ensuring the safety of the memory and improving the stability of the server.

[0053] In some embodiments, the system further comprises a control module and a target memory protector.

[0054] The control module is configured to monitor the state of the baseboard management controller to obtain a state monitoring result of the baseboard management controller, and call the target memory protector in a case where the state monitoring result of the baseboard management controller meets a preset constraint condition.

[0055] The power management circuit is further configured to upload the memory state information to the target memory protector.

[0056] The target memory protector is configured to receive memory state information uploaded by the power management circuit in each memory unit, determine a target fan rotating speed control instruction according to the memory state information, and send the target fan rotating speed control instruction to the memory cooling fan.

[0057] In some embodiments of the memory security protection system, the state monitoring result of the baseboard management controller satisfies the preset constraint condition, the target memory protector is called, the target fan rotating speed control instruction is determined according to the memory state information by the target memory protector, and the target fan rotating speed control instruction is sent to the memory cooling fan to control the rotating speed of the memory cooling fan. In this way, the memory is rapidly and timely cooled, the security of the memory is further ensured, and the stability of the server is improved.

[0058] In some embodiments, the power management circuit is further configured to:

[0059] In a case where the memory temperature of the memory unit satisfies a preset throttling function triggering condition, the throttling function of the memory unit is triggered.

[0060] In some embodiments of the memory security protection system, the security of the memory is ensured, and the stability of the server is improved.

[0061] In some embodiments, the memory state information includes a memory voltage, and the target memory protector is configured to:

[0062] For the memory unit triggering the throttling function, in a case where the memory voltage of the memory unit is lower than a second voltage threshold, the memory unit is determined as a fourth memory unit;

[0063] The first fan rotating speed control instruction is used as a target fan rotating speed control instruction corresponding to the fourth memory unit.

[0064] The first fan rotating speed control instruction is used to adjust the rotating speed of the fourth memory cooling fan corresponding to the fourth memory unit to a first rotating speed.

[0065] In some embodiments of the memory security protection system, the target memory protector determines a fourth memory unit in which the memory voltage exceeds a second voltage threshold in the memory unit triggering the throttling function according to the memory state information uploaded by the power management circuit in each memory unit, determines a target fan rotating speed control instruction corresponding to the fourth memory unit, and the fourth memory cooling fan adjusts the rotating speed according to the target fan rotating speed control instruction. In this way, the security of the memory is ensured, and the stability of the server is improved.

[0066] In some embodiments, the target memory protector is further configured to:

[0067] monitoring the memory voltage of the fourth memory unit in a preset time period after the rotating speed of the fourth memory cooling fan is adjusted to the first rotating speed;

[0068] in a case where the memory voltage of the fourth memory unit in the preset time period is still lower than the second voltage threshold, sending a memory power-off command to a fourth power management circuit of the fourth memory unit;

[0069] The fourth power management circuit is further configured to:

[0070] receive the memory power-off command and perform power-off processing on the fourth memory unit according to the memory power-off command.

[0071] In some embodiments of the memory safety protection system, the target memory protector sends a memory power-off command to a fourth power management circuit of the fourth memory unit in a case where the memory voltage of the fourth memory unit in the preset time period is still lower than the second voltage threshold. The fourth power management circuit performs power-off processing on the fourth memory unit. The safety of the memory is ensured, and the stability of the server is improved.

[0072] In some embodiments, the target memory protector is further configured to:

[0073] in a case where the memory voltage of the fourth memory unit in the preset time period is the second voltage threshold, taking the third fan rotating speed control instruction as a target fan rotating speed control instruction corresponding to the fourth memory unit;

[0074] The third fan rotating speed control instruction is used to adjust the rotating speed of the fourth memory cooling fan corresponding to the fourth memory unit in a manner of reducing the rotating speed by a preset rotating speed at a time until the rotating speed of the fourth memory cooling fan is adjusted to the second rotating speed.

[0075] In some embodiments of the memory safety protection system, the target memory protector determines a target fan rotating speed control instruction corresponding to the fourth memory unit in a case where the memory voltage of the fourth memory unit in the preset time period is the second voltage threshold. The fourth memory cooling fan adjusts the rotating speed according to the target fan rotating speed control instruction. The safety of the memory is ensured, and the stability of the server is improved.

[0076] In a second aspect, the present application provides a memory safety protection method, which comprises:

[0077] obtaining memory state information uploaded by a power management circuit in each memory unit;

[0078] determining a target fan rotating speed control instruction according to the memory state information based on a baseboard management controller;

[0079] sending the target fan rotating speed control instruction to a memory cooling fan to adjust the rotating speed of the memory cooling fan.

[0080] In a third aspect, the present application provides a server, comprising the memory security protection system according to the first aspect or any possible implementation thereof.

[0081] In a fourth aspect, the present application provides a computer device, comprising a memory and a processor, which are communicatively connected with each other, and the memory stores computer instructions, and the processor executes the memory security protection method according to the second aspect by executing the computer instructions.

[0082] In a fifth aspect, the present application provides a non-volatile computer readable storage medium, which stores computer instructions, and the computer instructions are used to make a computer execute the memory security protection method according to the second aspect.

[0083] In a sixth aspect, the present application provides a computer program product, which comprises computer instructions, and the computer instructions are used to make a computer execute the memory security protection method according to the second aspect. BRIEF DESCRIPTION OF DRAWINGS

[0084] In order to more clearly illustrate the technical solutions in the specific embodiments or the related art, the following will briefly introduce the drawings needed to be used in the specific embodiments or the related art description. Obviously, the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0085] FIG. 1 is a structural schematic diagram of a memory security protection system according to some embodiments of the present application;

[0086] FIG. 2 is a structural schematic diagram of another memory security protection system according to some embodiments of the present application;

[0087] FIG. 3 is a flow schematic diagram of a memory security protection method according to some embodiments of the present application;

[0088] FIG. 4 is a flow schematic diagram of another memory security protection method according to some embodiments of the present application;

[0089] FIG. 5 is a flowchart of implementing security protection on the memory by using the BMC end according to some embodiments of the present application;

[0090] FIG. 6 is a flowchart of implementing security protection on the memory by using the CPLD end according to some embodiments of the present application;

[0091] FIG. 7 is a hardware structural schematic diagram of a computer device according to some embodiments of the present application;

[0092] FIG. 8 is a structural schematic diagram of a non-volatile computer readable storage medium according to some embodiments of the present application;

[0093] FIG. 9 is a structural schematic diagram of a computer program product according to some embodiments of the present application. DETAILED DESCRIPTION

[0094] To make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0095] An electronic product of any architecture is composed of three basic devices, including a processor, a memory device and a storage device. The most core of the three basic devices is the memory device. Because the cache or memory capacity of the processor itself is limited, it cannot provide sufficient cache capacity or memory capacity, and the memory address space required for initialization of each peripheral device of the device needs to be provided by an independent memory device. Therefore, the importance of the memory is self-evident.

[0096] If the memory is damaged due to overheating for some reason, it will have a fatal impact on the stability of the whole server. At present, most servers use DDR4 memory. DDR4 memory only sets a threshold alarm information when the memory temperature reaches the temperature threshold value to record fault information, but does not take real effective measures to protect the memory mechanism. When the memory is really physically damaged, it can only be replaced by replacing the memory.

[0097] In the related art, in order to avoid memory over-temperature or reduce the temperature of the whole server, a full-speed fan running mode is adopted for physical cooling. This mode consumes a lot of energy. Hundreds of thousands of servers running in a data center will cause huge electricity loss. At the same time, if the fan of the server is damaged, the problem of over-temperature damage of the memory will still occur due to the increase of the temperature of the server.

[0098] Since the fifth generation double data rate synchronous dynamic random access memory (Double Data Rate, referred to as: DDR5) has the functions of memory power-on and power-off control and temperature threshold control, it is beneficial to the safety protection of the memory. Therefore, DDR5 is widely used in servers.

[0099] DDR5 usually reports temperature warning information to the relevant technical personnel when the memory temperature is too high. The relevant technical personnel issues a corresponding memory cooling fan speed control command according to the obtained temperature warning information to quickly cool the DDR5.

[0100] However, in the case of a large number of servers, the speed control of the memory cooling fan by manually sending a command cannot achieve timely and rapid cooling of the DDR5, which cannot guarantee the safety of the memory and reduces the stability of the server.

[0101] The embodiment of the present application provides a memory safety protection system. According to the memory state information, the baseboard management controller determines a target fan speed control instruction, and sends the target fan speed control instruction to the memory cooling fan to control the speed of the memory cooling fan, so as to achieve timely and rapid cooling of the memory, guarantee the safety of the memory, and provide the effect of the stability of the server.

[0102] According to the embodiment of the present application, a memory safety protection system is provided, as shown in FIG. 1, the system comprises a baseboard management controller (BMC) 101, a memory module 102 and a memory cooling fan (not shown in the figure), the memory module 102 comprises a plurality of memory units, and the memory unit comprises a power management circuit (PMIC).

[0103] It can be understood that the memory unit in the embodiment is DDR5.

[0104] In the embodiment, the power control signal of the power management circuit of the DDR5 is physically linked with the baseboard management controller through an Inter-Integrated Circuit (I2C) protocol. The voltage detection signal of the DDR5 memory slot and the temperature monitor are physically linked with the BMC end through the I2C protocol. The BMC is physically linked with the memory cooling fan through the I2C. The temperature monitor is used to obtain the temperature detection signal.

[0105] It should be noted that the bus for physical connection can also be a Peripheral Component Interconnect (PCI), a Low Pin Count (LPC), an Enhanced Serial Peripheral Interface (ESPI) and the like.

[0106] The system can include a plurality of memory modules, and the number of memory modules is determined according to the actual server condition. As shown in FIG. 1, the embodiment takes the system including 2 memory modules, and each memory module includes 16 memory units (i.e. DDR5-0 to DDR5-15) as an example. There is a memory module in each central processing unit (CPU), as shown in FIG. 1, there is a memory module in CPU0, and there is a memory module in CPU1.

[0107] It should be noted that CPU0 and CPU1 communicate through a standard communication interconnection communication protocol (Unified Processor Interface, referred to as: UPI) or a cache coherence interconnection interface standard for accelerators (Cache Coherent Interconnect for Accelerators, referred to as: CCIX) or a standard for large-scale memory system interconnection (Global Memory Interconnect eXtension, referred to as: GMIX).

[0108] The power management circuit is used to collect the memory state information of the memory unit, and upload the memory state information to the baseboard management controller.

[0109] It should be noted that during the server startup process or when the server has entered the operating system and is stably running, each power management circuit collects the memory state information of the corresponding memory unit, and uploads the memory state information to the baseboard management controller.

[0110] In other words, the baseboard management controller reads the memory state information of each memory unit in the server through the I2C protocol.

[0111] The memory state information can include memory voltage and / or memory temperature.

[0112] The baseboard management controller is used to receive the memory state information uploaded by the power management circuit in each memory unit, and determine the target fan speed control instruction according to the memory state information, and send the target fan speed control instruction to the memory cooling fan.

[0113] The baseboard management controller acquires the memory state information uploaded by the power management circuit in each memory unit, and determines the target fan speed control instruction of each memory unit according to the memory state information of each memory unit, and sends the target fan speed control instruction of each memory unit to the memory cooling fan corresponding to each memory unit.

[0114] It should be noted that the number of memory cooling fans may be different according to different types of servers, and one memory cooling fan may correspond to one memory unit, or one memory cooling fan may correspond to multiple adjacent memory units. It can be understood that, for any memory unit, the memory cooling fan closest to the memory unit is the memory cooling fan corresponding to the memory unit. There can be one memory cooling fan corresponding to all memory units, and the like.

[0115] The memory cooling fan is configured to receive a target fan speed control instruction and adjust the speed according to the target fan speed control instruction.

[0116] The memory cooling fan receives the target fan speed control instruction and adjusts the speed according to the target fan speed control instruction to achieve timely and rapid cooling of the memory and ensure the safety of the memory.

[0117] In some embodiments of the memory safety protection system, the baseboard management controller receives memory state information uploaded by the power management circuit in each memory unit, determines a target fan speed control instruction according to the memory state information, and sends the target fan speed control instruction to the memory cooling fan. The memory cooling fan receives the target fan speed control instruction and adjusts the speed according to the target fan speed control instruction. By determining the target fan speed control instruction according to the memory state information and sending the target fan speed control instruction to the memory cooling fan to control the speed of the memory cooling fan, timely and rapid cooling of the memory is achieved, the safety of the memory is ensured, and the stability of the server is improved.

[0118] According to an embodiment of the present application, a memory safety protection system is provided, as shown in FIG. 2, which includes a baseboard management controller 201, a memory module 202, and a memory cooling fan (not shown in the figure). The memory module includes a plurality of memory units, and each memory unit includes a power management circuit.

[0119] The power management circuit is configured to collect memory state information of the memory unit and upload the memory state information to the baseboard management controller.

[0120] The baseboard management controller is configured to receive memory state information uploaded by the power management circuit in each memory unit, determine a target fan speed control instruction according to the memory state information, and send the target fan speed control instruction to the memory cooling fan.

[0121] The memory state information includes memory temperature.

[0122] According to the memory state information uploaded by the power management circuit in each memory unit, it is determined whether the memory temperature of each memory unit exceeds a first temperature threshold.

[0123] In the case that the memory state information is the memory temperature, it is determined whether the memory temperature of each memory unit exceeds the first temperature threshold according to the memory temperature of each memory unit uploaded by the power management circuit in each memory unit.

[0124] It should be noted that the first temperature threshold is a memory temperature limit value, which is determined by a technician and is not specifically limited herein.

[0125] Determining whether the memory temperature of each memory unit exceeds the first temperature threshold includes determining whether the memory temperature of each memory unit is about to reach or has reached the first temperature threshold. In the case that the memory temperature of each memory unit is about to reach the first temperature threshold, the difference between the memory temperature and the first temperature threshold is within a preset range, and the preset range is a negative range. In the case that the memory temperature of each memory unit has reached the first temperature threshold, the memory temperature is greater than or equal to the first temperature threshold.

[0126] The memory unit whose memory temperature exceeds the first temperature threshold is determined as the first memory unit.

[0127] The memory unit whose memory temperature exceeds the first temperature threshold in the plurality of memory units is determined as the first memory unit.

[0128] The first fan speed control instruction is used as the target fan speed control instruction corresponding to the first memory unit.

[0129] The first fan speed control instruction is used to adjust the speed of the first memory cooling fan corresponding to the first memory unit to the first speed.

[0130] It should be noted that the first speed can be a full speed, that is, 100% speed.

[0131] The memory cooling fan is used to receive the target fan speed control instruction and adjust the speed according to the target fan speed control instruction.

[0132] Specifically, the speed of the first memory cooling fan corresponding to the memory unit whose memory temperature exceeds the first temperature threshold is adjusted to the first speed to cool the memory unit whose memory temperature exceeds the first temperature threshold.

[0133] In some embodiments of the memory safety protection system, the baseboard management controller determines the first memory unit whose memory temperature exceeds the first temperature threshold according to the memory state information uploaded by the power management circuit in each memory unit, determines the target fan speed control instruction corresponding to the first memory unit, and the first memory cooling fan adjusts the speed according to the target fan speed control instruction. This realizes timely and rapid cooling of the memory, ensures the safety of the memory, and improves the stability of the server.

[0134] In some optional embodiments, the baseboard management controller is further configured to:

[0135] monitor the memory temperature of the first memory unit within a preset time period after the speed of the first memory cooling fan is adjusted to the first speed.

[0136] The memory temperature of the first memory unit is continuously monitored after the speed of the first memory cooling fan is adjusted to the first speed. The preset time period is determined by a technician.

[0137] It should be noted that the continuous monitoring of the memory temperature of the first memory unit is achieved by using a timing reading method.

[0138] In a case where the memory temperature of the first memory unit within the preset time period still exceeds the first temperature threshold, a memory power-off command is sent to the first power management circuit of the first memory unit.

[0139] The baseboard management controller continuously monitors the memory temperature of the first memory unit within the preset time period. After the preset time period, the baseboard management controller reads the memory temperature of the first memory unit. If the memory temperature of the first memory unit is still about to reach or has reached the first temperature threshold, it indicates that the memory temperature of the first memory unit within the preset time period still exceeds the first temperature threshold. The memory unit may be damaged due to the increase of the memory temperature. Therefore, the baseboard management controller sends a memory power-off command to the first power management circuit in the first memory unit through an I2C protocol.

[0140] The first power management circuit is further configured to:

[0141] receive the memory power-off command and perform power-off processing on the first memory unit according to the memory power-off command.

[0142] The first power management circuit in the first memory unit receives the memory power-off command and performs power-off processing on the first memory unit according to the memory power-off command, so as to protect the first memory unit.

[0143] In some optional embodiments, the baseboard management controller is further configured to:

[0144] In a case where the memory temperature of the first memory unit within the preset time period decreases to a second temperature threshold, the second fan speed control instruction is used as a target fan speed control instruction corresponding to the first memory unit.

[0145] The second fan speed control instruction is used to adjust the speed of the first memory cooling fan corresponding to the first memory unit to a second speed, and the second speed is lower than the first speed. The second temperature threshold is lower than the first temperature threshold.

[0146] The substrate management controller continuously monitors the memory temperature of the first memory unit in the preset time period. After the preset time period, the substrate management controller reads the memory temperature of the first memory unit. If the memory temperature of the first memory unit decreases to the second temperature threshold, it indicates that the memory temperature of the first memory unit in the preset time period decreases to the second temperature threshold, and the memory cooling fan has reduced the memory temperature of the first memory unit. Then, the substrate management controller takes the second fan speed control instruction as the target fan speed control instruction corresponding to the first memory unit, and adjusts the speed of the first memory cooling fan corresponding to the first memory unit to the second speed, so as to effectively control the server system power consumption and protect the service life of the DDR5 memory.

[0147] It should be noted that the second speed can be half of the full speed, that is, 50% speed.

[0148] The second temperature threshold is half of the first temperature threshold.

[0149] In some embodiments of the memory safety protection system, the substrate management controller determines that the second fan speed control instruction is the target fan speed control instruction of the first memory unit when the memory temperature of the first memory unit in the preset time period decreases to the second temperature threshold, so that the speed of the first memory cooling fan corresponding to the first memory unit is adjusted to the second speed, effectively controlling the server system power consumption and prolonging the service life of the memory.

[0150] In some optional embodiments, the memory state information includes: memory voltage, and the substrate management controller is configured to:

[0151] According to the memory state information uploaded by the power management circuit in each memory unit, it is determined whether the memory voltage of each memory unit exceeds the first voltage threshold.

[0152] In the case of memory voltage, according to the memory voltage of each memory unit uploaded by the power management circuit in each memory unit, it is determined whether the memory voltage of each memory unit exceeds the first voltage threshold.

[0153] It can be understood that the memory units exist in the server in a parallel manner. In the case of constant current, the increase of memory temperature leads to the increase of resistance value, and then leads to the increase of memory voltage. Therefore, the safety state of the memory unit can be determined according to the increase of memory voltage, and then corresponding measures are taken to realize the safety protection of the memory unit.

[0154] It should be noted that the first voltage threshold can be 1.2 volts.

[0155] The memory unit whose memory voltage exceeds the first voltage threshold is determined as the second memory unit.

[0156] The memory units whose memory voltages exceed the first voltage threshold are determined as second memory units.

[0157] The first fan speed control instruction is used as a target fan speed control instruction corresponding to the second memory unit.

[0158] The first fan speed control instruction is used to adjust the speed of the second memory cooling fan corresponding to the second memory unit to a first speed.

[0159] Specifically, the speed of the second memory cooling fan corresponding to the memory unit whose memory voltage exceeds the first voltage threshold is adjusted to the first speed to cool the memory unit whose memory voltage exceeds the first voltage threshold.

[0160] In some optional embodiments, the baseboard management controller is further configured to:

[0161] The memory voltage of the second memory unit is monitored within a preset time period after the speed of the second memory cooling fan is adjusted to the first speed.

[0162] The memory voltage of the second memory unit is continuously monitored after the speed of the second memory cooling fan is adjusted to the first speed.

[0163] In a case where the memory voltage of the second memory unit still exceeds the first voltage threshold within the preset time period, a memory power-off command is sent to a second power management circuit of the second memory unit.

[0164] The memory voltage of the second memory unit is continuously monitored within the preset time period. If the memory voltage of the second memory unit still exceeds the first voltage threshold within the preset time period, it indicates that the memory unit may be damaged due to overheating as the memory temperature rises. Therefore, the baseboard management controller sends a memory power-off command to the second power management circuit in the second memory unit through an I2C protocol.

[0165] The second power management circuit is further configured to:

[0166] The second power management circuit receives the memory power-off command and performs power-off processing on the second memory unit according to the memory power-off command.

[0167] The second power management circuit in the second memory unit receives the memory power-off command and performs power-off processing on the second memory unit according to the memory power-off command to protect the second memory unit.

[0168] In some optional embodiments, the baseboard management controller is further configured to:

[0169] In a case where the memory voltage of the second memory unit is lower than the first voltage threshold within the preset time period, the third fan rotating speed control instruction is taken as a target fan rotating speed control instruction corresponding to the second memory unit.

[0170] The third fan rotating speed control instruction is used to adjust the rotating speed of the second memory cooling fan corresponding to the second memory unit in a manner of reducing the rotating speed by a preset rotating speed at a time until the rotating speed of the second memory cooling fan is adjusted to the second rotating speed.

[0171] In some optional embodiments, the baseboard management controller is used to:

[0172] According to the memory state information uploaded by the power management circuit in each memory unit, it is determined whether the memory voltage of each memory unit is lower than the second voltage threshold.

[0173] In a case where the memory state information is the memory voltage, according to the memory voltage of each memory unit uploaded by the power management circuit in each memory unit, it is determined whether the memory voltage of each memory unit is lower than the second voltage threshold.

[0174] It can be understood that the memory units exist in the server in a parallel manner. In a case where the current is unchanged, if the resistance value of a memory unit increases due to the increase of the memory temperature of the memory unit, and the memory voltage of the memory unit is increased, the memory voltage of the adjacent memory unit of the memory unit will be reduced. Therefore, the safety state of the memory unit can be determined according to the memory voltage reduction, and corresponding measures are taken to realize the safety protection of the memory unit.

[0175] It should be noted that the second voltage threshold can be 1.1 volts.

[0176] The memory unit with the memory voltage lower than the second voltage threshold is determined as the third memory unit.

[0177] The memory unit with the memory voltage lower than the second voltage threshold in the plurality of memory units is determined as the third memory unit.

[0178] The second fan rotating speed control instruction is taken as a target fan rotating speed control instruction corresponding to the third memory unit.

[0179] The second fan rotating speed control instruction is used to adjust the rotating speed of the third memory cooling fan corresponding to the third memory unit to the second rotating speed.

[0180] Specifically, the rotating speed of the third memory cooling fan corresponding to the memory unit with the memory voltage lower than the second voltage threshold is adjusted to the second rotating speed.

[0181] In some optional embodiments, the baseboard management controller is further used to:

[0182] monitor the memory voltage of the third memory unit after the speed of the third memory cooling fan is adjusted to the second speed.

[0183] wherein the memory voltage of the third memory unit is continuously monitored after the speed of the third memory cooling fan is adjusted to the second speed.

[0184] In a case where the memory voltage of the third memory unit is still lower than the second voltage threshold within the preset time period, a memory power-off command is sent to the third power management circuit of the third memory unit.

[0185] wherein the baseboard management controller continuously monitors the memory voltage of the third memory unit within the preset time period. If the memory voltage of the third memory unit is still lower than the second voltage threshold within the preset time period, it indicates that the third memory unit may have a fault, and the baseboard management controller sends a memory power-off command to the third power management circuit in the third memory unit through an I2C protocol.

[0186] The third power management circuit is further configured to:

[0187] receive the memory power-off command and perform power-off processing on the third memory unit according to the memory power-off command.

[0188] wherein the third power management circuit in the third memory unit receives the memory power-off command and performs power-off processing on the third memory unit according to the memory power-off command, so as to realize protection of the third memory unit and protection of the memory module.

[0189] In some optional embodiments, as shown in FIG. 2, the system further comprises a control module (not shown in the figure) and a target memory protector 203.

[0190] The control module is configured to perform state monitoring on the baseboard management controller to obtain a state monitoring result of the baseboard management controller, and call the target memory protector in a case where the state monitoring result of the baseboard management controller meets a preset constraint condition.

[0191] In this embodiment, the target memory protector is a complex programmable logic device (CPLD).

[0192] wherein the preset constraint condition can be that the BMC is disabled for some reason or cannot monitor the memory unit or cannot control the fan. That is, the BMC is abnormal or the BMC management firmware has a problem.

[0193] In a case where the BMC is disabled for some reason or cannot monitor the memory unit or cannot control the fan, the control module calls the target memory protector to realize safe protection of the memory.

[0194] It should be noted that the target memory protector is physically linked with the memory cooling fan through the I2C protocol, and the voltage detection signal of the DDR5 memory slot and the power control information of the power management circuit are physically linked with the target memory protector through the I2C protocol.

[0195] The power management circuit is also configured to upload the memory state information to the target memory protector.

[0196] Each power management circuit collector corresponds to a memory unit, collects the memory state information of the memory unit, and uploads the memory state information to the baseboard management controller.

[0197] Since the target memory protector is physically linked with the voltage detection signal of the DDR5 memory slot, the target memory protector can only monitor the memory voltage of the memory unit, that is, can only obtain the CPLD voltage detection signal.

[0198] The target memory protector is configured to receive the memory state information uploaded by the power management circuit in each memory unit, determine a target fan speed control instruction according to the memory state information, and send the target fan speed control instruction to the memory cooling fan.

[0199] After the target memory protector obtains the memory state information uploaded by the power management circuit in each memory unit, the target memory protector determines a target fan speed control instruction for each memory unit according to the memory state information of each memory unit, and sends the target fan speed control instruction for each memory unit to the memory cooling fan corresponding to each memory unit.

[0200] In some optional embodiments, the power management circuit is also configured to:

[0201] In a case where the memory temperature of the memory unit meets a preset throttling function triggering condition, the throttling function of the memory unit is triggered.

[0202] Due to the characteristics of the power management circuit, in a case where the server whole machine is at high temperature or the memory temperature of the memory unit is too high, the throttling function of the memory unit is triggered.

[0203] It should be noted that the preset throttling function triggering condition is determined by the characteristics of the power management circuit, and specifically, the server whole machine temperature or the memory temperature of the memory unit exceeds a preset throttling function triggering temperature threshold.

[0204] Triggering the throttling function of the memory unit indirectly causes the voltage of the memory unit to decrease.

[0205] In some optional embodiments, the memory state information includes the memory voltage, and the target memory protector is configured to:

[0206] In a case where the memory voltage of the memory unit triggering the throttling function is lower than the second voltage threshold, the memory unit is determined as a fourth memory unit.

[0207] In a case where the memory voltage of the memory unit triggering the throttling function is lower than the second voltage threshold, the memory unit is determined as a fourth memory unit.

[0208] The first fan speed control instruction is used as a target fan speed control instruction corresponding to the fourth memory unit.

[0209] The first fan speed control instruction is used to adjust the speed of the fourth memory cooling fan corresponding to the fourth memory unit to a first speed.

[0210] Specifically, the speed of the fourth memory cooling fan corresponding to the memory unit whose memory voltage is lower than the second voltage threshold is adjusted to the first speed.

[0211] In some optional embodiments, the target memory protector is further configured to:

[0212] The memory voltage of the fourth memory unit is monitored within a preset time period after the speed of the fourth memory cooling fan is adjusted to the first speed.

[0213] The memory voltage of the fourth memory unit is continuously monitored after the speed of the fourth memory cooling fan is adjusted to the first speed.

[0214] In a case where the memory voltage of the fourth memory unit is still lower than the second voltage threshold within the preset time period, a memory power-off command is sent to a fourth power management circuit of the fourth memory unit.

[0215] The memory voltage of the fourth memory unit is continuously monitored by the baseboard management controller within the preset time period. In a case where the memory voltage of the fourth memory unit is still lower than the second voltage threshold within the preset time period, it is indicated that the fourth memory unit may be faulty. The target memory protector sends a memory power-off command to the fourth power management circuit in the fourth memory unit through an I2C protocol.

[0216] The fourth power management circuit is further configured to:

[0217] The fourth power management circuit receives the memory power-off command and performs power-off processing on the fourth memory unit according to the memory power-off command.

[0218] The fourth power management circuit in the fourth memory unit receives the memory power-off command and performs power-off processing on the fourth memory unit according to the memory power-off command, so as to protect the fourth memory unit and protect the memory module in the server.

[0219] In some optional embodiments, the target memory protector is further configured to:

[0220] In a case where the memory voltage of the fourth memory unit within the preset time period is the second voltage threshold, the third fan speed control instruction is taken as the target fan speed control instruction corresponding to the fourth memory unit.

[0221] The third fan speed control instruction is configured to adjust the speed of the fourth memory cooling fan corresponding to the fourth memory unit in a manner of reducing the speed by a preset speed each time until the speed of the fourth memory cooling fan is adjusted to the second speed.

[0222] The target memory protector continuously monitors the memory voltage of the fourth memory unit within the preset time period. After the preset time period, the target memory protector reads the memory voltage of the fourth memory unit. If the memory voltage of the fourth memory unit is stabilized at the second voltage threshold, it indicates that the memory voltage of the fourth memory unit within the preset time period is the second voltage threshold. Then, the target memory protector takes the third fan speed control instruction as the target fan speed control instruction corresponding to the fourth memory unit, adjusts the speed of the fourth memory cooling fan in a manner of reducing the speed by a preset speed each time, and continuously monitors until the speed of the fourth memory cooling fan is adjusted to the second speed, so as to effectively control the power consumption of the server and protect the service life of the DDR5 memory.

[0223] It should be noted that the manner of reducing the speed by a preset speed each time can be a manner of reducing the speed by 10% each time.

[0224] The memory voltage of the fourth memory unit is stabilized at the second voltage threshold, which indicates that the variation range of the memory voltage of the fourth memory unit within 1s is always within the variation range threshold of the second voltage threshold.

[0225] In some embodiments of the memory safety protection system, in order to avoid or excessively rely on the control of the BMC side, such as the firmware restart or failure of the BMC side, the target fan speed control instruction is determined according to the memory state information, and the target fan speed control instruction is sent to the memory cooling fan to control the speed of the memory cooling fan, so as to realize the timely and rapid cooling of the memory, further guarantee the safety of the memory, and improve the stability of the server.

[0226] According to the embodiments of the present application, a memory safety protection method embodiment is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a group of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0227] In the embodiment, a memory safety protection method is provided, which can be used in mobile terminals such as servers and the like. FIG. 3 is a flowchart of the memory safety protection method according to the embodiment of the application. As shown in FIG. 3, the flow includes the following steps:

[0228] In step S301, the power management circuit in each memory unit is acquired to upload the memory state information.

[0229] In step S302, the target fan speed control instruction is determined based on the substrate management controller according to the memory state information.

[0230] In step S303, the target fan speed control instruction is sent to the memory cooling fan to adjust the speed of the memory cooling fan.

[0231] The specific description of each step is the same as the corresponding embodiment described above, and will not be repeated here.

[0232] In some embodiments of the memory safety protection method, the target fan speed control instruction is determined by the substrate management controller according to the memory state information, and the target fan speed control instruction is sent to the memory cooling fan to control the speed of the memory cooling fan. In this way, the memory is quickly and rapidly cooled in time, the safety of the memory is ensured, and the stability of the server is improved.

[0233] In the embodiment, a memory safety protection method is provided, which can be used in mobile terminals such as servers and the like. FIG. 4 is a flowchart of the memory safety protection method according to the embodiment of the application. As shown in FIG. 4, the flow includes the following steps:

[0234] Firstly, on the server motherboard, the PMIC controller in the DDR5 memory, the DDR5 memory voltage detection signal, and the DDR5 memory temperature detection signal are physically linked by the BMC end through the I2C bus, and the BMC end is physically linked with the fan through the I2C protocol. The fan is a memory cooling fan.

[0235] The PMIC controller in the DDR5 memory and the DDR5 memory voltage detection signal are physically linked by the CPLD end through the I2C bus, and the CPLD end is physically linked with the fan through the I2C protocol.

[0236] Secondly, the server is powered on to start.

[0237] Thirdly, it is judged whether the BMC end runs normally or the BMC management firmware is problem-free during the server starting process or when the server enters the operating system.

[0238] Corresponding to the foregoing description of the control module. Determine whether the BMC end runs normally or the BMC management firmware is not a problem, that is, whether the state monitoring result of the baseboard management controller meets the preset constraint condition.

[0239] If the BMC end runs normally and the BMC management firmware is not a problem, the BMC end is used to achieve the security protection of the memory.

[0240] In the case where the state monitoring result of the baseboard management controller does not meet the preset constraint condition, the BMC end is used to achieve the security protection of the memory.

[0241] If the BMC end runs abnormally or the BMC management firmware has a problem, the CPLD end is used to achieve the security protection of the memory.

[0242] In the case where the state monitoring result of the baseboard management controller meets the preset constraint condition, the CPLD end is used to achieve the security protection of the memory.

[0243] Among them, Figure 5 shows a flowchart for implementing security protection of the memory by the BMC end. As shown in Figure 5, the process of implementing security protection of the memory by the BMC end includes the following steps:

[0244] In the case where the memory state information is the memory voltage, the BMC end reads the actual voltage value of each DDR5 memory through the I2C protocol.

[0245] Determine whether the current voltage value of the DDR5 is higher than 1.2 volts. If the current voltage value of the DDR5 is higher than 1.2 volts, the BMC end sets the speed of the fan corresponding to the current DDR5 to 100% and continues to monitor. When the BMC end sets the speed to 100%, the voltage still exceeds 1.2 volts after timing inspection, the BMC end sends a command to the PMIC control chip of the DDR5 through the I2C protocol to power off and isolate the current memory.

[0246] Corresponding to the foregoing baseboard management controller, for:

[0247] According to the memory state information uploaded by the power management circuit in each memory unit, determine whether the memory voltage of each memory unit exceeds the first voltage threshold; determine the memory unit whose memory voltage exceeds the first voltage threshold as the second memory unit. The first fan speed control instruction is used as the target fan speed control instruction corresponding to the second memory unit. Wherein, the first fan speed control instruction is used to adjust the speed of the second memory cooling fan corresponding to the second memory unit to the first speed.

[0248] The substrate management controller is further configured to monitor the memory voltage of the second memory unit within a preset time period after the speed of the second memory cooling fan is adjusted to the first speed. If the memory voltage of the second memory unit still exceeds the first voltage threshold within the preset time period, the substrate management controller sends a memory power-off command to the second power management circuit of the second memory unit. The second power management circuit is further configured to receive the memory power-off command and perform power-off processing on the second memory unit according to the memory power-off command.

[0249] It is determined whether the current voltage value of the DDR5 is lower than 1.1 volts. If the current voltage value of the DDR5 is lower than 1.1 volts, the BMC end sets the speed of the fan corresponding to the current DDR5 to 50% and continues to monitor. When the speed set by the BMC end is 50%, if the voltage still remains lower than 1.1 volts after timing inspection, the BMC end sends a command to the PMIC control chip of the DDR5 through an I2C protocol to power off and isolate the current memory. The PMIC control chip is a PMIC controller.

[0250] Corresponding to the foregoing substrate management controller, the substrate management controller is configured to:

[0251] According to the memory state information uploaded by the power management circuit in each memory unit, it is determined whether the memory voltage of each memory unit is lower than a second voltage threshold. The memory unit whose memory voltage is lower than the second voltage threshold is determined as a third memory unit. The second fan speed control instruction is used as a target fan speed control instruction corresponding to the third memory unit. The second fan speed control instruction is used to adjust the speed of the third memory cooling fan corresponding to the third memory unit to a second speed.

[0252] The substrate management controller is further configured to monitor the memory voltage of the third memory unit within a preset time period after the speed of the third memory cooling fan is adjusted to the second speed. If the memory voltage of the third memory unit is still lower than the second voltage threshold within the preset time period, the substrate management controller sends a memory power-off command to the third power management circuit of the third memory unit. The third power management circuit is further configured to receive the memory power-off command and perform power-off processing on the third memory unit according to the memory power-off command.

[0253] In the case that the memory state information is the memory temperature, the BMC end reads the actual temperature value of each DDR5 memory through an I2C protocol.

[0254] determining whether the temperature value of the current DDR5 reaches or approaches the memory temperature limit value. If the temperature value of the current DDR5 reaches or approaches the memory temperature limit value, the BMC end sets the rotation speed of the fan corresponding to the current DDR5 to 100%, and continues to monitor. When the BMC end sets the rotation speed to 100%, if the memory temperature still exceeds or approaches the temperature limit value after the timing inspection, the BMC end sends a command to the PMIC control chip of the DDR5 through the I2C protocol to power off and isolate the current memory.

[0255] Corresponding to the foregoing baseboard management controller, for: judging whether the memory temperature of each memory unit exceeds the first temperature threshold according to the memory state information uploaded by the power management circuit in each memory unit; determining the memory unit whose memory temperature exceeds the first temperature threshold as the first memory unit. The first fan rotation speed control instruction is used as the target fan rotation speed control instruction corresponding to the first memory unit. Wherein, the first fan rotation speed control instruction is used to adjust the rotation speed of the first memory cooling fan corresponding to the first memory unit to the first rotation speed.

[0256] The baseboard management controller is further used for: monitoring the memory temperature of the first memory unit within a preset time period after adjusting the rotation speed of the first memory cooling fan to the first rotation speed. In the case that the memory temperature of the first memory unit still exceeds the first temperature threshold within the preset time period, a memory power-off command is sent to the first power management circuit of the first memory unit. The first power management circuit is further used for: receiving the memory power-off command, and performing power-off processing on the first memory unit according to the memory power-off command.

[0257] determining whether the temperature value of the current DDR5 is half of the temperature limit value. If the temperature value of the current DDR5 is half of the temperature limit value, the BMC end sets the rotation speed of the fan corresponding to the current DDR5 to 50% and continues to monitor.

[0258] Corresponding to the foregoing baseboard management controller, further used for: in the case that the memory temperature of the first memory unit decreases to the second temperature threshold within the preset time period, using the second fan rotation speed control instruction as the target fan rotation speed control instruction corresponding to the first memory unit. Wherein, the second fan rotation speed control instruction is used to adjust the rotation speed of the first memory cooling fan corresponding to the first memory unit to the second rotation speed.

[0259] FIG. 6 shows a flowchart of implementing safety protection of the memory by the CPLD end. As shown in FIG. 6, the flow of implementing safety protection of the memory by the CPLD end includes the following steps:

[0260] The CPLD end monitors the memory voltage value by monitoring the voltage signal of the physically linked DDR5 memory.

[0261] If the memory voltage value corresponding to the DDR5 monitored by the CPLD is lower than 1.1 volts, the CPLD sets the fan speed corresponding to the DDR5 to 100% through the I2C protocol, and the CPLD continues to read the memory voltage value corresponding to the DDR5. If the memory voltage value is still lower than 1.1 volts, the CPLD realizes the power-off isolation of the current DDR5 memory by setting the power-off signal of the PMIC control chip of the DDR5.

[0262] Corresponding to the foregoing target memory protector, for the memory unit triggering the throttling function, if the memory voltage of the memory unit is lower than the second voltage threshold, the memory unit is determined as a fourth memory unit. The first fan speed control instruction is used as the target fan speed control instruction corresponding to the fourth memory unit. The first fan speed control instruction is used to adjust the speed of the fourth memory cooling fan corresponding to the fourth memory unit to the first speed.

[0263] The target memory protector is further configured to monitor the memory voltage of the fourth memory unit within a preset time period after adjusting the speed of the fourth memory cooling fan to the first speed. If the memory voltage of the fourth memory unit is still lower than the second voltage threshold within the preset time period, the target memory protector sends a memory power-off command to the fourth power management circuit of the fourth memory unit. The fourth power management circuit is further configured to receive the memory power-off command and perform power-off processing on the fourth memory unit according to the memory power-off command.

[0264] If the memory voltage value corresponding to the DDR5 monitored by the CPLD is 1.1 volts, the CPLD continues to read and sequentially adjusts the corresponding fan speed by 10%.

[0265] Corresponding to the foregoing target memory protector, the target memory protector is further configured to, in a case where the memory voltage of the fourth memory unit within the preset time period is the second voltage threshold, use the third fan speed control instruction as the target fan speed control instruction corresponding to the fourth memory unit. The third fan speed control instruction is used to adjust the speed of the fourth memory cooling fan corresponding to the fourth memory unit in a manner of reducing the preset speed at a time until the speed of the fourth memory cooling fan is adjusted to the second speed.

[0266] It should be noted that in some embodiments, the specific description of each step of the memory security protection method is the same as the description of the corresponding part of the memory security protection system in the above embodiments, and will not be repeated here.

[0267] In some embodiments, the memory safety protection method, in the case that the state monitoring result of the baseboard management controller satisfies the preset constraint condition, calls the target memory protector, determines the target fan speed control instruction according to the memory state information through the target memory protector, and sends the target fan speed control instruction to the memory cooling fan to control the speed of the memory cooling fan. In this way, the memory is quickly and rapidly cooled, the safety of the memory is further ensured, and the stability of the server is improved.

[0268] It should be noted that the memory safety protection method in the embodiment has great expansibility and can be extended to the fields of PCI devices, central processing units (CPUs) and PCI conversion chips, etc. The memory safety protection method provides great beneficial measures for the energy consumption management, stability and safety of the server, the operation and maintenance of the data center and the service life of the DDR5.

[0269] The embodiment of the application further provides a server comprising the memory safety protection system as shown in the above embodiments.

[0270] The embodiment of the application further provides a computer device. Referring to FIG. 7, FIG. 7 is a structural schematic diagram of a computer device according to an optional embodiment of the application. As shown in FIG. 7, the computer device comprises one or more processors 701, a memory 702, and an interface for connecting various components, including a high-speed interface and a low-speed interface. Various components are communicatively connected to each other by using different buses, and can be installed on a common mainboard or in other ways as needed. The processor can process instructions executed in the computer device, including instructions stored in the memory or graphics information of a GUI stored in the memory to be displayed on an external input / output device (such as a display device coupled to the interface). In some optional embodiments, multiple processors and / or multiple buses can be used with multiple memories and multiple storage devices, if necessary. Similarly, multiple computer devices can be connected, and each device provides part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). In FIG. 7, one processor 701 is taken as an example.

[0271] The processor 701 can be a central processor, a network processor, or a combination thereof. The processor 701 can further include a hardware chip. The hardware chip can be an application specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device can be a complex programmable logic device, a field programmable logic gate array, a general array logic, or any combination thereof.

[0272] The memory 702 stores instructions executable by the at least one processor 701, so that the at least one processor 701 executes the method as shown in the above embodiments.

[0273] The memory 702 can include a program storage area and a data storage area. The program storage area can store an operating system, application programs, and the like for the computer device. The data storage area can store data created by the computer device, etc. Additionally, the memory 702 can include a volatile memory, for example, a random access memory, and can also include a non-volatile memory, for example, a flash memory, a hard disk, or a solid state disk. In some alternative embodiments, the memory 702 can optionally include a memory that is remotely located from the processor 701, and can be connected to the computer device through a network. Examples of the network include, but are not limited to, the Internet, an enterprise intranet, a local area network, a mobile communication network, and a combination thereof.

[0274] The memory 702 can include a volatile memory, for example, a random access memory; the memory can also include a non-volatile memory, for example, a flash memory, a hard disk, or a solid state disk; and the memory 702 can also include a combination of the above-mentioned kinds of memories.

[0275] The computer device further includes a communication interface 703 for the computer device to communicate with other devices or a communication network.

[0276] The embodiments of the present application also provide a non-volatile computer readable storage medium. Referring to FIG. 8, it is a structural schematic diagram of a non-volatile computer readable storage medium provided by some embodiments of the present application. The non-volatile computer readable storage medium 8 stores computer instructions 81. When the computer program 81 is executed by a processor, the steps of the memory security protection method described above are implemented.

[0277] The method according to the embodiments of the present application described above can be implemented in hardware, firmware, or recorded in a storage medium, or stored in a remote storage medium or a non-transitory machine readable storage medium originally through network downloading and then stored in a local storage medium, so that the method described herein can be processed by such software stored on a storage medium using a general-purpose computer, a special-purpose processor, or programmable or special-purpose hardware. The storage medium can be a magnetic disk, an optical disk, a read-only memory, a random access memory, a flash memory, a hard disk, or a solid state disk, etc. Further, the storage medium can also include a combination of the above-mentioned kinds of memories. It can be understood that the computer, the processor, the microprocessor controller, or the programmable hardware includes a storage component that can store or receive software or computer code, when the software or computer code is accessed and executed by the computer, the processor, or the hardware, the method shown in the above embodiments is implemented.

[0278] Part of the present application can be applied as a computer program product, for example, computer program instructions. Referring to FIG. 9, a structural diagram of a computer program product provided for some embodiments of the present application is shown. The computer program product 9 stores computer instructions 91 for causing a computer to perform the steps of the memory security protection method as described above.

[0279] When the computer instructions 91 are executed by a computer, the method and / or technical solutions according to the present application can be invoked or provided through the operation of the computer. Those skilled in the art should understand that the form of the computer program instructions in the computer readable medium includes but is not limited to source files, executable files, installation package files, etc., and accordingly, the way of executing the computer program instructions by the computer includes but is not limited to: the computer directly executing the instructions, or the computer compiling the instructions and then executing the corresponding compiled program, or the computer reading and executing the instructions, or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer readable medium can be any available non-volatile computer readable storage medium or communication medium accessible to the computer.

[0280] Although the embodiments of the present application are described in conjunction with the accompanying drawings, various modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the present application, and such modifications and changes fall within the scope defined by the appended claims.

Claims

1. A memory safety protection system, characterized by, The system comprises a baseboard management controller, a memory module and a memory cooling fan, the memory module comprises a plurality of memory units, and the memory unit comprises a power management circuit; The power management circuit is configured to collect memory state information of the memory unit and upload the memory state information to the baseboard management controller; The baseboard management controller is configured to receive the memory state information uploaded by the power management circuit in each memory unit, determine a target fan speed control instruction according to the memory state information, and send the target fan speed control instruction to the memory cooling fan; The memory cooling fan is configured to receive the target fan speed control instruction and adjust the speed according to the target fan speed control instruction.

2. The system of claim 1, wherein, The memory state information comprises a memory temperature, and the baseboard management controller is configured to: determine whether the memory temperature of each memory unit exceeds a first temperature threshold according to the memory state information uploaded by the power management circuit in each memory unit; determine a first memory unit as a memory unit whose memory temperature exceeds the first temperature threshold; determine a first fan speed control instruction as a target fan speed control instruction corresponding to the first memory unit; and wherein the first fan speed control instruction is configured to adjust the speed of a first memory cooling fan corresponding to the first memory unit to a first speed.

3. The system of claim 2, wherein, The baseboard management controller is further configured to: monitor the memory temperature of the first memory unit within a preset time period after adjusting the speed of the first memory cooling fan to the first speed; send a memory power-off command to a first power management circuit of the first memory unit in a case where the memory temperature of the first memory unit within the preset time period still exceeds the first temperature threshold; The first power management circuit is further configured to: receive the memory power-off command and perform power-off processing on the first memory unit according to the memory power-off command.

4. The system of claim 3, wherein, The baseboard management controller is further configured to: determine a second fan speed control instruction as a target fan speed control instruction corresponding to the first memory unit in a case where the memory temperature of the first memory unit within the preset time period decreases to a second temperature threshold; wherein the second fan speed control instruction is configured to adjust the speed of the first memory cooling fan corresponding to the first memory unit to a second speed, the second speed is lower than the first speed, and the second temperature threshold is lower than the first temperature threshold.

5. The system of claim 1, wherein, The memory state information comprises a memory voltage, and the baseboard management controller is configured to: determine whether the memory voltage of each memory unit exceeds a first voltage threshold according to the memory state information uploaded by the power management circuit in each memory unit; determine a second memory unit as a memory unit whose memory voltage exceeds the first voltage threshold; determine a first fan speed control instruction as a target fan speed control instruction corresponding to the second memory unit; and wherein the first fan speed control instruction is configured to adjust the speed of a second memory cooling fan corresponding to the second memory unit to a first speed.

6. The system of claim 5, wherein, The baseboard management controller is further configured to: monitoring the memory voltage of the second memory unit in a preset time period after the rotating speed of the second memory cooling fan is adjusted to the first rotating speed; in a case where the memory voltage of the second memory unit in the preset time period still exceeds the first voltage threshold, sending a memory power-off command to a second power management circuit of the second memory unit; the second power management circuit is further configured to: receive the memory power-off command and perform power-off processing on the second memory unit according to the memory power-off command.

7. The system of claim 1, wherein, the baseboard management controller is configured to: determine whether the memory voltage of each of the memory units is lower than a second voltage threshold according to the memory status information uploaded by the power management circuit in each of the memory units; determine a third memory unit as a memory unit whose memory voltage is lower than the second voltage threshold; determine a second fan rotating speed control instruction as a target fan rotating speed control instruction corresponding to the third memory unit; wherein the second fan rotating speed control instruction is used to adjust the rotating speed of a third memory cooling fan corresponding to the third memory unit to a second rotating speed.

8. The system of claim 7, wherein, the baseboard management controller is further configured to: monitor the memory voltage of the third memory unit in a preset time period after the rotating speed of the third memory cooling fan is adjusted to the second rotating speed; in a case where the memory voltage of the third memory unit in the preset time period is still lower than the second voltage threshold, send a memory power-off command to a third power management circuit of the third memory unit; the third power management circuit is further configured to: receive the memory power-off command and perform power-off processing on the third memory unit according to the memory power-off command.

9. The system of claim 1, wherein, The system further comprises a control module and a target memory protector; the control module is configured to monitor the state of the baseboard management controller to obtain a state monitoring result of the baseboard management controller, and call the target memory protector in a case where the state monitoring result of the baseboard management controller meets a preset constraint condition; the power management circuit is further configured to upload the memory status information to the target memory protector; the target memory protector is configured to receive the memory status information uploaded by the power management circuit in each of the memory units, and determine a target fan rotating speed control instruction according to the memory status information, and send the target fan rotating speed control instruction to the memory cooling fan.

10. The system of claim 9, wherein, the power management circuit is further configured to: in a case where the memory temperature of the memory unit meets a preset throttling function triggering condition, trigger the throttling function of the memory unit.

11. The system of claim 10, wherein, The memory status information includes a memory voltage, and the target memory protector is configured to: for the memory unit triggering the throttling function, determine the memory unit as a fourth memory unit in a case where the memory voltage of the memory unit is lower than a second voltage threshold; determine a first fan rotating speed control instruction as a target fan rotating speed control instruction corresponding to the fourth memory unit; wherein the first fan rotating speed control instruction is used to adjust the rotating speed of a fourth memory cooling fan corresponding to the fourth memory unit to a first rotating speed.

12. The system of claim 11, wherein, the target memory protector is further configured to: monitoring the memory voltage of the fourth memory unit in a preset time period after the rotating speed of the fourth memory cooling fan is adjusted to the first rotating speed; in a case where the memory voltage of the fourth memory unit in the preset time period is still lower than the second voltage threshold, sending a memory power-off command to a fourth power management circuit of the fourth memory unit; the fourth power management circuit is further configured to: receive the memory power-off command and perform power-off processing on the fourth memory unit according to the memory power-off command.

13. The system of claim 12, wherein, the target memory protector is further configured to: in a case where the memory voltage of the fourth memory unit in the preset time period is the second voltage threshold, taking a third fan rotating speed control instruction as the target fan rotating speed control instruction corresponding to the fourth memory unit. The third fan rotating speed control instruction is used to adjust the rotating speed of the fourth memory cooling fan corresponding to the fourth memory unit in a manner of reducing the rotating speed by a preset rotating speed at a time until the rotating speed of the fourth memory cooling fan is adjusted to the second rotating speed.

14. The system of claim 5, wherein, The baseboard management controller is further configured to: in a case where the memory voltage of the second memory unit in the preset time period is lower than the first voltage threshold, taking a third fan rotating speed control instruction as the target fan rotating speed control instruction corresponding to the second memory unit. The third fan rotating speed control instruction is used to adjust the rotating speed of the second memory cooling fan corresponding to the second memory unit in a manner of reducing the rotating speed by a preset rotating speed at a time until the rotating speed of the second memory cooling fan is adjusted to the second rotating speed.

15. The system of claim 9, wherein, The preset constraint condition is that the baseboard management controller is abnormal or the baseboard management controller management firmware has a problem.

16. A memory safety protection method, characterized by, The method comprises: acquiring memory state information uploaded by a power management circuit in each memory unit; determining a target fan rotating speed control instruction based on a baseboard management controller according to the memory state information; sending the target fan rotating speed control instruction to a memory cooling fan to adjust the rotating speed of the memory cooling fan.

17. A server, characterized by comprise: The memory security protection system according to any one of claims 1 to 15.

18. A computer device, comprising: comprise: a memory and a processor, which are in communication connection with each other, the memory stores computer instructions, and the processor executes the computer instructions to perform the memory security protection method of claim 16.

19. A non-transitory computer readable storage medium, comprising: The non-volatile computer readable storage medium stores computer instructions for causing a computer to execute the memory security protection method of claim 16.

20. A computer program product, characterised in that, The computer instructions are used to cause a computer to execute the memory security protection method of claim 16.

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