Matrix multiplication method

Abstract

The present invention relates to the field of solving mathematical problems using computing devices, and more particularly to methods for implementing digital hardware units for matrix multiplication, and is directed toward reducing computational costs. The technical result of the invention is that of reducing the number of intermediate sums and shifts performed in the hardware of digital computing devices during matrix multiplication. This technical result is achieved in that the claimed matrix multiplication method envisages using a lookup table in the form of a set of all the possible sums of the elements of the current row-vector of the first of the multiplied matrices, in which each element is present not more than once, and using bit slices of the current column-vector of the second of the multiplied matrices to request values from the lookup table, which can be efficiently obtained using a special type of memory referred to as a bit-based associative memory. The bit slices make it possible to select from the lookup table specific values which, having been shifted left by a number of steps equal to the number of the bit, sum to the desired value for an element of the resultant matrix corresponding to the indexes of the current vectors being processed.

Description

[0001] METHOD OF MATRIX MULTIPLICATION

[0002] The present invention relates to the field of solving mathematical problems using computing devices, namely to methods for implementing digital hardware units for matrix multiplication and is aimed at reducing computational costs by reducing the number of intermediate shift and addition operations performed.

[0003] State of the art.

[0004] The matrix multiplication procedure consists of calculating a matrix C of dimension m * n (i.e. having m rows and n columns) based on input matrices A and B with dimensions m * k and k * n, respectively (matrices that have such a relationship between their dimensions are called consistent) according to formula (1):

[0005] There are known methods for calculating formula (1) using programs for computing devices with (super-)scalar processors (general-purpose processors), processors with vector (matrix) extensions or graphic processors (SIMD - single instruction many data), as well as using software and hardware (the so-called accelerators, which use special matrix computing units in their composition, including those based on FPGAs and specialized integrated circuits.

[0006] Existing prototypes include computing units and methods for constructing them that implement matrix extensions of the instruction set of general-purpose processors, graphics processors, and computational accelerators based on systolic arrays. They represent a homogeneous computing structure of identical processing elements (blocks 202 in Fig. 2) that sequentially perform fixed operations on transmitted data (see the source Orlov S. A., Tsilker B. Ya. Organization of Computers and Systems: Textbook for Universities. 2nd ed. - St. Petersburg: Piter, 2011 - hereinafter D1, p. 547). A common structure of this type of device, designed for matrix multiplication, is shown in Fig. 2. These include, for example, [US20210124560] and [US20240126545]. The main disadvantage of the prototypes is the high computational costs due to the construction of systolic arrays based on elements that implement the multiplication and accumulation operation [D1, p. 553].

[0007] When implementing formula (1) in a digital computing device, for multiplying matrices A and B, it is required additions and multiplications.

[0008] Hardware binary number multipliers (block 201 in Fig. 2) are based on the sequential summation of input arguments (Fig. 3) according to formula (2) [D1, p. 182]: From here on denotes the t-th literal digit of the number x, i.e. where w is the digit capacity of the number x (in this application only the binary bit depth of the corresponding data type is implied) and and y are arbitrary non-negative integers.

[0009] Based on formula (2), in digital computing devices (Fig. 3), in the first approximation, the multiplication operation is equivalent to addition and w operations shifts (through which multiplication by powers of 2 is realized).

[0010] Thus, with an exact reproduction of formula (1) in hardware, the cost of multiplying matrices A*B is sum operations (see Fig. 4):

[0011] (3) and shift operations (excluding zero shift) - formula (4):

[0012] (4) where m is the number of rows in the first matrix A; n is the number of columns in the second matrix B; k is the number of columns in matrix A and the number of rows in matrix B; w is the bit depth of the binary integer data type in which the elements of matrices A and B are represented.

[0013] The efficiency of general matrix multiplication calculations at the current level of technology is limited by the number of multiplications of their elements, which is ultimately expressed in the hardware of digital computing devices through the number of intermediate summations (formula (3)) and shifts (formula (4)).

[0014] Disclosure of the essence of the invention

[0015] The problem that the claimed invention is aimed at solving is the reduction of computational costs when multiplying general matrices, which leads to an increase in the speed of calculations and a reduction in energy costs for their execution.

[0016] The technical result of the invention is a reduction in the number of intermediate summations and shifts performed in the hardware of digital computing devices during matrix multiplication.

[0017] The specified technical result is achieved due to the fact that in the declared method of matrix multiplication it is proposed to calculate each element c i,j of the final matrix C, perform the multiplication of the row vector of the first matrix A by the column vector the second matrix B using a lookup table containing all possible sums of vector elements in which each element appears no more than once. The values ​​of the lookup table cells are calculated as the scalar product of the vector into a binary vector whose elements are equal to the address bits of a given cell. In this case, to request values ​​from the lookup table, bit slices [D1, p. 546] of the vector are used as an address, which can be efficiently obtained by using a special type of memory, the so-called bit-associative memory [D1, p. 545], the operating principle of which is shown schematically in Fig. 8-9. The bit slice of the vector is a binary vector, the elements of which are equal to the t-th digits of the elements original vector The element of the final matrix C is equal to the sum of the values ​​obtained from lookup tables for all bit slices and shifted according to the number discharge by t steps to the left (see Fig. 5).

[0018] The basic prerequisite for achieving the technical result is the process of multiplying matrices with dimensions 1 * k and k * 1, which is equivalent to calculating the scalar product of vectors. First, let us consider the case, when the matrix elements are non-negative integers and are represented as an unsigned integer data type with a width of w. According to formula (1), the scalar product of vectors can be written in the form of formula (5): (5)

[0019] Let's represent the elements of the vector in the binary number system according to the data type used:

[0020] (6) where is the t-th binary digit of the number b i , w - the bit depth of the binary type used data.

[0021] Let us rewrite formula (5) taking into account formula (6), as a result we obtain formula (7) (see Fig.

[0022] 4):

[0023] (7)

[0024] By opening the brackets in formula (7) and collecting the terms corresponding to the same binary digit t, we obtain the expressions presented in Table 1.

[0025] Table 1 - Terms in formula (7) corresponding to the same binary digit

[0026] Now, taking the factors equal to powers of 2 out of the brackets from formula (7), we obtain formula (8), which is shown in graphic form in Fig. 5:

[0027] (8) Let us now consider separately the expressions in brackets in formula (8), denoting them as p t (correspond to the hatched rectangles in Fig. 5).

[0028] (9) In this case, formula (8) will take the form

[0029] (U)

[0030] Comparing formula (10) with formula (2), it becomes clear that it is similar to the implementation of the multiplication operation in hardware multipliers and represents the sum of the values ​​of p t. shifted by t steps to the left according to the digit number. The only difference between these formulas is that the values ​​of p t may be different for each digit, and in the case of multiplication they are fixed and equal to either the multiplier (the number y in formula (2)), or 0, if the corresponding digit of the other multiplier (the number x in formula (2)) is equal to 0.

[0031] Let's rewrite formula (9) to calculate the value of p t in terms of the scalar product (11)

[0032] Here is a binary vector that is the t-th bit slice (see Fig.

[0033] 6, blocks 602) vector = and defined as

[0034] (12) binary digit of the number b i .

[0035] It should be noted that obtaining discharge sections on typical computer In devices, this is a very labor-intensive operation, making it impossible to achieve the claimed technical result with their help. Therefore, within the framework of the present invention, it is proposed to use bit-associative memory [D1, p. 545] to obtain bit slices. This is a special type of memory that provides arbitrary or sequential reading of bit slices of binary words stored in it (see Figs. 8-9).

[0036] According to formulas (9) and (11), any value of p t can be represented as a sum of vector elements in which each vector element appears no more than once. The latter is explained by the fact that the numbers represent the binary digit of the number b^ and can have the value either 0 or 1. Therefore, the set of values ​​p t belongs entirely to the set consisting of all possible sums of elements of the vector in which each the element occurs no more than once. In this case, the cardinality of the set according to combinatorics equals 2 k as the number of placements with repetitions from [0,1] by k (since each element is included in the sum no more than once, and there are k elements in total).

[0037] To represent a set in a computing device, one can use a lookup table for which bit slices act as addresses interpreted as a binary representation of a number, i.e. the address of the lookup table cell corresponding to the bit slice is equal to the value (see Fig. 6, blocks 603)

[0038] (13)

[0039] In this notation, the value of the lookup table cell at address h is

[0040] (14) the t-th binary digit of the number h.

[0041] As a result, obtaining the p-value t (formula (11)) will consist only of reading the cell with the address from the table

[0042] (15) where the numerical value of the t-th bit slice of the vector is determined formula (13), a is a lookup table constructed according to formula (14) and containing all possible sums of vector elements in which each element appears no more than once. When In this case, to achieve the stated technical result, the value of the t-th bit slice must be obtained through the use of bit-associative memory. In this In this case, calculations according to formula (13) are replaced by one command to read the corresponding bit slice from the bit-associative memory.

[0043] For direct calculation of the lookup table you need approximately summations of two numbers, since a specific element of the vector is involved in calculating exactly half of the cells in the lookup table. However, saving and reusing intermediate values, as shown by the arrows in Fig. 7, only one sum operation is required to calculate each cell of the lookup table. The corresponding algorithm in the general case can be built on the basis of the Gray code or something similar to it (see Fig. 13). As a result, taking into account the trivial combinations (shaded cells in Fig. 7), where all or only one of them is not equal to 0, all cells of the lookup table can be calculated using sum operations. Total computational costs for the calculation lookup tables are (16)

[0044] Thus, the scalar product of vectors a is equivalent to the multiplication matrices with dimensions 1 * k and k * 1, can be implemented in a computing device using the formula (see Fig. 5) (17) where denotes the value of the cell with the address from the lookup table constructed for a vector, the operation denotes the shift of the binary number x by t steps to the left.

[0045] As a result, taking into account the use of bit-associative memory to obtain bit slices of k-colloid addition operations required to calculate the scalar product of vectors with k elements, and equivalently, when multiplying matrices with dimensions 1 * k and k * 1, equal (18) and the number of shift operations (excluding zero shift) is equal to

[0046] (19) where k is the number of elements in the original vectors, w is the bit depth of the data type used to represent the elements of the vectors.

[0047] It is important to note that the calculations carried out remain valid for all integers representable in the data type with w bit depth in the two's complement code [D1, p. 607].

[0048] Note that without taking into account the computational costs of constructing the lookup table components of sum operations, the number of addition and shift operations when The number of additions and shifts required for multiplying two binary numbers using formula (2) when using bit-associative memory to obtain bit slices is completely identical to the number of additions and shifts required for multiplying two binary numbers using formula (2). In other words, in a rough approximation, the computational costs of the proposed method, in the case of a pre-defined lookup table and the use of bit-associative memory for obtaining bit slices when multiplying matrices with dimensions equal to computational costs of multiplying two binary integers in hardware (Fig. 3).

[0049] For the dimensions of the original matrices m * k and k * n, all the above arguments remain valid, but now in relation to the multiplication of the row vectors of the first matrix A onto the column vector of the second matrix B for calculation element of the final matrix C in accordance with formula (1). In this case, during the calculation all elements of one row of matrix C use the same vector therefore, there is no need to calculate the lookup table separately for each element of the final matrix C. As a result, to calculate the matrix, it is necessary to calculate only m lookup tables, where m is the number of rows in matrix A. Thus, the computational costs of the proposed method for multiplying matrices with dimensions, taking into account the use of bit-associative memory to obtain bit slices, amount to sum operations

[0050] (20) and shift operations (excluding zero shifts)

[0051] (21)

[0052] If n is significantly less than k for a small value (of the order of units, for example, 4), then the computational costs of constructing lookup tables can be neglected (the term in formula (20)). As a result, the computational costs of matrix multiplication will be comparable to the computational costs of multiplying m * n pairs of numbers. In other words, the calculation of each element of the final matrix C using the proposed The computational cost of this method will be equivalent to simply multiplying two numbers.

[0053] Taking into account formulas (3) and (4), which determine the computational costs of prototypes, the proposed method of matrix multiplication describes the process of performing actions on input data using a computing device that is not known from the prior art, which, due to the original interaction of its modules and nodes with specific characteristics (see Fig. 10), including the use of a special type of (bitwise associative) memory (see Fig. 8-9) [D1, p. 545], leads to a reduction in the required summation operations

[0054] (22) times shift operations:

[0055] (23) where is the number of rows in matrix A; k is the number of columns in matrix A (the number of rows in matrix B is the number of columns in matrix B); w is the bit depth of the data types of elements in matrices A and B.

[0056] From formula (22) it is clear that the gain in computational costs over prototypes does not depend on the number of rows m in the matrix A. If the gain in limit will be slightly more than k times for summation operations, and k times for shift operations. Based on formula (22), one can obtain an approximate condition, the fulfillment of which is necessary to reduce the computational costs when multiplying matrices using the proposed method, taking into account the use of a special type of memory for obtaining bit slices (see Fig. 8-9). A consequence of the inequality obtained a roughening of formula (22) is a restriction on the parameter k

[0057] (24)

[0058] In this case, to store the lookup table, a memory bit is required (formula (25)). Based on the fact that the bit depth of the cells in the lookup table, taking into account the prevention of overflow during addition, must be no less than 2, and their number is 2, and at the same time, the cell with address 0 always stores 0 (since when calculating it, no vector element is involved in the sum according to formula (14)), then

[0059] (25)

[0060] At the same time, the memory costs of implementing the proposed matrix multiplication method can be reduced by representing the set consisting of all possible sums of vector elements, in which each element appears no more than once, using multiple lookup tables. In this case, each lookup table stores the values ​​of all possible sums of vector elements with indices from [1]—according to formula (26).

[0061] (26) the t-th binary digit of the number h.

[0062] In this case, the final value p t(formula (11)) when using g lookup tables by analogy with formula (15) is calculated as

[0063] (27)

[0064] Thus, to calculate each of the p values t g - 1 additional addition operations will be required. In the limit, if each lookup table is responsible for only one element of the vector, then the present method becomes equivalent in computational cost the method implemented in the prototypes.

[0065] In addition, to calculate the scalar product of vectors using several lookup tables can first obtain intermediate values ​​q u for all lookup tables separately by analogy with formula (17)

[0066] (28) and then obtain the final value using the formula

[0067] (29) It should be noted that, based on formulas (17) and (26), the value of q uaccording to formula (28) determines the scalar product of vectors consisting of subsets of vector elements, respectively

[0068] (30)

[0069] Whence, provided that the lookup tables represent non-intersecting non-empty ranges covering all element numbers of the current vectors in In accordance with formula (5), the truth of formula (29) immediately follows.

[0070] When using multiple lookup tables, to maximize memory savings, their sizes must be identical. In this case, formulas (20)-(21), which determine the computational costs of the proposed matrix multiplication method, taking into account the use of a special type of memory for obtaining bit slices (see Figs. 8-9), are transformed as follows

[0071] (31) and shift operations

[0072] (32)

[0073] The final gain over the prototype will be determined as

[0074] (33) and in shift operations:

[0075] (34)

[0076] The memory costs for storing all lookup tables in bits will be

[0077] (35)

[0078] It is important to note that although the operation of matrix multiplication is non-commutative, i.e., In the proposed method, it doesn't matter which of the two matrices is used to calculate the lookup tables, or for which matrix the bit slices are constructed. Therefore, we can assume that the condition is always satisfied. Then, the worst case for evaluating the gain of the proposed method is The computational costs of prototypes implementing formula (1) in hardware are the case when t = n.

[0079] Depending on n (the number of columns in the second of the matrices being multiplied), one can select a value of k (the number of columns in the first of the matrices being multiplied) for which the gain will be maximum for a fixed bit depth of the matrix elements w. Moreover, the gain from the proposed method does not depend on m, the number of rows in the first of the matrices being multiplied (see formulas (22), (23), (33), (34)). The corresponding gain values ​​are given in Table 2.

[0080] Table 2 - Maximum values ​​of gains in summation operations depending on and n for a fixed bit depth of elements w

[0081] Taking into account the above, the claimed technical result is achieved by using a method of matrix multiplication characterized by the fact that, using input-output interfaces, data is input into the memory block, which are binary codes of m * k elements of w bit depth and a matrix A is formed, which has m rows and k columns, using input-output interfaces, data is input into the memory block, which are binary codes of k * n elements of w bit depth and a matrix B is formed, which has k rows and a column of n columns, with which the following operation is performed due to the interaction of one or more blocks of bit-associative memory, built on the basis of a special type of memory, allowing for sequential or arbitrary reading of binary bit slices of the values ​​stored in it, one or more processor elements,one or more random access memory blocks and a control unit: using the control unit, a command is generated to start the corresponding processing element, which, in response to this command, after performing preparatory actions coordinated by the control unit, consists of selecting a row vector from the first matrix A, which in subsequent actions is represented as ve, Where is the next one? followed by clearing the lookup table stored in the random access memory block, with the "Empty" flag being set for all cells of the lookup table, after which a column vector is selected from the second matrix, which in subsequent actions represented as a vector, with the values ​​of the vector elements written in a special type memory in the bit-associative memory block at the addresses corresponding to their indices, performs the calculation of the j-th element of the i-th row of the resulting matrix C=A*B, denoted as by means of sequential reading in a certain order from a special type of memory in the block of bit-associative memory of all bit slices of the vector hereinafter denoted as h t , where t is the binary digit index of the corresponding bit slice, starting from 0 from the least significant bit, obtaining the value p for each of these bit slices t . by reading it from the lookup table cell at address h t , if the “Active” flag is set for the cell with the corresponding address in the lookup table, or calculating this value as the sum of the elements of the vector V for which the corresponding binary digit of the number h is indexed tis not equal to 0 if the cell with the corresponding address in the lookup table has the "Empty" flag set, and the calculated value of p t is saved in the lookup table in the cell with the address h t by setting the "Active" flag for this cell and summing up all p values t . each of which is pre-shifted to the left by a number of steps equal to the corresponding index of the bit slice t, the resulting value of the sum is stored as an element of the resulting matrix C; using the control unit, the described operation is repeated for all i in the range 0 ... t - 1 and for all j in the range 0 ... - 1.

[0082] In one embodiment of the method, the matrix elements are represented by an integer data type or a fixed-point data type, with two's complement code used to represent negative values.

[0083] In one embodiment of the method, as part of the preparatory actions, the j-th column vector is first selected from the second matrix B and a vector is formed from it, and then, after clearing the lookup table, the i-th row vector is selected from the first matrix A and a vector is formed from it.

[0084] In one embodiment of the method, the lookup table is completely filled in advance instead of clearing or together with it after the vector is formed by calculating values ​​of all cells, with the cell with the address assign a value equal to the sum of the elements of the vector r for which the corresponding binary digit of the number is indexed is not equal to 0, and for subsequent actions it is considered that the “Active” flag is set for all cells of the lookup table.

[0085] In one embodiment of the method, the lookup table is filled in such a way that no more than one addition or subtraction is spent on each cell by using the values ​​of previously calculated cells of the same lookup table.

[0086] In one embodiment of the method, the lookup table is filled in the order of traversing its cells according to the sequence of addresses formed by the Gray code, wherein the value of the cell with the address 0 is set equal to 0, and each subsequent cell is calculated by adding, if the changed bit in the address is equal to 1, to the value of the previous cell of the lookup table or subtracting, if the changed bit in the address is equal to 0, from this value of the vector element - the number of the changed bit in the current address compared to the previous address according to the Gray code.

[0087] In one of the implementation options of the method for reducing the requirement for the volume of memory needed for matrix multiplication (see Table 2), instead of one lookup table within one or several random access memory blocks, g lookup tables are formed, which are associated with non-intersecting non-empty ranges covering all indices of the elements of the selected vector, with each the vector element is assigned a local index as an ordinal number in the specified ranges starting from 0, and then, under the control of the control unit, clearing is performed (or, depending on the method, filling through calculation and subsequent saving of the values ​​of all cells of the u-th lookup table as the sum of the elements of the vector belonging to the associated range for which the binary digit corresponding to the local index is cell address is not equal to 0, with the "Active" flag set) of all lookup tables, while the processing element calculates the value of pt as the sum of g terms, denoted by or read from the cell of the u-th lookup table by the address formed as a subsequence of the t-th bit slice of the vector read from the bit-associative memory block, determined by the indices from the range associated with the u-th lookup table, if the "Active" flag is set for the cell with the corresponding address, or is calculated as the sum of the elements of the vector belonging to the u-th lookup table range for which the corresponding binary digit of the cell address according to the local index is not equal to 0, if the “Empty” flag is set for the cell with the address, and at the same time the calculated the value is stored in the u-th lookup table in the cell with the address with the "Active" flag set for this cell.

[0088] In one of the embodiments of the method, the size of the ranges of numbers of vector elements for all lookup tables, choose equal when the number of elements k is a multiple of the number lookup tables, otherwise these sizes should differ by no more than 1.

[0089] In one embodiment of the method, after performing the preparatory actions (selecting vectors and clearing all lookup tables) for each of the g lookup tables the calculation of the intermediate value is made as the sum of all possible values ​​according to the bit depth of the data type used for the table values ​​and, each of which is pre-shifted to the left by a number of steps equal to the corresponding index of the bit slice t, and the value is obtained in the same way as in the method according to Formula I.7, after which element of the resulting matrix C is assigned the value of the sum of all intermediate values ​​of q u .

[0090] In one embodiment of the method, the elements of one or both matrices are represented in a floating-point data type; in this case, when forming vectors and v, an additional transformation of floating-point numbers is performed, taking into account their mantissa, exponent, and sign bit, as a result of which they are reduced to an intermediate representation that ensures the execution of procedures for adding binary numbers in complement code.

[0091] In one of the embodiments of the method, when forming vectors convert floating-point numbers to fixed-point data types without rounding by increasing the bit depth.

[0092] In the ooddnoomm iizz variants of the method implementation when forming vectors convert floating-point numbers to a fixed-point data type by increasing the bit depth so that only the range of normalized numbers of the floating-point data type used is covered, and denormalized numbers are set to zero.

[0093] In the ooddnoomm iizz variants of the method implementation when forming vectors convert floating-point numbers to two's complement integer data types by rounding and increasing the bit depth so that the entire range of integers representable in the floating-point data type being used is covered.

[0094] In one embodiment of the method, a procedure of block multiplication of matrices A, consisting of blocks with a dimension of m rows and k columns, and B, consisting of blocks with a dimension of k rows and n columns, is performed using an external computing system, wherein the matrix multiplication of blocks is performed by means of the operation described in paragraph 1, taking into account the modifications from the corresponding points.

[0095] In one of the variants of the method implementation, the matrices A and B initially have arbitrary agreed dimensions, respectively, and during the preliminary processing them, they are transformed into block matrices with the block dimensions specified in i. 14 Formula by adding zero rows and zero columns to the first matrix, and to the second matrix zero rows and zero columns, while The added zero rows and columns have the largest indices in the corresponding matrices.

[0096] In one embodiment of the method for obtaining addresses of lookup table cells the corresponding bit slice read from the bit-associative memory block is pre-transformed using a one-to-one transformation.

[0097] In one embodiment of the method, the operation described in Sec. 1, taking into account the modifications from the corresponding points, is performed in parallel for several column vectors or row vectors by using the appropriate number of bit-associative memory blocks, processing elements and random access memory blocks.

[0098] Brief description of the drawings Fig. 1 - brief step-by-step description of the proposed method of matrix multiplication.

[0099] Fig. 2 - typical structure of systolic arrays used to implement matrix multiplication in prototypes. One variant of the multiplier circuit (201) is shown in Fig.

[0100] 3.

[0101] Fig. 3 - logic circuit of a combinational multiplier (J. F. Wakerley, Design of Digital Devices, Vol. 1, Postmarket, Moscow, 2002, p. 518) for two 4-bit numbers. This circuit is a direct implementation of formula (2) on logic elements, where HA stands for Half Adder, and FA stands for Full Adder. Here the t-th binary digit of the number x.

[0102] Fig. 4 - illustration of the row vector multiplication procedure with dimension 4 into a column vector with dimension 4, the elements of which are represented in 4-bit integer format, according to formula (7). As a result, we obtain the value of one element of the output matrix when multiplying matrices A and B according to formula (1) and the implementation procedures for multiplying binary numbers in computing devices based on formula (2) (see Fig. 3). Here the t-th binary digit of the number

[0103] Fig. 5 - illustration of the procedure for multiplying a row vector by a column vector using the proposed method using formula (10) in the case of a 4-bit unsigned integer data type. As a result, we obtain the value of one element of the output matrix when multiplying matrices A and B, similar to the example in Fig. 4. This figure clearly shows the advantages of the proposed method: a reduction in the required number of shift and addition operations. The latter is achieved by pre-computing a lookup table for all possible combinations of vector element sums (formula (14)). Thus, the procedures summations inside the dashed rectangles are not performed (they correspond to the values ​​- see formula (15)), and the required values ​​in the lookup table are calculated only once for each row vector of matrix A, regardless of the values ​​of the elements of matrix B. This implies that the addresses of cells in the lookup table containing the values ​​denoted by dashed rectangles are obtained by reading the corresponding bit slices from the bit-associative memory (see Fig. 9).

[0104] Fig. 6 - illustration of the procedure for obtaining discharge slices (blocks 602, see formula (12)) for a vector whose elements have a bit depth of 4 (blocks 601). The addresses of the lookup table cells are formed based on the bit slices (blocks 603, see formula (13)), corresponding to the current value of p t (see formula (9)). The vector of all bit slices is an alternative representation of the vector and is related to it by a one-to-one transformation. In the figure, the th binary digit of the number Fig. 7 - illustration of the procedure for calculating the lookup table for a vector of dimension 4 according to formula (14). Cells for which summation is not required are shaded. The cell address h is set equal to (see formula (13) and table 6), where is the t-th binary digit of the number Arrows shows a possible implementation of summations for calculating all elements of the lookup table with a minimum number of operations (one summation for each unshaded element - blocks 1201t-1203t in Fig. 12, method according to I. 5 of Formula).

[0105] Fig. 8 is a schematic representation of the process of writing and reading values ​​in bit-associative memory. Bit-associative memory is a two-dimensional array of single-bit memory cells that allows access to either individual stored machine words or to one bit of all stored words in the memory [D1, p. 545]. However, bit-associative memory should not be confused with "content-addressable memory", which in a number of sources is called by a similar term - "associative memory". "Content-addressable memory", which is used, for example, in the patent [US20070186036A 1], does not allow obtaining a bit slice of the data stored in it, in this regard it has no advantages over the random access memory used in a typical computer device.

[0106] Fig. 9 - schematic representation of the process of reading an arbitrary bit slice in bit-associative memory. The operation of taking the t-th bit slice implies obtaining a binary number, each bit of which is determined by the value of the t-th bit. the corresponding machine word in the bit-associative memory (see formulas (12) and (13)).

[0107] Fig. 10 - a variant of the general diagram of a device implementing the proposed method of matrix multiplication.

[0108] Fig. 11 is a block diagram of the operating algorithm of a specialized computing device (Fig. 10) implementing the method according to clause 1 of the Claims.

[0109] Fig. 12 is a block diagram of the operating algorithm of a specialized computing device (Fig. 10) implementing the method according to clause 5 of the Claims.

[0110] Fig. 13 is a block diagram of the operating algorithm of a specialized computing device (Fig. 10) implementing the method according to clause 6 of the Claims.

[0111] Implementation of the invention

[0112] The implementation of the present invention provides for the implementation in a specialized computing device (or a block of a computing device) that embodies the original interaction of modules and nodes with specific characteristics in accordance with the present application (Fig. 10), including the use of a special type of memory (Fig. 8, 9), of the proposed method of matrix multiplication, which consists of the sequential (or parallel) execution of the following steps (Fig. 1): - loading the first initial matrix A into the device;

[0113] - loading the second original matrix B into the device:

[0114] - selection of the current row vector from the matrix A A Depending on the implementation, several vectors - rows from the matrix A can be selected in parallel for subsequent parallelization or pipeline of calculations);

[0115] - formation of a lookup table for all possible sums of elements of the current row vector (depending on the implementation, the calculation of the lookup table may be performed on subsequent stages through the application of memoization);

[0116] - selection from matrix B of the current column vector (depending on the implementation, it may parallel selection of several vectors - rows from matrix B for subsequent parallelization or pipeline of calculations is performed);

[0117] - storing the column vector in the bit-associative memory (Fig. 8) to obtain a vector of all bit slices (see Fig. 6, 9 and formulas (12)-(13));

[0118] - calculation of the sum of intermediate values ​​of p t obtained from the lookup table according to the elements of the vector of bit slices, taking into account the necessary shifts to the left in in accordance with the digit number t (see Fig. 5 and formulas (10), (15); depending on the implementation, this procedure can be performed in parallel or within a pipeline for several vectors

[0119] - saving the obtained result to the element the final matrix C, corresponding to the indices of the current row vector and column vector depending on implementation, this procedure can be performed in parallel or within a pipeline for several calculated elements

[0120] - unloading from the device the final matrix C=A*B.

[0121] The technical result is achieved by two main innovations: the introduction of a lookup table representing the set of all possible sums of elements of the current vector-row of one of the matrices being multiplied, in which each element appears no more than once, and using bit slices of the column vector of the second of the matrices being multiplied, which are formed without calculations by using a special type of memory (Fig. 8, 9) to request values ​​from a lookup table. By construction, the lookup table contains all possible intermediate values ​​needed to calculate the scalar product of a vector with any vector of suitable dimension using only w - 1 sum and sd operations. viga (see formula (10) and Fig. 5). The bit slices of the vector provide selection from the lookup table specific values ​​which, when shifted the appropriate number of steps to the left, add up to the desired value of the scalar product of vectors (formula (17)), equal to the element of the matrix C=A*B by definition (formula (1)). A variant of the general scheme of a specialized computing device implementing the proposed method, consisting of performing the above-mentioned stages due to an original, unknown from the prior art interaction of modules and units with specific characteristics, including the use of a special type of memory [D1, p. 545], is shown in Fig. 10. The device should include random-access memory for storing the values ​​of the matrices being processed, register memory for storing the values ​​of intermediate calculations, bit-associative memory for obtaining bit slices (Figs. 8-9), processing elements for performing calculations, control logic, interaction interfaces and input-output interfaces. The device begins operation after setting the task of matrix multiplication. This task is transferred to the “control module” (1001, see Fig. 10), which transfers the task to the “matrix loading module” (1002) to load matrices A (1003) and B (1006) - steps 101 and 102 on

[0122] Fig. 1. Depending on the implementation of the device, the original matrices A and B can be transmitted directly when setting the task. Also, the "matrix loading module", if necessary, ensures the conversion of the data types of the matrix elements to the representation processed in the present device. After the completion of the "matrix loading module" (or, depending on the implementation, in parallel with its operation), the "control module" sends a command to the "module for selecting the current row vector from the matrix A" (1004) to select the row vector (step 103). Then, the current row vector selected by block 1004 is transmitted to the input "lookup table module" (1005), which provides the value of a lookup table cell at a given address (step 104). In parallel with this, the "control module" (1001) sends a command to the "module for selecting the current column vector from the matrix B" (1007) to select a column vector (step 105). Then, the current column vector selected by block 1007 is stored in "bitwise associative memory module" (1008, see Figs. 8 and 9) - step 106. Subsequently, in the "summation module" (1009), the bit slices read from the bitwise associative memory (1008) will be used to request values ​​from the lookup table module (1005). The "control module" (1001) carries out the supply of commands for selecting current vectors to blocks 1004 and 1007 in such a way that by the time the next current row vector is selected all operations required by the multiplication of matrices A and B with the previous row vector have been performed (see the algorithm in Fig. 11). After loading the current row vector "lookup table module" (1005) and storing the column vector in a bitwise associative memory (1008) the “control module” (1001) sends a command to perform calculations to the “summation module” (1009) - step 107. In this case, the “summation module” (1009) reads the bit slices of the current column vector from block 1008, requests values ​​from corresponding to the bit cuts of the cells of the lookup table (1005), shifts them to the left by a number of steps equal to the number of the bit cut, and then sums these values ​​(formula (17)). The specified operations in block 1009 can, depending on the implementation, be performed either sequentially or in parallel. Upon completion of block 1009, the obtained value is transferred to the "results storage module" (1010), which assigns this value to the element of the final matrix C (1011), corresponding to the indices of the current vectors from matrices A and B - step 108. Depending on the implementation, the "results storage module" (1010) can also provide data type conversion. After processing all row vectors of matrix A and column vectors of matrix B, the "control module" (1001) sends a command to the "matrix unloading module" (block 1012), which organizes the transfer of the calculated final matrix C to its destination - step 109.

[0123] To illustrate the implementation of the invention according to paragraph 1 of the Formula, an algorithm (Fig. 11) for the operation of the described specialized computing device (Fig. 10) was synthesized, which makes it possible to achieve the claimed technical result, consisting in reducing the number of intermediate summations and shifts performed in the hardware of digital computing devices during matrix multiplication.

[0124] The developed algorithm assumes the use of bit-associative memory (Figs. 8 and 9, block 1008 in Fig. 10) of size k words with bit depth w for storing an array containing the values ​​of the current column vector of the second matrix B.

[0125] To implement the “lookup table module” (block 1005 in Fig. 10), a memory block is required to store an array of lookup table cell values ​​S of size words, with a bit depth of at least (w + log2k), and an array of “Active” / “Empty” features Sa with a word size of at least less than log2(m + 1), where m is the number of rows in matrix A.

[0126] The present algorithm consists of performing the following actions according to the flow chart in Fig. 11.

[0127] Block 1101. Initialization of variables storing the parameters of the dimensions of the original matrices (m = 4, k = 4, n = 4) and the bit depth of their elements (w = 16).

[0128] Block 1102. Initialization of a one-dimensional bitwise associative array r B 4 elements in size in a 16-bit associative memory.

[0129] Block 1103. Initialization of array S with a length of 16 elements and a bit width of 18 bits for storing the lookup table and array Sa with a length of 16 elements and a bit width of 3 bits for storing the "Active" and "Empty" attributes of lookup table cells. During initialization, all elements of the Sa array are set to 0. The "Active" attribute for a lookup table cell with address h, stored in array S, is considered set if the value of the corresponding element of the Sa[h] array is greater than the current row number of the matrix A, encoded by variable 1. The "Active" attribute for the cell with address h is set at step 1109m, while the Sa[h] array element is set to a value equal to Since when moving to the next row of the matrix A At step 1108, the value of the variable i is increased, and the “Empty” flag is set automatically for all cells of the lookup table.

[0130] Block 1104. Initialization of two-dimensional array C for storing elements of the resulting 4 by 4 matrix with 32-bit width. Block 1105. Loading the values ​​of the elements of the first of the matrices being multiplied into two-dimensional array A with 4 by 4 elements and 16-bit width.

[0131] Block 1106. Loading the values ​​of the elements of the second of the matrices being multiplied into a two-dimensional array B with a size of 4 by 4 elements and a bit depth of 16 bits.

[0132] Block 1107. Initialization of the loop variable i for traversing all rows of array A with the value -1. This initial value of the variable i is determined only by the need for visual simplification of the block diagram in Fig. 11.

[0133] Block 1108. Iteratively increase the loop variable i by 1 to traverse all rows of array A (explanations are given in the description of blocks 1103, 1118 and 1109 of this algorithm).

[0134] Block 1109. Checking the condition for ending the loop of traversing all rows of array A when variable i reaches the value 4.

[0135] Block 1110. Initialization of the loop variable j for traversing all columns of array B with the value -1. This initial value of the variable j is determined only by the need for visual simplification of the block diagram in Fig. 11.

[0136] Block 1111. Iteratively increase the loop variable j by 1 to traverse all columns of array B.

[0137] Block 1112. Checking the condition for ending the loop of traversing all columns of array B when the variable reaches the value 4.

[0138] Blocks 1101k-1104k. The procedure for copying the elements of the current column of a two-dimensional array B into a bitwise associative array r B , representing the current column vector of the second of the matrices being multiplied.

[0139] Block 1113. Initialization of the loop variable t to zero for traversing all bit slices of the current column vector of the second of the matrices being multiplied, stored in the bitwise associative array r B .

[0140] Block 1114. Initialization to zero of the auxiliary variable d for storing intermediate values ​​when calculating the scalar product (formula (17), Fig. 5) of the 1st row vector of the first matrix and the j-oro column vector of the second matrix, stored in the bitwise associative array r B .

[0141] Block 1115. Checking the condition for ending the cycle of traversing all bit slices of the r array B when the variable t reaches the value 16.

[0142] Block 1116. Assigning to the element of the two-dimensional array C, located in the i-th row and j-th column, the value of the variable d, which is the calculated value of the scalar product of the i-th row vector of the first of the matrices being multiplied by the j-th column vector of the second matrix.

[0143] Block 1117. Operation of taking the t-th bit slice of array r Band storing the resulting value in the variable h. This operation is performed by reading the bit slice from the bit-associative memory that stores the array r. B (see Fig. 9) [D1, p. 545]. As a result of this operation, in each binary digit of the variable h there will be the t-th digit of the corresponding element of the array r B (see formula (13)). This operation can be expressed using arithmetic and logical operations as follows

[0144] (36) where is the s-th element of the array r B , and the operation x » t denotes the shift of the binary number x by t steps to the right.

[0145] Block 1118. Checking the "Active" flag for the lookup table cell with address h. The "Active" flag for this lookup table cell is considered set if the value of the corresponding element of the Sa[h] array is greater than the current number of the row vector of the matrix A, encoded by the variable i. This algorithm is constructed in such a way that the values ​​of the elements of the Sa[h] array cannot exceed the value of the variable by more than 1 (see block 1109m). Therefore, when moving to the next row vector of the matrix A in block 1108, in which the variable i is increased by 1, all elements of the Sa array will become less than or equal to i. Thus, the "Empty" flag will be set automatically for all cells of the lookup table.

[0146] Block 1119. Adding to the intermediate variable d the value of the element of array S under index h, shifted to the left by t steps (formula (17), Fig. 5).

[0147] Block 1120. Iteratively increase the loop variable t by 1 to traverse all bit slices of the array r B .

[0148] Blocks 1101t-1109t provide calculation of the value of the lookup table cell with address h, while the “Active” flag is set for it.

[0149] Block 1101t. Initialization of the loop variable s to 0.

[0150] Block 1102t. Copying the address of the lookup table cell h representing the t-th bit slice of the array r B , into the temporary variable temp h.

[0151] Block 1103t. Setting the initial value of the lookup table cell to 0.

[0152] Block 1104t. Checking the presence of the remaining terms that must be taken into account when calculating the lookup table cell with address h (see formula (14)).

[0153] Block 1105t. Checking whether an element needs to be added for cell calculation lookup tables with address h in accordance with formula (14).

[0154] Block 1106t. Adding an element to the final calculation of the value of a lookup table cell with address h, in accordance with formula (14).

[0155] Block 1107t. Left shift of the variable temp h to proceed to the analysis of the need to add an element to the final calculation of the value of the lookup table cell with address h, on next iteration of the loop.

[0156] Block 1108t. Increment the loop variable s by 1.

[0157] Block 1109t. Setting the "Active" flag for the lookup table cell with address h by assigning the value i+1 to the array element Sa[h] (see the description of blocks 1103 and 1118 for explanations). Block 1121. Unloading the values ​​of the two-dimensional array C as a final matrix, which is the result of multiplying the two matrices loaded in blocks 1105 and 1106.

[0158] If the original matrices A and B contain negative numbers, 2's complement [D1, p. 607] can be used to reduce the size of the lookup table, as reflected in the method in paragraph 2 of the Formula. This simultaneously allows for working with rational numbers represented in a fixed-point data type.

[0159] If the dimensions of the original matrices A and B are such that m ≥ n, where m is the number of rows in matrix A and n is the number of columns in matrix B, then to increase the gain from the proposed method, a lookup table for the column of matrix B should be constructed in accordance with formula (22). This replacement does not affect the essence of the proposed method and its justification (formulas (5)-(35)). This feature is used in the method according to clause 3 of the Formula.

[0160] If one matrix is ​​used to multiply a large number of other matrices, its storage format can be converted to facilitate the generation of bit slices. This will further reduce computational costs.

[0161] The use of the "Active" / "Empty" feature for calculating the value of a lookup table cell on a query (so-called memoization) in the method [1] provides the greatest benefit when working with matrices with small dimensions and element bit depths or with a small variance of values ​​in the columns of matrix B. Under these conditions, it is highly likely that a significant portion of the lookup table cells will not be used, and, accordingly, computational resources will not be expended on calculating these cells. In general, this leads to increased computational costs for calculating the lookup table compared to formula (16).

[0162] (37)

[0163] With an unlimited increase in k the value can reach instead of the optimal value Calculated winning values ​​for the main The data types used in the prototypes and the dimensions of the matrices being multiplied are presented in Table 3 for the worst case (the computational costs of calculating all cells in the lookup table are taken into account).

[0164] One option for reducing computational costs in the general case is to pre-compute all lookup table cells when moving to the next vector (row) of matrix A. This reduces the overhead of tracking the "Active" / "Empty" features. This method is reflected in Section 4 of the Formula.

[0165] Table 3 - Worst-case gain values ​​for summation operations for the data types used in the prototypes for the method according to and. 1 Formulas

[0166] To achieve an even greater reduction in computational costs in the general case, one can select a sequence of lookup table cell calculations for a specific value of k such that no more than one addition or subtraction is required for each cell by using previously calculated values ​​(see Fig. 7). This possibility is taken into account in Section 5 of the Formula. The corresponding operating algorithm of a specialized computing device (Fig. 10) for the case of k = 4 is shown in Fig. 12.

[0167] Blocks 1201-1217 of the algorithm in Fig. 12 are completely analogous to blocks 1101-1117 of the algorithm in Fig. 11 with a small exception in block 1203. Due to the preliminary calculation of the lookup table in blocks 1201т-1203т when moving to the next vector-row of the matrix A (according to the method in clause 5 of the Formula), the need to track the “Active” / “Empty” features is eliminated, thus, only the array S is required to implement the lookup table. Blocks 1218-1220 correspond to blocks 1119-1121, and 1201k-1204k correspond to 1101k-1104k. The main feature of the algorithm in Fig. 12 is the procedure for calculating the lookup table cells in blocks 1201t-1203t. It uses only 11 additions, as prescribed by formula (16), which allows for the greatest gain in computational costs (formulas (22) and (23)). Moreover, the arithmetic operations are distributed between blocks 1201t-1203t in such a way that they can be executed in parallel within a block.

[0168] The calculated gain values ​​for the method according to paragraph 5 of the Formulas for the main data types and dimensions of the matrices being multiplied used in the prototypes are presented in Table 4. The given values ​​were confirmed on the basis of software emulation of the operation of a device implementing the proposed method in accordance with the algorithm in Fig. 12. It should be noted that, according to formulas (22) and (33), the gain from the proposed method does not depend on m, the number of rows in the first of the matrices being multiplied.

[0169] Table 4. Gains in summation operations for data types used in prototypes

[0170] To realize the advantages of the method [of formula 5] in the case of arbitrary dimensions of the original matrices, Gray code or its equivalent can be used. This approach is used in the method according to clause 6 of the formula. The corresponding algorithm for the operation of a specialized computing device is shown in Fig. 13.

[0171] Blocks 1301-1320 and 1301k-1304k of the algorithm in Fig. 13 are completely analogous to blocks 1201-1220 and 1201k-1204k of the algorithm in Fig. 12. The differences lie only in the procedure for calculating the values ​​of the lookup table cells, implemented in blocks 1301t-1313t.

[0172] Block 1301t. Initialization of variables for storing the current (variable g) and previous (variable g_prev) values ​​of the Gray code.

[0173] Block 1302t. Initialization of a variable for storing the current value of the lookup table cell (variable d).

[0174] Block 1303t. Initialize the loop variable h to 1, since the lookup table cell with address 0 is always equal to 0 and does not need to be calculated.

[0175] Block 1304t. Checking the completion of the lookup table calculation.

[0176] Block 1305t. Procedure for obtaining the h-oro value of the Gray code with bit depth k and storing it in the variable g. However, in this algorithm, Gray code values ​​may be requested sequentially, starting with the value 1, rather than in random order.

[0177] Block 1306t. Determine the changed bit between the previous and current Gray code values. The variable temp will contain only one set bit (i.e., the value of temp will be either 1 or a natural power of 2), according to the Gray code definition.

[0178] Block 1307t. Determining the number of the changed bit between the previous and current Gray code values ​​using the number of the least significant bit in the variable temp. Hardware implementations of the procedure for obtaining the number of the least significant bit of a binary number are present in all common general-purpose processor instruction sets (e.g., the bsf instruction in Intel IA-32).

[0179] Block 1308t. Check whether the changed bit is 1 or 0 in the current Gray code value.

[0180] Block 1309t. If the changed bit in the current Gray code value is 1, then the value of the element of the current row vector of matrix A corresponding to the number of the changed bit (variable b) is added to the variable d.

[0181] Block 1310m. If the changed bit in the current Gray code value is 0, then the value of the element of the current row vector of matrix A corresponding to the number of the changed bit (variable b) is subtracted from the variable d.

[0182] Block 1311t. Assigning the calculated value d to the lookup table cell with an address equal to the current value of the Gray code.

[0183] Block 1312t. Save the current Gray code value as the previous one.

[0184] Blocks 1313t. Increase the loop variable h by 1.

[0185] To reduce memory consumption for storing the lookup table in the case of multiplying matrices with large dimensions, the method according to paragraph 7 of the Formula proposes using several lookup tables instead of one. In this case, the desired value of p t is calculated as the sum of the values ​​of the corresponding cells from all lookup tables according to formula (27).

[0186] The greatest reduction in memory consumption when using multiple lookup tables is achieved when the sizes of these tables are equal. This technique is reflected in the method according to point 8 of Formula 1. A comparison of the gains in the method according to point 8 of Formula 1 with a similar method using a single lookup table is presented in Table 5.

[0187] Table 5 - Advantage of using multiple lookup tables in matrix multiplication

[0188] To parallelize calculations and unify processing elements when implementing methods according to formulas 7 and 8, it is proposed to calculate an intermediate value for each of the lookup tables. вseparately (see formula (28)) using algorithms similar to those shown in Figs. 12 and 13 (blocks 1213-1219 and 1313-1319). In this case, the final value c i,j (blocks 1216 and 1316) calculated as the sum of all q values u This method is described in paragraph 9 of the Formula, its justification is given in formulas (28)-(30).

[0189] To expand the applicability of the proposed matrix multiplication method to the case where the elements of one or both matrices are represented in a floating-point data type, it is necessary to implement an additional transformation. This transformation should, based on the value of the mantissa, the exponent, and the sign bit of such data, generate an intermediate representation that enables the execution of binary number addition procedures in two's complement code. This approach is reflected in the method according to paragraph 10 of the Formula. One variant of such a transformation is the conversion of the floating-point data type to a fixed-point data type in two's complement code without rounding at the expense of increasing the bit depth—the method according to paragraph 11 of the Formula. For example, for a half-precision floating-point data type (FP16), 40 bits are sufficient to represent all possible values ​​in the fixed-point data type.After the matrix multiplication calculation is completed, the inverse transformation from the intermediate representation to the required data type, including floating point, can be performed if necessary.

[0190] To reduce computational costs, the method according to paragraph 11 of the Formula proposes rounding the source data, reducing the precision of the final result. The method according to paragraph 12 of the Formula proposes considering only the range of normalized numbers of the floating-point data type used, equating denormalized numbers to zero, while the method according to paragraph 13 of the Formula proposes considering only the range of integers of the floating-point data type used. In the case of a half-precision floating-point data type (FP16), the intermediate representation width in these methods will be 32 and 16 bits, respectively.

[0191] It is proposed to expand the scope of applicability of the invention to the case of multiplication of matrices of arbitrary consistent dimensions (formula (1)) by using a procedure for block matrix multiplication that calculates the result of multiplication of block matrices A and B of the following form based on formula (38)

[0192] (38) where c i,j - a matrix with dimensions m * n elements, representing one block in the final matrix C = A * B at the same time A i,j - a block of matrix A, which is a matrix with dimension m * elements k, B i,j - block of matrix B, which is a matrix with the dimension of elements, the number of blocks in the column of matrix A, d n + 1 - the number of blocks in the row of matrix B, d k + 1 - the number of blocks in the row of matrix A and the column of matrix B.

[0193] The possibility of implementing the procedure of block matrix multiplication using the invented method is reflected in paragraph 14 of the Formula. The method of multiplying matched initial matrices A and B with arbitrary dimensions is described in paragraph 15. Formulas. An example of the appearance of the original matrices A and B after adding the required number of zero rows and columns as described in Section 15. Formulas are presented below.

[0194] In this example, where the operation is (x mod y) denotes the remainder of the integer division of x by y. It should be noted that using an approach similar to that described in paragraphs 14-15 of the Formula, one can achieve a further reduction in computational costs when multiplying matrices by using Strassen's algorithm or its analogues.

[0195] In order to provide greater flexibility in the development of computing devices that perform matrix multiplication based on the present invention, it is proposed to calculate the values ​​of the address h, the lookup table cell from the 1st bit slice of the array r B (blocks 1218 and 1318 in Figs. 12 and 13) using a one-to-one (bijective) transformation - the method according to clause 16 of the Formula.

[0196] Also, an increase in the performance of the proposed methods can be achieved through parallel calculation of several values ​​of the final matrix C by using several processing elements - the method according to clause 17 of the Formula.

[0197] When developing computing devices implementing all of the above methods, the potential for increasing the range of values ​​during addition operations must be taken into account. When implementing additions and shifts in these devices, known methods for improving computational efficiency can be used. These include algorithms similar to those for multiplying binary numbers with a tree structure (Wallace, Dadd, etc.) [D1, p. 199]. They can also utilize known methods for parallelization and pipelined computations.

[0198] The described technical solutions reduce the computational costs of matrix multiplication compared to existing prototypes, resulting in increased computational performance and reduced energy consumption. Furthermore, the proposed method is independent of most other methods for optimizing matrix multiplication and can be used in conjunction with them. This approach will enable the development of energy-efficient computing devices, which are currently in demand in many areas of technology, particularly important given the widespread adoption of neural network technologies.

[0199] An example of achieving a technical result.

[0200] A matrix is ​​loaded into the device that implements the proposed method of matrix multiplication.

[0201] A (step 101, Fig. 1):

[0202] At step 102, matrix B is loaded into the device;

[0203] From matrix A, the current row vector with index 0 is selected (step 103): The lookup table for the current row vector is being constructed (stage 104). In Table 6, cells for which calculations are not required are highlighted in color.

[0204] To simplify further calculations, the most significant bit of the address in this case corresponds to the first element vectors, i.e. the arrangement of elements in a vector corresponds to the position number of the digit, counting from left to right.

[0205] From here on, the prefix 06 will mean the number is written in binary notation.

[0206] Table 6 - Lookup table for the current row vector

[0207] From matrix B, the current column vector with index 0 is selected (step 105):

[0208] The values ​​of the elements of the column vector are written in bitwise associative memory (see Table 7, Fig. 8) for subsequent generation of bit slices (step 106). In this example, a 3-bit unsigned integer type is used, i.e., the machine word width w = 3.

[0209] Table 7 - State of bit-associative memory

[0210] Table 8 presents all the state bit slices bit by bit. associative memory from Table 7 (see Figs. 6 and 9).

[0211] Table 8 - Bit slices of bit-associative memory

[0212] As a result, from a column vector, due to the special property of bitwise associative memory without additional calculations we get a vector of all bit slices (elements of this vector correspond to blocks 603 in Fig. 6):

[0213] To simplify further calculations, the least significant bit in the elements of the column vector corresponds to the first element of the vector, i.e. the element with index 0, denoted as

[0214] Then the intermediate values ​​are summed up. (see formula (15)) taking into account the required left shifts in accordance with the digit (step 107). The entry denotes the value of the lookup table element with address 6 (see Table 6).

[0215] As a result, using formula (10) we obtain

[0216] This result is assigned to the element of the final matrix C corresponding to the indices of the current row vector and column vector (step 108):

[0217] The above steps are repeated for all row vectors of the original matrix A and all column vectors of the original matrix B. As a result, we obtain the final matrix C (step 109), which is unloaded to its destination (for example, to the master device or saved to RAM): In this example, for clarity of presentation, the possibilities of parallelization and pipelines at all stages of calculations were not taken into account.

[0218] In the above description, embodiments of the present invention are described for clarity with reference to specific diagrams and blocks.

[0219] However, it is understood that any suitable distribution of functionality between different circuits or blocks may be used without prejudice to the present invention.

[0220] For example, the illustrated functionality to be implemented by separate blocks may be implemented by the same computing device or block, and vice versa. Therefore, references to specific functional blocks or circuits should be considered only as references to suitable means for providing the described functionality. The present invention may be implemented in any suitable form, including any combination of hardware and software. Although the present invention has been described in connection with certain embodiments, this should not be construed as limiting it to the specific form set forth herein. The scope of the present invention is limited only by the appended claims.Furthermore, although individual features may be included in different claims, they may possibly be effectively combined, and inclusion in different claims does not mean that the combination of features is impracticable and / or disadvantageous.

[0221] Taking into account the above, it can be concluded that the essential features of the claimed invention are not known from the prior art and ensure full compliance of the claimed invention with the patentability conditions of “novelty” and “inventive step”.

[0222] The claimed invention can be used in industry to efficiently implement matrix multiplication operations. Therefore, the claimed invention satisfies the patentability requirement of "industrial applicability."

[0223] It follows that, in the opinion of the applicant, the claimed invention fully complies with the conditions of patentability.

Claims

Invention formula 1. A method of matrix multiplication characterized in that, using input-output interfaces, data is input into a memory block, which are binary codes of m * k elements of w bit depth and a matrix A is formed, which has m rows and k columns, using input-output interfaces, data is input into a memory block, which are binary codes of * k elements of w bit depth and a matrix B is formed, which has rows and n k columns, with which the following operation is performed due to the interaction of one or more bit-associative memory blocks built on the basis of a special type of memory that allows sequential or random reading of binary bit slices of binary words stored therein, one or more processing elements, one or more random access memory blocks and a control unit: using the control unit, a command is generated to start the corresponding processing element,which responds to this command after the implementation of preparatory actions coordinated by the control unit, consisting of selecting the i-th row vector from the first matrix A, which in subsequent actions represents the vector of the subsequent clearing of the lookup table stored in, random access memory block, where the "Empty" flag is set for all cells of the lookup table, after which the j-th column vector is selected from the second matrix B, which in the subsequent actions is represented by the kkaakk vector where in this case the values ​​of the vector elements written to a special type of memory in a block bit-associative memory at the addresses corresponding to their indices, performs the calculation of the j-th element of the i-th row of the resulting matrix, denoted as c , i,jby sequentially reading in a certain order from a special type of memory in a block of bit-associative memory all bit slices of a vector, hereinafter designated how h t , ggdddee tt is the index of the binary digit of the corresponding bit slice, starting with 0 from the least significant digit, obtaining the value p for each of these bit slices t , by reading it from the lookup table cell at address h t , if the "Active" flag is set for the cell with the corresponding address in the lookup table, or calculating this value as the sum of the elements of the vector for which the corresponding binary digit of the number h is indexed t is not equal to 0 if the cell with the corresponding address in the lookup table has the "Empty" flag set, and the calculated value of p t is saved in the lookup table in the cell with the address h tby setting the "Active" flag for this cell and summing up all p values t . each of which is pre-shifted to the left by a number of steps equal to the corresponding index of the bit slice t, the resulting value of the sum is stored as an element c i,j of the resulting matrix C; using the control unit, the described operation is repeated for all i in the range 0 ... m - 1 and for all j in the range 0 ... - 1. n 2. The method according to claim 1, characterized in that the matrix elements are represented by an integer data type or a fixed-point data type, and a two's complement code is used to represent negative values.

3. The method according to any one of paragraphs 1-2, characterized in that the control unit is configured in such a way that, as part of the implementation of preparatory actions, the j-th column vector is first selected from the second matrix B and a vector is formed from it and then after clearing the lookup table, the i-th row vector is selected from the first matrix A and a vector is formed from it 4. Methods according to any one of paragraphs 1-3, characterized in that the control unit is configured in such a way that the search table is completely filled in advance instead of clearing or together with it after the vector is formed by calculating the values ​​of all cells, while the cell with the address h is assigned a value equal to the sum of the elements of the vector for for which the binary digit of the number AND corresponding to the index is not equal to 0, and in subsequent actions it is considered that the “Active” flag is set for all cells of the lookup table.

5. The method according to I.4, characterized in that the processing element fills the lookup table in such a way that no more than one addition or subtraction is spent on each cell by using the values ​​of previously calculated cells of the same lookup table.

6. The method according to I.5, characterized in that the processing element fills the lookup table in the order of traversing its cells according to the sequence of addresses formed by the Gray code, wherein the value of the cell with the address 0 is set equal to 0, and each subsequent cell is calculated by adding, if the changed bit in the address is equal to 1, to the value of the previous cell of the lookup table or subtracting, if the changed bit in the address is equal to 0, from this value of the element v s vector where s is the number of the changed bit in the current address compared to the previous address according to the Gray code.

7. Methods according to any one of paragraphs 1-6, characterized in that instead of one lookup table within one or more random access memory blocks, g lookup tables are formed, which are associated with non-intersecting non-empty ranges covering all indices of the elements of the selected vector, while each element of the vector is assigned a local index as an ordinal number in specified ranges starting with 0, and then, under the control of the control unit, clearing is performed (or, depending on the method, filling through calculation and subsequent saving of the values ​​of all cells and the -th lookup table as the sum of the elements of the vector belonging to the associated range for which the binary digit corresponding to the local index is cell address is not equal to 0, with the "Active" flag set) of all lookup tables, while the processing element calculates the value of p t as the sum of g terms, denoted by where or read from the cell of the u-th lookup table by the address formed as subsequence of the t-th bit read from the bit-associative memory block vector slice determined by indices from the range associated with the u-th lookup table, if the "Active" flag is set for the cell with the corresponding address, or is calculated as the sum of the vector elements belonging to the u-th lookup table range for which the corresponding binary digit of the cell address according to the local index is not equal to 0, if for the cell with address h u,t the "Empty" flag is set, and the calculated value is saved in the u-th lookup table in the cell with the address h u,t with the "Active" flag set for this cell.

8. The method according to item 7, characterized in that the size of the ranges of numbers of the vector elements for all lookup tables, it is chosen to be equal to k / g when the number of elements is a multiple of k and the number of lookup tables g, otherwise these sizes should differ by no more than 1.

9. The method according to any one of paragraphs 7-8, characterized in that the processing element is designed in such a way that after performing the preparatory actions (selecting vectors and clearing or filling all lookup tables) for each of the g lookup tables the intermediate value q is calculated u as the sum of all possible values ​​of p according to the bit depth of the data type used t,u tables and, each of which is pre-shifted to the left by a number of steps equal to the corresponding index of the bit slice t, while the value of p t,u obtained in the same way as in the method according to Formula I.7, after which the element c i,j the resulting matrix C is assigned the value of the sum of all intermediate values 10. The method according to any one of paragraphs 1-9, characterized in that the elements of one or both matrices are represented in floating-point data type, in this case, when forming vectors, an additional computing node is used a transformation of floating-point numbers that takes into account their mantissa, exponent, and sign bit, resulting in their conversion to an intermediate representation that enables the execution of two's complement binary addition procedures.

11. Methods according to paragraph 10, characterized in that when forming vectors due to An additional computing node converts floating-point numbers to fixed-point data types without rounding by increasing the bit depth.

12. Methods according to item 10, characterized in that when forming vectors due to An additional computing node converts floating-point numbers to a fixed-point data type by increasing the bit depth so that only the range of normalized numbers of the floating-point data type being used is covered, and denormalized numbers are set to zero.

13. The method according to item 10, characterized in that when forming vectors due to additional computing node converts floating point numbers to integer data type in two's complement code by rounding and increasing the bit depth so that the entire range of integers representable in the floating-point data type being used is covered.

14. The method according to any one of paragraphs 1-13, characterized in that, using an external computing system, a procedure is performed for block multiplication of matrices A, consisting of blocks with dimensions of m rows and k hundred square meters, and B, consisting of blocks with dimensions of k rows and k n columns, wherein the matrix multiplication of blocks is performed by means of the operation described in paragraph 1, taking into account the modifications from the relevant paragraphs.

15. The method according to paragraph 14, characterized in that initially matrices A and B have arbitrary agreed dimensions, respectively, and during the preliminary processing them, they are transformed into block matrices with the block dimensions specified in i. 14 Formula by adding zero rows and zero columns to the first matrix, and to the second matrix of zero rows and zero columns, while The added zero rows and columns have the largest indices in the corresponding matrices.

16. The method according to any one of paragraphs 1-15, characterized in that in order to obtain the addresses h t The corresponding bit slice of the lookup table cells, read from the bit-associative memory block, is pre-transformed using a one-to-one transformation by means of an additional computing node.

17. Methods according to any one of paragraphs 1-16, characterized in that the operation described in paragraph 1, taking into account the modifications from the corresponding points, is performed in parallel for several column vectors or row vectors by using the appropriate number of bit-associative memory blocks, elements and random access memory blocks.

Images