Network interface controller management method and apparatus

Abstract

Provided in the embodiments of the present application are a network interface controller management method and apparatus, the method comprising: acquiring an electrical signal provided by a power supply board; by means of a delay line, processing the electrical signal to generate a target timing signal; sending the target timing signal to a dual-slot network interface controller to instruct the dual-slot network interface controller to be powered on; acquiring an instruction signal provided by a target server node; sending the instruction signal to the dual-slot network interface controller to instruct the dual-slot network interface controller to start operating; and, in response to receiving a control message sent by the target server node, accessing the dual-slot network interface controller on the basis of the sequence of receiving the control message. The present application achieves the purpose of ensuring that the dual-slot network interface controller can be normally started independently of the state of any server node, achieving the technical effects of improving system stability and availability, accurately controlling a network interface controller starting process, and orderly data interaction and network interface controller management, and solving the technical problem in the prior art of low network interface controller management efficiency caused by high hardware adaptation costs and non-uniform interface forms of network interface controllers.

Description

Network interface card (NIC) management methods and devices

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 2024118838021, filed on December 19, 2024, entitled "Management Method and Apparatus for Network Interface Card", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of computers, and more specifically, to a method and apparatus for managing a network interface card (NIC). Background Technology

[0004] With the rapid development of the Internet, the demand for high-density integrated network interface cards (NICs) in server system architectures is increasing. OCP (Open Compute Project) NICs, as a new generation of high-density integrated NICs, are widely used in server systems. Traditional servers use OCP NICs in SFF (Small Form Factor) and LFF (Large Form Factor) form factors. However, to adapt to the widespread use of multi-node servers, OCP has introduced new NIC form factors: DSFF (Dual Small Form Factor) and TDSFF (Thin Dual-Slot Small Form Factor). DSFF, or dual-slot small-form-factor OCP NIC, has two 4C+ connectors and can support up to 32 PCIe (peripheral component interconnect express) lanes. TDSFF is a higher-standard DSFF NIC.

[0005] Currently, shared network interface cards (NICs) used in dual-node servers are typically developed in-house by individual manufacturers. Each manufacturer develops a variety of NICs according to its own product needs, with form factors such as OCP LFF, snap-on cards, and PCIe cards. The NIC interface definitions also vary considerably. Therefore, server hardware needs to reserve hardware interfaces to provide hardware compatibility for the shared NICs that require adaptation. Consequently, the related technologies suffer from high hardware adaptation costs and inconsistent NIC form factors and interfaces. Summary of the Invention

[0006] This application provides a method and apparatus for managing network interface cards (NICs), which at least solves the technical problems of high hardware adaptation costs and inconsistent NIC form factors and interfaces in related technologies, resulting in low NIC management efficiency.

[0007] According to one embodiment of this application, a network interface card (NIC) management method is provided, applied to a dual-slot NIC, comprising: acquiring an electrical signal provided by a power board, wherein the power board is independent of a first server node and a second server node, and the first server node and the second server node are configured to share the dual-slot NIC; processing the electrical signal through a delay line to generate a target timing signal, and sending the target timing signal to the dual-slot NIC to instruct the dual-slot NIC to start powering on; acquiring an indication signal provided by a target server node, and sending the indication signal to the dual-slot NIC to instruct the dual-slot NIC to start working, wherein the target server node refers to the server node that has been started among the first server node and the second server node; and accessing the dual-slot NIC in the order of receiving the control message sent by the target server node.

[0008] In one exemplary embodiment, processing electrical signals through a delay line to generate a target timing signal and sending the target timing signal to a dual-slot network card to instruct the dual-slot network card to start power-on includes: processing electrical signals through a first delay line to obtain a first power enable signal, wherein the target timing signal includes the first power enable signal and the delay line includes the first delay line; and sending the first power enable signal to the dual-slot network card to instruct the dual-slot network card to enable standby power.

[0009] In one exemplary embodiment, after sending a first power enable signal to the dual-slot network interface card (NIC) to indicate that the NIC allows standby power to be enabled, the method further includes: receiving a power indication signal fed back by the NIC, wherein the power indication signal is configured to indicate that standby power has been enabled; processing the power indication signal through a second delay line to obtain a second power enable signal, wherein the target timing signal includes the second power enable signal and the delay line includes a second delay line; and sending the second power enable signal to the NIC to indicate that the NIC allows main power to be enabled.

[0010] In one exemplary embodiment, after receiving the power indication signal fed back by the dual-slot network card, the method further includes: sending the power indication signal to the node signal connector; and controlling the node signal connector to send the power indication signal to the target server node.

[0011] In an exemplary embodiment, the method further includes: receiving an interface control signal during the process of processing an electrical signal through a delay line to generate a target timing signal and sending the target timing signal to the dual-slot network card; and, in response to the interface control signal, dividing the bandwidth corresponding to the dual-slot network card based on the dual slots, wherein the dual slots include a main connector and a secondary connector.

[0012] In one exemplary embodiment, processing electrical signals through a delay line to generate a target timing signal and sending the target timing signal to a dual-slot network interface card (NIC) to indicate that the NIC should start powering on includes: processing electrical signals through a first delay line to obtain a first power enable signal, wherein the target timing signal includes the first power enable signal and the delay line includes a first delay line; sending the first power enable signal to the NIC through a main connector to indicate that the NIC allows standby power to be enabled; receiving a power indication signal fed back by the NIC, wherein the power indication signal is configured to indicate that standby power has been enabled; processing the power indication signal through a second delay line to obtain a second power enable signal, wherein the target timing signal includes the second power enable signal and the delay line includes a second delay line; and sending the second power enable signal to the NIC through a main connector to indicate that the NIC allows main power to be enabled.

[0013] In one exemplary embodiment, acquiring an indication signal provided by a target server node and sending the indication signal to a dual-slot network interface card (NIC) to instruct the NIC to start working includes: in response to the startup of at least one of a first server node and a second server node, determining the started server node as the target server node, and acquiring a high-speed signal and a clock signal provided by the target server node, wherein the indication signal includes the high-speed signal and the clock signal; and in response to receiving a reset signal sent by the target server node, controlling the NIC to start working based on the high-speed signal, the clock signal, and the reset signal, wherein the indication signal includes the reset signal.

[0014] In one exemplary embodiment, the target server node is connected to the dual-slot network interface card (NIC) via a connector. In response to receiving a control message sent by the target server node, the dual-slot NIC is accessed sequentially according to the order in which the control messages are received. This includes: when the target server node includes both a first server node and a second server node, in response to receiving a first control message sent by the first server node and a second control message sent by the second server node, determining the order in which the first control message and the second control message are received; and accessing the dual-slot NIC sequentially through the corresponding connectors according to the order in which the control messages are received.

[0015] In one exemplary embodiment, in response to receiving a control message sent by a target server node, accessing the dual-slot network interface card (NIC) in the order of receiving the control messages includes at least one of the following: in response to receiving a first query message sent by the target server node, accessing the dual-slot NIC based on the first query message to determine the field replaceable unit information corresponding to the dual-slot NIC, wherein the control message includes the first query message; in response to receiving a second query message sent by the target server node, accessing the dual-slot NIC based on the second query message to determine the temperature information of the temperature sensor corresponding to the dual-slot NIC, wherein the control message includes the second query message.

[0016] In one exemplary embodiment, the method further includes: when the target server node and the dual-slot network interface card are connected via a serial port, upgrading the firmware associated with the dual-slot network interface card using the serial port.

[0017] In one exemplary embodiment, the method further includes: establishing an electrical connection with a power board to acquire an electrical signal; processing the electrical signal through a first delay line to obtain a first power enable signal; sending the first power enable signal to a dual-slot network interface card (NIC) to indicate that the NIC allows standby power to be enabled; receiving a power indication signal fed back by the NIC and sending the power indication signal to a target server node through a node signal connector; processing the power indication signal through a second delay line to obtain a second power enable signal; sending the second power enable signal to the NIC to indicate that the NIC allows main power to be enabled; and, in response to the startup of at least one of the first and second server nodes, identifying the started server node as the target server node. The server node acquires high-speed signals and clock signals provided by the target server node; upon receiving a reset signal from the target server node within a preset time period, it controls the dual-slot network interface card (NIC) to start working based on the high-speed signals, clock signals, and reset signals; if the target server node includes both a first server node and a second server node, it determines the receiving order of the first and second control messages in response to receiving a first control message from the first server node and a second control message from the second server node; it accesses the dual-slot NIC sequentially through the corresponding connectors according to the receiving order; and if the target server node and the dual-slot NIC are connected via a serial port, it upgrades the firmware associated with the dual-slot NIC using the serial port.

[0018] According to another embodiment of this application, a network interface card (NIC) management device is provided, comprising: an acquisition module configured to acquire electrical signals provided by a power board, wherein the power board is independent of a first server node and a second server node, and the first server node and the second server node are configured to share a dual-slot NIC; a processing module configured to process the electrical signals through a delay line, generate a target timing signal, and send the target timing signal to the dual-slot NIC to instruct the dual-slot NIC to start power-on; a control module configured to acquire an indication signal provided by a target server node and send the indication signal to the dual-slot NIC to instruct the dual-slot NIC to start working, wherein the target server node refers to the server node that has been started among the first server node and the second server node; and an access module configured to access the dual-slot NIC in the order of receiving control messages sent by the target server node.

[0019] According to yet another embodiment of this application, a computer-readable storage medium is also provided, in which a computer program is stored, wherein the computer program is configured to perform the steps in any of the above method embodiments when it is run.

[0020] According to yet another embodiment of this application, an electronic device is also provided, including a memory and a processor, wherein a computer program is stored in the memory and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0021] This application utilizes electrical signals provided by a power board independent of both the first and second server nodes. These signals are processed through a delay circuit to generate target timing signals, which are then sent to the dual-slot network interface card (NIC) to instruct it to power on. This ensures the dual-slot NIC can start normally independently of either server node, thereby improving system stability and availability. Simultaneously, by acquiring the indication signal from the already started server node (target server node) and sending it to the dual-slot NIC to instruct it to start working, precise control of the NIC startup process is achieved. Furthermore, in response to receiving control messages from the target server node, the dual-slot NIC is accessed according to the order of message reception, enabling orderly data interaction and NIC management. This further improves system efficiency and reliability, resolving the technical problems of high hardware adaptation costs and inconsistent NIC interfaces in related technologies, which lead to low NIC management efficiency. Attached Figure Description

[0022] Figure 1 is a hardware structure block diagram of a server device for a network interface card (NIC) management method according to an embodiment of this application;

[0023] Figure 2 is a flowchart of a network interface card (NIC) management method according to an embodiment of this application;

[0024] Figure 3 is a schematic diagram of a method for dual-node shared management of DSFF / TDSFF network cards according to an embodiment of this application;

[0025] Figure 4 is a schematic diagram illustrating the implementation of a method for dual-node shared management of DSFF / TDSFF network cards according to an embodiment of this application;

[0026] Figure 5 is a flowchart of a method for dual-node shared management of DSFF / TDSFF network cards according to an embodiment of this application;

[0027] Figure 6 is a structural block diagram of a network interface card (NIC) management device according to an embodiment of this application. Detailed Implementation

[0028] The embodiments of this application will be described in detail below with reference to the accompanying drawings and examples.

[0029] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0030] The methods and embodiments provided in this application can be executed in a server device or a similar computing device. Taking a server device as an example, FIG1 is a hardware structure block diagram of a server device for a network interface card (NIC) management method according to an embodiment of this application. As shown in FIG1, the server device may include one or more (only one is shown in FIG1) processors 102 (processor 102 may include, but is not limited to, microprocessors such as MCUs or programmable logic devices such as FPGAs) and a memory 104 configured to store data. The server device may also include a transmission device 106 configured for communication functions and an input / output device 108. It will be understood by those skilled in the art that the structure shown in FIG1 is only illustrative and does not limit the structure of the server device. For example, the server device may also include more or fewer components than shown in FIG1, or have a different configuration than shown in FIG1.

[0031] The memory 104 can be configured to store computer programs, such as application software programs and modules, like the computer program corresponding to the network card management method in this embodiment. The processor 102 executes various functional applications and data processing by running the computer programs stored in the memory 104, thereby implementing the aforementioned method. The memory 104 may include high-speed random access memory and non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to server devices via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0032] The transmission device 106 is configured to receive or transmit data via a network. Optional examples of the network may include a wireless network provided by a communication provider for the server device. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module configured to communicate wirelessly with the Internet.

[0033] This embodiment provides a method for managing a network interface card (NIC). Figure 2 is a flowchart of a NIC management method according to an embodiment of this application. As shown in Figure 2, the process includes the following steps:

[0034] Step S202: Obtain the electrical signal provided by the power board, wherein the power board is independent of the first server node and the second server node, and the first server node and the second server node are configured to share the dual-slot network card.

[0035] Step S204: Process the electrical signal through the delay line to generate the target timing signal, and send the target timing signal to the dual-slot network card to instruct the dual-slot network card to start powering on;

[0036] Step S206: Obtain the indication signal provided by the target server node and send the indication signal to the dual-slot network card to instruct the dual-slot network card to start working. Here, the target server node refers to the server node that has been started between the first server node and the second server node.

[0037] Step S208: In response to receiving a control message from the target server node, access the dual-slot network card according to the order in which the control messages are received.

[0038] Through the above steps, electrical signals provided by a power board independent of the first and second server nodes are processed through a delay circuit to generate target timing signals. These target timing signals are then sent to the dual-slot network interface cards (NICs) to instruct them to power on. This ensures that the dual-slot NICs can start normally independently of either server node, thereby improving system stability and availability. Simultaneously, by acquiring the indication signal from the already started server node (target server node) and sending it to the dual-slot NICs to instruct them to start working, precise control of the NIC startup process is achieved. Furthermore, in response to control messages received from the target server node, the dual-slot NICs are accessed according to the order of message reception, enabling orderly data interaction and NIC management. This further improves system efficiency and reliability, resolving the technical problems of high hardware adaptation costs and inconsistent NIC interfaces that lead to low NIC management efficiency in related technologies.

[0039] The entities that perform the above steps can be servers, terminals, etc., but are not limited to these.

[0040] The execution order of steps S202 and S204 can be interchanged; that is, step S204 can be executed first, and then step S202 can be executed.

[0041] Optionally, in this embodiment, obtaining the electrical signal provided by the power board refers to obtaining the necessary power supply from the power board to ensure the dual-slot network interface card (NIC) can function properly. The power board is a component in the server system, responsible for providing stable power to various internal components. In this application, the power board is independent of both the first and second server nodes, meaning each server node can obtain independent power from the power board, rather than sharing the same power line. This design ensures that even if one node fails, the other node can still function normally, thereby improving system reliability and stability. For example, the power board can be an independent power supply unit that provides the necessary voltage and current to the dual-slot NIC via a power connector, ensuring stable operation of the NIC when shared between two server nodes.

[0042] It should be noted that, in the process of acquiring the electrical signals provided by the power supply board, the power supply board can be a module built into the server rack or an external power distribution unit; this application does not limit this. The connection between the power supply board and the first server node and the second server node can be achieved through a direct cable or through wireless power transfer technology; this application does not limit this. Furthermore, the electrical signals provided by the power supply board can be direct current, alternating current, or other forms of power provided through power conversion technology; this application does not limit this.

[0043] Optionally, in this embodiment, the above-mentioned processing of electrical signals through a delay line to generate target timing signals and sending the target timing signals to the dual-slot network card to instruct the dual-slot network card to start power-on refers to using a delay line to process the electrical signals to generate signals that meet specific timing requirements. These signals are then sent to the dual-slot network card to notify it to begin the power-on process. Timing signals are crucial for ensuring that electronic devices perform operations in the correct order, especially in multi-node server systems where correct timing is essential for stable system operation. For example, a delay line can be an electronic component that adjusts electrical signals according to a preset delay time, ensuring that the network card only starts powering on after receiving the correct timing signal. This avoids hardware damage or system instability caused by improper timing.

[0044] It should be noted that in the process of processing electrical signals through a delay circuit to generate the target timing signal, the delay circuit can be a physical electronic component, such as a circuit composed of resistors and capacitors, or it can be a software-implemented delay control logic; this application does not limit this. The target timing signal can be a simple pulse signal or a complex data packet containing various timing information; this application does not limit this either. Furthermore, the generation of the target timing signal can be based on a predetermined timing table or based on dynamic adjustments to the real-time system state; this application does not limit this either.

[0045] Optionally, in this embodiment, obtaining the indication signal provided by the target server node and sending the indication signal to the dual-slot network card to instruct the dual-slot network card to start working refers to receiving a startup signal from the already started server node (target server node) and passing that signal to the dual-slot network card, notifying the network card that it can begin its network communication work. In a multi-node server system, there may be multiple server nodes, but the dual-slot network card will only begin its network function when one of the nodes (the first server node or the second server node) completes startup and provides a startup indication signal. For example, the target server node may be a server node that has completed the startup process and is ready for network communication. It notifies the dual-slot network card by sending a startup signal (such as a PCIe signal). After receiving this signal, the network card will begin its network data reception and transmission work.

[0046] It should be noted that during the process of obtaining the indication signal provided by the target server node and sending the indication signal to the dual-slot network card, the indication signal can be a hardware-level electrical signal, such as a GPIO (General Purpose Input / Output) signal, or a software-level message, such as a control command sent via a network protocol. This application does not limit this. The target server node can be a physically independent server or a virtualized server instance. This application does not limit this. Furthermore, the transmission of the indication signal can be synchronous or asynchronous to adapt to different system requirements and network conditions. This application does not limit this.

[0047] Optionally, in this embodiment, the aforementioned response to receiving control messages from the target server node and accessing the dual-slot network interface card (NIC) according to the order in which the control messages are received refers to the NIC determining how to respond and access NIC resources based on the order in which these messages are received when it receives control messages from the target server node. This mechanism ensures that in a multi-node environment, access to the shared NIC by each node is ordered, avoiding resource conflicts and data corruption. For example, if the first server node sends a control message requesting to send network data, and the second server node subsequently sends a control message requesting to receive network data, the dual-slot NIC will process the request to send network data first, and then process the request to receive network data, according to the order in which they are received. This ensures the efficiency and accuracy of network communication.

[0048] It should be noted that, in the process of accessing the dual-slot network interface card (NIC) according to the order of receiving control messages from the target server node, the control messages can be for changes to the NIC configuration or for data transmission requests; this application does not limit this. The order of receiving control messages can be determined by hardware circuitry or by software scheduling algorithms; this application does not limit this. Furthermore, the dual-slot NIC's response to control messages can be immediate or a delayed response optimized based on the current state of network traffic or other system resources; this application does not limit this.

[0049] For example, in a multi-node server system in a data center, the power supply board, acting as the system's power management center, can be configured to independently provide stable electrical signals to the first and second server nodes, or it can be configured to power only the dual-slot network interface card (NIC). These two nodes are configured to share a single dual-slot NIC to achieve efficient resource utilization and cost reduction. The power supply board is connected to each server node via a dedicated power cable, ensuring that even if one node fails, the other node can continue operating, thereby improving system reliability.

[0050] S1: After the power board detects the system startup signal, it begins to provide electrical signals to the first server node and the second server node.

[0051] S2: The first server node and the second server node receive electrical signals from the power board through their respective power interfaces.

[0052] S3: The power management units inside the two server nodes regulate the electrical signals to ensure that the voltage and current meet the system requirements.

[0053] For example, the delay circuitry plays a crucial role in the startup process of a dual-slot network interface card (NIC). It is responsible for processing the electrical signals transmitted from the power supply board and generating target timing signals that meet the startup timing requirements of the dual-slot NIC.

[0054] S4: The electrical signal provided by the power board first reaches the delay circuit, which processes the electrical signal according to the preset delay parameters.

[0055] S5: The processed electrical signal is converted into the target timing signal, which will be sent to the dual-slot network card to instruct the network card to start powering on.

[0056] S6: After receiving the target timing signal, the dual-slot network card starts the internal power management circuit and gradually completes the power-on process.

[0057] For example, after the dual-slot network card is powered on, it needs to obtain an indication signal from the already started server node to start the network card's operation.

[0058] S7: After the first or second server node completes its self-test and starts up, it generates an indication signal.

[0059] S8: This indication signal is sent to the dual-slot network card via the communication bus inside the server node.

[0060] S9: After receiving the indication signal, the dual-slot network card activates the network interface and prepares to start data transmission.

[0061] For example, after the dual-slot network card is working properly, it will perform corresponding operations based on the control messages received from the target server node.

[0062] S10: The target server node generates control messages and sends them to the dual-slot network interface card according to network communication requirements.

[0063] S11: Dual-slot network cards process control messages according to the order in which they are received, which may be requests to send or receive data packets.

[0064] S12: The network interface card (NIC) parses control messages and performs corresponding network operations, such as forwarding, filtering, or responding to data packets.

[0065] Therefore, this application achieves efficient shared management of dual-slot network interface cards (NICs) in a dual-node server system. First, the independent power supply design of the power board improves the system's fault tolerance; even if one node fails, the other can continue operating, ensuring system stability. Second, the use of delay lines ensures that the dual-slot NICs are powered on according to the correct timing, avoiding hardware damage caused by timing errors. Third, the transmission of indicator signals ensures that the NICs start working at the correct time, improving system response speed. Finally, accessing the NICs according to the order of control messages ensures the orderliness and accuracy of network communication, improving overall network performance. In summary, this application not only improves the availability and resource utilization efficiency of the server system but also enhances system stability and network communication reliability.

[0066] In one exemplary embodiment, taking a high-density server cluster application scenario in a data center as an example, the data center needs to handle a large number of network connections and data transmission tasks, thus placing extremely high demands on the network performance and reliability of the servers. In this application scenario, the method of using dual-node shared management of DSFF / TDSFF network cards can significantly improve the network efficiency and system stability of the data center.

[0067] First, the server cluster in the data center consists of multiple server nodes, each undertaking critical data processing tasks. To ensure high network availability and efficient resource utilization, a method for dual-node shared management of DSFF / TDSFF network interface cards (NICs) was designed. In this scheme, the power supply board operates independently of the first and second server nodes, providing stable electrical signals to the dual-slot NICs. The power supply board is designed with the data center's requirements for power stability and reliability in mind, ensuring continuous power support for the NICs under all conditions.

[0068] Next, the electrical signals are processed through a delay circuit to generate target timing signals. These signals are then sent to the dual-slot network interface card (NIC) to instruct it to power on, ensuring that the NIC receives the correct power signal at the right time, thus enabling a smooth startup. In data center applications, this means that the NIC can start and operate stably even under high load or partial node failures.

[0069] Subsequently, the system acquires indication signals from the target server node and sends these signals to the dual-slot network interface card (NIC) to instruct it to begin operation. In data center applications, this typically involves monitoring the system's status to determine which server node has started and is ready to send control signals. This step can be extended to include real-time monitoring and fault detection of server node status, ensuring that only normally functioning nodes send start signals to the NIC.

[0070] Finally, in response to receiving control messages from the target server node, the dual-slot network interface card (NIC) is accessed according to the order in which the control messages are received. In data center applications, this means that the NIC needs to be able to handle concurrent requests from multiple nodes and allocate resources based on priority or receiving order. This step involves the development of advanced traffic management and scheduling algorithms for the NIC to ensure efficient and fair data transmission.

[0071] By using this dual-node shared management method for DSFF / TDSFF network interface cards (NICs), data centers can achieve higher network throughput and lower latency, while improving system fault tolerance. This approach not only improves the performance of individual server nodes but also reduces overall hardware costs and energy consumption through resource sharing, which is crucial for modern data centers pursuing high efficiency and sustainable development.

[0072] In another exemplary embodiment, a cloud service provider in a cloud computing environment needs to support tens of thousands of customers, each of whom may require different computing and network resources. In this application scenario, employing a dual-node shared management DSFF / TDSFF network interface card (NIC) approach can improve the flexibility and scalability of cloud services.

[0073] In cloud computing environments, the power supply board needs to provide not only stable electrical signals to dual-slot network interface cards (NICs), but also the ability to dynamically adjust to meet the needs of different customers. Through software-defined power management strategies, the power supply board can dynamically adjust the power supply based on actual load conditions to optimize energy efficiency and cost.

[0074] The electrical signals are processed via a delay line to generate target timing signals, which are then sent to the dual-slot network interface card (NIC) to instruct it to power on. In cloud computing environments, this step can be automated using scripts and tools to ensure fast and consistent NIC startup in large-scale deployments.

[0075] The process involves acquiring indication signals from the target server node and sending these signals to the dual-slot network interface card (NIC) to instruct it to begin operation. In cloud computing environments, this typically involves complex service orchestration and workload management to ensure the correct node sends the start signal at the correct time. Extensions of this step include monitoring and scheduling service instances, as well as the dynamic allocation of network resources.

[0076] In response to receiving control messages from the target server node, the dual-slot network interface card (NIC) is accessed in the order the control messages are received. In a cloud computing environment, the NIC needs to be able to handle requests from different clients and service instances, and prioritize critical tasks according to Service Level Agreements (SLAs). This step extends to advanced traffic management and Quality of Service (QoS) control of the NIC to ensure a satisfactory service experience for all clients.

[0077] By using this dual-node shared management method for DSFF / TDSFF network interface cards (NICs), cloud service providers can offer more flexible and scalable services while maintaining high efficiency and performance. This approach not only improves the performance of individual server nodes but also reduces overall hardware costs and energy consumption through resource sharing, which is crucial for modern cloud computing environments that prioritize efficiency and sustainable development.

[0078] As an optional solution, the electrical signal is processed through a delay line to generate a target timing signal, and the target timing signal is sent to the dual-slot network card to instruct the dual-slot network card to start power-on. This includes: processing the electrical signal through a first delay line to obtain a first power enable signal, wherein the target timing signal includes the first power enable signal, and the delay line includes the first delay line; and sending the first power enable signal to the dual-slot network card to instruct the dual-slot network card to enable standby power.

[0079] Optionally, in this embodiment, the aforementioned first delay line refers to a circuit component whose function is to adjust the timing characteristics of an electrical signal to ensure correct signal timing. This typically involves delaying the electrical signal to activate or deactivate other parts of the circuit at the correct time. The first delay line can be a physical circuit element, such as a resistor, capacitor, or inductor, or a logic gate and flip-flop in an integrated circuit. In technical implementation, the design of the first delay line needs to consider the signal propagation speed, the circuit response time, and the system synchronization requirements to ensure stable signal transmission and correct processing in the system. For example, the first delay line can be an RC (resistor-capacitor) network, where the delay length is set by adjusting the values ​​of the resistor and capacitor, or a counter in a digital circuit, which controls the signal delay by counting. In this embodiment, the aforementioned first power enable signal refers to a control signal used to notify the dual-slot network card that its internal power circuit can be activated, thereby entering standby mode. This signal is part of a power management strategy to ensure that the network card can enter a low-power state when there is no data transmission, in order to save energy. The generation of the first power enable signal involves monitoring and controlling the power state. It can be a high or low level signal, or a specific logic value in a digital signal. For example, in practical applications, the first power enable signal might be generated by the server's Baseboard Management Controller (BMC). When the system detects that the network interface card (NIC) needs to enter standby mode, the BMC sends this signal to the NIC. Upon receiving the signal, the NIC reduces its power consumption, preparing to enter standby mode. This control mechanism is particularly important for energy efficiency management in data center and cloud computing environments because it helps reduce unnecessary energy consumption and lower operating costs.

[0080] It should be noted that there are multiple possible implementations for the first delay circuit, and this application does not limit it. For example, the first delay circuit can be a simple RC delay circuit, where the delay length is set by adjusting the values ​​of the resistor and capacitor. It can also be a more complex digital delay circuit, using a counter or register to achieve precise time control. Furthermore, the design of the first delay circuit can be optimized according to different application scenarios and performance requirements. For example, in high-frequency network communication, a shorter delay may be needed to reduce signal transmission latency; while in low-power systems, more emphasis may be placed on the energy consumption control of the delay circuit.

[0081] Similarly, the generation and transmission of the first power enable signal can vary depending on different system architectures and power management strategies, and this application does not limit this. In some systems, the first power enable signal may be directly controlled by the server's central processing unit (CPU), while in other systems it may be generated by a first delay circuit. Furthermore, the transmission method of the first power enable signal can also be diverse, including transmission via physical cables, wireless signals, or optical fibers, depending on the system's wiring complexity and signal transmission reliability requirements.

[0082] The control over enabling standby power for dual-slot network interface cards (NICs) can be adjusted according to different power management requirements and network communication protocols; this application does not impose limitations on this. For example, in some high-load network environments, NICs may need to switch between active and standby modes more frequently, requiring a more flexible power management strategy to respond to changes in network traffic. In applications with high real-time requirements, NICs may need to remain active at all times; in this case, the control logic for the first power enable signal needs to be adjusted accordingly to ensure the continuity and stability of network communication.

[0083] As an optional approach, after sending the first power enable signal to the dual-slot network card to indicate that the dual-slot network card allows the standby power to be enabled, the method further includes: receiving a power indication signal fed back by the dual-slot network card, wherein the power indication signal is used to indicate that the standby power has been enabled; processing the power indication signal through a second delay line to obtain a second power enable signal, wherein the target timing signal includes the second power enable signal and the delay line includes the second delay line; and sending the second power enable signal to the dual-slot network card to indicate that the dual-slot network card allows the main power to be enabled.

[0084] Optionally, in this embodiment, the aforementioned power indication signal refers to a feedback signal sent by the dual-slot network card, used to notify the system of changes in its standby power state. This signal indicates that the network card has successfully received the first power enable signal and has enabled standby power. The power indication signal is an important part of the power management process, ensuring the synchronization and correctness of the system's power state. The power indication signal can be a voltage change, current change, or digital logic signal, depending on the network card design and power management protocol. For example, in some systems, the power indication signal may be a specific voltage level indicating that the network card has switched from standby mode to active mode; in other systems, it may be a digital signal sent via I2C or SPI bus to indicate the network card's power state.

[0085] In this embodiment, the aforementioned second delay line refers to another circuit component configured to further adjust the timing characteristics of the power indication signal to ensure that other parts of the circuit are activated or deactivated at the correct time. The design of the second delay line also needs to consider the signal propagation speed, circuit response time, and system synchronization requirements. For example, the second delay line can be a more complex digital circuit, utilizing an FPGA or ASIC to achieve precise timing control, or it can be a circuit composed of multiple logic gates that uses a specific logic sequence to delay the signal. In practical applications, the second delay line may be configured to ensure that after the network card completes standby power-on, a certain time delay is elapsed before sending the second power enable signal to start the network card's main power supply.

[0086] In this embodiment, the aforementioned second power enable signal refers to a control signal used to notify the dual-slot network interface card (NIC) to activate its internal main power circuit, thereby entering full-power operating mode. This signal is part of the power management strategy, ensuring that the NIC can quickly switch to full-power mode when full-speed operation is required. The generation of the second power enable signal involves monitoring and controlling the power state; it may be a high-level or low-level signal, or a specific logic value in a digital signal. For example, in practical applications, the second power enable signal may be generated by a second delay circuit. Upon receiving the signal, the NIC will activate its main power supply, preparing for high-speed data transmission. This control mechanism is particularly important for server systems that require rapid response to network requests, as it helps reduce the transition time of the NIC from standby to full-speed operation.

[0087] It should be noted that there are multiple ways to receive the power indication signal from the dual-slot network card, and this application does not limit this. The reception of the power indication signal may involve different communication protocols; for example, it may be transmitted via serial buses such as I2C, SPI, or SMBus, or it may be sent through a dedicated management interface of the network card, such as an Ethernet management chip. Furthermore, the format of the power indication signal can be an analog signal, such as a voltage change, or a digital signal, such as a specific bit pattern. The detection mechanism of the power indication signal will also differ in different application scenarios. For example, in server systems with high reliability requirements, multiple detection and confirmation mechanisms may be needed to ensure the accuracy of the signal. The process of processing the power indication signal through the second delay line to obtain the second power enable signal can also be diversified, and this application does not limit this. The design of the second delay line can be adjusted according to the characteristics of the power indication signal and the requirements of the system. For example, the second delay line may need to be set with different delay durations according to different power-on sequence requirements, or its response time may be adjusted under different voltage and current conditions. In addition, the second delay line may be integrated inside the network card or may exist as a separate component in the power management module. In some high-performance computing scenarios, the second delay line may need to support rapid response to reduce system startup time; while in energy-efficiency optimization scenarios, it may need to support finer power control to reduce energy consumption. The transmission of the second power enable signal may involve different power management strategies. For example, in some systems, confirmation from multiple power indication signals may be required before sending the second power enable signal to ensure stable system startup. In other systems, the transmission of the second power enable signal may be synchronized with the startup status of other parts of the system, such as the CPU or memory, to achieve overall system startup coordination. Furthermore, the transmission of the second power enable signal may require security authentication mechanisms to prevent unauthorized access or misoperation, especially in network equipment involving critical infrastructure, where security is a crucial consideration.

[0088] As an optional solution, after receiving the power indication signal from the dual-slot network card, the above method further includes: sending the power indication signal to the node signal connector; and controlling the node signal connector to send the power indication signal to the target server node.

[0089] Optionally, in this embodiment, the node signal connector refers to a hardware interface component used to transmit signals between server nodes, including but not limited to power indication signals. The node signal connector can be a physical connector, such as a PCIe connector, USB connector, or other types of data and power interfaces, or a wireless communication interface, such as a Wi-Fi or Bluetooth module. The node signal connector is designed to ensure reliable signal transmission between server nodes, including but not limited to power status signals, data transmission signals, and control signals. For example, in a multi-node server system, the node signal connector may be a custom backplane connector used to connect various computing nodes and transmit power and data signals; in a distributed system, the node signal connector may be a network interface card configured for network communication and power status synchronization between nodes.

[0090] It's important to note that the process of the control node signal connector sending power indication signals to the target server node involves multiple operational dimensions. First, the generation and transmission of the power indication signal must be compatible with the server node's power management logic to ensure signal accuracy and timeliness. Second, the node signal connector must possess sufficient bandwidth and stability to ensure interference-free signal transmission, especially in high-speed or high-load server environments. Furthermore, the design of the node signal connector must consider system scalability and compatibility to adapt to different server node interface standards and power management requirements. For example, in a cloud data center, the node signal connector might be a high-speed fiber optic connector configured to connect physical servers and a virtualization management platform for real-time power status monitoring and control; in a high-performance computing cluster, it might be a custom high-speed serial interface configured for tight coupling and collaborative power management between nodes. These application scenarios require the node signal connector to not only have efficient signal transmission capabilities but also flexible configuration and expansion capabilities to adapt to different server architectures and power management strategies.

[0091] As an optional solution, the above method further includes: receiving an interface control signal during the process of processing electrical signals through a delay line, generating a target timing signal, and sending the target timing signal to the dual-slot network card; and in response to the interface control signal, dividing the bandwidth corresponding to the dual-slot network card based on the dual slots, wherein the dual slots include a main connector and a secondary connector.

[0092] Optionally, in this embodiment, the aforementioned interface control signal refers to a signal configured to manage and control the behavior of the network interface. These signals can be electrical signals or logical instructions configured to instruct the network interface card (NIC) on how to respond or configure its operation. Interface control signals include, but are not limited to, configuration commands, status updates, and error reports, and can originate from the server's Baseboard Management Controller (BMC), Central Processing Unit (CPU), or other network management devices. For example, in an embodiment, the interface control signal may be a specific data packet configured to instruct the NIC to adjust its operating mode, such as switching from full-speed mode to power-saving mode; it may also be a hardware signal configured to trigger the NIC to perform self-testing or firmware updates. In this embodiment, a dual-slot NIC refers to a network interface card designed with two physical connection points, allowing the NIC to connect to two different nodes or motherboard slots of the server. The primary connector and secondary connector can be of the same or different interface types, and they collectively provide the required bandwidth and connectivity. For example, a dual-slot network interface card (NIC) may have two PCIe interfaces, each connected to a different PCIe lane, thereby expanding bandwidth; or, the primary connector may be configured for high-speed data transmission, while the secondary connector is configured for management traffic, such as out-of-band management. This design allows for more flexible network configuration and optimization to adapt to different server architectures and network requirements.

[0093] In this embodiment, the main connector and the secondary connector refer to two independent physical connection interfaces on a dual-slot network interface card (NIC), which jointly undertake network communication tasks. The main connector is typically responsible for the primary data transmission tasks, while the secondary connector may be used for auxiliary functions such as management, monitoring, or backup connections. For example, the main connector may be a high-speed fiber optic interface configured to connect to the core network switch; the secondary connector may be a low-speed Ethernet interface configured for local management or maintenance. In different application scenarios, these two connectors can have different configurations and uses. For instance, in a high-availability configuration, both the main and secondary connectors may be configured for data transmission, but if one node fails, the other node can take over its traffic. In a virtualized environment, the main and secondary connectors can connect to different virtual networks to achieve network isolation and optimization.

[0094] It should be noted that during the process of processing electrical signals through delay lines to generate target timing signals and sending them to the dual-slot network card, the receiving interface control signals can be implemented in various ways, and this application does not limit this. Receiving interface control signals may involve different communication protocols and interface types. For example, it can be a signal sent via a PCIe bus, or a control command transmitted via a serial communication interface such as I2C or SPI. Receiving interface control signals may also include signal parsing and execution, which may involve hardware circuit design, such as using an FPGA or ASIC to process these signals, or software-level processing, such as implementing the corresponding control logic in the server's BMC. Furthermore, receiving interface control signals may involve signal synchronization issues, ensuring that these signals are received and processed at the correct time to guarantee stable system operation. The operation of allocating bandwidth corresponding to the dual-slot network card based on the dual slots in response to the interface control signals can also be extended in multiple dimensions, and this application does not limit this. Bandwidth allocation can be based on different network communication standards and protocols, such as Ethernet, InfiniBand, or other proprietary network protocols. The specific implementation of bandwidth allocation may involve hardware-level design, such as the PHY layer circuit design of the network interface card (NIC), and software-level configuration, such as network configuration tools in the operating system. Bandwidth allocation may also involve network traffic management, such as using QoS (Quality of Service) technology to ensure the priority of critical traffic. For example, in a data center environment, bandwidth allocation may need to consider the application of virtualization technology to ensure the reasonable allocation of network resources among virtual machines; in high-performance computing scenarios, bandwidth allocation may need to meet the requirements of specific computing tasks, such as massively parallel processing or high-speed data transmission. The design of the dual-slot connector, including the main connector and the secondary connector, can also be diversified according to different application scenarios and requirements, and this application does not limit this. The design of the main connector and the secondary connector may involve different electrical characteristics and physical dimensions to adapt to different server motherboard and chassis designs. They may also need to support different data transmission rates and power supply requirements to meet the performance requirements of different NICs. In addition, the design of the main connector and the secondary connector may also involve support for hot-swapping to facilitate the replacement or upgrading of the NIC without restarting the system. For example, in a cloud service provider's environment, primary and secondary connectors may need to support high-density deployment to maximize the server's network connectivity; in edge computing scenarios, they may need to support rapid network configuration and fault recovery to cope with constantly changing network conditions.

[0095] As an optional solution, the electrical signal is processed through a delay line to generate a target timing signal, and the target timing signal is sent to the dual-slot network card to indicate that the dual-slot network card should start power-on. This includes: processing the electrical signal through a first delay line to obtain a first power enable signal, wherein the target timing signal includes the first power enable signal, and the delay line includes a first delay line; sending the first power enable signal to the dual-slot network card through the main connector to indicate that the dual-slot network card is allowed to enable standby power; receiving a power indication signal fed back by the dual-slot network card, wherein the power indication signal is configured to indicate that standby power has been enabled; processing the power indication signal through a second delay line to obtain a second power enable signal, wherein the target timing signal includes the second power enable signal, and the delay line includes a second delay line; and sending the second power enable signal to the dual-slot network card through the main connector to indicate that the dual-slot network card is allowed to enable main power.

[0096] Optionally, in this embodiment, the main connector refers to the primary physical interface on the dual-slot network card, responsible for communication and power management with other parts of the server system. The main connector can be a PCIe connector, a SAS (Serial Attached Small Computer System Interface) / SATA (Serial ATA) connector, or other types of high-speed data and power interfaces. For example, in a server system, the main connector might be a PCIe 3.0 or 4.0 interface, configured to provide high-speed data transmission while also sending and managing power signals; in a storage system, the main connector might be a SAS or SATA interface, configured to connect a hard drive and manage its power state. The power indication signal is sent back to the system by the dual-slot network card to confirm that it has received and enabled standby power. This feedback signal is crucial for the system's power management because it ensures the synchronization and correctness of the power state. The power indication signal can be a digital signal, an analog signal, or part of a communication protocol. For example, in some systems, the power indication signal might be a status byte sent by the network card via the I2C bus, indicating that it has switched to standby mode; in other systems, it might be a specific bit sequence sent via a dedicated management channel, configured to indicate changes in power status.

[0097] In this embodiment, the second power enable signal is a control signal configured to notify the dual-slot network interface card (NIC) to activate its main power circuitry, thereby entering full-power operation mode. This signal is part of a power management strategy, ensuring that the NIC can quickly switch to full-power mode when full-speed operation is required. The generation of the second power enable signal involves monitoring and controlling the power state; it may be a high-level or low-level signal, or a specific logic value in a digital signal. For example, in practical applications, the second power enable signal may be generated by the server's baseboard management controller (BMC). When the system detects that the NIC needs to enter full-power operation mode, the BMC sends this signal to the NIC. Upon receiving the signal, the NIC activates its main power supply, preparing for high-speed data transmission. This control mechanism is particularly important for server systems that require rapid response to network requests, as it helps reduce the transition time of the NIC from standby to full-speed operation.

[0098] It should be noted that the process of sending the first power enable signal to the dual-slot network card via the main connector may vary depending on the application scenario and hardware configuration, and this application does not limit this. The main connector can be different types of physical interfaces, such as PCIe, SAS, or USB (Universal Serial Bus), depending on the interface standards of the server and the network card. The process of sending the first power enable signal may involve signal encoding and modulation to ensure the integrity and reliability of the signal during transmission. In addition, this process may also include error detection and correction mechanisms to ensure that the signal is accurately received by the network card. For example, in server systems with high reliability requirements, sending the first power enable signal may require multiple confirmation and verification steps to prevent power management errors. The process of receiving the power indication signal fed back by the dual-slot network card may also vary depending on the network card design and power management protocol, and this application does not limit this. The power indication signal can be different types of electrical signals, such as voltage changes, current changes, or digital signals, depending on the network card's feedback mechanism. The process of receiving these signals may involve signal decoding and parsing to determine the power status of the network card. Furthermore, this process may also include signal filtering and amplification to ensure the signal is not interfered with during transmission. For example, in complex network environments, the reception of power indication signals may require anti-interference design to ensure clear signal transmission from the network card to the server system. The operation of sending a second power enable signal to a dual-slot network card via the main connector may also vary depending on different power management and network communication protocols, and this application does not limit this. The second power enable signal can be of different types, such as analog or digital signals, depending on the system's power control logic. The process of sending the second power enable signal may involve signal synchronization and timing control to ensure that the network card can correctly switch from standby mode to mains power mode. In addition, this process may also include signal encryption and security verification, especially in systems involving sensitive operations, to prevent unauthorized access or misoperation. For example, in a data center environment, sending a second power enable signal may need to be done through a secure management interface to ensure operational security and system stability.

[0099] As an optional approach, obtaining an indication signal provided by the target server node and sending the indication signal to the dual-slot network interface card (NIC) to instruct the NIC to start working includes: in response to the startup of at least one of the first and second server nodes, determining the started server node as the target server node, and obtaining a high-speed signal and a clock signal provided by the target server node, wherein the indication signal includes the high-speed signal and the clock signal; in response to receiving a reset signal sent by the target server node, controlling the NIC to start working based on the high-speed signal, the clock signal, and the reset signal, wherein the indication signal includes the reset signal.

[0100] Optionally, in this embodiment, the target server node refers to a server node that has been started and is ready for network communication in a two-node system. This node can be either the first or the second server node, depending on which node completes the startup process first. The target server node is responsible for providing the key signals required for network communication, including high-speed signals and clock signals. For example, in a server cluster in a data center, the target server node may be a computing node responsible for handling a large number of data computation and network communication tasks; in a cloud computing environment, the target server node may be a virtual machine instance that shares physical server resources through virtualization technology and provides network services.

[0101] In this application embodiment, high-speed signals refer to signals used to ensure high-speed data transmission between server nodes and dual-slot network interface cards (NICs). These signals may include high-speed data transmission signals in PCIe links or high-speed Ethernet signals in Ethernet communication. The transmission rate of high-speed signals may vary depending on different network technologies and hardware standards, including but not limited to 10GbE, 40GbE, and 100GbE. For example, in high-performance computing (HPC) scenarios, high-speed signals may be implemented through InfiniBand or Omni-Path network technologies to support massively parallel computing tasks; in enterprise data centers, high-speed signals may be implemented through Fibre Channel (FC) technology to support data transmission in storage area networks (SANs).

[0102] In this embodiment, the clock signal refers to a signal used to synchronize the operation of the server node and the dual-slot network interface card (NIC). The clock signal provides the necessary synchronization reference for data transmission and processing, ensuring that data is sent and received at the correct time. The clock signal can be generated by a clock generator inside the server node or provided by an external clock source. For example, in a multi-core processor system, the clock signal may be configured to synchronize data access between different cores; in a network interface card (NIC), the clock signal may be configured to synchronize the sending and receiving of data packets to ensure data integrity and reduce latency.

[0103] In this embodiment, the reset signal refers to a signal used to initialize or reset the state of a dual-slot network interface card (NIC). When the target server node sends a reset signal, the dual-slot NIC will perform a self-test, clear its internal state, or reconfigure according to the signal to prepare for the next data transmission or system startup. The reset signal can be a hardware-level signal, such as a low-level or high-level transition, or a software-triggered signal, such as a specific control command. For example, during system startup, the reset signal may be configured to reset the NIC's configuration register to load default settings; during system fault recovery, the reset signal may be configured to clear the NIC's error state to restore normal communication.

[0104] It should be noted that the process of determining the started server node as the target server node in response to the startup of at least one of the first and second server nodes can be implemented in various ways, and this application does not limit this. The mechanism for determining the target server node may involve hardware detection circuitry, which can sense the startup of the node power and send corresponding signals; it may also involve software-level detection logic, using the operating system or management program to identify which node starts up first. For example, in a high-availability server system, a heartbeat detection mechanism may be used to determine active nodes; in a distributed computing environment, the status of nodes may be confirmed through network communication protocols. Furthermore, the determination of the target server node may also be related to load balancing strategies; the system may select the most suitable node as the target server node based on the current network load and node performance. The operation of acquiring high-speed signals and clock signals provided by the target server node can also vary depending on the specific application scenario and hardware configuration, and this application does not limit this. The acquisition of high-speed signals and clock signals may involve different interfaces and communication protocols, such as PCI Express, SATA, or Ethernet. The transmission of these signals may need to meet specific electrical specifications to ensure signal integrity and stability. For example, in high-performance computing (HPC) systems, high-speed signals and clock signals may be transmitted through dedicated high-speed interconnect networks to support large-scale data parallel processing; in cloud computing environments, these signals may be transmitted between virtual machines through virtualization technology to achieve dynamic resource allocation and optimization. Furthermore, the acquisition of high-speed signals and clock signals may also involve signal synchronization issues to ensure the consistency and coordination of data transmission in multi-node systems.

[0105] On the other hand, the process of controlling the dual-slot network interface card (NIC) to start working based on the high-speed signal, clock signal, and reset signal in response to the reset signal sent by the target server node can also be implemented in various ways, and this application does not limit this. The reception and processing of the reset signal may involve different circuit designs and control logic to ensure that the NIC can correctly respond to the reset operation. For example, in network devices, the reset signal may trigger the NIC to perform self-testing and configuration to ensure the reliability of network communication; in server systems, the reset signal may be associated with the system's boot sequence to ensure that the NIC is in the correct initial state when the system starts. Furthermore, the processing of the reset signal may also involve security mechanisms, such as authentication and authorization checks upon receiving the reset signal to prevent unauthorized access or misoperation. In different application scenarios, the implementation of the reset signal may need to meet specific security and reliability requirements to adapt to different network communication standards and protocols.

[0106] As an optional solution, the target server node is connected to the dual-slot network interface card (NIC) via a connector. In response to receiving a control message sent by the target server node, the dual-slot NIC is accessed sequentially according to the order in which the control messages are received. This includes: when the target server node includes both a first server node and a second server node, in response to receiving a first control message sent by the first server node and a second control message sent by the second server node, determining the order in which the first and second control messages are received; and accessing the dual-slot NIC sequentially through the corresponding connectors according to the order in which the messages are received.

[0107] Optionally, in this embodiment, the aforementioned first control message refers to a message issued by the first server node for controlling or managing the behavior of the dual-slot network interface card (NIC). The first control message can contain various types of instructions, such as configuration changes, status queries, or operation commands. These messages ensure that the dual-slot NIC can adjust its working state or perform specific tasks according to the requirements of the first server node. For example, in data center management, the first control message might be a configuration command configured to update the NIC's network parameters; in a virtualization environment, it might be a virtual machine migration command requiring the NIC to provide network support for the migrated virtual machine.

[0108] In this embodiment, the aforementioned second control message refers to a control instruction issued by the second server node, similar to the first control message. The second control message also contains instructions configured to guide the operation of the dual-slot network interface card (NIC). These instructions may be the same as or different from the first control message, depending on the needs of the second server node. For example, in a clustered computing environment, the second control message might be a synchronization command configured to ensure that all nodes in the cluster can work collaboratively; in a load balancing system, it might be a traffic allocation instruction configured to adjust how the NIC handles network traffic.

[0109] In this embodiment, the aforementioned receiving order refers to the order in which the system receives control messages from the first server node and the second server node. This order may be determined based on timestamps, message queues, or network protocol priorities. Determining the receiving order is crucial for ensuring that the system can process multiple control messages correctly and in an orderly manner. For example, in a multitasking operating system, the receiving order may be associated with task priorities, with control messages generated by higher-priority tasks being processed first; in a distributed database system, the receiving order may be related to transaction consistency to ensure data integrity and consistency.

[0110] In this embodiment, the corresponding connectors refer to physical or logical connection points associated with a specific server node, through which the server node can communicate with a dual-slot network interface card (NIC). The corresponding connectors can be physical interfaces, such as PCIe slots, SAS / SATA ports, or other types of cable connections; or they can be logical interfaces, such as virtual connections established via network protocols. For example, in a multi-node server system, the corresponding connector might be a dedicated high-speed network interface card configured to connect to a network switch; in a storage area network (SLAN), the corresponding connector might be a Fibre Channel interface configured to connect to storage devices. The design and selection of the corresponding connectors depend on the system architecture and performance requirements, as well as compatibility with dual-slot NICs.

[0111] It should be noted that when the target server node includes both a first server node and a second server node, the process of determining the receiving order of the first control message and the second control message in response to receiving the first control message sent by the first server node and the second control message sent by the second server node can be implemented in various ways, and this application does not limit this. The determination of the receiving order may be based on various factors, including but not limited to the sending time of the control messages, network transmission latency, system processing priority, etc. For example, in a distributed system, a timestamp method may be used to determine the receiving order, where each control message is accompanied by a sending timestamp, and the system sorts the messages according to these timestamps; in a real-time system, the processing order may be determined according to the urgency of the messages, prioritizing control messages with higher real-time requirements; in a cloud data center, the priority of control messages issued by different virtual machines or containers may be determined according to a Service Level Agreement (SLA).

[0112] Furthermore, the operation of accessing the dual-slot network interface card (NIC) sequentially through the corresponding connectors according to the receiving order may vary depending on the specific system architecture and application requirements, and this application does not limit this. The corresponding connectors may include physical connectors such as PCIe slots and network interface card (NIC) ports, or logical connectors such as virtual NICs (vNICs) in a virtualization environment. For example, in high-performance computing (HPC) systems, physical connectors may need to support high-speed data transmission and low-latency communication to meet the needs of large-scale parallel computing; in cloud computing environments, logical connectors may be configured as virtualized connections between virtual machines and physical NICs to achieve virtualized management and distribution of network traffic; in edge computing scenarios, connectors may need to support rapid network configuration and fault recovery to cope with constantly changing network conditions and high reliability requirements. The design and selection of these connectors depend on the system architecture and performance requirements, as well as compatibility with dual-slot NICs.

[0113] As an optional approach, in response to receiving a control message sent by the target server node, accessing the dual-slot network interface card (NIC) according to the order of receiving the control messages includes at least one of the following: in response to receiving a first query message sent by the target server node, accessing the dual-slot NIC based on the first query message to determine the field replaceable unit information corresponding to the dual-slot NIC, wherein the control message includes the first query message; in response to receiving a second query message sent by the target server node, accessing the dual-slot NIC based on the second query message to determine the temperature information of the temperature sensor corresponding to the dual-slot NIC, wherein the control message includes the second query message.

[0114] Optionally, in this embodiment, the first query message refers to a specific query request sent by the target server node to the dual-slot network interface card (NIC), aiming to obtain the Field Replaceable Unit (FRU) information corresponding to the NIC. FRU information typically includes hardware version, serial number, manufacturer information, etc., which is crucial for hardware management and fault diagnosis. For example, during server maintenance, the first query message can be used to query the NIC's firmware version to determine if an update is needed; in an asset management system, it can be used to collect and record hardware information for all network devices for tracking and maintenance. The second query message refers to another query request sent by the target server node to the dual-slot NIC to obtain temperature information from the NIC's corresponding temperature sensor. Temperature information is crucial for monitoring hardware health and preventing overheating. For example, in a high-density server environment, the second query message can be used to monitor the NIC's operating temperature in real time to ensure it operates within a safe temperature range; in an automated cooling system, it can be used to adjust the operating status of the cooling equipment in response to temperature changes within the server.

[0115] In this embodiment, a connector refers to a physical or logical connection point between a server node and a dual-slot network interface card (NIC). Through these connectors, the server node can send control and query messages to the NIC. The connector can be a physical interface, such as a PCIe slot, USB port, or other types of cable connection; or it can be a logical interface, such as a virtual connection established via a network protocol. For example, in a data center, a connector might be a high-speed network interface card configured to connect to switches and other network devices; inside a server, a connector might be an expansion slot on the motherboard configured to install NICs and other expansion cards. The design and selection of connectors depend on the system architecture and performance requirements, as well as compatibility with dual-slot NICs.

[0116] It should be noted that the process of accessing a dual-slot network interface card (NIC) via a connector based on control messages received from a target server node may involve different communication protocols and interface standards. For example, control messages may be transmitted via interfaces such as SMBus, I2C, SPI, or PCIe. The connector can be a physical cable or circuit board connection, or a virtual network connection. For example, in a data center environment, the connector might be a high-speed fiber optic cable configured to transmit control messages; inside a server, the connector might be a dedicated slot on the motherboard configured to connect the NIC. Furthermore, the implementation of the connector may involve considerations of signal integrity and electromagnetic compatibility to ensure accurate transmission of control messages in complex electromagnetic environments. The first query message may include a request for FRU information, which may be configured for asset management, fault diagnosis, or system maintenance. For example, in an automated IT asset management system, the first query message might trigger the NIC to send its serial number and manufacturer information; during server maintenance, the first query message might be configured to query the NIC's firmware version to determine if an update is needed. Additionally, the implementation of the first query message may involve network security considerations to prevent unauthorized access and data leakage. The second query message may include a request for temperature sensor data, which is crucial for monitoring hardware status and preventing overheating. For example, in high-density computing environments, the second query message might be configured to monitor the network interface card's (NIC) operating temperature in real time to ensure it operates within a safe temperature range; in automated cooling systems, the second query message might trigger the NIC to send its current temperature reading to adjust the cooling system's operating status. Furthermore, the implementation of the second query message may involve considerations of data accuracy and update frequency to ensure the accuracy and timeliness of temperature information.

[0117] As an optional approach, the above method also includes: when the target server node and the dual-slot network card are connected via a serial port, upgrading the firmware associated with the dual-slot network card using the serial port.

[0118] Optionally, in this embodiment, the aforementioned serial port refers to an interface configured to enable communication between a target server node and a dual-slot network interface card (NIC), allowing data to be transmitted serially. The serial port can be a physical interface, such as RS-232, UART (Universal Asynchronous Receiver / Transmitter), or other types of serial communication interfaces, or a logical interface, such as a USB-to-serial virtual interface. Serial ports are widely used in device management and maintenance because they provide a relatively simple and reliable communication method. For example, in industrial control systems, a serial port may be configured to send commands from a control unit to an actuator; in computer systems, a serial port may be configured to connect a mouse, keyboard, or other peripheral devices.

[0119] In this embodiment, firmware refers to the software embedded in a dual-slot network interface card (NIC), which is responsible for controlling the basic functions and operations of the hardware. Firmware is typically burned into the hardware's non-volatile memory, such as ROM or flash memory, during manufacturing. Firmware is crucial for hardware devices because it provides the instructions needed to boot the device, perform basic diagnostics, and handle low-level communication tasks. For example, in network devices, firmware may contain code to boot the NIC, configure network parameters, and handle packet forwarding; in storage devices, firmware may manage data read / write operations and error detection and correction. Firmware upgrades are a common method for device maintenance and feature enhancement, allowing devices to adapt to new operating environments or fix known security vulnerabilities.

[0120] In this embodiment, firmware upgrade refers to the process of updating the firmware in a dual-slot network interface card (NIC) to improve device performance, add new features, or fix security vulnerabilities. Firmware upgrades can be performed in various ways, including but not limited to automatic updates over the network, updates using external storage devices, or updates directly from the target server node via a serial connection. For example, in a network switch, a firmware upgrade might involve downloading the latest firmware image over the network and then rebooting the device to apply the update; in an embedded system, a firmware upgrade might require connecting to the development tool via a serial port and then manually transferring the new firmware version. Firmware upgrades are a process that requires careful handling because they involve changes to the underlying software; improper upgrades can lead to the device failing to boot or operating unstablely.

[0121] It should be noted that when the target server node and the dual-slot network interface card (NIC) are connected via serial port, there are multiple ways to upgrade the firmware associated with the dual-slot NIC using the serial port, and this application does not limit this approach. This upgrade process may involve different firmware packaging formats, upgrade protocols, and error recovery mechanisms. For example, in different operating system environments, firmware upgrades may need to follow specific file system formats; for instance, INF files may be used in Windows systems, while DPKG or RPM packages may be used in Linux systems. Upgrade protocols may include simple file transfer protocols such as XMODEM or more complex protocols such as TFTP (Trivial File Transfer Protocol), which determine how data is transferred from the server node to the NIC. Furthermore, error recovery mechanisms may include data verification before uploading, retry logic after upload interruption, or rollback schemes after firmware upgrade failure.

[0122] Furthermore, the firmware upgrade process may require consideration of various security measures, such as encrypting firmware data during transmission to prevent data tampering, or implementing authentication during the upgrade process to ensure that only authorized systems can upgrade the firmware. For example, in the financial industry, firmware upgrades may need to comply with stringent security standards, including the use of a Hardware Security Module (HSM) to protect keys and the encryption process; in industrial control systems, firmware upgrades may require multi-factor authentication mechanisms to prevent unauthorized access and potential industrial espionage.

[0123] On the other hand, the triggering mechanism for firmware upgrades can also be diversified, including manual triggering, automatic triggering, or triggering based on specific events. For example, in a data center environment, firmware upgrades may be manually triggered by a network administrator through a management interface; in a cloud service provider environment, firmware upgrades may be automatically triggered based on a preset schedule to ensure that the firmware versions of all hardware are up-to-date; in an edge computing environment, firmware upgrades may be triggered based on specific system performance indicators or security alerts to respond to constantly changing operating conditions and security threats.

[0124] On the other hand, the scope of impact of firmware upgrades can vary, potentially affecting only a single network interface card (NIC), a group of NICs, or all NICs on an entire server node. For example, in large enterprise networks, firmware upgrades may need to be phased, first testing the new firmware on a small number of NICs and then gradually rolling it out across the entire network. In multi-tenant environments, firmware upgrades may require customized upgrade plans for different tenants to avoid service interruptions. These diverse scenarios demonstrate the complexity and flexibility of firmware upgrade operations, adapting to different network environments and business needs.

[0125] As an optional approach, the above method also includes:

[0126] Establish an electrical connection with the power board and acquire electrical signals;

[0127] The electrical signal is processed by the first delay line to obtain the first power enable signal;

[0128] Send the first power enable signal to the dual-slot network card to instruct the dual-slot network card to enable standby power.

[0129] Receive the power indication signal from the dual-slot network card and send the power indication signal to the target server node through the node signal connector;

[0130] The power indication signal is processed by the second delay line to obtain the second power enable signal;

[0131] Send a second power enable signal to the dual-slot network card to instruct the dual-slot network card to enable the main power supply;

[0132] In response to the startup of at least one of the first server node and the second server node, the started server node is identified as the target server node, and the high-speed signal and clock signal provided by the target server node are obtained.

[0133] If a reset signal is received from the target server node within a preset time period, the dual-slot network card is controlled to start working based on the high-speed signal, clock signal, and reset signal.

[0134] When the target server node includes both the first server node and the second server node, in response to receiving the first control message sent by the first server node and the second control message sent by the second server node, the receiving order of the first control message and the second control message is determined.

[0135] Access the dual-slot network cards sequentially through the corresponding connectors according to the receiving order;

[0136] When the target server node and the dual-slot network card are connected via serial port, the firmware associated with the dual-slot network card is upgraded using the serial port.

[0137] Optionally, in this embodiment, the power board refers to a hardware component that provides power to other parts of the system. The power board typically includes voltage and current conversion circuitry capable of converting the mains power supply voltage to a voltage level suitable for devices such as network interface cards (NICs). The first delay line in this embodiment refers to a circuit design configured to adjust the timing characteristics of electrical signals to ensure that signals are processed or transmitted at the correct time. The node signal connector in this embodiment refers to the physical interface for signal transmission between the server node and external devices (such as dual-slot NICs). The node signal connector can be various types of connectors, such as PCIe connectors, USB connectors, or Ethernet RJ45 connectors, responsible for transmitting data, control, and power signals. The second delay line in this embodiment refers to another circuit design, similar to the first delay line, configured to further adjust and control the timing characteristics of electrical signals. The design and implementation of the second delay line can be the same as the first delay line, or it can differ depending on specific application requirements.

[0138] Optionally, in this embodiment, a high-speed signal refers to a high-data-rate signal transmitted between the server node and the dual-slot network interface card (NIC). These signals may include Ethernet data, InfiniBand signals, or data from other high-speed serial communication protocols. The transmission rate of the high-speed signal may range from 1Gbps to 100Gbps or higher, depending on the technology and standards used. A clock signal refers to a signal that synchronizes device operation, providing the necessary time reference for data transmission and processing. The clock signal can be generated by an internal clock generator or provided by an external clock source. A reset signal refers to a signal used to reset the device state, enabling the device to return to its initial state or recover from an erroneous state. The reset signal can be a hardware signal or a software instruction.

[0139] Optionally, in this embodiment, a connector refers to a physical or logical connection point associated with a specific server node, through which the server node can communicate with a dual-slot network interface card (NIC). A serial port refers to a serial communication interface that allows data to be transmitted between two devices in a bit-by-bit sequence. Serial ports can be configured for tasks such as device management, configuration, and diagnostics. For example, a USB interface.

[0140] It should be noted that establishing electrical connections may involve high-voltage or low-voltage power supply systems, DC or AC power supplies, and different connector types, such as IEC320, Lemo, or Molex. For example, in telecommunications base stations, the power board may need to connect to the battery pack and inverter to ensure a switch to backup power in case of a main power failure; in industrial automation equipment, the power board may need to connect to a 24V DC power supply to drive control logic and actuators. Acquiring electrical signals may also involve power monitoring and regulation to ensure power stability and safety. The first delay circuit may employ different delay techniques, such as RC delay, crystal oscillator delay, or digital delay-locked loop (DLL) technology, to meet different timing control requirements. For example, in high-performance computing systems, the first delay circuit may need to precisely control the delay of the power enable signal to match the startup sequence of the high-speed processor; in automotive electronic systems, the first delay circuit may need to adjust the delay of the power enable signal according to the vehicle's startup sequence to ensure the safe startup of onboard electronic equipment. The transmission of the first power enable signal may involve different communication protocols and interfaces, such as I2C, SPI, or a dedicated power management bus. For example, in a data center server, the first power enable signal may be sent to the network card via a dedicated power interface to control it to enter a low-power mode; in a laptop, the first power enable signal may be sent to the network card via an EC (embedded controller) to achieve battery-saving mode. The reception and forwarding of power indication signals may involve different data transmission rates and signal integrity requirements, such as PCIe, SAS, or Ethernet. For example, in a high-performance computing cluster, the power indication signal may be sent to the management node via a high-speed network interface card to monitor the power status of each compute node in the cluster; in a cloud data center, the power indication signal may be sent to the central control console via the network management system for remote monitoring and fault diagnosis. The second delay line may employ different designs and configurations to accommodate different power management strategies and timing requirements. For example, in large server systems, the second delay line may need to be designed according to multiple power phases and timing requirements to ensure stable and reliable system startup; in mobile communication base stations, the second delay line may need to be configured according to battery replacement and power switching requirements to ensure the continuity of communication services. The transmission of the second power enable signal may involve different power management logics and control strategies, such as power priority control and power failure recovery. For example, in enterprise-level network switches, the second power enable signal may be configured to activate the backup power supply when a main power failure is detected; in military communication equipment, the second power enable signal may be configured to ensure rapid startup and stable operation of the equipment in extreme environments.

[0141] On the other hand, determining the target server node may involve different system architectures and fault recovery strategies, such as primary / backup failover and load balancing. For example, in a dual-active data center, the target server node may be determined based on real-time performance monitoring and health checks; in a distributed file system, it may be based on data location and access frequency. Reset signal reception and processing may involve different communication protocols and interfaces, such as JTAG, SPI, or I2C. For example, in a high-performance computing cluster, the reset signal may be configured to synchronize the operation of all computing nodes upon system startup; in automotive electronic systems, it may be configured to initialize the in-vehicle network equipment upon vehicle startup. Control message reception and processing may involve different data transmission protocols and interfaces, such as Modbus, PROFIBUS, or CAN bus. For example, in an industrial automated production line, the order in which control messages are received may determine the machine's start-up and shutdown sequence; in a smart grid, the order in which control messages are received may affect power distribution and load management. Corresponding connectors may include different interfaces and communication protocols, such as HDMI, DisplayPort, or VGA. For example, in a multimedia server, the corresponding connector might be configured to connect to a video output device; in scientific instruments, the corresponding connector might be configured to connect to a data acquisition card. The selection and configuration of connectors depend on the application scenario and equipment requirements to ensure reliable data transmission and device compatibility. Firmware upgrades may involve different file formats and transmission protocols, such as UEFI, BIOS, or Bootloader. For example, in network storage devices, firmware upgrades might be configured to update the file system and storage management algorithms; in security monitoring systems, firmware upgrades might be configured to enhance video processing capabilities and security performance. Firmware upgrades are a process that requires careful handling because they involve changes to the underlying software; improper upgrades may lead to device boot failure or unstable operation.

[0142] The following examples will further explain this application:

[0143] This application provides a method for dual-node shared management of DSFF / TDSFF network cards. For various network cards conforming to the DSFF / TDSFF standard, a management method is proposed. Both nodes can interact with the DSFF / TDSFF via PCIe, and both nodes can manage the network card through the BMC. Furthermore, through relevant hardware design for power supply and timing, it is ensured that a failure in any node will not affect the operation of the other node and the DSFF / TDSFF network card.

[0144] This application provides a method for dual-node shared management of DSFF / TDSFF network cards, comprising a power and timing module, a high-speed module, and a management module. Figure 3 is a schematic diagram of a method for dual-node shared management of DSFF / TDSFF network cards according to an embodiment of this application. As shown in Figure 3, the power and timing module provides power and timing signals to the DSFF / TDSFF network card, ensuring that the network card can be powered on and operated normally, and ensuring that the power-off of any node does not affect the normal operation of the other node and the network card; the high-speed module provides the DSFF / TDSFF network card with a high-speed PCIe link, a 100M clock, etc.; both nodes' BMCs can access the DSFF / TDSFF network card through the management module.

[0145] Figure 4 is a schematic diagram illustrating an implementation of a method for dual-node shared management of DSFF / TDSFF network cards according to an embodiment of this application. As shown in Figure 4, the dual-node shared DSFF / TDSFF draws power from the power board via a power connector. This power is supplied to the network card by the Riser adapter card connecting to two GenZ 4C+ connectors, namely the Primary 4C+ connector and the Second 4C+ connector. It is worth noting that the electrical signals connected to the power connector can be connected to a separate power board or other boards that can provide independent power. This ensures that power is still supplied even after any node is powered down or fails, i.e., the electrical signals are decoupled from the two nodes. This ensures that the other node and the DSFF / TDSFF network card can still function normally and remain unaffected when any node malfunctions.

[0146] The corresponding timing management signals for DSFF / TDSFF are AUX-PWR-EN0, MAIN-PWR-EN0, and NIC-PWR-GOOD0 on the Primary connector, while AUX-PWR-EN1, MAIN-PWR-EN1, and NIC-PWR-GOOD1 on the Second connector are reserved. After passing through a delay module, the P3V3_STBY generates the AUX-MWR-EN0 signal, which is connected to the Primary connector of the DSFF / TDSFF network card. Simultaneously, the BIF signal is pulled up or down on the network card to allocate the network card bandwidth as X16+X16. Upon receiving the AUX-MWR-EN0 signal, the DSFF / TDSFF network card powers on. After powering on via AUX, it sends the NIC-PWR-GOOD0 signal back to both nodes. Simultaneously, the NIC-PWR-GOOD0 signal on the Riser card, after a delay, generates the MAIN-PWR-EN0 signal for the Primary connector, and the network card begins to power on its internal MAIN circuit. Then, after the node powers on, the network card provides PCIe, a 100MHz clock, and a PERST reset signal.

[0147] After the node is powered on, the node CPU sends a high-speed PCIe signal to the network card. At the same time, the node provides a 100M clock signal to the network card (which can be provided by the CPU inside the node or by the clock generator / clock buffer inside the node). After a period of time, the CPU sends a PERST reset signal, and then the DSFF / TDSFF network card can work normally.

[0148] Each node's out-of-band management chip (BMC) provides one USB signal, which connects to the corresponding 4C+ connector, enabling firmware upgrades for the network card. Simultaneously, each node's BMC provides one I2C signal. These two I2C signals, after passing through an I2C arbitrator (such as PCA9641), connect to the Riser card's FRU and temperature sensor, as well as the network card's Primary connector SMBUS0 interface, allowing access to the Riser card's FRU and sensor, and to the FRU and network controller chip on the DSFF / TDSFF network card.

[0149] Figure 5 is a flowchart of a method for dual-node shared management of DSFF / TDSFF network cards according to an embodiment of this application. As shown in Figure 5, the timing signals required by the DSFF / TDSFF network card are provided through a delay line. After the node is powered on and sends the corresponding clock, high-speed signal and reset signal, the network card can work normally.

[0150] This application provides a method for dual-node shared management of DSFF / TDSFF network cards. By using delay lines on the Riser card, timing signals are decoupled from the two nodes, ensuring that power-down or failure of any node does not affect the operation of the other node and the DSFF / TDSFF network card. Furthermore, through appropriate hardware circuitry such as an I2C arbitrator, both nodes can manage and access the Riser card and the DSFF / TDSFF network card. This enables dual-node management of the DSFF / TDSFF network card and allows it to continue operating normally even if either node fails.

[0151] This application provides a method for dual-node shared management of DSFF / TDSFF network cards, specifically targeting the new type of DSFF / TDSFF network card proposed by the OCP organization. The power board provides electrical signals to the DSFF / TDSFF network card, and the delay lines on the Riser card provide timing signals, ensuring that the normal operation of the network card is not affected by the power failure of any node. Both nodes provide high-speed PCIe, clock, and reset signals to the DSFF / TDSFF network card to guarantee its normal operation. The BMCs of both nodes are connected to the two 4C+ connectors of the network card via USB, enabling firmware upgrades. Furthermore, the BMCs of both nodes are connected to the I2C arbitrator of the DSFF / TDSFF Riser card via I2C. The arbitrator is connected to the FRU and temperature sensor on the Riser card, allowing both nodes to access the FRU information and obtain temperature information from the temperature sensor. The arbitrator is also connected to the SMBUS0 interface on the Primary 4C+ connector, allowing both node BMCs to access the FRU and network control chip on the DSFF / TDSFF network card.

[0152] This application utilizes a novel DSFF / TDSFF network interface card (NIC). A Riser card connects to two nodes and the power board, respectively. The power connector's electrical signals are decoupled from the nodes. The timing signals of the DSFF / TDSFF NIC are generated from the electrical signals and delay lines on the Riser card. This ensures that if one node fails, the other node and the DSFF / TDSFF NIC can still function normally. Furthermore, both node server BMCs are connected to the NIC via USB and I2C signals, allowing for firmware upgrades and other operations. An I2C arbitrator ensures that both nodes can manage and access both the Riser card and the DSFF / TDSFF NIC. This enables dual-node management of the DSFF / TDSFF NIC, with shared access by both nodes, improving system availability and resource utilization efficiency, while ensuring continued normal operation even if one node fails.

[0153] The method for dual-node shared management of DSFF / TDSFF network cards provided in this application can also be applied to other types of smart network cards that support dual-node management, enabling two nodes to share a single smart network card and ensuring the normal operation of the server and the network card.

[0154] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the related technology, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods of the various embodiments of this application.

[0155] This embodiment also provides a network interface card (NIC) management device configured to implement the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0156] Figure 6 is a structural block diagram of a network interface card (NIC) management device according to an embodiment of this application. As shown in Figure 6, the device includes:

[0157] The acquisition module 602 is configured to acquire electrical signals provided by the power board, wherein the power board is independent of the first server node and the second server node, and the first server node and the second server node are configured to share a dual-slot network card.

[0158] The processing module 604 is configured to process electrical signals through a delay line, generate a target timing signal, and send the target timing signal to the dual-slot network card to instruct the dual-slot network card to start power-on.

[0159] The control module 606 is configured to acquire an indication signal provided by the target server node and send the indication signal to the dual-slot network card to instruct the dual-slot network card to start working, wherein the target server node refers to the server node that has been started between the first server node and the second server node.

[0160] Access module 608 is configured to access the dual-slot network interface card in the order in which the control messages are received, in response to receiving control messages sent by the target server node.

[0161] As an alternative, the device is configured to process electrical signals through a delay line to generate a target timing signal and send the target timing signal to the dual-slot network card to instruct the dual-slot network card to start powering on: processing electrical signals through a first delay line to obtain a first power enable signal, wherein the target timing signal includes the first power enable signal and the delay line includes the first delay line; and sending the first power enable signal to the dual-slot network card to instruct the dual-slot network card to enable standby power.

[0162] As an optional embodiment, the device is further configured to: send a first power enable signal to the dual-slot network card to indicate that the dual-slot network card allows the standby power to be enabled; then receive a power indication signal fed back by the dual-slot network card, wherein the power indication signal is configured to indicate that the standby power has been enabled; process the power indication signal through a second delay line to obtain a second power enable signal, wherein the target timing signal includes the second power enable signal and the delay line includes the second delay line; and send the second power enable signal to the dual-slot network card to indicate that the dual-slot network card allows the main power to be enabled.

[0163] As an optional solution, the device is also configured to: after receiving the power indication signal from the dual-slot network card, send the power indication signal to the node signal connector; and control the node signal connector to send the power indication signal to the target server node.

[0164] As an optional solution, the device is also configured to: receive interface control signals during the process of processing electrical signals through a delay line, generating target timing signals, and sending target timing signals to dual-slot network cards; and in response to the interface control signals, divide the bandwidth corresponding to the dual-slot network cards based on the dual slots, wherein the dual slots include a main connector and a secondary connector.

[0165] As an optional approach, the device is configured to process electrical signals via a delay line to generate a target timing signal and send the target timing signal to the dual-slot network interface card (NIC) to instruct the NIC to power on: processing the electrical signals via a first delay line to obtain a first power enable signal, wherein the target timing signal includes the first power enable signal and the delay line includes a first delay line; sending the first power enable signal to the NIC via a main connector to instruct the NIC to enable standby power; receiving a power indication signal from the NIC, wherein the power indication signal is configured to indicate that standby power has been enabled; processing the power indication signal via a second delay line to obtain a second power enable signal, wherein the target timing signal includes the second power enable signal and the delay line includes a second delay line; and sending the second power enable signal to the NIC via a main connector to instruct the NIC to enable main power.

[0166] As an optional approach, the device is configured to acquire an indication signal provided by a target server node and send the indication signal to the dual-slot network interface card (NIC) to instruct the NIC to start working: in response to the startup of at least one of the first and second server nodes, the started server node is identified as the target server node, and a high-speed signal and a clock signal provided by the target server node are acquired, wherein the indication signal includes the high-speed signal and the clock signal; in response to receiving a reset signal sent by the target server node, the NIC is controlled to start working based on the high-speed signal, the clock signal, and the reset signal, wherein the indication signal includes the reset signal.

[0167] As an optional solution, the target server node is connected to the dual-slot network interface card (NIC) via a connector. The device is configured to respond to a control message sent by the target server node in the following manner, accessing the dual-slot NIC sequentially according to the order in which the control messages are received: when the target server node includes both a first server node and a second server node, in response to a first control message sent by the first server node and a second control message sent by the second server node, determining the order in which the first and second control messages are received; and accessing the dual-slot NIC sequentially through the corresponding connectors according to the order in which the messages are received.

[0168] As an optional approach, the device is configured to access the dual-slot network interface card (NIC) in the order of receiving control messages from the target server node in response to at least one of the following methods: In response to receiving a first query message from the target server node, accessing the dual-slot NIC based on the first query message to determine the field replaceable unit information corresponding to the dual-slot NIC, wherein the control message includes the first query message; In response to receiving a second query message from the target server node, accessing the dual-slot NIC based on the second query message to determine the temperature information of the temperature sensor corresponding to the dual-slot NIC, wherein the control message includes the second query message.

[0169] As an optional solution, the device is also configured to upgrade the firmware associated with the dual-slot network card via a serial port when the target server node and the dual-slot network card are connected via a serial port.

[0170] As an optional solution, the device is also configured to: establish an electrical connection with the power board and acquire an electrical signal; process the electrical signal through a first delay line to obtain a first power enable signal; send the first power enable signal to the dual-slot network interface card (NIC) to indicate that the NIC allows standby power to be enabled; receive a power indication signal fed back by the NIC and send the power indication signal to the target server node through a node signal connector; process the power indication signal through a second delay line to obtain a second power enable signal; send the second power enable signal to the NIC to indicate that the NIC allows main power to be enabled; and, in response to the startup of at least one of the first and second server nodes, identify the started server node as the target. The server node acquires high-speed signals and clock signals provided by the target server node; upon receiving a reset signal from the target server node within a preset time period, it controls the dual-slot network interface card (NIC) to start working based on the high-speed signals, clock signals, and reset signals; if the target server node includes both a first server node and a second server node, it determines the receiving order of the first and second control messages in response to receiving a first control message from the first server node and a second control message from the second server node; it accesses the dual-slot NIC sequentially through the corresponding connectors according to the receiving order; and if the target server node and the dual-slot NIC are connected via a serial port, it upgrades the firmware associated with the dual-slot NIC using the serial port.

[0171] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0172] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above method embodiments when running, and the computer-readable storage medium is a computer non-volatile readable storage medium.

[0173] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0174] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0175] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0176] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0177] Obviously, those skilled in the art should understand that the modules or steps of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented here, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this application is not limited to any particular combination of hardware and software.

[0178] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A method for managing a network interface card (NIC), characterized in that, Applied to dual-slot network cards, This includes: acquiring electrical signals provided by the power board, wherein the power board is independent of the first server node and the second server node, and the first server node and the second server node are configured to share the dual-slot network card; The electrical signal is processed by a delay circuit to generate a target timing signal, which is then sent to the dual-slot network card to instruct it to start powering on. Obtain the indication signal provided by the target server node, and send the indication signal to the dual-slot network card to instruct the dual-slot network card to start working, wherein the target server node refers to the server node that has been started between the first server node and the second server node; In response to receiving a control message from the target server node, the dual-slot network interface card is accessed in the order in which the control message is received.

2. The method according to claim 1, characterized in that, The step of processing the electrical signal through a delay circuit to generate a target timing signal and sending the target timing signal to the dual-slot network card to instruct the dual-slot network card to start power-on includes: The electrical signal is processed by the first delay line to obtain a first power enable signal, wherein the target timing signal includes the first power enable signal, and the delay line includes the first delay line. The first power enable signal is sent to the dual-slot network card to indicate that the dual-slot network card is allowed to enable standby power.

3. The method according to claim 2, characterized in that, After sending the first power enable signal to the dual-slot network card to indicate that the dual-slot network card allows standby power to be enabled, the method further includes: Receive the power indication signal fed back by the dual-slot network card, wherein the power indication signal is configured to indicate that the standby power has been enabled; The power indication signal is processed by the second delay line to obtain the second power enable signal, wherein the target timing signal includes the second power enable signal and the delay line includes the second delay line. The second power enable signal is sent to the dual-slot network card to indicate that the dual-slot network card is allowed to enable the main power supply.

4. The method according to claim 3, characterized in that, After receiving the power indication signal from the dual-slot network card, the method further includes: Send the power indication signal to the node signal connector; The node signal connector is controlled to send the power indication signal to the target server node.

5. The method according to claim 1, characterized in that, The method further includes: During the process of processing the electrical signal through the delay line to generate the target timing signal and sending the target timing signal to the dual-slot network card, the interface control signal is received. In response to the interface control signal, the bandwidth corresponding to the dual-slot network card is divided based on the dual slots, wherein the dual slots include a main connector and a secondary connector.

6. The method according to claim 5, characterized in that, The step of processing the electrical signal through a delay circuit to generate a target timing signal and sending the target timing signal to the dual-slot network card to instruct the dual-slot network card to start power-on includes: The electrical signal is processed by the first delay line to obtain a first power enable signal, wherein the target timing signal includes the first power enable signal, and the delay line includes the first delay line. The first power enable signal is sent to the dual-slot network card through the main connector to indicate that the dual-slot network card allows standby power to be enabled; Receive the power indication signal fed back by the dual-slot network card, wherein the power indication signal is configured to indicate that the standby power has been enabled; The power indication signal is processed by the second delay line to obtain the second power enable signal, wherein the target timing signal includes the second power enable signal and the delay line includes the second delay line. The second power enable signal is sent to the dual-slot network card through the main connector to indicate that the dual-slot network card allows the main power to be enabled.

7. The method according to claim 1, characterized in that, The step of obtaining the indication signal provided by the target server node and sending the indication signal to the dual-slot network interface card (NIC) to instruct the dual-slot NIC to start working includes: In response to the startup of at least one of the first server node and the second server node, the started server node is determined as the target server node, and a high-speed signal and a clock signal provided by the target server node are obtained, wherein the indication signal includes the high-speed signal and the clock signal; In response to receiving a reset signal from the target server node, the dual-slot network interface card is controlled to start working based on the high-speed signal, the clock signal, and the reset signal, wherein the indication signal includes the reset signal.

8. The method according to claim 1, characterized in that, The target server node is connected to the dual-slot network interface card via a connector. The step of responding to receiving a control message sent by the target server node and sequentially accessing the dual-slot network interface card according to the order in which the control messages are received includes: When the target server node includes both the first server node and the second server node, in response to receiving the first control message sent by the first server node and the second control message sent by the second server node, the receiving order of the first control message and the second control message is determined. The dual-slot network cards are accessed sequentially through the corresponding connectors according to the receiving order.

9. The method according to claim 1, characterized in that, Determining the receiving order of the first control message and the second control message includes: determining the receiving order of the first control message and the second control message based on the sending timestamp carried by the first control message and the sending timestamp carried by the second control message.

10. The method according to claim 1, characterized in that, The step of responding to receiving a control message from the target server node and accessing the dual-slot network interface card in the order in which the control message is received includes at least one of the following: In response to receiving a first query message sent by the target server node, the system accesses the dual-slot network interface card (NIC) based on the first query message to determine the field replaceable unit information corresponding to the dual-slot NIC, wherein the control message includes the first query message; In response to receiving a second query message sent by the target server node, the system accesses the dual-slot network interface card (NIC) based on the second query message to determine the temperature information of the temperature sensor corresponding to the dual-slot NIC, wherein the control message includes the second query message.

11. The method according to claim 1, characterized in that, The method further includes: when the target server node and the dual-slot network card are connected via a serial port, upgrading the firmware associated with the dual-slot network card using the serial port.

12. The method according to claim 1, characterized in that, The method further includes: Establish an electrical connection with the power board and acquire the electrical signal; The electrical signal is processed by the first delay line to obtain the first power enable signal; The first power enable signal is sent to the dual-slot network card to indicate that the dual-slot network card is allowed to enable standby power. Receive the power indication signal fed back by the dual-slot network card, and send the power indication signal to the target server node through the node signal connector; The power indication signal is processed by the second delay line to obtain the second power enable signal; The second power enable signal is sent to the dual-slot network card to indicate that the dual-slot network card is allowed to enable the main power supply; In response to the startup of at least one of the first server node and the second server node, the started server node is determined as the target server node, and the high-speed signal and clock signal provided by the target server node are obtained; If a reset signal is received from the target server node within a preset time period, the dual-slot network card is controlled to start working based on the high-speed signal, the clock signal, and the reset signal. When the target server node includes both the first server node and the second server node, in response to receiving the first control message sent by the first server node and the second control message sent by the second server node, the receiving order of the first control message and the second control message is determined. The dual-slot network cards are accessed sequentially through the corresponding connectors according to the receiving order. When the target server node and the dual-slot network card are connected via a serial port, the firmware associated with the dual-slot network card is upgraded using the serial port.

13. The method according to claim 1, characterized in that, The indication signal is configured to notify the dual-slot network card to start network communication.

14. The method according to claim 1, characterized in that, The dual-slot network interface card is configured to perform corresponding operations based on the content of the control message.

15. The method according to claim 1, characterized in that, The receiving order includes the order in which the dual-slot network interface card receives the control messages from the first server node and / or the second server node.

16. The method according to claim 1, characterized in that, In response to receiving a control message sent by the target server node, the method includes: responding to the control information sent by the target server node based on network traffic delay.

17. A server expansion card, characterized in that, The method configured to perform any one of claims 1 to 16 comprises: A power connector is configured to receive the electrical signal provided by the power board; The delay line is configured to process the electrical signal, generate the target timing signal, and send the target timing signal to the dual-slot network card. A node signal connector is configured to acquire indication signals provided by the target server node; An arbitrator is configured to determine the access order of the control messages to the dual-slot network interface card based on the received order.

18. A network interface card (NIC) management device, characterized in that, include: The acquisition module is configured to acquire electrical signals provided by the power board, wherein the power board is independent of the first server node and the second server node, and the first server node and the second server node are configured to share a dual-slot network card. The processing module is configured to process the electrical signal through a delay line, generate a target timing signal, and send the target timing signal to the dual-slot network card to instruct the dual-slot network card to start power-on. The control module is configured to acquire an indication signal provided by the target server node and send the indication signal to the dual-slot network interface card to instruct the dual-slot network interface card to start working, wherein the target server node refers to the server node that has been started between the first server node and the second server node; The access module is configured to access the dual-slot network interface card in the order in which the control messages are received, in response to receiving a control message sent by the target server node.

19. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method described in any one of claims 1 to 16.

20. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method described in any one of claims 1 to 16.

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