Surface structuring methods and devices associated with computing or electronic component packaging

Abstract

Apparatuses and methods associated with surface structures of a compute component package are disclosed herein. In an embodiment, an apparatus can include a plurality of structures provided on a surface of a compute component package, wherein the plurality of structures are to attach and electrically couple the compute component package to another device, and wherein a structure of the plurality of structures includes first and second portions, the second portion disposed farther from the surface than the first portion, the first portion including a different material than the second portion.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to the technical field of computing, and more particularly to electrical connection structures associated with computing or electronic component packaging. BACKGROUND

[0002] The background description provided herein is for the purpose of generally presenting the context of the disclosure. The description set forth in this section is not to be taken as an admission that any of the descriptions presented constitutes prior art to the claims of the present application, nor do they constitute admission of any kind that the descriptions represent well- known aspects of the present disclosure or that they constitute the prior art. Unless otherwise indicated herein, the descriptions provided herein are not prior art to the claims of the present application and are not admitted to be prior art by their inclusion in this section.

[0003] Computing or electronic component packaging can include a plurality of surface mount structures, such as solder or pin structures, to mechanically and electrically connect the packaging to a printed circuit board (PCB), substrate, etc. The size and shape of the plurality of surface mount structures can be standardized. However, there can be instances in which one or more of the plurality of surface mount structures can need to be configured differently. There can also be instances in which the entity that manufactures and / or assembles the computing / electronic component packaging can be different than the entity that assembles the packaging with the PCB, substrate, etc. Other computing / electronic devices that can include surface mount structures can similarly have configuration needs that differ from those in existing devices. BRIEF DESCRIPTION OF DRAWINGS

[0004] Embodiments will be readily understood by the following detailed description in conjunction with the accompanying drawings. The above-described features and advantages of the disclosed embodiments will be more fully understood and appreciated by reference to the following drawings. The drawings depict embodiments for the purpose of illustration only. The drawings are not intended to limit the scope of the disclosure in any way. The drawings are as follows:

[0005] Figure 1 An exemplary cross-sectional view of a plurality of surface mount structures associated with a computing or electronic component incorporating aspects of the present disclosure is depicted in accordance with some embodiments.

[0006] Figures 2A-2E Exemplary illustrations of various embodiments of surface mount structures are depicted in accordance with some embodiments.

[0007] Figure 3 An exemplary process for forming a surface mount structure is depicted in accordance with some embodiments.

[0008] Figure 4 Exemplary images associated with forming a surface mount structure in accordance with the process of Figure 3 is depicted in accordance with some embodiments.

[0009] Figures 5-7 Exemplary images associated with forming a surface mount structure in accordance with the process ofFigure 3 exemplary views of various stages of a process forming surface mount structures in accordance with some embodiments.

[0010] Figure 8 depicts exemplary views of various stages of a process forming surface mount structures in accordance with some embodiments. Figure 3

[0011] Figure 9 depicts exemplary views of various stages of a process forming surface mount structures in accordance with some embodiments. Figure 3

[0012] Figure 10 shows an exemplary computer device suitable for practicing aspects of the present disclosure in accordance with some embodiments. DETAILED DESCRIPTION

[0013] Embodiments of apparatuses and methods related to surface structures of a compute component package are described. In embodiments, an apparatus can include a plurality of structures provided on a surface of a compute component package, where the plurality of structures are to attach and electrically couple the compute component package to another device, and where a structure of the plurality of structures includes first and second portions, the second portion disposed further from the surface than the first portion, and the first portion includes a different material than the second portion. These and other aspects of the present disclosure will be more fully described below.

[0014] While the concept of the present disclosure is amenable to various modifications and alternative forms, specific embodiments of the present disclosure have been shown by way of example in the drawings and will be described in detail in the following detailed description. It should be understood, however, that there is no intent to limit the principles of the present disclosure to the particular forms disclosed, but on the contrary, it is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the present disclosure and the appended claims.

[0015] ​​Reference in the specification to "one embodiment", "an embodiment", "exemplary embodiment", etc. means that a described embodiment can include a particular feature, structure, or characteristic, but every embodiment can not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Furthermore, a particular feature, structure, or characteristic can be combined in any suitable manner in different embodiments and / or implementations. In addition, it is appreciated that the specification is written for purposes of translation only, and it is not intended to limit the scope or substance of the appended claims in any way.

[0016] In some cases, the disclosed embodiments can be implemented entirely or in part by hardware, firmware, software, and any combination thereof. The disclosed embodiments can also be implemented as instructions carried by or stored on one or more transitory or non-transitory machine-readable (e.g., computer- readable) storage media, which can be read and executed by one or more processors. A machine-readable storage medium can be embodied as any storage device, mechanism, or other physical structure for storing or transmitting information in a form readable by a machine (e.g., a volatile or non-volatile memory, media disc, or other media device).

[0017] In the drawings, some of the structural or methodological features can be shown in specific arrangements and / or orders. However, it should be appreciated that such specific arrangements and / or orders can not be required. Rather, in some embodiments, such features can be arranged in a different manner and / or order than shown in the illustrative figures. Moreover, inclusion of structural or methodological features in a particular figure is not meant to imply that such features are required in all embodiments, and in some embodiments, such features can not be included, or can be combined with other features.

[0018] Figure 1Exemplary cross-sectional views of a plurality of surface mount structures associated with a computing or electronic component incorporating aspects of the present disclosure are depicted in accordance with some embodiments. The device 100 can include (without limitation) a substrate or base 102 and a plurality of surface mount structures 104 disposed on the substrate 102. In some embodiments, the substrate 102 can include a computing or electronic component, a portion of a computing or electronic component, and / or a component associated with a computing or electronic component. Examples of a computing or electronic component (also referred to as a computing component) can include (without limitation) a processor, a central processing unit (CPU), a graphics processing unit (GPU), a memory, a controller, an interface, a circuit, an integrated circuit chip, a printed circuit board (PCB), a motherboard, a chipset, a wireless device, and the like. The device 100 can also be referred to as a computing or electronic component package, a component package, or a package.

[0019] The plurality of surface mount structures 104 can include a plurality of conductive or metallic structures disposed at particular locations on a surface or side of the substrate 102. The plurality of surface mount structures 104 can be configured onto the substrate 102 so as to be mechanically attached and electrically coupled to corresponding mounting / electrical coupling structures on, for example, a PCB, motherboard, or device. Upon such connection with a PCB, motherboard, or the like, the computing component associated with the surface mount structures 104 can also establish electrical coupling with the PCB, motherboard, or the like via the surface mount structures 104. For example, the surface mount structures 104 can be arranged in an array pattern on the substrate 102, can be arranged along a perimeter of the substrate 102, can be arranged in a middle of the substrate 102, can be arranged along one or more edges of the substrate 102, or can be arranged in any other pattern to correspond to mounting structures associated with a PCB, motherboard, or the like.

[0020] In some embodiments, a surface mount structure of the plurality of surface mount structures 104 can include at least a first portion 106 and a second portion 108, where the first portion 106 can be disposed between the second portion 108 and the substrate 102. The first portion 106 and the second portion 108 can be physically attached and electrically coupled to each other. In some embodiments, a height of the surface mount structure 104 can be greater than a width or diameter thereof, or specifically a width or diameter of the first portion 106; a material constituting the first portion 106 can be different from a material constituting the second portion 108; and / or a shape of the first portion 106 can be different from a shape of the second portion 108.

[0021] In some embodiments, the first portion 106 and the second portion 108 can have different metallurgical compositions from one another. For example, the first portion 106 can include a tin-silver-copper (SnAgCu) (SAC) alloy, and the second portion 108 can include a SAC alloy having a tin-copper-bismuth (SnCuBi) intermetallic compound. The SnCuBi intermetallic compound (also referred to as a SnCuBi intermetallic joint or solder joint) can be located at or near the interface between the first portion 106 and the second portion 108. As another example, the first portion 106 can include a tin copper (SnCu) alloy, and the second portion 108 can include a SnCu alloy having a SnCuBi intermetallic compound. In yet other examples, the first portion 106 can include a SAC alloy, and the second portion 108 can include a SnCu alloy having an intermetallic compound different from the SnCu alloy. In yet other examples, the first portion 106 can include a SnCu alloy, and the second portion 108 can include a SAC alloy having an intermetallic compound different from the SAC alloy. In other examples, the first portion 106 can include a lead-free solder material, and the second portion 108 can include a lead-free solder material, and a region of the second portion 108 includes a material different from the lead-free solder material.

[0022] In some embodiments, the first portion 106 and the second portion 108 can have a melting temperature higher than about 175 degrees Celsius, a melting temperature higher than about 200 degrees Celsius, or a melting temperature of about 245 degrees Celsius. In some embodiments, a portion of the second portion 108 (e.g., the intermetallic compound portion mentioned above) can have a different melting temperature (e.g., a lower melting temperature) than the first portion 106 and / or the remainder of the second portion 108.

[0023] In some embodiments, the first portion 106 may include bumps, leads, balls, pads, or solder associated with a device 100 configured as a ball grid array (BGA) package, a square flat no-lead (QFN) package, or a leadless chip carrier (LCC) package, etc. The second portion 108 may include supplementary bumps, leads, balls, pads, or solder added to modify the device 100, as will be described in detail below. In some embodiments, a device 100 without the second portion 108 may include an initial computing / electronic component package capable of being attached to some PCB or motherboard. However, such a structure can be enhanced or modified by including the second portion 108. Thus, the first portion 106 and the second portion 108 together may include a resulting surface mount structure 104 having a different geometry, shape, height, width, and / or construction than the first portion 106, which is provided separately as a surface mount structure for the device 100. The surface mount structure 104 may also be referred to as a modified surface mount structure, a modified surface mount, and an electrical connection structure, etc.

[0024] For example, when device 100 includes a BGA package, the first portion 106 can have a spherical or hemispherical shape, such as... Figure 1 As shown. When device 100 includes a QFN or LCC package, the first portion 106 may include flat leads, wherein the side of the leads furthest from the substrate 102 may be flush with or collinear with the side of the surface mount structure 104 closest to the substrate 102, such as... Figures 8-9 As shown.

[0025] Figures 2A-2E Exemplary illustrations depict various embodiments of the surface mount structure 104 according to some embodiments. Figure 2A A surface mount structure 104 is depicted according to an embodiment, configured as a surface mount structure 204 having a snowman geometry or profile. The surface mount structure 204 may include a first portion 206 and a second portion 208, wherein the first portion 206 is disposed between the second portion 208 and a substrate 102. The first portion 206 may be similar to the first portion 106. The second portion 208 may have a spherical or hemispherical shape. When the first portion 206 has a spherical, spherical, or hemispherical shape (e.g., in a BGA package), the combination of the first portion 206 and the second portion 208 may resemble a snowman shape.

[0026] Figure 2BA surface mount structure 104 configured as a surface mount structure 214 having an alternative snowman geometry or profile is depicted in accordance with another embodiment. The surface mount structure 214 can include a first portion 216 and a second portion 218, where the first portion 216 is disposed between the second portion 218 and the substrate 102. The first portion 216 can be similar to the first portion 206. The second portion 218 can include a spherical portion 210 and a cylindrical portion 212. The cylindrical portion 212 can be disposed between the spherical portion 210 and the first portion 216. The cylindrical portion 212 can include an example of an intermetallic compound included in the second portion 218. The spherical portion 210 can be similar to the second portion 208, and the cylindrical portion 212 can have a width (or diameter) that is less than the width of the first portion 216 and / or the spherical portion 210. The cylindrical portion 212 can in turn be referred to as a neck, collar, or neck portion of the snowman geometry of the surface mount structure 214.

[0027] Figure 2C A surface mount structure 104 configured as a surface mount structure 224 having a cylindrical geometry or profile is depicted in accordance with yet another embodiment. The surface mount structure 224 can include a first portion 226 and a second portion 228, where the first portion 226 can be disposed between the second portion 228 and the substrate 102. The first portion 226 can be similar to the first portion 206. The second portion 228 can include a cylindrical, columnar, or other shape to provide a height to the surface mount structure 224 in a direction perpendicular to the substrate 102. In some embodiments, the surface mount structure 224 can be taller than the surface mount structures 204 and / or 214.

[0028] Figure 2D A surface mount structure 104 configured as a surface mount structure 234 having a polygonal geometry or profile is depicted in accordance with yet another embodiment. The surface mount structure 234 can include a first portion 236 and a second portion 238, where the first portion 236 can be disposed between the second portion 238 and the substrate 102. The first portion 236 can be similar to the first portion 206. The second portion 238 can have a three-dimensional polygonal shape, a triangle-based shape, a square-based shape, a rectangle-based shape, an octagon-based shape, a rectangular prism, a cube, a tetrahedron, a triangular prism, an octagonal prism, a square pyramid, a non-spherical-based shape, a non-elliptical-based shape, etc. In some embodiments, using a non-spherical shape can allow for a surface mount structure array pattern that can improve the density (i.e., higher pitch) of circuit board trace breakout and / or pitch.

[0029] Figure 2ESurface mount structures 104 configured as surface mount structures 244, 254, 264, 274 having different heights from one another are depicted in accordance with some embodiments. Surface mount structures 244, 254, 264, 274 can include respective first portions 246, 256, 266, 276 and second portions 248, 258, 268, 278, where first portions 246, 256, 266, 276 can be disposed between second portions 248, 258, 268, 278 and substrate 102. At least one of surface mount structures 244, 254, 264, 274 can have a height that is different from other ones of surface mount structures 244, 254, 264, 274. For example, surface mount structures 244, 274 can be taller than surface mount structures 254, 264. The different surface mount structure heights of the package can accommodate coupling the package to a PCB or motherboard that varies in height, such as a PCB or motherboard having cavities. Alternatively, one or more of surface mount structures 244, 254, 264, 274 can differ from one another in shape / geometry / profile. For example, surface mount structure 244 can include a snowman geometry as shown in Figure 2A surface mount structure 254 can include a cylindrical / cylinder geometry as shown in Figure 2C and surface mount structure 264 can include a three-dimensional polygonal geometry as shown in Figure 2D

[0030] In alternative embodiments, one or more adjacent surface mount structures 104 can be connected to one another (e.g., gang or bridge soldered) to improve electrical connections. For example, a second portion 108 of a first surface mount structure and a second portion 108 of a second surface mount structure can be mechanically and / or electrically coupled to one another so as to span first portions 106 associated with the first and second surface mount structures.

[0031] Figure 3 An exemplary process 300 for forming surface mount structures 104 in accordance with some embodiments is depicted. At block 302, device 100 including first portion 106 (a.k.a., an existing or initial surface mount structure) but not including second portion 108 can be placed into, aligned with, or seated in a substrate clamping mechanism. The substrate clamping mechanism can include a cradle or support for device 100. First portion 106 of device 100 can be facing upward or farthest from the substrate clamping mechanism. As an example, Figure 4 image 402 in FIG. 4B shows a plurality of computing / electronic component packages 420, any of which can include device 100 including first portion 106 but not including second portion 108 aligned with substrate clamping mechanism 422.

[0032] ​Next, at block 304, low temperature solder paste can be applied over the first portion 106. In some embodiments, the low temperature solder paste can include a solder paste having a melting temperature below approximately 200 degrees Celsius. For example, the low temperature solder paste can include a tin-bismuth (SnBi) (Sn42Bi58) alloy having a melting temperature of approximately 138 degrees Celsius. The thickness of the applied low temperature solder paste layer can be in the range of approximately 100 microns. The low temperature solder paste can be applied using a printing technique or a spray-on technique, among others. Continuing the example, Figure 4 FIG. 404 of the image 404 shown in FIG. 402 after the low temperature solder paste is applied.

[0033] At block 306, an intermediate plate (e.g., the intermediate plate 422 shown in FIG. 406 of the image 406) can be placed over the applied low temperature solder paste. The intermediate plate can include a plurality of cut-out regions or holes, each cut-out region corresponding to a respective one of the plurality of computing / electronic component packages 420. The intermediate plate can facilitate alignment of preforms to be placed over selected regions of the applied low temperature solder paste in block 308. Figure 4

[0034] At block 308, in some embodiments, a preform (e.g., the preform 424 shown in FIG. 408 of the image 408) can be placed in each cut-out region of the intermediate plate. The preform can include a plate having a plurality of cut-out regions or holes, each cut-out region for alignment with a location of a respective surface mount structure (e.g., the first portion 106) of the underlying computing / electronic component package 420. Two opposite sides of the preform 424 can be as shown in the image 408. The shape and size of the preform cut-out regions can be selected according to the intended shape and size of the second portion 108. For example, when the surface mount structure 104 is to include a snowman geometry, each of the preform cut-out regions can include a circular shape having a particular diameter. As another example, when the surface mount structure 104 is to include a triangle-based shape (e.g., tetrahedron, square pyramid), then the preform cut-out regions can include a triangular shape. Figure 4 The shape and / or size of the first cut-out region of the first preform can or can not be the same as the second cut-out region of the first preform. Similarly, the shape and / or size of the cut-out regions of the first preform can or can not be the same as the cut-out regions of the second preform.

[0035]

[0036] ​​Next, at block 310, a metal solder (e.g., SAC alloy, lead-free material, SnCu alloy, etc.) having a melting temperature exceeding approximately 175 degrees Celsius or 200 degrees Celsius can be applied or placed in the cutting area of ​​the preform provided in block 308. The applied metal solder can be positioned above (and in contact with) the low-temperature solder paste applied in block 304.

[0037] In some embodiments, in block 412, the top plate (e.g., Figure 4 The top plate 426 shown in image 412 is placed on the coated metal solder. The top plate can provide weight or compressive force to promote the adhesion and / or shaping of the metal solder, low-temperature solder paste, and first portion 106. Subsequently, at block 314, a low-temperature reflow operation can be performed, wherein at least the first portion 106, the low-temperature solder paste, and the metal solder can be exposed to temperatures up to approximately 175 degrees Celsius or up to approximately 200 degrees Celsius to form a surface mount structure that includes not only the first portion 106, such as surface mount structures 104, 204, 214, 224, 234, 244, 254, 264, and / or 274.

[0038] The applied temperature (e.g., having) Figure 4 The temperature profile shown in Figure 414 can at least partially melt or reflow the low-temperature solder paste disposed between the first portion 106 and the metal solder to connect the first portion 106 to the metal solder. The low-temperature solder paste can diffuse into the coated metal solder to form an intermetallic compound at least at or near the interface between the first portion 106 and the metal solder. For example, when the low-temperature solder paste comprises a SnBi (Sn42Bi58) alloy suspended in an aqueous medium (or flux) and the coated metal solder comprises a SAC alloy, the reflow operation may cause the aqueous medium to dissipate (e.g., evaporate), and Sn and Bi in the low-temperature solder paste will diffuse into or react with the SAC alloy to form a Sn-Cu-Bi intermetallic compound. As another example, when the low-temperature solder paste comprises a SnBi (Sn42Bi58) alloy suspended in an aqueous medium (or flux) and the coated metal solder comprises a SnCu alloy, the reflow operation may induce the formation of Sn-Cu-Bi intermetallic compounds, but with a copper concentration level different from that in the case where the coated metal solder comprises a SAC alloy. The applied temperature may also promote or cause the metal solder to form a specific shape and / or size of the second portion 108. In some embodiments, reflow conditions may be selected to avoid altering the first portion 106 or to minimize alterations to the first portion 106. Accordingly, the reflow operation can transform the low-temperature solder paste (or a portion thereof) and the coated metal solder material into the second portion 108.

[0039] Finally, at block 316, one or more post-reflow operations can be performed, such as removing the polymer tape used during the manufacturing process (e.g., as shown in image 416), thereby completing the formation of the modified / enhanced surface mount structure of the existing computing / electronic component package. Figure 4

[0040] Figures 5-7 Exemplary views of various stages of forming surface mount structures 204, 224, 234 according to process 300 are depicted in accordance with some embodiments. In Figure 5 In some embodiments, a layer of low temperature solder paste 502 can be provided on the side of first portion 206 that is farthest from substrate 102. SAC solder 504 can be provided on the side of low temperature solder paste 502 that is farthest from first portion 206. After the reflow operation of block 314, surface mount structure 204 can be formed that includes a spherical shaped second portion 208 and has an overall snowman geometry or shape. Figure 6 Figure 7 Layers of low temperature solder paste 602 between first portions 226 and SAC solder 604 and low temperature solder paste 702 between first portions 236 and SAC solder 704 are similarly shown for forming surface mount structures 224 and 234, respectively, in accordance with some embodiments.

[0041] Figure 8 Exemplary views of various stages of forming surface mount structures 804 associated with QFN package 800 according to process 300 are depicted in accordance with some embodiments. QFN package 800 can include substrate 802 and a plurality of first portions 806, which can include flat pins or electrical connection areas of the QFN package that are flush with the top surface of substrate 802. Low temperature solder paste 810 can be applied to first portions 806, and SAC solder 812 can be located on the side of low temperature solder paste 810 that is farthest from substrate 802 (e.g., above low temperature solder paste 810). With low temperature solder paste 810 and SAC solder 812 in place, a low temperature reflow operation can occur to form surface mount structures 804. Each of surface mount structures 804 can include a second portion 808 based on SAC solder 812 and first portions 806. The height of surface mount structures 804 above the top surface of substrate 802 can be defined by the height of second portions 808. The shape of surface mount structures 804 above the top surface of substrate 802 can also be defined by the shape of second portions 808 (e.g., a polygonal shape such as a square).

[0042] Figure 9 Exemplary views of various stages of forming surface mount structures 804 associated with QFN package 800 according to process 300 are depicted in accordance with some embodiments. QFN package 800 can include substrate 802 and a plurality of first portions 806, which can include flat pins or electrical connection areas of the QFN package that are flush with the top surface of substrate 802. Low temperature solder paste 810 can be applied to first portions 806, and SAC solder 812 can be located on the side of low temperature solder paste 810 that is farthest from substrate 802 (e.g., above low temperature solder paste 810). With low temperature solder paste 810 and SAC solder 812 in place, a low temperature reflow operation can occur to form surface mount structures 804. Each of surface mount structures 804 can include a second portion 808 based on SAC solder 812 and first portions 806. The height of surface mount structures 804 above the top surface of substrate 802 can be defined by the height of second portions 808. The shape of surface mount structures 804 above the top surface of substrate 802 can also be defined by the shape of second portions 808 (e.g., a polygonal shape such as a square). Figure 3 ​​The process 300 forms example views of various stages of surface mount structures 804 associated with the LCC package 900. The LCC package 900 can include a substrate 902 and a plurality of first portions 906, which can include flat pins or electrical connection areas of the LCC package that are flush with a top surface of the substrate 902. Low temperature solder paste 910 can be applied to the first portions 906, and SAC solder 912 can be located on a side of the low temperature solder paste 910 farthest from the substrate 902 (e.g., above the low temperature solder paste 910). With the low temperature solder paste 910 and SAC solder 912 in place, a low temperature reflow operation can occur to form surface mount structures 904. Each of the surface mount structures 904 can include a second portion 908 based on the SAC solder 912 and the first portion 906. A height of the surface mount structures 904 above the top surface of the substrate 902 can be defined by a height of the second portion 908. A shape of the surface mount structures 904 above the top surface of the substrate 902 can also be defined by a shape of the second portion 908 (e.g., a polygonal shape such as a square).

[0043] In this way, a wide variety of surface mount structure geometries can be achieved in a computing / electronic component package that are different from the initial or existing surface mount structures associated with the package, which can help with package performance, reliability, assembly, and / or testing. Various non-spherical geometries can be achieved for the surface mount structures.

[0044] Figure 10An exemplary computer device 1000 suitable for practicing aspects of the present disclosure is shown in accordance with various embodiments. In some embodiments, surface mount structures 104, 204, 214, 224, 234, 244, 254, 264, 274, 804, and / or 904 can be included in the computer device 1000 or portions thereof. For example, the processor 1002 can include a processor package that includes the surface mount structure 104. As shown, the computer device 1000 can include one or more processors 1002 and system memory 1004. The processor 1002 can include any type of processors. The processor 1002 can be implemented as an integrated circuit with a single core or multiple cores, e.g., a multi-core microprocessor. The computer device 1000 can include a mass storage device 1006 (e.g., a floppy disk drive, hard disk drive, a volatile memory (e.g., DRAM), a compact disk read only memory (CD-ROM), a digital versatile disk (DVD), a flash memory, and a solid state memory, etc.). In general, the system memory 1004 and / or the mass storage device 1006 can be any type of temporary and / or permanent storage that includes, without limitation, volatile and nonvolatile memory, optical, magnetic, and / or solid state mass storage, etc. Volatile memory can include, without limitation, static and / or dynamic random access memory. Nonvolatile memory can include, without limitation, electrically-erasable programmable read only memory, phase change memory, and resistive memory, etc.

[0045] The computer device 1000 can also include input / output (I / O) devices 1008 (e.g., microphone, sensors, display, keyboard, cursor control devices, remote control devices, game controllers, and image capture devices, etc.) and communication interfaces 1010 (e.g., network interface cards, modulators / demodulators, infrared receivers, radio receivers (e.g., Bluetooth), and antennas, etc.).

[0046] The communication interface 1010 can include a communication chip (not shown) that can be configured to operate the device 1000 according to a Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Universal Mobile Telecommunication System (UMTS), High Speed Packet Access (HSPA), Evolved HSPA (E-HSPA), or LTE network. The communication chip can also be configured to operate according to Enhanced Data rates for GSM Evolution (EDGE), GSM EDGE Radio Access Network (GERAN), Universal Terrestrial Radio Access Network (UTRAN), or Evolved UTRAN (E-UTRAN). The communication chip can be configured to operate according to Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Evolution-Data Optimized (EV-DO), derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond. In other embodiments, the communication interface 1010 can operate according to other wireless protocols.

[0047] The elements of the computer device 1000 described above can be coupled to one another via the system bus 1012, which can represent one or more buses. In the case of multiple buses, they can be bridged by one or more bus bridges (not shown). Each of these elements can perform its conventional functions known in the art. In one embodiment, the computing logic 1022 can be implemented by assembly language instructions or high-level languages instructions that can be compiled into such instructions by the processor 1002. The permanent copy of the programmable instructions can be placed into mass storage 1006 at the factory, for example, by distribution media (not shown), such as a compact disc (CD), or through the communication interface 1010 (from a distributed server (not shown)).

[0048] While certain embodiments have been illustrated and described herein, various changes in form and details can be made therein without departing from the scope of the disclosure. The application is intended to cover any adaptations or variations of the embodiments discussed herein. Therefore, it is manifestly intended that this application be limited only by the following claims.

[0049] Illustrative examples of the apparatuses, systems, and methods disclosed herein are provided below. An embodiment of the apparatuses, systems, and methods can include any one or more, and any combination of, the examples described below.

[0050] Example 1 is an apparatus comprising a plurality of structures provided on a surface of a compute component package, wherein the plurality of structures are to attach and electrically couple the compute component package to another device, and wherein a structure of the plurality of structures comprises a first portion and a second portion, the second portion is disposed farther from the surface than the first portion, and the first portion comprises a different material than the second portion.

[0051] Example 2 can include the subject matter of Example 1, and can further include, wherein the compute component package comprises a ball grid array (BGA) package, a quad flat no- leads (QFN) package, or a leadless chip carrier (LCC) package.

[0052] Example 3 can include the subject matter of any one of Examples 1-2, and can further include, wherein the first portion comprises a tin-silver-copper (SnAgCu) (SAC) alloy, and at least a portion of the second portion comprises a tin-copper-bismuth (SnCuBi) intermetallic compound.

[0053] Example 4 can include the subject matter of any one of Examples 1-3, and can further include, wherein the first portion comprises a tin-copper (SnCu) alloy, and at least a portion of the second portion comprises a tin-copper-bismuth (SnCuBi) intermetallic compound.

[0054] Example 5 can include the subject matter of any one of Examples 1-4, and can further include, wherein a height of a structure of the plurality of structures is greater than a width of the structure.

[0055] Example 6 can include the subject matter of any one of Examples 1-5, and can further include, wherein a first structure of the plurality of structures is adjacent to a second structure of the plurality of structures, and wherein the first structure has a different height than the second structure.

[0056] Example 7 can include the subject matter of any one of Examples 1-6, and can further include, wherein a first structure of the plurality of structures is adjacent to a second structure of the plurality of structures, and wherein the first structure is electrically coupled to the second structure.

[0057] Example 8 can include the subject matter of any one of Examples 1-7, and can further include, wherein a shape of the first portion is different than a shape of the second portion.

[0058] Example 9 can include the subject matter of any one of Examples 1-8, and can further include, wherein the first portion has a spherical, semi-spherical, or flat pin shape.

[0059] Example 10 can include the subject matter of any one of Examples 1-9, and can further include, wherein the second portions have a spherical, cylindrical, cylindrical, polygonal, rectangular, square, or octagonal shape.

[0060] Example 11 is a method comprising: applying a low temperature solder paste over a plurality of first portion structures on a surface of a compute component package; applying a solder material over the low temperature solder paste; and performing a low temperature reflow of at least the low temperature solder paste, the solder material, and the plurality of first portion structures.

[0061] Example 12 can include the subject matter of Example 11, and can further include, wherein performing the low temperature reflow comprises converting the low temperature solder paste and the solder material into a plurality of second portion structures disposed over the plurality of first portion structures, respectively.

[0062] Example 13 can include the subject matter of any one of Examples 11-12, and can further include, wherein the low temperature solder paste has a lower melting temperature than the plurality of first portion structures or the solder material, or both.

[0063] Example 14 can include the subject matter of any one of Examples 11-13, and can further include, wherein a shape of a first portion structure of the plurality of first portion structures is different than a shape of a second portion structure of the plurality of second portion structures.

[0064] Example 15 can include the subject matter of any one of Examples 11-14, and can further include, wherein a first portion structure of the plurality of first portion structures has a spherical, hemispherical, or flat pin shape.

[0065] Example 16 can include the subject matter of any one of Examples 11-15, and can further include, wherein a second portion structure of the plurality of second portion structures has a spherical, cylindrical, cylindrical, polygonal, rectangular, square, or octagonal shape.

[0066] Example 17 can include the subject matter of any one of Examples 11-16, and can further include, wherein performing the low temperature reflow comprises attaching the plurality of first portion structures to a respective plurality of second portion structures, and wherein the plurality of first portion structures attached to the respective plurality of second portion structures comprise a plurality of surface mount and electrically coupled structures of the compute component package.

[0067] Example 18 can include the subject matter of any one of Examples 11-17, and can further include, wherein at least a portion of the second portion structures of the plurality of second portion structures comprise a tin-copper-bismuth (Sn-Cu-Bi) intermetallic compound.

[0068] Example 19 can include the subject matter of any one of Examples 11-18, and can further include, wherein applying the solder material includes applying a tin-silver-copper (SnAgCu) (SAC) alloy, a tin-copper (SnCu) alloy, or a lead-free solder material over the low temperature solder paste.

[0069] Example 20 can include the subject matter of any one of Examples 11-19, and can further include, wherein performing the low temperature reflow includes performing the low temperature reflow at a temperature less than or equal to approximately 200 degrees Celsius.

[0070] Example 21 can include the subject matter of any one of Examples 11-20, and can further include, wherein the plurality of first portions have a melting temperature greater than 175 degrees Celsius.

[0071] Example 22 can include the subject matter of any one of Examples 11-21, and can further include, wherein the low temperature solder paste has a melting temperature less than approximately 200 degrees Celsius.

[0072] Example 23 can include the subject matter of any one of Examples 11-22, and can further include, wherein applying the low temperature solder paste includes applying the low temperature solder paste at a thickness of approximately 100 microns.

[0073] Example 24 can include the subject matter of any one of Examples 11-23, and can further include, wherein the low temperature solder paste includes a tin-bismuth (SnBi) (Sn42Bi58) alloy suspended in a water medium.

[0074] Example 25 can include the subject matter of any one of Examples 11-24, and can further include, wherein the computing component package includes a ball grid array (BGA) package, a quad flat no-lead (QFN) package, or a leadless chip carrier (LCC) package.

[0075] Example 26 is an apparatus comprising: a computing component; and a plurality of structures provided on a surface of the computing component, wherein the plurality of structures are to attach and electrically couple the computing component to another device, and wherein a structure of the plurality of structures includes first and second portions, the second portion is disposed farther from the surface than the first portion, and the first portion includes a different metallurgical composition than the second portion.

[0076] Example 27 can include the subject matter of Example 26, and can further include, wherein the computing component includes a processor, a central processing unit (CPU), a graphics processing unit (GPU), a memory, a controller, an interface, a circuit, an integrated circuit chip, a printed circuit board (PCB), a motherboard, a chipset, or a wireless device.

[0077] Example 28 can include the subject matter of any one of Examples 26-27, and can further comprise a package for the computing component, wherein the package comprises a ball grid array (BGA) package, a quad flat no-lead (QFN) package, or a leadless chip carrier (LCC) package.

[0078] Example 29 can include the subject matter of any one of Examples 26-28, and can further comprise wherein the first portion comprises a tin-silver-copper (SnAgCu) (SAC) alloy, and at least a portion of the second portion comprises a tin-copper-bismuth (SnCuBi) intermetallic compound.

[0079] Example 30 can include the subject matter of any one of Examples 26-29, and can further comprise wherein the first portion comprises a tin-copper (SnCu) alloy, and at least a portion of the second portion comprises a tin-copper-bismuth (SnCuBi) intermetallic compound.

[0080] Example 31 can include the subject matter of any one of Examples 26-30, and can further comprise wherein a shape of the first portion is different than a shape of the second portion.

[0081] Example 32 can include the subject matter of any one of Examples 26-31, and can further comprise wherein the first portion has a spherical, semi-spherical, or flat pin shape.

[0082] Example 33 can include the subject matter of any one of Examples 26-32, and can further comprise wherein the second portion has a spherical, cylindrical, circular cylindrical, polygonal, rectangular, square, or octagonal shape.

[0083] While certain embodiments have been illustrated and described herein, various changes in form and details can be made therein without departing from the scope of the disclosure. This application is intended to cover any and all such variations. Thus, it will be apparent to those of ordinary skill in the art that the embodiments described herein are merely illustrative of the principles of the application.

Claims

1. An apparatus comprising: Multiple structures are provided on the surface of a computing component package, wherein the multiple structures are used to attach and electrically couple the computing component package to another device, and wherein one of the multiple structures includes a first portion and a second portion, the second portion being configured to be farther from the surface than the first portion, and the first portion comprising a different material than the second portion, wherein the second portion has a triangle-based shape, an octagon-based shape, a triangular prism shape, an octagonal prism shape, or a square pyramid shape.

2. The device according to claim 1, wherein, The computing unit package includes a ball grid array (BGA) package, a square flat no-lead (QFN) package, or a leadless chip carrier (LCC) package.

3. The device according to claim 1, wherein, The first portion comprises a tin-silver-copper (SnAgCu) (SAC) alloy, and at least a portion of the second portion comprises a tin-copper-bismuth (SnCuBi) intermetallic compound.

4. The device according to claim 1, wherein, The first portion comprises a tin-copper (SnCu) alloy, and at least a portion of the second portion comprises a tin-copper-bismuth (SnCuBi) intermetallic compound.

5. The device according to claim 1, wherein, The height of one of the plurality of structures is greater than the width of the structure.

6. The device according to claim 1, wherein, The first structure of the plurality of structures is adjacent to the second structure of the plurality of structures, wherein the first structure has a different height than the second structure.

7. The device according to any one of claims 1-6, wherein, The shape of the first part is different from the shape of the second part.

8. A method comprising: Low-temperature solder paste is applied over multiple first-part structures on the surface of the computing component package; Apply welding material over the low-temperature solder paste; as well as At least the low-temperature solder paste, the soldering material, and the plurality of first-part structures are subjected to low-temperature reflow. The low-temperature reflow process includes converting the low-temperature solder paste and the soldering material into a plurality of second-part structures respectively disposed above the plurality of first-part structures. The second-part structures have a triangular shape, an octagonal shape, a triangular prism shape, an octagonal prism shape, or a square pyramid shape.

9. The method according to claim 8, wherein, The low-temperature solder paste has a lower melting temperature than the plurality of first part structures or the soldering material or both.

10. The method according to claim 8, wherein, The shape of the first part of the plurality of first part structures is different from the shape of the second part of the plurality of second part structures.

11. The method according to claim 8, wherein, At least a portion of the second part of the plurality of second part structures includes a tin-copper-bismuth (Sn-Cu-Bi) intermetallic compound.

12. The method according to claim 8, wherein, The coating of the soldering material includes coating the low-temperature solder paste with a tin-silver-copper (SnAgCu) (SAC) alloy, a tin-copper (SnCu) alloy, or a lead-free soldering material.

13. The method according to claim 8, wherein, Performing cryogenic reflux involves performing the cryogenic reflux at a temperature of approximately 200 degrees Celsius or below.

14. The method according to claim 8, wherein, The plurality of first-part structures have a melting temperature exceeding 175 degrees Celsius.

15. The method according to claim 8, wherein, Applying the low-temperature solder paste involves applying it to a thickness of approximately 100 micrometers.

16. The method according to any one of claims 8-15, wherein, The low-temperature solder paste comprises a tin-bismuth (SnBi)(Sn42Bi58) alloy suspended in an aqueous medium.

17. An apparatus comprising: Computing components; as well as A plurality of structures are provided on the surface of the computing component, wherein the plurality of structures are for attaching and electrically coupling the computing component to another device, and wherein one of the plurality of structures includes a first portion and a second portion, the second portion being configured to be farther from the surface than the first portion, and the first portion comprising a different metallurgical composition than the second portion, wherein the second portion has a shape based on a triangle, an octagon, a triangular prism, an octagonal prism, or a square pyramid.

18. The device according to claim 17, wherein, The computing components include processors, central processing units (CPUs), graphics processing units (GPUs), memory, controllers, interfaces, circuits, integrated circuit chips, printed circuit boards (PCBs), motherboards, chipsets, or wireless devices.

19. The device according to claim 17, wherein, The first portion comprises a tin-silver-copper (SnAgCu) (SAC) alloy, and at least a portion of the second portion comprises a tin-copper-bismuth (SnCuBi) intermetallic compound.

20. The device according to claim 17, wherein, The shape of the first part is different from the shape of the second part.

21. The device according to claim 17, wherein, The first part has a spherical, hemispherical, or flat pin shape.

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