Light-emitting device

Abstract

A semiconductor light emitting device includes: a first light emitting portion, which includes a first semiconductor stack and a first lower distributed Bragg reflector (DBR) layer and a first upper distributed Bragg reflector (DBR) layer arranged below and above the first semiconductor stack; a second light emitting portion, which includes a second semiconductor stack and a second lower distributed Bragg reflector (DBR) layer and a second upper distributed Bragg reflector (DBR) layer arranged below and above the second semiconductor stack; a third light emitting portion, which includes a third semiconductor stack and a third lower distributed Bragg reflector (DBR) layer and a third upper distributed Bragg reflector (DBR) layer arranged below and above the third semiconductor stack; a first adhesive layer, which is arranged between the first light emitting portion and the second light emitting portion; and a third adhesive layer, which is arranged between the second light emitting portion and the third light emitting portion.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority from Korean Patent Application No. 10-2017-0175435 filed on December 19, 2017 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to a semiconductor light emitting device. Background Art

[0004] Semiconductor light emitting devices are known as next-generation light sources having advantages such as long life, low power consumption, fast response speed, and environmental friendliness, and are attracting attention as desired light sources for various products such as lighting devices, display devices, and the like.

[0005] A display device according to the prior art generally includes a liquid crystal display (LCD) display panel and a backlight. However, a display device has recently been developed in which a single LED device is used as a single pixel as it is, and therefore a backlight is not required separately. Compared with an LCD according to the prior art, the display device can not only be compact, but also provide a high-brightness display with excellent optical efficiency. In addition, since the aspect ratio of the display screen can be freely changed and display can be achieved in a large area, various types of large displays can be provided. Summary of the invention

[0006] An exemplary embodiment is to provide a semiconductor light emitting device having improved light extraction efficiency.

[0007] An exemplary embodiment is to provide a semiconductor light emitting device having improved color purity and color coordinate uniformity.

[0008] An exemplary embodiment is to provide a semiconductor light emitting device having high-resolution display.

[0009] In some exemplary embodiments, the present disclosure relates to a semiconductor light emitting device, which includes: a first light emitting portion, which includes a first semiconductor stack, a first lower distributed Bragg reflector (DBR) layer arranged below the first semiconductor stack, and a first upper distributed Bragg reflector (DBR) layer arranged above the first semiconductor stack; a second light emitting portion, which includes a second semiconductor stack, a second lower distributed Bragg reflector (DBR) layer arranged below the second semiconductor stack, and a second upper distributed Bragg reflector (DBR) layer arranged above the second semiconductor stack; a third light emitting portion, which includes a third semiconductor stack, a third lower distributed Bragg reflector (DBR) layer arranged below the third semiconductor stack, and a third upper distributed Bragg reflector (DBR) layer arranged above the third semiconductor stack; a first adhesive layer arranged between the first light emitting portion and the second light emitting portion; and a second adhesive layer arranged between the second light emitting portion and the third light emitting portion.

[0010] In some exemplary embodiments, the present disclosure relates to a semiconductor light emitting device, which includes: a substrate; a first lower distributed Bragg reflector (DBR) layer disposed on the substrate; a first semiconductor stack disposed on the first lower distributed Bragg reflector (DBR) layer and configured to emit a first light having a first wavelength; a first upper distributed Bragg reflector (DBR) layer disposed on the first semiconductor stack; a first adhesive layer disposed on the first upper distributed Bragg reflector (DBR) layer; a second lower distributed Bragg reflector (DBR) layer disposed on the first adhesive layer; a second semiconductor stack disposed on the second lower distributed Bragg reflector (DBR) layer; a second upper distributed Bragg reflector (DBR) layer disposed on the second semiconductor stack; a second adhesive layer disposed on the second upper distributed Bragg reflector (DBR) layer; a third lower distributed Bragg reflector (DBR) layer disposed on the second adhesive layer; a third semiconductor stack disposed on the third lower distributed Bragg reflector (DBR) layer and configured to emit a third light having a third wavelength shorter than the second wavelength; and a third upper distributed Bragg reflector (DBR) layer disposed on the third semiconductor stack.

[0011] In some exemplary embodiments, the present disclosure relates to a semiconductor light emitting device including: a first light emitting portion including a first semiconductor stack, a first lower distributed Bragg reflector (DBR) layer disposed below the first semiconductor stack, and a first upper distributed Bragg reflector (DBR) layer disposed above the first semiconductor stack;

[0012] a second light emitting portion, comprising a second semiconductor stack, a second lower distributed Bragg reflector (DBR) layer arranged below the second semiconductor stack, and a second upper distributed Bragg reflector (DBR) layer arranged above the second semiconductor stack; a third light emitting portion, comprising a third semiconductor stack, a third lower distributed Bragg reflector (DBR) layer arranged below the third semiconductor stack, and a third upper distributed Bragg reflector (DBR) layer arranged above the third semiconductor stack; a first adhesive layer arranged between the first light emitting portion and the second light emitting portion; and a second adhesive layer arranged between the second light emitting portion and the third light emitting portion, wherein the reflectivity of the first lower distributed Bragg reflector (DBR) layer with respect to red light emitted by the first semiconductor stack is higher than the reflectivity of the first upper distributed Bragg reflector (DBR) layer, and the second lower distributed Bragg reflector (DBR) layer is

[0013] The reflectivity of the layer with respect to green light emitted by the second semiconductor stack is higher than the reflectivity of the second upper distributed Bragg reflector (DBR) layer, and the reflectivity of the third lower distributed Bragg reflector (DBR) layer with respect to blue light emitted by the third semiconductor stack is higher than the reflectivity of the third upper distributed Bragg reflector (DBR) layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The above and other aspects, features and other advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0015] Figure 1 is a cross-sectional view schematically illustrating a structure of a semiconductor light emitting device according to an example embodiment;

[0016] Figures 2 to 5 It shows the manufacturing Figure 1 A cross-sectional view of a method for a semiconductor light emitting device;

[0017] Figure 6 is a cross-sectional view schematically illustrating a structure of a semiconductor light emitting device according to an example embodiment;

[0018] Figures 7 to 10 It shows the manufacturing Figure 6 A cross-sectional view of a method for a semiconductor light emitting device;

[0019] Fig.11 is a cross-sectional view schematically illustrating a structure of a semiconductor light emitting device according to an example embodiment;

[0020] Fig.12 and Fig.13 It shows the manufacturing Fig.11 A cross-sectional view of a method for a semiconductor light emitting device;

[0021] Fig.14 is a perspective view schematically illustrating a display panel according to an example embodiment; and

[0022] Fig.15 FIG. 1 is a perspective view illustrating a virtual reality device according to example embodiments. DETAILED DESCRIPTION

[0023] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0024] Figure 1 is a cross-sectional view schematically illustrating a structure of a semiconductor light emitting device according to example embodiments.

[0025] Reference Figure 1 The semiconductor light emitting device 10 according to the example embodiment may include a first light emitting portion L1, a second light emitting portion L2, and a third light emitting portion L3 stacked vertically. A first adhesive layer 12 is arranged between the first light emitting portion L1 and the second light emitting portion L2, and a second adhesive layer 14 is arranged between the second light emitting portion L2 and the third light emitting portion L3.

[0026] The first light emitting portion L1 may include a conductive substrate 101, a first semiconductor stack 125, a first upper distributed Bragg reflector (DBR) layer 140 arranged above the first semiconductor stack 125 in a vertical direction and a first lower distributed Bragg reflector (DBR) layer 110 arranged below the first semiconductor stack 125 in a vertical direction, a first electrode 131, and a second electrode 136.

[0027] The first lower distributed Bragg reflector (DBR) layer 110 may be formed on the upper surface of the conductive substrate 101. The first electrode 131 may be arranged on the lower surface of the conductive substrate 101. For example, the conductive substrate 101 may be an n-type doped GaAs substrate. A p-type semiconductor layer 142 may be formed on the first upper distributed Bragg reflector (DBR) layer 140. The second electrode 136 may be arranged on the upper surface of the p-type semiconductor layer 142.

[0028] The first semiconductor stack 125 may be formed on the first lower distributed Bragg reflector (DBR) layer 110. The first upper distributed Bragg reflector (DBR) layer 140 may be formed on the first semiconductor stack 125. The first semiconductor stack 125 may serve as a first resonant cavity C1 with respect to the first lower distributed Bragg reflector (DBR) layer 110 and the first upper distributed Bragg reflector (DBR) layer 140. For example, the first semiconductor stack 125 may be confined by the first lower distributed Bragg reflector (DBR) 110 and the first upper distributed Bragg reflector (DBR) 140 on opposite sides, and a space may be provided between the first lower distributed Bragg reflector (DBR) 110 and the first upper distributed Bragg reflector (DBR) 140. The first light emitted by the first semiconductor stack 125 may be reflected by inner surfaces of the first lower distributed Bragg reflector (DBR) 110 and the first upper distributed Bragg reflector (DBR) 140 (i.e., surfaces adjacent to and facing the first semiconductor stack 125). The thickness of the first resonant cavity C1 in the vertical direction may correspond to the desired wavelength of the first light to be emitted by the first light emitting portion L1. For example, the thickness may be equal to half the wavelength (λ / 2) of the desired wavelength of the first light to be emitted by the first light emitting portion L1 or a multiple of the half wavelength (λ / 2). The first resonant cavity C1 may provide improved color purity and uniformity of color coordinates.

[0029] The first semiconductor stack 125 may be an active layer that emits the first light (eg, red light). The first semiconductor stack 125 may have a single quantum well structure or a multi-quantum well structure. x Ga y In z P material formation.

[0030] The reflectivity of the first lower distributed Bragg reflector (DBR) layer 110 is higher than the reflectivity of the first upper distributed Bragg reflector (DBR) layer 140 with respect to the first light emitted by the first semiconductor stack 125. For example, the first lower distributed Bragg reflector (DBR) layer 110 has a reflectivity of 100% with respect to the first light emitted by the first semiconductor stack 125, while the first upper distributed Bragg reflector (DBR) layer 140 may have a reflectivity of 50%. Due to the above-mentioned difference in reflectivity, the first light emitted by the first semiconductor stack 125 may be extracted upward from the semiconductor light emitting device 10. The light extracted upward may be emitted in a vertical direction perpendicular to the plane of the substrate 101 for growth. For example, the first light emitted by the first semiconductor stack 125 may be guided upward in the direction of the third light emitting portion L3.

[0031] The first lower distributed Bragg reflector (DBR) layer 110 may have a structure in which two types of semiconductor layers having different refractive indexes are alternately and repeatedly stacked. The first lower distributed Bragg reflector (DBR) layer 110 may be doped with n-type impurities. The first upper distributed Bragg reflector (DBR) layer 140 may have a structure in which two types of semiconductor layers having different refractive indexes are stacked. The first upper distributed Bragg reflector (DBR) layer 140 may be doped with p-type impurities. The first upper distributed Bragg reflector (DBR) layer 140 is designed to have a reflectivity lower than that of the first lower distributed Bragg reflector (DBR) layer 110. For example, the first lower distributed Bragg reflector (DBR) layer 110 and the first upper distributed Bragg reflector (DBR) layer 140 may each have a structure in which AlInP semiconductor layers and AlGaInP semiconductor layers are alternately and repeatedly stacked. The thicknesses and stacking numbers of the AlInP semiconductor layer and the AlGaInP semiconductor layer are appropriately selected, so that the first lower DBR layer 110 and the first upper DBR layer 140 can be set to have different reflectivities. For higher reflectivity, the AlInP semiconductor layer 110 is preferably made thinner than the first upper DBR layer 140. x In y P semiconductor layer and Al x Ga y In z The stacked number of P semiconductor layers can be larger.

[0032] The second light emitting portion L2 may include a second semiconductor stack 220, a second upper distributed Bragg reflector (DBR) layer 240 arranged above the second semiconductor stack 220 in a vertical direction and a second lower distributed Bragg reflector (DBR) layer 210 arranged below the second semiconductor stack 220 in a vertical direction, a third electrode 231, a transparent electrode 234, and a fourth electrode 236.

[0033] The second semiconductor stack 220 may be formed on the second lower distributed Bragg reflector (DBR) layer 210. The second upper distributed Bragg reflector (DBR) layer 240 may be formed on the second semiconductor stack 220. The second semiconductor stack 220 may be used as a second resonant cavity C2 by the second lower distributed Bragg reflector (DBR) layer 210 and the second upper distributed Bragg reflector (DBR) layer 240. For example, the second semiconductor stack 220 may be confined by the second lower distributed Bragg reflector (DBR) 210 and the second upper distributed Bragg reflector (DBR) 240 on opposite sides, and a space may be provided between the second lower distributed Bragg reflector (DBR) 210 and the second upper distributed Bragg reflector (DBR) 240. The second light emitted by the second semiconductor stack 220 may be reflected by the inner surfaces of the first lower distributed Bragg reflector (DBR) 210 and the first upper distributed Bragg reflector (DBR) 240 (i.e., surfaces adjacent to and facing the second semiconductor stack 220). The thickness of the second resonant cavity C2 in the vertical direction may correspond to the desired wavelength of the second light to be emitted by the second light emitting portion L2. For example, the thickness may be equal to half the wavelength (λ / 2) of the desired wavelength of the second light to be emitted by the second light emitting portion L2 or a multiple of the half wavelength (λ / 2). The second resonant cavity C2 may provide improved color purity and uniformity of color coordinates.

[0034] The second semiconductor stack 220 may include an active layer 225 that emits a second light (e.g., green light). The active layer 225 may have a single quantum well structure or a multi-quantum well structure. The second semiconductor stack 220 may include a first conductive type (e.g., n-type) semiconductor layer 223 disposed below the active layer 225 and a second conductive type (e.g., p-type) semiconductor layer 227 disposed above the active layer 225. The second semiconductor stack 220 may be composed of an Al-based x Ga y In z N material formation.

[0035] The reflectivity of the second lower distributed Bragg reflector (DBR) layer 210 is higher than the reflectivity of the second upper distributed Bragg reflector (DBR) layer 240 with respect to the second light emitted by the second semiconductor stack 220. For example, the second lower distributed Bragg reflector (DBR) layer 210 has a reflectivity of 100% with respect to the second light emitted by the second semiconductor stack 220, while the second upper distributed Bragg reflector (DBR) layer 240 may have a reflectivity of 50%. Due to the above-mentioned difference in reflectivity, the second light emitted by the second semiconductor stack 220 may be extracted upward from the semiconductor light emitting device 10. The light extracted upward may be emitted in a vertical direction perpendicular to the plane of the substrate 101 for growth. For example, the second light emitted by the second semiconductor stack 220 may be guided upward in the direction of the third light emitting portion L3.

[0036] In order to electrically drive the second light emitting portion L2, the third electrode 231 is formed in a region of the first conductive type (e.g., n-type) semiconductor layer 223 exposed by removing some portions of the second conductive type (e.g., p-type) semiconductor layer 227 and the active layer 225. For example, the second light emitting portion L2 may include the third electrode 231 that passes through the second conductive type (e.g., p-type) semiconductor layer 227 and the active layer 225 and is connected to the first conductive type (e.g., n-type) semiconductor layer 223. The fourth electrode 236 is formed in a first region of the upper surface of the second conductive type (e.g., p-type) semiconductor layer 227, and the transparent electrode 234 is formed in a second region of the upper surface of the second conductive type (e.g., p-type) semiconductor layer 227. The first region and the second region of the upper surface of the second conductive type (e.g., p-type) semiconductor layer 227 may be located between adjacent regions in which the second conductive type (e.g., p-type) semiconductor layer 227 is removed to form the third electrode 231. In some embodiments, the first region and the second region may constitute the entire top surface of the second conductive type (e.g., p-type) semiconductor layer 227 between the adjacently formed third electrodes 231. The second light may be extracted upward from the semiconductor light emitting device 10 through the transparent electrode 234. For example, the transparent electrode 234 may be formed of a transparent conductive oxide. The transparent conductive oxide may be selected from indium tin oxide (ITO), zinc-doped indium tin oxide (ZITO), zinc indium oxide (ZIO), gallium indium oxide (GIO), zinc tin oxide (ZTO), fluorine-doped tin oxide (FTO), aluminum-doped zinc oxide (AZO), gallium-doped zinc oxide (GZO), In 4 Sn 3 O 12 , and zinc magnesium oxide (Zn (1 -x)Mg xIn order to provide improved light extraction, the area of ​​the transparent electrode 234 may be greater than that of the fourth electrode 236 when viewed in a plan view.

[0037] The second lower distributed Bragg reflector (DBR) layer 210 may have a structure in which two types of semiconductor layers having different refractive indexes are alternately and repeatedly stacked. For example, the second lower distributed Bragg reflector (DBR) layer 210 may have a structure in which AlGaN semiconductor layers and GaN semiconductor layers are alternately and repeatedly stacked. As another example, the second lower distributed Bragg reflector (DBR) layer 210 may have a structure in which AlN semiconductor layers and GaN semiconductor layers are alternately and repeatedly stacked. The thickness and the number of stacks of the semiconductor layers are appropriately selected, and thus the reflectivity of the second lower distributed Bragg reflector (DBR) layer 210 can be adjusted. The second upper distributed Bragg reflector (DBR) layer 240 may be formed on the second semiconductor stack 220. The second upper distributed Bragg reflector (DBR) layer 240 may cover the third electrode 231, the transparent electrode 234, and the fourth electrode 236. The second upper distributed Bragg reflector (DBR) layer 240 may have a structure in which two types of insulating layers having different refractive indexes are alternately and repeatedly stacked. The second upper DBR layer 240 is designed to have a reflectivity lower than that of the second lower DBR layer 210. For example, the second upper DBR layer 240 may include a material selected from SiO 2 、SiN、SiO x N y 、TiO 2 、Si 3 N 4 、Al 2 O 3 , and ZrO 2 The thickness of the insulating layer and the number of stacking are appropriately selected, so that the reflectivity of the second lower distributed Bragg reflector (DBR) layer 210 can be adjusted.

[0038] The third light emitting portion L3 may include a light-transmitting substrate 301, a third semiconductor stack 320, a third upper distributed Bragg reflector (DBR) layer 310 arranged above the third semiconductor stack 320 in a vertical direction and a third lower distributed Bragg reflector (DBR) layer 340 arranged below the third semiconductor stack 320 in a vertical direction, a fifth electrode 331, a transparent electrode 334, and a sixth electrode 336.

[0039] The light-transmitting substrate 301 is disposed on the third upper distributed Bragg reflector (DBR) layer 310. The third semiconductor stack 320 may be formed on the third lower distributed Bragg reflector (DBR) layer 340. The third upper distributed Bragg reflector (DBR) layer 310 may be formed on the third semiconductor stack 320. The third semiconductor stack 320 may be used as a third resonant cavity C3 by the third lower distributed Bragg reflector (DBR) layer 340 and the third upper distributed Bragg reflector (DBR) layer 310. For example, the third semiconductor stack 320 may be limited by the third lower distributed Bragg reflector (DBR) 340 and the third upper distributed Bragg reflector (DBR) 310 on opposite sides, and a space may be provided between the third lower distributed Bragg reflector (DBR) 340 and the third upper distributed Bragg reflector (DBR) 310. The third light emitted by the third semiconductor stack 320 may be reflected by the inner surfaces of the third lower distributed Bragg reflector (DBR) 340 and the third upper distributed Bragg reflector (DBR) 310 (i.e., surfaces adjacent to and facing the third semiconductor stack 320). The thickness of the third resonant cavity C2 in the vertical direction may correspond to the desired wavelength of the third light to be emitted by the third light emitting portion L3. For example, the thickness may be equal to half the wavelength (λ / 2) of the desired wavelength of the third light to be emitted by the third light emitting portion L3 or a multiple of half the wavelength (λ / 2). The third resonant cavity C3 may provide improved color purity and uniformity of color coordinates.

[0040] The third semiconductor stack 320 may include an active layer 325 that emits a third light (e.g., blue light). The active layer 325 may have a single quantum well structure or a multi-quantum well structure. The third semiconductor stack 320 may include a first conductive type (e.g., n-type) semiconductor layer 323 disposed above the active layer 325 and a second conductive type (e.g., p-type) semiconductor layer 327 disposed below the active layer 325. The third semiconductor stack 320 may be composed of an Al-based x Ga y In z N material formation.

[0041] The reflectivity of the third lower distributed Bragg reflector (DBR) layer 340 is higher than the reflectivity of the third upper distributed Bragg reflector (DBR) layer 310 with respect to the third light emitted by the third semiconductor stack 320. For example, the third lower distributed Bragg reflector (DBR) layer 340 has a reflectivity of 100% with respect to the third light emitted by the third semiconductor stack 320, while the third upper distributed Bragg reflector (DBR) layer 310 may have a reflectivity of 50%. Due to the above-mentioned difference in reflectivity, the third light emitted by the third semiconductor stack 320 may be extracted upward from the semiconductor light emitting device 10. The light extracted upward may be emitted in a vertical direction perpendicular to the plane of the substrate 101 for growth. For example, the third light emitted by the third semiconductor stack 320 may be guided upward in a direction away from the second light emitting portion L2.

[0042] In order to electrically drive the third light emitting portion L3, the fifth electrode 331 is formed in a region of the first conductive type (e.g., n-type) semiconductor layer 323 exposed by removing some portions of the second conductive type (e.g., p-type) semiconductor layer 327 and the active layer 325. For example, the third light emitting portion L3 may include the fifth electrode 331 that passes through the p-type semiconductor layer 327 and the active layer 325 and is connected to the n-type semiconductor layer 323. The sixth electrode 336 is formed in a first region of the upper surface of the second conductive type (e.g., p-type) semiconductor layer 327, and the transparent electrode 334 is formed in a second region of the upper surface of the second conductive type (e.g., p-type) semiconductor layer 327. The first region and the second region of the upper surface of the second conductive type (e.g., p-type) semiconductor layer 327 may be located between adjacent regions in which the second conductive type (e.g., p-type) semiconductor layer 327 is removed to form the fifth electrode 331. In some embodiments, the first region and the second region may cover the entire top surface of the second conductive type (e.g., p-type) semiconductor layer 327 between the adjacently formed fifth electrodes 331. The transparent electrode 334 may function as a window that allows light extracted from the first light emitting portion L1 and the second light emitting portion L2 to be extracted upward from the semiconductor light emitting device 10 or guides the light. The transparent electrode 334 may be formed of, for example, a transparent conductive oxide in a manner similar to the transparent electrode 234. In order to provide improved light extraction, the area of ​​the transparent electrode 334 may be greater than that of the sixth electrode 336 when viewed in a plan view.

[0043] The third lower distributed Bragg reflector (DBR) layer 340 may cover the fifth electrode 331, the transparent electrode 334, and the sixth electrode 336. The third lower distributed Bragg reflector (DBR) layer 340 may have a structure in which two types of insulating layers having different refractive indexes are alternately and repeatedly stacked. The third lower distributed Bragg reflector (DBR) layer 340 may be designed to have a reflectivity higher than that of the third upper distributed Bragg reflector (DBR) layer 310. For example, the third lower distributed Bragg reflector (DBR) layer 340 may include a material selected from SiO 2 、SiN、SiO x N y 、TiO 2 、Si 3 N 4 、Al 2 O 3 , and ZrO 2 The thickness of the insulating layer and the number of stacks are appropriately selected, so the reflectivity of the third lower distributed Bragg reflector (DBR) layer 340 can be adjusted. The third upper distributed Bragg reflector (DBR) layer 310 may have a structure in which two types of semiconductor layers having different refractive indexes are alternately and repeatedly stacked. For example, the third upper distributed Bragg reflector (DBR) layer 310 may have a structure in which AlGaN semiconductor layers and GaN semiconductor layers are alternately and repeatedly stacked. As another example, the third upper distributed Bragg reflector (DBR) layer 310 may have a structure in which AlN semiconductor layers and GaN semiconductor layers are alternately and repeatedly stacked. The thickness of the semiconductor layer and the number of stacks are appropriately selected, so the reflectivity of the third upper distributed Bragg reflector (DBR) layer 310 can be adjusted.

[0044] The third electrode 231 and the fifth electrode 331 are arranged at a position where the third electrode 231 and the fifth electrode 331 overlap each other in the vertical direction or when viewed from top to bottom, the fourth electrode 236 and the sixth electrode 336 are arranged at a position where the fourth electrode 236 and the sixth electrode 336 overlap each other in the vertical direction or when viewed from top to bottom, and the transparent electrode 234 and the transparent electrode 334 are arranged at a position where the transparent electrode 234 and the transparent electrode 334 overlap each other in the vertical direction or when viewed from top to bottom. The third electrode 231 and the fifth electrode 331 are opposite to each other (for example, opposite to and facing each other on either side of the adhesive layer 14), the fourth electrode 236 and the sixth electrode 336 are opposite to each other (for example, opposite to and facing each other on either side of the adhesive layer 14), and the transparent electrode 234 and the transparent electrode 334 are opposite to each other (for example, opposite to and facing each other on either side of the adhesive layer 14). The third electrode 231 , the fourth electrode 236 , and the transparent electrode 234 are arranged symmetrically with the fifth electrode 331 , the sixth electrode 336 , and the transparent electrode 334 , respectively, based on the second adhesive layer 14 .

[0045] The first adhesive layer 12 and the second adhesive layer 14 may include silicon dioxide or an insulating material having a low dielectric constant.

[0046] Figures 2 to 5 It shows the manufacturing Figure 1 A cross-sectional view of a method for producing a semiconductor light emitting device. Figures 2 to 5 The manufacturing method is shown, but for convenience, a region corresponding to a single semiconductor light emitting device will be described.

[0047] Reference Figure 2 , preparing a first stack 100A, the first stack 100A includes a conductive substrate 101, a first semiconductor stack 125, a first upper distributed Bragg reflector (DBR) layer 140 and a first lower distributed Bragg reflector (DBR) layer 110 arranged above and below the first semiconductor stack 125, a first electrode 131, and a second electrode 136. For example, the first stack 100A can be prepared by the following steps: depositing the first lower distributed Bragg reflector (DBR) layer 110 on the conductive substrate 101; depositing the first semiconductor stack 125 on the first lower distributed Bragg reflector (DBR) layer 110; depositing the first upper distributed Bragg reflector (DBR) layer 140 on the first semiconductor stack 125; and depositing a P-type semiconductor layer 142 on the first upper distributed Bragg reflector (DBR) layer 140. Then, the first electrode 131 may be disposed on the lower surface of the conductive substrate 101 , and the second electrode 136 may be disposed on the upper surface of the P-type semiconductor layer 142 .

[0048] Reference Figure 3 , preparing a second stack 100B, the second stack 100B including a growth substrate 201, a second semiconductor stack 220, a second upper distributed Bragg reflector (DBR) layer 240 and a second lower distributed Bragg reflector (DBR) layer 210 arranged above and below the second semiconductor stack 220, a third electrode 231, a transparent electrode 234, and a fourth electrode 236. For example, the second stack 100B may be prepared by the following steps: depositing the second lower distributed Bragg reflector (DBR) layer 210 on the growth substrate 201; and depositing the layers of the second semiconductor stack 220 on the second lower distributed Bragg reflector (DBR) layer 210. Then, etching may be performed to remove portions of the second conductive type (e.g., p-type) semiconductor layer 227, the active layer 225, and the first conductive type (e.g., n-type) semiconductor layer 223, and the third electrode 231 may be disposed in a region formed by removing the portions. The transparent electrode 234 and the fourth electrode 236 may be disposed on the top surface of the second conductive type (e.g., p-type) semiconductor layer 227 (e.g., a portion of the top surface of the second conductive type (e.g., p-type) semiconductor layer 227 that is not removed). Next, a second upper distributed Bragg reflector (DBR) layer 240 may be deposited to cover the third electrode 231, the transparent electrode 234, and the fourth electrode 236.

[0049] Reference Figure 4 , a third stack 100C is prepared, the third stack 100C including a light-transmitting substrate 301, a third semiconductor stack 320, a third upper distributed Bragg reflector (DBR) layer 310 and a third lower distributed Bragg reflector (DBR) layer 340 arranged above and below the third semiconductor stack 320, a fifth electrode 331, a transparent electrode 334, and a sixth electrode 336. For example, the third stack 100C may be prepared by the following steps: depositing the third upper distributed Bragg reflector (DBR) layer 310 on the light-transmitting substrate 301; and depositing the layers of the third semiconductor stack 320 on the third upper distributed Bragg reflector (DBR) layer 310. Then, etching may be performed to remove portions of the second conductive type (e.g., p-type) semiconductor layer 327, the active layer 325, and the first conductive type (e.g., n-type) semiconductor layer 323, and the fifth electrode 331 may be disposed in a region formed by removing the portions. The transparent electrode 334 and the sixth electrode 336 may be disposed on the top surface of the second conductive type (e.g., p-type) semiconductor layer 327 (e.g., a portion of the top surface of the second conductive type (e.g., p-type) semiconductor layer 327 that is not removed). Next, a third lower distributed Bragg reflector (DBR) layer 340 may be deposited to cover the fifth electrode 331, the transparent electrode 334, and the sixth electrode 336.

[0050] Reference Figure 5 , a second bonding layer 14 may be formed between the third lower DBR layer 340 and the second upper DBR layer 240 using an oxide bonding process. After bonding the third stack 100C and the second stack 100B using the oxide bonding process, the growth substrate 201 of the second stack 100B is removed using a method such as laser lift off (LLO).

[0051] Refer to Figure 1 The first stack 100A may be bonded to the Figure 5 The first bonding layer 12 may be formed between the second lower distributed Bragg reflector (DBR) layer 210 and the semiconductor layer 142 using an oxide bonding process. Next, a dicing process is performed to dicing the wafer including the plurality of semiconductor light emitting devices into a plurality of individual semiconductor light emitting devices (e.g., the semiconductor light emitting device 10), thereby manufacturing the semiconductor light emitting device 10.

[0052] Figure 6 is a cross-sectional view schematically illustrating a structure of a semiconductor light emitting device according to example embodiments.

[0053] Reference Figure 6 The semiconductor light emitting device 20 may include a Figure 1 The first light emitting portion L1 and the second light emitting portion L2 are similar to the first light emitting portion L1 and the second light emitting portion L2 of the semiconductor light emitting device 10. However, in the semiconductor light emitting device 20, according to Figure 1In a different manner from the semiconductor light emitting device 10, the third light emitting portion L3' may not include the light-transmitting substrate 301. In addition, the third electrode 231 and the fifth electrode 331 may not be opposite to each other (for example, they may not face each other), the fourth electrode 236 and the sixth electrode 336 may not be opposite to each other (for example, they may not face each other), and the transparent electrode 234 and the transparent electrode 334 may not be opposite to each other (for example, they may not face each other). The third electrode 231, the fourth electrode 236, and the transparent electrode 234 are not arranged to be symmetrical with the fifth electrode 331, the sixth electrode 336, and the transparent electrode 334 based on the second bonding layer 14, respectively. However, the third electrode 231 and the fifth electrode 331 are arranged at a position where the third electrode 231 and the fifth electrode 331 overlap each other in the vertical direction or when viewed from top to bottom, the fourth electrode 236 and the sixth electrode 336 are arranged at a position where the fourth electrode 236 and the sixth electrode 336 overlap each other in the vertical direction or when viewed from top to bottom, and the transparent electrode 234 and the transparent electrode 334 are arranged at a position where the transparent electrode 234 and the transparent electrode 334 overlap each other in the vertical direction or when viewed from top to bottom. The third electrode 231, the fifth electrode 331, the fourth electrode 236, the sixth electrode 336, the transparent electrode 234, and the transparent electrode 334 may all face the same direction (e.g., an upward direction).

[0054] The third lower distributed Bragg reflector (DBR) layer 310' may have a structure in which two types of semiconductor layers having different refractive indexes are alternately and repeatedly stacked. For example, the third lower distributed Bragg reflector (DBR) layer 310' may have a structure in which AlGaN semiconductor layers and GaN semiconductor layers are alternately and repeatedly stacked. As another example, the third lower distributed Bragg reflector (DBR) layer 310' may have a structure in which AlN semiconductor layers and GaN semiconductor layers are alternately and repeatedly stacked. The thickness and the number of stacks of the semiconductor layers are appropriately selected, and thus the reflectivity of the third lower distributed Bragg reflector (DBR) layer 310' may be adjusted. The third upper distributed Bragg reflector (DBR) layer 340' may be formed on the third semiconductor stack 320. The third upper distributed Bragg reflector (DBR) layer 340' may cover the fifth electrode 331, the transparent electrode 334, and the sixth electrode 336. The third upper distributed Bragg reflector (DBR) layer 340' may have a structure in which two types of insulating layers having different refractive indexes are alternately and repeatedly stacked. The third upper distributed Bragg reflector (DBR) layer 340' is designed to have a reflectivity lower than that of the third lower distributed Bragg reflector (DBR) layer 310'. For example, the third upper distributed Bragg reflector (DBR) layer 340' may include a material selected from SiO 2 、SiN、SiO x N y、TiO 2 、Si 3 N 4 、Al 2 O 3 , and ZrO 2 The thickness and stacking number of the insulating layers are appropriately selected, so that the reflectivity of the third lower distributed Bragg reflector (DBR) layer 310' can be adjusted.

[0055] Figures 7 to 10 It shows the manufacturing Figure 6 A cross-sectional view of a method for producing a semiconductor light emitting device.

[0056] Reference Figure 7 , a third stack 100C' is prepared, the third stack 100C' including a light-transmitting substrate 301, a third semiconductor stack 320, a third upper distributed Bragg reflector (DBR) layer 340' and a third lower distributed Bragg reflector (DBR) layer 310' arranged above and below the third semiconductor stack 320, a fifth electrode 331, a transparent electrode 334, and a sixth electrode 336. For example, the third stack 100C' may be prepared by depositing the third lower distributed Bragg reflector (DBR) layer 310' on the light-transmitting substrate 301, and depositing the multi-layer third semiconductor stack 320 on the third lower distributed Bragg reflector (DBR) layer 310'. Then, etching may be performed to remove portions of the second conductive type (e.g., p-type) semiconductor layer 327, the active layer 325, and the first conductive type (e.g., n-type) semiconductor layer 323, and the fifth electrode 331 may be disposed in a region formed by removing the portions. The transparent electrode 334 and the sixth electrode 336 may be disposed on the top surface of the second conductive type (e.g., p-type) semiconductor layer 327 (e.g., a portion of the top surface of the second conductive type (e.g., p-type) semiconductor layer 327 that is not removed). Next, a third upper distributed Bragg reflector (DBR) layer 340' may be deposited to cover the fifth electrode 331, the transparent electrode 334, and the sixth electrode 336. The positions of the fifth electrode 331, the transparent electrode 334, and the sixth electrode 336 are different from Figure 4 The positions of the fifth electrode 331, the transparent electrode 334, and the sixth electrode 336 in the third stack 100C are shown in FIG. Fig. 9 When stacked as shown, the fifth electrode 331, the transparent electrode 334, and the sixth electrode 336 will overlap the third electrode 231, the transparent electrode 234, and the fourth electrode 236 in the vertical direction, respectively. Figure 2 and Figure 3 Same as shown.

[0057] Reference Figure 8 , after the temporary substrate 360 ​​is attached to the third stack 100C′ using the adhesive layer 355 , the light-transmitting substrate 301 used as a substrate for growth is removed.

[0058] Reference Fig. 9 After the third stack 100C' from which the light-transmitting substrate 301 is removed is bonded to the second stack 100B using an oxide bonding process, the growth substrate 201 of the second stack 100B is removed using a method such as laser lift-off (LLO). A second bonding layer 14 may be formed between the third lower DBR layer 310' and the second upper DBR layer 240 using an oxide bonding process.

[0059] Reference Fig.10 The first stack 100A may be bonded to the Fig. 9 The first bonding layer 12 may be formed between the second lower distributed Bragg reflector (DBR) layer 210 and the semiconductor layer 142 using an oxide bonding process.

[0060] Refer to Figure 6 , the temporary substrate 360 ​​is removed, and a dicing process is performed to cut the wafer including the plurality of semiconductor light emitting devices into a plurality of individual semiconductor light emitting devices (eg, the semiconductor light emitting devices 20 ), thereby manufacturing the semiconductor light emitting devices 20 .

[0061] Fig.11 is a cross-sectional view schematically illustrating a structure of a semiconductor light emitting device according to example embodiments.

[0062] Reference Fig.11 , the semiconductor light emitting device 30 may include Figure 1 The second light emitting portion L2 of the semiconductor light emitting device 10 has a similar structure to the second light emitting portion L2. However, in the semiconductor light emitting device 30, according to Figure 1 In a different manner from the semiconductor light emitting device 10, the third light emitting portion L3' may not include the light-transmitting substrate 301. For example, the third light emitting portion L3' of the semiconductor light emitting device 30 is the same as the third light emitting portion L3' of the semiconductor light emitting device 20.

[0063] However, according to Figure 1In a different manner from the semiconductor light emitting device 10, the first light emitting portion L1' of the semiconductor light emitting device 30 may include a growth substrate 101', a first semiconductor stack 120', a first upper distributed Bragg reflector (DBR) layer 140' arranged above the first semiconductor stack 120', a first lower distributed Bragg reflector (DBR) layer 110' arranged below the first semiconductor stack 120', a first electrode 131', a transparent electrode 134', and a second electrode 136'.

[0064] The first semiconductor stack 120' may be formed on the first lower distributed Bragg reflector (DBR) layer 110'. The first upper distributed Bragg reflector (DBR) layer 140' may be formed on the first semiconductor stack 120'. The first semiconductor stack 120' may be used as a first resonant cavity C1 by the first lower distributed Bragg reflector (DBR) layer 110' and the first upper distributed Bragg reflector (DBR) layer 140'. For example, the first semiconductor stack 120' may be limited by the first lower distributed Bragg reflector (DBR) 110' and the first upper distributed Bragg reflector (DBR) 140' on opposite sides, and a space may be provided between the first lower distributed Bragg reflector (DBR) 110' and the first upper distributed Bragg reflector (DBR) 140'.

[0065] The first semiconductor stack 120' may include an active layer 125' that emits a first light (e.g., red light). The active layer 125' may have a single quantum well structure or a multi-quantum well structure. The first semiconductor stack 120' may include a first conductivity type semiconductor layer 123' disposed below the active layer 125' and a second conductivity type semiconductor layer 127' disposed above the active layer 125'. The first semiconductor stack 120' may be composed of an Al-based x Ga y In z N material formation.

[0066] The reflectivity of the first lower distributed Bragg reflector (DBR) layer 110' is higher than the reflectivity of the first upper distributed Bragg reflector (DBR) layer 140' with respect to the first light emitted by the first semiconductor stack 120'. For example, the first lower distributed Bragg reflector (DBR) layer 110' has a reflectivity of 100% with respect to the first light emitted by the first semiconductor stack 120', while the first upper distributed Bragg reflector (DBR) layer 140' may have a reflectivity of 50%. Due to the above-mentioned difference in reflectivity, the first light emitted by the first semiconductor stack 120' may be extracted upward from the semiconductor light emitting device 30. For example, the first light may be guided upward in the direction of the third light emitting device L3.

[0067] In order to electrically drive the first light emitting portion L1', the first electrode 131' is formed in a region of the first conductive type (e.g., n-type) semiconductor layer 123' exposed by removing portions of the second conductive type (e.g., p-type) semiconductor layer 127' and the active layer 125'. For example, the first light emitting portion L1' may include a first electrode 131' that passes through the p-type semiconductor layer 127' and the active layer 125' and is connected to the n-type semiconductor layer 123'. The second electrode 136' is formed in a first region of the upper surface of the second conductive type semiconductor layer 127', and a transparent electrode 134' is formed in a second region of the upper surface of the second conductive type semiconductor layer 127'. The first region and the second region of the upper surface of the second conductive type (e.g., p-type) semiconductor layer 127' may be located between adjacent regions in which the second conductive type (e.g., p-type) semiconductor layer 127' is removed to form the first electrode 131'. In some embodiments, the first region and the second region may constitute the entire top surface of the second conductive type (e.g., p-type) semiconductor layer 127' between the adjacently formed first electrodes 131'. The first light may be extracted upward from the semiconductor light emitting device 30 through the transparent electrode 134'. For example, the transparent electrode 134' may be formed of a transparent conductive oxide. The transparent conductive oxide may be selected from indium tin oxide (ITO), zinc-doped indium tin oxide (ZITO), zinc indium oxide (ZIO), gallium indium oxide (GIO), zinc tin oxide (ZTO), fluorine-doped tin oxide (FTO), aluminum-doped zinc oxide (AZO), gallium-doped zinc oxide (GZO), In 4 Sn 3 O 12 , and zinc magnesium oxide (Zn (1-x) Mg x In order to provide improved light extraction, the area of ​​the transparent electrode 134' may be greater than the area of ​​the second electrode 136' when viewed in a plan view.

[0068] The first lower distributed Bragg reflector (DBR) layer 110' may have a structure in which two types of semiconductor layers having different refractive indices are alternately and repeatedly stacked. For example, the first lower distributed Bragg reflector (DBR) layer 110' may have a structure in which AlGaN semiconductor layers and GaN semiconductor layers are alternately and repeatedly stacked. As another example, the first lower distributed Bragg reflector (DBR) layer 110' may have a structure in which AlN semiconductor layers and GaN semiconductor layers are alternately and repeatedly stacked. The thickness and the number of stacks of the semiconductor layers are appropriately selected, and thus the reflectivity of the first lower distributed Bragg reflector (DBR) layer 110' may be adjusted. The first upper distributed Bragg reflector (DBR) layer 140' may be formed on the first semiconductor stack 120'. The first upper distributed Bragg reflector (DBR) layer 140' may cover the first electrode 131', the transparent electrode 134', and the second electrode 136'. The first upper distributed Bragg reflector (DBR) layer 140' may have a structure in which two types of insulating layers having different refractive indices are alternately and repeatedly stacked. The first upper DBR layer 140' is designed to have a reflectivity lower than that of the first lower DBR layer 110'. For example, the first upper DBR layer 140' may be a material selected from SiO 2 、SiN、SiO x N y 、TiO 2 、Si 3 N 4 、Al 2 O 3 , and ZrO 2 The thickness of the insulating layer and the number of stacking are appropriately selected, so that the reflectivity of the first upper distributed Bragg reflector (DBR) layer 140' can be adjusted.

[0069] Fig.12 and Fig.13 It shows the manufacturing Fig.11 A cross-sectional view of a method for producing a semiconductor light emitting device.

[0070] Reference Fig.12, preparing a first stack 100A', the first stack 100A' including a substrate 101' for growth, a first semiconductor stack 120', a first upper distributed Bragg reflector (DBR) layer 140' and a first lower distributed Bragg reflector (DBR) layer 110' arranged above and below the first semiconductor stack 120', a first electrode 131', a transparent electrode 134', and a second electrode 136'. For example, the first stack 100A' may be prepared by the following steps: depositing the first lower distributed Bragg reflector (DBR) layer 110' on the substrate 101' for growth, and depositing the layers of the first semiconductor stack 120' on the first lower distributed Bragg reflector (DBR) layer 110'. Then, etching may be performed to remove portions of the second conductive type (e.g., p-type) semiconductor layer 127', the active layer 125', and the first conductive type (e.g., n-type) semiconductor layer 123', and the first electrode 131' may be disposed in the region formed by removing the portions. The transparent electrode 134' and the second electrode 136' may be disposed on the top surface of the second conductive type (e.g., p-type) semiconductor layer 127' (e.g., the portion of the top surface of the second conductive type (e.g., p-type) semiconductor layer 127' that is not removed). Next, a first upper distributed Bragg reflector (DBR) layer 140' may be deposited to cover the first electrode 131', the transparent electrode 134', and the second electrode 136'.

[0071] The structure of the second stack 100B is Figure 3 The structure of the second stack 100B is the same as that of the third stack 100C′. Figure 7 The structure of the third stack 100C' is the same.

[0072] Reference Fig.13 , in relation to the second stack 100B and the third stack 100C′ Figure 8 and Fig. 9 After the treatment, the first stack 100A′ can be bonded to the Fig. 9 The first adhesive layer 12 may be formed between the second lower DBR layer 210 and the first upper DBR layer 140' using an oxide adhesive process.

[0073] Refer to Fig.11 , the temporary substrate 360 ​​is removed, and a dicing process is performed to cut the wafer including the plurality of semiconductor light emitting devices into a plurality of individual semiconductor light emitting devices (eg, the semiconductor light emitting devices 30 ), thereby manufacturing the semiconductor light emitting devices 30 .

[0074] Fig.14is a perspective view schematically illustrating a display panel according to example embodiments.

[0075] Reference Fig.14 , the display panel 500 may include a circuit substrate 530 and a light emitting device module 520 disposed on the circuit substrate 530 .

[0076] The light emitting device module 520 according to the example embodiment may include a plurality of semiconductor light emitting devices 510 that selectively emit red light (R), green light (G), and blue light (B). Each of the plurality of light emitting devices 510 may form a single pixel of the display panel 500, and may be arranged in rows and columns on the circuit substrate 530. In the example embodiment, for convenience of explanation, 15×15 semiconductor light emitting devices 510 are arranged. In practice, a larger number of light emitting devices (e.g., 1024×768, 1920×1080) may be arranged according to the required resolution. The semiconductor light emitting device 510 may include the semiconductor light emitting devices 10, 20, and 30 described above. The semiconductor light emitting devices 10, 20, and 30 described above have a structure in which three R, G, and B sub-pixels are stacked, and thus the display panel 500 may have a high resolution.

[0077] The circuit substrate 530 may include a driving unit configured to supply power to each semiconductor light emitting device 510 in the light emitting device module 520, and a control unit for controlling the semiconductor light emitting device 510. For example, each semiconductor light emitting device 510 may correspond to a monochrome pixel, and each of the first light emitting portion L1, the second light emitting portion L2, and the third light emitting portion L3 may be a sub-pixel of the monochrome pixel. Each sub-pixel may be operated individually to emit a pixel color of a pixel array of a display.

[0078] In some embodiments, the light emitting device module 520 may further include a black matrix disposed on the circuit substrate 530 and defining an area in which the semiconductor light emitting device 510 is mounted. The black matrix is ​​not limited to having a black color, but may be changed to have different colors such as white, green, etc. according to the use and purpose of the product. The black matrix may be a matrix including a transparent material as needed. The white matrix may also include a reflective or scattering material.

[0079] Fig.15 FIG. 1 is a perspective view illustrating a virtual reality device according to example embodiments.

[0080] Reference Fig.15 , the virtual reality device 1000 according to an example embodiment may be a head mounted display (HMD) device worn on a user's head. The virtual reality device 1000 may include a display panel 1180 for outputting an image to the user. The display panel 1180 may be installed in a storage space provided in the virtual reality device 1000.

[0081] The virtual reality device 1000 may include a fixing unit 1110, a frame 1120, operation units 1130 and 1140, a control unit 1160, an optical unit 1170, and the like. The fixing unit 1110 is provided to mount the virtual reality device 1000 on the user's head, and it may include a fixing member such as a band formed of an elastic material, such as a strap, a temple of glasses, a helmet, and the like. The user's head is inserted into the fixing unit 1110, so the virtual reality device 1000 may be fixed thereto, and a portion of the frame 1120 may be in close contact with the user's periorbital area. In order to reduce the user's fatigue, the frame 1120 may include an elastic material at a portion in close contact with the user's periorbital area.

[0082] The frame 1120 may include a display panel 1180 and an optical unit 1170 arranged in front of the user's eyes, wherein the optical unit 1170 may include at least one lens. The display panel 1180 is disposed on the front surface of the optical unit 1170, and the control unit 1160 may be disposed on the rear surface of the display panel 1180. The pixels of the display panel 1180 may include the semiconductor light emitting devices 10, 20, and 30 described above. The semiconductor light emitting devices 10, 20, and 30 described above have a structure in which three R, G, and B sub-pixels are stacked, so the display panel 1180 may have a high resolution. In addition, in the semiconductor light emitting devices 10, 20, and 30 described above, light is extracted in a vertical direction by a vertical resonance structure, so the coupling characteristics with the optical unit 1170 can be improved.

[0083] The operation unit may include a touch panel 1130, a mechanical wheel 1140, and the like. The user may perform operations such as image playback, pause, image viewpoint movement, and volume adjustment of the display panel 1180 through the operation unit. The mechanical wheel 1140 may be provided to input a function different from that of the touch panel 1130, and may be provided, for example, for the purpose of adjusting the focal length of the optical unit 1170. The virtual reality device 1000 may further include various other operation devices in addition to the touch panel 1130 and the mechanical wheel 1140.

[0084] The virtual reality device 1000 may be connected to an external host HOST (not shown) such as a desktop computer, a notebook computer, etc. by wire or wirelessly, and may receive data for virtual reality.

[0085] As described above, according to example embodiments of the present disclosure, a semiconductor light emitting device having improved light extraction efficiency and having improved color purity and color uniformity may be provided.

[0086] Furthermore, according to example embodiments of the present disclosure, a semiconductor light emitting device capable of implementing a high-resolution display may be provided.

[0087] While example embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations may be made without departing from the scope of the present disclosure as defined by the claims.

Claims

1. A semiconductor light emitting device, include: a first light emitting portion including a first semiconductor stack, a first lower distributed Bragg reflector layer disposed below the first semiconductor stack, and a first upper distributed Bragg reflector layer disposed above the first semiconductor stack; a second light emitting portion including a second semiconductor stack, a second lower distributed Bragg reflector layer disposed below the second semiconductor stack, and a second upper distributed Bragg reflector layer disposed above the second semiconductor stack; a third light emitting portion including a third semiconductor stack, a third lower distributed Bragg reflector layer disposed below the third semiconductor stack, and a third upper distributed Bragg reflector layer disposed above the third semiconductor stack; a first adhesive layer disposed between the first light emitting portion and the second light emitting portion; as well as A second adhesive layer is disposed between the second light emitting portion and the third light emitting portion.

2. The semiconductor light emitting device according to claim 1, in, The first light emitting portion is arranged below the second light emitting portion, and the third light emitting portion is arranged above the second light emitting portion. The first semiconductor stack is configured to emit red light, the second semiconductor stack is configured to emit green light, and the third semiconductor stack is configured to emit blue light.

3. The semiconductor light emitting device according to claim 2, in, The reflectivity of the first lower distributed Bragg reflector layer with respect to red light emitted by the first semiconductor stack is higher than the reflectivity of the first upper distributed Bragg reflector layer, wherein a reflectivity of the second lower distributed Bragg reflector layer with respect to green light emitted by the second semiconductor stack is higher than a reflectivity of the second upper distributed Bragg reflector layer, and The reflectivity of the third lower DBR layer with respect to blue light emitted by the third semiconductor stack is higher than the reflectivity of the third upper DBR layer.

4. The semiconductor light emitting device according to claim 1, in, Each of the first lower distributed Bragg reflector layer, the first upper distributed Bragg reflector layer, the second lower distributed Bragg reflector layer, and the third upper distributed Bragg reflector layer has a structure in which two types of semiconductor layers having different refractive indices are stacked, and Wherein, each of the second upper distributed Bragg reflector layer and the third lower distributed Bragg reflector layer has a structure in which two types of insulating layers having different refractive indices are stacked.

5. The semiconductor light emitting device according to claim 1, wherein the first light emitting portion further comprises include: a conductive substrate disposed below the first lower distributed Bragg reflector layer; a first electrode disposed on a lower surface of the conductive substrate; as well as A second electrode is disposed on the first upper distributed Bragg reflector layer.

6. The semiconductor light emitting device according to claim 5, in, The second semiconductor stack includes a first n-type semiconductor layer, a first active layer, and a first p-type semiconductor layer, and The second light emitting portion includes a third electrode passing through the first p-type semiconductor layer and the first active layer and connected to the first n-type semiconductor layer, a fourth electrode arranged in a first region on the upper surface of the first p-type semiconductor layer, and a first transparent electrode arranged in a second region on the upper surface of the first p-type semiconductor layer.

7. The semiconductor light emitting device according to claim 6, in, The third semiconductor stack includes a second n-type semiconductor layer, a second active layer, and a second p-type semiconductor layer, and Wherein, the third light-emitting portion includes a fifth electrode passing through the second p-type semiconductor layer and the second active layer and connected to the second n-type semiconductor layer, a sixth electrode arranged in a first area on the upper surface of the second p-type semiconductor layer, and a second transparent electrode arranged in a second domain area on the upper surface of the second p-type semiconductor layer.

8. The semiconductor light emitting device according to claim 7, in, The second electrode, the fourth electrode, and the sixth electrode are stacked on each other in a vertical direction, the first transparent electrode and the second transparent electrode are stacked on each other in a vertical direction, and the third electrode and the fifth electrode are stacked on each other in a vertical direction.

9. The semiconductor light emitting device according to claim 8, in, The third electrode and the fifth electrode are opposite to each other, the fourth electrode and the sixth electrode are opposite to each other, and the first transparent electrode and the second transparent electrode are opposite to each other.

10. The semiconductor light emitting device according to claim 9, further comprising: include: A light-transmitting substrate is disposed on the third light emitting portion. 11 . The semiconductor light emitting device according to claim 7 , wherein an area of ​​the first transparent electrode is larger than an area of ​​the fourth electrode when viewed in a plan view, and an area of ​​the second transparent electrode is larger than an area of ​​the sixth electrode when viewed in a plan view.

12. The semiconductor light emitting device according to claim 1, in, The first adhesive layer and the second adhesive layer include silicon dioxide or an insulating material having a low dielectric constant.

13. The semiconductor light emitting device according to claim 1, in, The first semiconductor stack includes a first n-type semiconductor layer, a first active layer, and a first p-type semiconductor layer, and Among them, the first light emitting portion includes a first electrode passing through the first p-type semiconductor layer and the first active layer and connected to the first n-type semiconductor layer, a second electrode arranged in a first area on the upper surface of the first p-type semiconductor layer, and a first transparent electrode arranged in a second area on the upper surface of the first p-type semiconductor layer.

14. The semiconductor light emitting device according to claim 13, in, The second semiconductor stack includes a second n-type semiconductor layer, a second active layer, and a second p-type semiconductor layer, and The second light emitting portion includes a third electrode passing through the second p-type semiconductor layer and the second active layer and connected to the second n-type semiconductor layer, a fourth electrode arranged in a first area on the upper surface of the second p-type semiconductor layer, and a second transparent electrode arranged in a second area on the upper surface of the second p-type semiconductor layer.

15. The semiconductor light emitting device according to claim 14, in, The third semiconductor stack includes a third n-type semiconductor layer, a third active layer, and a third p-type semiconductor layer, and Among them, the third light emitting portion includes a fifth electrode passing through the third p-type semiconductor layer and the third active layer and connected to the third n-type semiconductor layer, a sixth electrode arranged in a first area on the upper surface of the third p-type semiconductor layer, and a third transparent electrode arranged in a second area on the upper surface of the third p-type semiconductor layer.

16. The semiconductor light emitting device according to claim 15, in, The first electrode, the third electrode, and the fifth electrode overlap each other in a vertical direction, the second electrode, the fourth electrode, and the sixth electrode overlap each other in a vertical direction, and the first transparent electrode, the second transparent electrode, and the third transparent electrode overlap each other in a vertical direction.

17. A semiconductor light emitting device, include: substrate; a first lower distributed Bragg reflector layer disposed on the substrate; a first semiconductor stack disposed on the first lower distributed Bragg reflector layer and configured to emit a first light having a first wavelength; a first upper distributed Bragg reflector layer disposed on the first semiconductor stack; a first adhesive layer disposed on the first upper DBR layer; a second lower distributed Bragg reflector layer disposed on the first adhesive layer; a second semiconductor stack disposed on the second lower distributed Bragg reflector layer and configured to emit second light having a second wavelength shorter than the first wavelength; a second upper distributed Bragg reflector layer disposed on the second semiconductor stack; a second adhesive layer disposed on the second upper DBR layer; a third lower distributed Bragg reflector layer disposed on the second adhesive layer; a third semiconductor stack disposed on the third lower distributed Bragg reflector layer and configured to emit third light having a third wavelength shorter than the second wavelength; as well as A third upper distributed Bragg reflector layer is disposed on the third semiconductor stack.

18. The semiconductor light emitting device according to claim 17, in, The first lower distributed Bragg reflector layer has a reflectivity with respect to the first light emitted by the first semiconductor stack that is higher than a reflectivity of the first upper distributed Bragg reflector layer, wherein a reflectivity of the second lower distributed Bragg reflector layer with respect to the second light emitted by the second semiconductor stack is higher than a reflectivity of the second upper distributed Bragg reflector layer, and The reflectivity of the third lower DBR layer with respect to the third light emitted by the third semiconductor stack is higher than the reflectivity of the third upper DBR layer.

19. The semiconductor light emitting device according to claim 17, in, Each of the first lower distributed Bragg reflector layer, the first upper distributed Bragg reflector layer, the second lower distributed Bragg reflector layer, and the third lower distributed Bragg reflector layer has a structure in which two types of semiconductor layers having different refractive indices are stacked, and Wherein, each of the second upper distributed Bragg reflector layer and the third upper distributed Bragg reflector layer has a structure in which two types of insulating layers having different refractive indices are stacked.

20. A semiconductor light emitting device, include: a first light emitting portion including a first semiconductor stack, a first lower distributed Bragg reflector layer disposed below the first semiconductor stack, and a first upper distributed Bragg reflector layer disposed above the first semiconductor stack; a second light emitting portion including a second semiconductor stack, a second lower distributed Bragg reflector layer disposed below the second semiconductor stack, and a second upper distributed Bragg reflector layer disposed above the second semiconductor stack; a third light emitting portion including a third semiconductor stack, a third lower distributed Bragg reflector layer disposed below the third semiconductor stack, and a third upper distributed Bragg reflector layer disposed above the third semiconductor stack; a first adhesive layer disposed between the first light emitting portion and the second light emitting portion; as well as a second adhesive layer disposed between the second light emitting portion and the third light emitting portion, wherein the reflectivity of the first lower distributed Bragg reflector layer with respect to red light emitted by the first semiconductor stack is higher than the reflectivity of the first upper distributed Bragg reflector layer, The reflectivity of the second lower distributed Bragg reflector layer with respect to green light emitted by the second semiconductor stack is higher than the reflectivity of the second upper distributed Bragg reflector layer, and A reflectivity of the third lower distributed Bragg reflector layer with respect to blue light emitted by the third semiconductor stack is higher than a reflectivity of the third upper distributed Bragg reflector layer.

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