Multi-slave serial communication

Abstract

Embodiments of the present application relate to multi-slave serial communication. A method for synchronous serial communication includes encoding, by a master device, a header field (202) to be transmitted first in a frame, the header field having a header identification code and a slave count value defining the number of slave devices communicatively coupled to the master device. A plurality of address fields (206 to 210) to be transmitted in the frame are also encoded by the master device. Each of the address fields (206 to 210) corresponds to a different slave device in the slave devices. The first (206) of the address fields to be transmitted in the frame corresponds to the last of the slave devices to receive the header field (202), and the last (210) of the address fields to be transmitted in the frame corresponds to the first of the slave devices to receive the header field (202). The frame is transmitted by the master device to the slave device.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Provisional Patent Application No. 62 / 598,486, filed on December 14, 2017, entitled "Stable, High-Speed ​​Serial Communication Technique for Multiple Serial Peripheral Interface Slaves Allowing Same Frame Read Responses," which is hereby incorporated by reference in its entirety. Technical Field

[0003] Embodiments of the present application relate to electronic communications, and more particularly, to multi-slave serial communications. Background Art

[0004] Computers and other electronic systems use serial interfaces to provide data transfer between connected devices. A serial peripheral interface (SPI) is a serial communication interface that provides synchronous data transfer between a master device, such as a microcontroller, and one or more peripheral devices (slave devices). In SPI, the master device generates a clock signal, a select signal, and an input data signal (e.g., data to be transmitted to the slave device). When the select signal is activated, the slave device receives the input data signal in synchronization with the clock signal, and generates a data output signal in synchronization with the clock signal for receipt by the master device. Summary of the invention

[0005] The present invention discloses an apparatus and method for synchronous serial communication between a master device and a plurality of slave devices. In a first example, a synchronous serial communication system includes a master device. The master device is configured to communicate with a plurality of slave devices. The master device includes a clock generation circuit system, a frame control circuit system and a transmitter circuit system. The clock generation circuit system is configured to generate a clock signal for providing to the slave device. The clock signal is due to controlling the synchronous transmission of serial data between the master device and the slave device. The frame control circuit system is configured to generate a selection signal, a header signal and a plurality of address fields. The selection signal defines a frame interval for providing to the slave device. The header field is the first field to be transmitted in the frame interval and specifies the number of slave devices coupled to the master device in a communication manner. The plurality of address fields are to be transmitted in the frame interval. Each of the address fields corresponds to a different slave device in the slave device. The first of the data fields to be transmitted in the frame interval corresponds to the last of the slave devices receiving the header field. The transmitter circuit system is coupled to the frame control circuit system. The transmitter circuitry is configured to transmit data provided by the frame control circuitry.

[0006] In another example, a synchronous serial communication system includes a slave device. The slave device is configured to communicate with a master device. The slave device includes a receiver circuit system and an execution control circuit system. The receiver circuit system is configured to identify a header field transmitted by the master device during a frame interval, and extract a slave device count value from the header field, which specifies the number of slave devices coupled to the master device in a communication manner. The receiver circuit system is also configured to identify an address field transmitted by the master device in a frame interval based on the slave device count value. The address field corresponds to the slave device. The first address field transmitted by the master device corresponds to the last one of the slave devices that receives the header field. The execution control circuit system is configured to apply the address value extracted from the address field to access the storage device of the slave device.

[0007] In another example, a method for synchronous serial communication includes encoding, by a master device, a header field to be transmitted first in a frame, the header field having a header identification code and a slave device count value defining the number of slave devices communicatively coupled to the master device. The master device also encodes a plurality of address fields to be transmitted in the frame. Each of the address fields corresponds to a different one of the slave devices. The first of the address fields to be transmitted in the frame corresponds to the last one of the slave devices to receive the header field, and the last of the address fields to be transmitted in the frame corresponds to the first one of the slave devices to receive the header field. The header field and the address field are transmitted to the slave device by the master device. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] To describe various examples in detail, reference is now made to the accompanying drawings, in which:

[0009] Figure 1 A block diagram illustrating an example of a synchronous serial communication system according to the present disclosure;

[0010] Figure 2 An example of signals transmitted in a multi-slave synchronous serial communication system is shown according to the present disclosure;

[0011] Figure 3 According to the present disclosure, an example of field encoding applied in a synchronous serial communication system is shown;

[0012] Figure 4 An example of signals transmitted in a single-slave synchronous serial communication system is shown according to the present disclosure;

[0013] Figure 5 A block diagram showing an example of a master device suitable for a synchronous serial communication system according to the present disclosure;

[0014] Figure 6A block diagram illustrating an example of a slave device suitable for use in a synchronous serial communication system according to the present disclosure;

[0015] Figure 7 A flowchart illustrating an example method for operating a master device of a synchronous serial communication system according to the present disclosure; and

[0016] Figure 8 A flow chart illustrating an example method suitable for operating a slave device of a synchronous serial communication system according to the present disclosure. DETAILED DESCRIPTION

[0017] Certain terms have been used throughout this description and claims to refer to specific system components. As will be appreciated by those skilled in the art, different parties may refer to components by different names. This document is not intended to distinguish between components that differ in name but not in function. In this disclosure and claims, the terms "include" and "comprise" are used in an open manner and should therefore be interpreted to mean "including but not limited to...". Similarly, the term "couple" is intended to mean an indirect or direct wired or wireless connection. Therefore, if a first device is coupled to a second device, the connection may be through a direct connection, or through an indirect connection via other devices and connections. The statement "based on" means "based at least in part on". Therefore, if X is based on Y, X can be a function of Y and any number of other factors.

[0018] The Serial Peripheral Interface (SPI) is a synchronous serial communication system that can be used in various applications. Each device implementing SPI includes a data input terminal, a data output terminal, a clock terminal, and one or more select terminals. The SPI master device drives a clock signal to its clock terminal, drives output data to its data output terminal synchronously with the clock, and samples data on its data input terminal synchronously with the clock. The SPI master controller activates a select signal on the select terminal to select a slave device for communication. The SPI slave device that receives the activated select signal on its select terminal receives a clock signal on its clock terminal, drives output data to its data output terminal synchronously with the clock, and samples data on its data input terminal synchronously with the clock.

[0019] Devices communicating via SPI can be arranged in parallel or daisy chain configurations. In a parallel configuration, the master device provides a separate selection signal for each slave device, while the data line and clock signal are shared by all slave devices. The parallel configuration provides high data throughput, but requires the master device to include a selection terminal for each slave device, thereby requiring the master device to have a large number of terminals in some applications. In a daisy chain configuration, the selection signal and clock signal generated by the master device are connected in parallel to all slave devices, and the data line is connected to the slave device serially from the slave device to form a loop that starts and ends at the master device. The daisy chain configuration allows the number of terminals on the master device to be reduced, but limits the communication bandwidth. For example, in some embodiments, two interactions (two communication frames) are required to read from the slave device. In a system that allows single frame reading, as the number of slave devices increases, the transmission speed of information running through the serially connected slave devices decreases.

[0020] The synchronous serial communication system disclosed herein employs a daisy chain configuration to reduce the number of ends required on a master device, allow reading of a single frame, and provide a transmission bit rate independent of the number of slave devices in the chain. Some embodiments provide operation on a single slave device without introducing additional protocol overhead.

[0021] Figure 1 A block diagram of an example of a synchronous serial communication system 100 is shown according to the present disclosure. The synchronous serial communication system 100 includes a master device 102 and one or more slave devices that communicate with the master device 102. Figure 1 In the example of , the synchronous serial communication system 100 includes a slave device 104, a slave device 106, and a slave device 108. Other embodiments of the synchronous serial communication system 100 include different numbers of slave devices. In the synchronous serial communication system 100, the master device 102 and the slave devices 104 to 108 are coupled in a daisy chain configuration so that data initiated from the master device 102 is passed to the slave device 108 via the slave device 104 and the slave device 106. For example, the master device 102 outputs a data signal 110. The slave device 104 receives the data signal 110 and outputs a data signal 112, which includes a portion of the data provided via the data signal 110. The slave device 106 receives the data signal 112 and outputs a data signal 114, which includes a portion of the data provided via the data signal 112. The slave device 108 receives the data signal 114 and outputs a data signal 116, which includes a portion of the data provided via the data signal 114. The master device 102 receives the data signal 116 .

[0022] The master device 102 controls the transmission of information in the synchronous serial communication system 100 by generating a selection signal 118, a clock signal 120, and a data signal 110. The selection signal 118 defines the frame interval (the time when data is transmitted between the master device 102 and the slave devices 104 to 108). The clock signal 120 defines the time when each bit of the data signal 110, the data signal 112, the data signal 114, and the data signal 116 is output by the transmitter and / or sampled by the receiver. The master device 102 encodes the various fields of the data signal 110 as needed to control and optimize the transmission of information from the master device 102 to the slave devices 104 to 108, and from the slave devices 104 to 108 to the master device 102. For example, the master device 102 encodes a header field in each frame. The header field contains a slave count value, which tells the slave devices 104 to 108 the number of slave devices connected to the master device 102. Slave devices 104 to 108 identify header fields and extract slave count values. When receiving header fields, each of slave devices 104 to 108 determines its position in the synchronous serial communication system 100 (i.e., its position in a series of slave devices), and understands the total number of slave devices. Through this information, each of slave devices 104 to 108 identifies the specific fields (e.g., address and data fields) corresponding to the slave device provided in the data signal 110. By identifying the fields specific to the slave device, the slave device extracts the value from the field and replaces the field to transmit the reply value. Therefore, the original value of the field does not need to be passed to the downstream slave device that is not related to the field. In this way, the synchronous serial communication system 100 reduces the overhead associated with the read interaction in the synchronous serial communication system 100.

[0023] Figure 2 2 shows an example of signals transmitted in the synchronous serial communication system 100. Figure 21, the master device 102 initiates a frame by activating the select signal 118 (e.g., driving the select signal 118 to low). On the data signal 110, the master device 102 drives the first header field 202, the second header field 204, the first address field 206, the second address field 208, the third address field 210, the first data field 212, the second data field 214, and the third data field 216. Some embodiments do not include the header field 204. The first header field 202 is the first field transmitted in the frame. Embodiments of the synchronous serial communication system 100 that include different numbers of slave devices will include different numbers of address fields and data fields (e.g., the data signal 110 will include one address field and one data field for each slave device connected to the master device 102). In the data signal 110, the address field 206 specifies the address of the slave device 108 to be accessed, the address field 208 specifies the address of the slave device 106 to be accessed, and the address field 210 specifies the address of the slave device 104 to be accessed. More generally, the first address field driven by the master device 102 onto the data signal 110 specifies the address of the last slave device in the series of slave devices (i.e., the last slave device in the series of slave devices for receiving the header field 202), and the last address field driven by the master device 102 onto the data signal 110 specifies the address of the first slave device in the series of slave devices (i.e., the first slave device in the series of slave devices for receiving the header field 202). Similarly, the data field 212 specifies the data value to be written to the slave device 108 at the corresponding address, the data field 214 specifies the data value to be written to the slave device 106, and the data field 216 specifies the data value to be written to the slave device 104. More generally, the first data field driven by the master device 102 onto the data signal 110 specifies a data value for a last slave device in a series of slave devices (i.e., the last slave device in a series of slave devices for receiving the header field 202), and the last data field driven by the master device 102 onto the data signal 110 specifies a data value for a first slave device in a series of slave devices (i.e., the first slave device in a series of slave devices for receiving the header field 202).

[0024] Figure 3 1 shows an example of field encoding applied in the synchronous serial communication system 100. Figure 3 300 is an implementation of header field 202. Header field 300 includes a header identification value 302 that identifies header field 300 as a header field and a slave count value 304 that specifies the number of slave devices connected to master device 102. For example, in Figure 1In the embodiment of the synchronous serial communication system 100 shown in FIG, the slave count value 304 should be encoded as the value 3. The header identification value 302 is placed at the beginning of the header field and is therefore the first value transmitted by the master device 102 and received by each of the slave devices 104-108.

[0025] Header field 310 is an implementation of header field 204. Header field 310 includes header identification value 312, which identifies header field 310 as a header field. In some implementations, header identification value 312 is equivalent to header identification value 302. Header field 310 also includes command value 314. Command value 314 specifies an operation to be performed by all slave devices (i.e., command value 314 specifies a broadcast command). The slave devices all perform the operation defined by command value 314 at the same time. For example, all slave devices perform the operation defined by command value 314 at the end of the frame receiving header field 310.

[0026] Address field 330 is an implementation of address field 206, address field 208, and / or address field 210. Address field 330 includes an identification value 332 that identifies address field 330 as an address field. Address field 330 also includes a read / write control value 334 and an address value 336. Identification value 332 specifies whether the slave device location corresponding to address value 336 is to be read or written. For example, if read / write control value 334 is a logic "one", then the address corresponding to address value 336 is to be read, and if read / write control value 334 is a logic "zero", then the address corresponding to address value 336 is to be written.

[0027] Data field 340 is an implementation of data field 212, data field 214, and / or data field 216. Data field 340 specifies a value to be written at the slave device's address value 336. For example, the slave device writes the value contained in data field 340 to the address specified in address field 330 corresponding to the slave device at the end of the frame receiving data field 340.

[0028] Return now Figure 2 , when the select signal 118 is activated and the slave devices 104-108 begin to receive the clock signal 120, each of the slave devices 104-108 transmits a status value. For example, when the slave device 104 receives the header field 202, the slave device 104 transmits the status field 218 in the data signal 112, the slave device 106 transmits the status field 220 in the data signal 114, and the slave device 108 transmits the status field 222 in the data signal 116. Figure 3The encoding of status field 320 is shown. Status field 320 is an implementation of status field 218, status field 220, and / or status field 222. Status field 320 includes identification value 322 and status value 324. Identification value 322 identifies status field 320 as a status field, and status value 324 provides status information with respect to the corresponding slave device.

[0029] As each of the slave devices 104 to 108 receives a field from the upstream device (e.g., the field is shifted into the device), the slave device identifies the field and determines whether the field is to be retransmitted. For example, the header fields 202 and 204 transmitted by the master device 102 are retransmitted by each of the slave devices 104 to 108 and returned to the master device 102. The master device 102 receives the header field and, based on receiving the header field, confirms that the synchronous serial communication system 100 is properly transmitting data.

[0030] As each of the slave devices 104-108 receives the first header field 202, the slave device identifies the field as a header field based on the header identification value 302 and extracts the slave count value 304 from the header field 202. Similarly, if a second header field 204 follows the first header field 202, the receiving slave device identifies the field as a header field based on the header identification value 312 and extracts the command value 314 from the header field 204. Upon receiving the header field 204, the slave device retransmits the header field 202.

[0031] After transmitting one or more header fields, the master device 102 transmits an address field for each of the slave devices. The address field 206 of the slave device corresponding to the last received header field 202 is transmitted immediately after the header field, and the address field 210 corresponding to the slave device that first received the header field 202 is the last address field transmitted. The slave devices 104-108 use the slave count value 304 to identify the address field corresponding to the slave device (for example, to determine when to capture the address field corresponding to the slave device). For example, the slave devices 104-108 count the number of fields received in the frame. The address field corresponding to the slave device is captured in the field as the sum of the slave count value 304 and the number of identified header fields. Figure 2 2, each of the slave devices 104-108 captures a corresponding address value in interval 224. The captured address value identifies a storage location, such as a register, a memory location, or other address-identifiable device, that contains information to be returned to the master device 102. After capturing the address value in interval 224, the slave device retrieves the information stored at the address and transmits the retrieved information in interval 226.

[0032] After transmitting the address field, the master device 102 transmits a data field for each of the slave devices. The data field 212 corresponding to the slave device that received the last header field 202 is transmitted immediately after the address field, and the data field 216 corresponding to the slave device that first received the header field 202 is the last data field transmitted. The slave devices 104-108 use the slave count value 304 to identify the data field corresponding to the slave device (e.g., to determine when to capture the data field corresponding to the slave device). For example, the slave devices 104-108 count the number of fields received in the frame. The data field corresponding to the slave device is captured in the field with the sum of two times the slave count value and the number of identified header fields. Figure 2 In the example of FIG. 2 , each of the slave devices 104 to 108 captures a corresponding data value in interval 228. At the end of the frame, e.g., 236, each of the slave devices stores the data value extracted from the data field corresponding to the slave device into the storage location specified by the address value captured in the interval 224.

[0033] The implementation of the master device 102 and the slave devices 104 (in some implementations, all the slave devices are identical) also provides for communication between the master device and a single slave device without requiring additional protocol overhead. Figure 5 According to the present disclosure, an example of a signal transmitted in a single slave synchronous serial communication system is shown. Figure 4 , the master device 102 outputs a selection signal 402, a data signal 404, and a clock signal 410. The slave device 104 receives the selection signal 402, the data signal 404, and the clock signal 410, and outputs a data signal 406. The selection signal 402 defines a frame interval (the time at which data is transmitted between the master device 102 and the slave device 104. The clock signal 410 defines the time at which each bit of the data signal 404 and the data signal 406 is transmitted and received).

[0034] The master device 102 initiates a frame by activating the select signal 402 (e.g., driving the select signal 402 to low). On the data signal 404, the master device 102 drives the address field 412 and the data field 414. In the data signal 404, the address field 412 specifies the address of the slave device 104 to be accessed, and the data signal 406 specifies the data value to be written to the slave device 104 at the corresponding address. When the slave device 104 receives the address field 412, the slave device 104 transmits the status field 416 on the data signal 406. When receiving the address value contained in the address field 412, the slave device 104 retrieves the information located at the address value and transmits the information as a reply value 418 in the received data field 414. After receiving that data field 414 and extracting the data value therefrom, the slave device 104 writes the data value to the storage location specified by the address value at the end of the frame (e.g., deactivation of the select signal 402).

[0035] Figure 5 A block diagram 500 of an example of a master device suitable for use in a synchronous serial communication system is shown in accordance with the present disclosure. Master device 500 is an implementation of master device 102. Master device 500 includes clock generation circuitry 502, frame control circuitry 504, transmitter circuitry 506, and receiver circuitry 508. Clock generation circuitry 502 generates clock signal 120. Clock generation circuitry 502 includes a counter or other programmable divider to generate a desired clock frequency from a source clock signal.

[0036] Frame control circuitry 504 includes circuitry for controlling the generation of various fields transmitted in data signal 110. For example, frame control circuitry 504 includes circuitry for encoding header field 300 using header identification value 302 and slave count value 304, encoding header field 310 using header identification value 312 and command value 314, encoding address field 330 using identification value 332, read / write control value 334, and address value 336, and retrieving data values ​​(from memory, registers, etc.) for transmission in data fields (212-216). Frame control circuitry 504 also includes circuitry, such as a state machine, that controls the order of transmission of various fields transmitted in data signal 110, and controls the generation of various signals provided to slave devices (e.g., select signal 118, clock signal 120).

[0037] Transmitter circuitry 506 includes parallel-to-serial conversion circuitry, such as a parallel-load shift register, to convert multi-bit values ​​to serial data to be transmitted for inclusion in serial data signal 110. Some of the multi-bit values ​​received by transmitter circuitry 506 are provided by a system of a proxy master device 500, or by frame control circuitry 504. For example, in one embodiment, master device 500 is included in a system to monitor and / or control the operation of one or more motors.

[0038] The receiver circuitry 508 includes serial-to-parallel conversion circuitry, such as a parallel output shift register, to convert the serial data signal 116 received from the slave devices 104-108 into a multi-bit value. The multi-bit value produced by the receiver circuitry 508 is provided to the system of the proxy master device 500. In some implementations, the receiver circuitry 508 also includes circuitry to recognize the header field 202 looped back from the slave devices 104-108.

[0039] Figure 6 A block diagram 600 of an example of a slave device suitable for use in a synchronous serial communication system is shown according to the present disclosure. Slave device 600 is an implementation of slave device 104, slave device 106, and / or slave device 108. Slave device 600 includes execution control circuitry 602, receiver circuitry 604, transmitter circuitry 606, and memory 608. Execution control circuitry 602 includes circuitry for executing commands received in header field 310, performing reads from a storage device specified in address field 330, and / or performing writes to a storage device specified in address field 330.

[0040] Memory 608 includes memory and / or registers readable and / or writable by executive control circuitry 602. Data retrieved from memory 608 is transmitted to transmitter circuitry 606 for transmission in data signal 116, and data received via data signal 110 is transmitted to memory 608 for storage.

[0041] Receiver circuitry 604 includes serial-to-parallel conversion circuitry (such as a parallel output shift register) to convert a received serial data stream, such as data signal 110, into a multi-bit value. The multi-bit value produced by receiver circuitry 604 is provided to a system of proxy slave device 600 (e.g., a motor control / monitoring system) or written to memory 608 or another storage device. Receiver circuitry 604 also includes circuitry for identifying various fields received in a frame and extracting information from the fields. For example, receiver circuitry 604 includes circuitry for identifying header field 300, header field 310, address field 300, and data field 340.

[0042] Transmitter circuitry 606 includes parallel-to-serial conversion circuitry, such as a parallel-load shift register, for converting multi-bit values ​​to be transmitted into serial data signals 116. Some of the multi-bit values ​​generated by transmitter circuitry 606 are provided by a system of proxy slave device 600 or retrieved from memory 608 or another storage device.

[0043] Figure 7 Flow chart 700 of the example method for operating the master device of synchronous serial communication system is shown according to the present disclosure.Although described sequentially for the sake of convenience, at least some actions shown can be performed in different orders and / or performed in parallel.In addition, some embodiments only perform some of the actions shown.The operation of method 700 is performed by the embodiment of master device 102.

[0044] In block 702, the master device 102 initiates interaction with a plurality of slave devices. The block 702 activates the select signal 118 and encodes a header field 300 for transmission. Encoding the header field 300 includes encoding a header identification value 302 in the header field 300, and encoding a slave count value 304 in the header field 300. The master device 102 provides the header field 300 to the transmitter circuit system 506 for serialization and transmission.

[0045] Some embodiments of the master device 102 also encode the header field 310 for transmission. Encoding the header field 310 includes encoding an identification value 312 in the header field 310, and encoding a command value 314 in the header field 310. The master device 102 provides the header field 310 to the transmitter circuitry 506 for serialization and transmission.

[0046] In block 704, the master device 102 encodes and transmits an address field 330 for each slave device coupled to the master device 102. The encoded address field 330 includes encoding an identification value 332 in the address field 330, encoding a read / write control value 334 in the address field 330, and encoding an address value 336 in the address field 330. Each encoded address field 330 is provided to the transmitter circuitry 506 for serialization and transmission. In chronological order, the address fields are provided to the transmitter circuitry 506 in the reverse order in which the header fields 300 are received. That is, the first address field 330 provided to the transmitter circuitry 506 is for the last slave device that receives the header field 300 transmitted at the beginning of the frame, and the last address field 330 provided to the transmitter circuitry 506 is for the first slave device that receives the header field 300 transmitted at the beginning of the frame.

[0047] In block 706, the master device 102 encodes and transmits a data field 340 for each slave device coupled to the master device 102. The encoded data field 340 includes a data value encoded in the data field 340. Each data field 340 is provided to the transmitter circuitry 506 for serialization and transmission. In chronological order, the data fields are provided to the transmitter circuitry 506 in the reverse order in which the header fields 300 were received. That is, the first data field 340 provided to the transmitter circuitry 506 is for the last slave device that received the header field 300 transmitted at the beginning of the frame, and the last data field 340 provided to the transmitter circuitry 506 is for the first slave device that received the header field 300 transmitted at the beginning of the frame.

[0048] In block 708, the master device 102 receives status fields (e.g., status field 218, status field 220, status field 222) transmitted by the slave devices when the master device 102 transmits the header field 300. The receiver circuitry 508 converts each of the status fields into a multi-bit parallel status value, and the received status values ​​are provided to the host device or stored in a storage device. The status value is received for each slave device coupled to the master device 102. In chronological order, the first status value received by the receiver circuitry 508 is transmitted by the last slave device that receives the header field 300 transmitted at the beginning of the frame, and the last status value received by the receiver circuitry 508 is transmitted by the first slave device that receives the header field 300 transmitted at the beginning of the frame.

[0049] In block 710, the master device 102 receives the header fields 300, and in some embodiments, receives the header fields 310 retransmitted by the slave device. The receiver circuitry 508 converts each of the header fields into a multi-bit parallel header value, and the master device 102 compares the received header values ​​to the transmitted header values ​​to verify proper operation of the synchronous serial communication system 100.

[0050] In block 712, the master device 102 receives reply fields (e.g., reply field 230, reply field 232, reply field 234) transmitted by the slave devices. The receiver circuitry 508 converts each of the reply fields into a multi-bit parallel reply value, and the received reply values ​​are provided to the host device or stored in a storage device. A reply value is received for each slave device coupled to the master device 102. In chronological order, the first reply value received by the receiver circuitry 508 is transmitted by the last slave device that receives the header field 300 transmitted at the beginning of the frame, and the last reply value received by the receiver circuitry 508 is transmitted by the first slave device that receives the header field 300 transmitted at the beginning of the frame. After the master device 102 receives the last reply value, the frame is complete, and the master device 102 deactivates the select signal 118.

[0051] Figure 8 A flow chart of an example method 800 for operating a slave device of a synchronous serial communication system is shown according to the present disclosure. Although depicted sequentially for convenience, at least some of the actions shown may be performed in a different order and / or performed in parallel. In addition, some embodiments only perform some of the actions shown. The operation of method 800 is performed by embodiments of slave device 104, slave device 106, and / or slave device 108.

[0052] In block 802, the slave device 104 detects activation of the select signal 118 and encodes the state field 320 for transmission. Encoding the state field 320 includes encoding the identification value 322 and the state value 324 in the state field 320. The slave device 104 provides the state field 320 to the transmitter circuit system 606 for serialization. When the master device 102 activates the clock signal 120, the slave device 104 transmits the state field bit every clock cycle until the transmission of the state value is completed.

[0053] In block 804, the slave device 104 receives the header field 300 when the slave device 104 transmits the status field 320. The receiver circuitry 604 converts the header field 300 into a multi-bit parallel header value and identifies the field as a header value based on the header identification value 302. The receiver circuitry 604 extracts the slave device count value 304 from the header field 300 for use in identifying the address field and the data field in the data signal 110 corresponding to the slave device 104. The receiver circuitry 604 either counts the number of fields (e.g., the number of bytes) received in the frame for use in identifying the address field and the data field in the data signal 110 corresponding to the slave device 104.

[0054] In block 806, the slave device 104 receives the header field 310. The receiver circuitry 604 converts the header field 310 into a multi-bit parallel header value and identifies the field as a header value based on the header identification value 312. The receiver circuitry 604 determines that the header field 310 is the second header field received and extracts the command value 314 from the header field 300 for execution (e.g., execution at the end of a frame).

[0055] In block 808, the slave device 104 applies the slave count value 304 extracted from the header field 300 and the number of received fields to identify the address field 330 corresponding to the slave device 104. For example, the address field 330 corresponding to the slave device 104 is the Nth field received in the frame, where N is the sum of the slave count value 304 and the number of header fields received in the frame. The slave device 104 extracts the read / write control value 334 and the address value 336 from the address field 330.

[0056] In block 810, the slave device 104 (e.g., the execution control circuitry 602) applies the address value 336 to retrieve a reply value to be transmitted to the master device 102. The slave device 104 retrieves the reply value from the memory 608 or a host device that includes the address field and the data field in the data signal 110 corresponding to the slave device 104.

[0057] In block 812, the slave device 104 transmits the reply value to the master device 102. The slave device 104 provides the reply value to the transmitter circuit system 606, and the transmitter circuit system 606 serializes the reply value for transmission. The slave device 104 transmits the reply value when the master device 102 transmits the first data field 212. The slave device 104 identifies the first data field 212 based on the slave device count value 304.

[0058] In block 814, the slave device 104 (e.g., the receiver circuitry 604) applies the slave count value 304 extracted from the header field 300 and the number of received fields to identify the data field 340 corresponding to the slave device 104. For example, the data field 340 corresponding to the slave device 104 is the Nth field received in the frame, where N is the sum of the number of header fields received in the frame and two times the slave count value 304. The slave device 104 captures the data value provided in the data field 340.

[0059] In block 816 , the slave device 104 (eg, the execution control circuitry 602 ) stores the data value captured in block 814 at the address value 336 extracted from the address field 330 in block 808 .

[0060] In block 818 , the slave device 104 executes the command value 314 extracted from the header field 310 in block 806 .

[0061] The above discussion is intended to illustrate the principles and various embodiments of the present invention. For those skilled in the art, once the above disclosure is fully understood, many changes and modifications will become apparent. It is hoped that the attached claims will be interpreted as including all such changes and modifications.

Claims

1. A synchronous serial communication system, comprising: A master device and a specified number of slave devices in a serial configuration communicatively coupled to the master device, the master device comprising: a clock generation circuit system configured to provide a clock signal to the plurality of slave devices, wherein the clock signal is used to control synchronous transmission of serial data between the master device and the plurality of slave devices; A frame control circuit system configured to: providing a selection signal defining a frame interval to the plurality of slave devices; providing a header field as a first field to be transmitted in the frame interval, wherein data in the header field includes the specified number and location of each of the plurality of slave devices in the serial configuration; and providing a plurality of address fields to be transmitted in the frame interval, each of the address fields corresponding to a different slave device among the plurality of slave devices, wherein a first of the address fields to be transmitted in the frame interval corresponds to a last one of the plurality of slave devices that receives the header field; and Transmitter circuitry is coupled to the frame control circuitry, the transmitter circuitry configured to transmit data provided by the frame control circuitry.

2. The synchronous serial communication system of claim 1, wherein the frame control circuit system is configured to insert a header identification value into the header field, the header identification value comprising a portion of the header field that the plurality of slave devices first receive.

3. A synchronous serial communication system according to claim 2, wherein the header field is a first header field, and the frame control circuit system is configured to generate a second header field as a second value to be transmitted in the frame interval, wherein the second header field specifies a command to be executed by the multiple slave devices, and the second header field includes the header identification value.

4. The synchronous serial communication system according to claim 1, wherein a last one of the address fields to be transmitted in the frame interval corresponds to a first one of the plurality of slave devices that receives the header field.

5. The synchronous serial communication system of claim 1 , wherein the master device further comprises a receiver circuit system configured to: receiving data transmitted by the plurality of slave devices; and The header field in the data transmitted by the plurality of slave devices is identified. 6 . The synchronous serial communication system of claim 1 , wherein each of the plurality of slave devices is configured to transmit a status value simultaneously with the master device transmitting the header field.

7. The synchronous serial communication system according to claim 1, wherein each of the plurality of slave devices is configured to: extracting the specified number from the header field; and Based on the number of the plurality of slave devices extracted from the header field, an address value of a corresponding slave device is captured.

8. The synchronous serial communication system of claim 1 , wherein the frame control circuitry is configured to: providing data fields to be transmitted in the frame interval, each of the data fields corresponding to a different slave device among the plurality of slave devices; in: a first one of the data fields to be transmitted in the frame interval corresponding to a last one of the plurality of slave devices receiving the header field; as well as The first of the data fields to be transmitted is appended to the last of the address fields to be transmitted.

9. The synchronous serial communication system according to claim 8, wherein each of the plurality of slave devices is configured to: extracting the specified number from the header field; and identifying the first one of the data fields based on the number of the plurality of slave devices extracted from the header field; and A reply value is transmitted simultaneously with the master device transmitting the first of the data fields.

10. The synchronous serial communication system of claim 8, wherein a last one of the data fields to be transmitted in the frame interval corresponds to a first one of the plurality of slave devices that receives the header field; and wherein each of the plurality of slave devices is configured to: extracting the specified number from the header field; capturing a data value from one of the data fields of a corresponding slave device based on the specified number extracted from the header field; as well as The data value is transferred to a storage device at the end of the frame interval.

11. A synchronous serial communication system, comprising: A specified number of multiple slave devices are coupled in series communication with the master device using a clock signal transmitted by the master device, wherein one of the multiple slave devices comprises: A receiver circuit system configured to: identifying a header field transmitted by the master device during a frame interval, wherein the header field includes the designated number; extracting from the header field a slave count value representing the specified number; as well as identifying, based on the plurality of slave device count values, an address field transmitted by the master device in the frame interval, wherein the address field corresponds to the one slave device, and wherein a first address field transmitted by the master device in the frame interval corresponds to a last one of the slave devices to receive the header field; as well as Control circuitry is executed and configured to apply the address value extracted from the address field to access a storage device of the one slave device.

12. The synchronous serial communication system of claim 11, wherein the one slave device comprises transmitter circuitry configured to transmit a status value when the master device transmits the header field.

13. The synchronous serial communication system according to claim 11, wherein: The header field is a first header field; and The receiver circuitry is configured to: identifying a second header field transmitted by the master device during the frame interval; extracting from the second header field a command to be executed by the one slave device; as well as The execution control circuitry is configured to execute a command while all of the plurality of slave devices are executing the command.

14. The synchronous serial communication system according to claim 11, wherein: the receiver circuitry being configured to identify, based on the slave count value, a data field transmitted by the master device in the frame interval, wherein the data field corresponds to the one slave device, and wherein a first data field transmitted by the master device corresponds to a last one of the plurality of slave devices that received the header field; as well as The execution control circuitry is configured to apply the address value to write a data value extracted from the data field to the storage device of the one slave device.

15. The synchronous serial communication system of claim 14, wherein the one slave device comprises a transmitter circuit system configured to transmit a reply value simultaneously with the transmission of the first data field by the master device; The reply value corresponds to the information stored at the address value.

16. The synchronous serial communication system according to claim 11, wherein the master control device comprises: a clock generation circuit system configured to generate the clock signal for providing to the plurality of slave devices, wherein the clock signal is used to control synchronous transmission of data between the master device and the plurality of slave devices; A frame control circuit system configured to: generating a selection signal defining the frame interval for providing to the slave device; generating the header field as a first field to be transmitted in the frame interval; generating a plurality of address fields to be transmitted in the frame interval, each of the address fields corresponding to a different slave device among the plurality of slave devices, wherein the first address field to be transmitted in the frame interval corresponds to a last one of the plurality of slave devices that receives the header field, and the last address field to be transmitted in the frame interval corresponds to a first one of the plurality of slave devices that receives the header field; as well as generating a plurality of data fields to be transmitted in the frame interval, each of the data fields corresponding to a different slave device among the plurality of slave devices, wherein a first one of the data fields to be transmitted in the frame interval corresponds to a last one of the plurality of slave devices that receives the header field, and the first one of the data fields to be transmitted is appended to a last one of the address fields to be transmitted; as well as transmitter circuitry coupled to the frame control circuitry, the transmitter circuitry configured to transmit data generated by the frame control circuitry; as well as Receiver circuitry is configured to identify the header field in data received from the plurality of slave devices.

17. A method for synchronous serial communication, comprising: encoding, by a master device, a header field that is transmitted first in a frame, the header field comprising a header identification code that identifies the header field, and a slave count value that defines the number of a plurality of slave devices in a serial configuration that are communicatively coupled to the master device; encoding, by the master device, address fields to be transmitted in the frame, each of the address fields corresponding to a different slave device among the plurality of slave devices, wherein a first of the address fields to be transmitted in the frame corresponds to a last of the plurality of slave devices that receives the header field, and a last of the address fields to be transmitted in the frame corresponds to a first of the plurality of slave devices that receives the header field; as well as The header field and the address field are transmitted by the master device to the plurality of slave devices.

18. The method of claim 17, wherein the header field is a first header field, and the method further comprises encoding, by the master device, a second header field transmitted immediately after the first header field in the frame, the second header field having a header identification code identifying the header field, and a command value defining a command to be executed simultaneously by the plurality of slave devices.

19. The method of claim 17 , further comprising encoding, by the master device, data fields to be transmitted in the frame, each of the data fields corresponding to a different slave device among the plurality of slave devices, wherein a first of the data fields to be transmitted in the frame corresponds to a last of the plurality of slave devices that receives the header field, and a last of the data fields to be transmitted in the frame corresponds to a first of the plurality of slave devices that receives the header field, and the first of the data fields to be transmitted is appended to a last of the address fields to be transmitted.

20. The method of claim 19, further comprising: Simultaneously with the master device transmitting the header field, each slave device transmitting a status value; extracting, by each slave device, the slave count value from the header field; capturing, by each slave device, a corresponding address value of the slave device based on the slave count value extracted from the header field; identifying, by each slave device, said first one of said data fields based on said slave count value extracted from said header field; transmitting, by each slave device, a reply value when said master device transmits said first of said data fields; capturing, by each slave device, a data value from one of the data fields corresponding to the slave device based on the slave count value extracted from the header field; as well as The data value is stored in a storage device by each slave device at the end of the frame.

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