Silicon carbide semiconductor device

Abstract

This application relates to a silicon carbide semiconductor device. The semiconductor device (500) has a gate structure (150) extending from a first surface (101) into the SiC semiconductor body (100). A body region (120) in the SiC semiconductor body (100) is adjacent to at least a first sidewall (151) of the gate structure (150). A first shielding region and a second shielding region (161, 162) having a conductivity type of the body region (120) are highly doped to at least twice the height of the body region (120). A diode region (140) forms a Schottky contact (SC) with a load electrode (310) between the first shielding region (161) and the second shielding region (162).

Description

Technical Field

[0001] The present application relates to SiC (silicon carbide) semiconductor devices, such as semiconductor switches with low on-resistance and high breakdown voltage strength. Background Art

[0002] In a semiconductor device having a field effect transistor structure and a drift zone, a pn junction between the drift zone and the body region of the field effect transistor structure forms an intrinsic body diode. When the body diode operates in the forward direction, a bipolar carrier flow through the body region and the drift zone occurs. The electrical characteristics of the body diode, such as the onset voltage (Einsatzspannung), forward voltage (Flussspannung), and current carrying capacity, are obtained from the doping and the dimensions of the doped regions at the semiconductor / metal junction, which in turn are determined in terms of the desired transistor characteristics.

[0003] Generally, it is desired to improve the characteristics of SiC devices, such as avalanche robustness (Avalanche-Robustheit), breakdown strength, and / or on-resistance. Summary of the Invention

[0004] Embodiments of the present disclosure relate to a semiconductor device having a gate structure. The gate structure extends from a first surface into the SiC semiconductor body. A body region in the SiC semiconductor body is adjacent to a first sidewall of the gate structure. The semiconductor device has a first shielding region and a second shielding region having a conductivity type of the body region, wherein the first shielding region and the second shielding region are doped at least twice as highly as the body region. A diode region forms a Schottky contact (Schottky-Kontakt) with a load electrode between the first shielding region and the second shielding region.

[0005] Another embodiment of the present disclosure relates to a semiconductor device. The semiconductor device has diode regions of a first conductivity type in the SiC semiconductor body. The diode regions respectively form Schottky contacts with a load electrode. Along a horizontal first direction, at least one gate structure is constructed between two adjacent diode regions. The at least one gate structure extends from a first surface into the SiC semiconductor body. At least one first sidewall of the gate structure is adjacent to a body region of a second conductivity type, and the body region of the second conductivity type is electrically connected to the load electrode.

[0006] Other embodiments of the present disclosure relate to a semiconductor device having a gate structure that extends from a first surface into a SiC semiconductor body. In the SiC semiconductor body, a drift region of a first conductivity type is constructed. First and second mesas of the SiC semiconductor body are arranged between the gate structures and include a body region of a second conductivity type. The body regions are respectively adjacent to a first sidewall of one of the gate structures in the gate structures. In the second mesa, first shielding regions of the second conductivity type are respectively adjacent to a second sidewall of one of the gate structures, and second shielding regions of the second conductivity type are adjacent to the body regions. Between the first shielding regions and the second shielding regions, diode regions of the conductivity type of the drift region respectively form Schottky contacts with load electrodes.

[0007] Other features and advantages of the disclosed subject matter will be apparent to those skilled in the art upon reading the following detailed description, upon examination of the drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The accompanying drawings facilitate a deeper understanding of embodiments of a silicon carbide semiconductor device, are included in the present disclosure, and form a part of the present disclosure. The drawings illustrate only exemplary forms and are used in conjunction with the description to explain its principles. The silicon carbide semiconductor device described in the present invention is not limited to these embodiments by the description of the embodiments. Other embodiments and expected advantages are obtained from the understanding of the following detailed description and from the combination of the following described embodiments, even if these embodiments are not explicitly described. The elements and structures shown in the drawings are not necessarily shown in correct proportion to each other. Identical reference numerals refer to identical or corresponding elements and structures.

[0009] Figure 1 A vertical cross-section of a SiC semiconductor device according to an exemplary form is shown, the SiC semiconductor device having a Schottky contact and two shielding regions.

[0010] Figure 2A and Figure 2B A horizontal cross-section and a vertical cross-section through a semiconductor device according to an exemplary form are shown, the semiconductor device having a Schottky contact and a shielding region constructed between transistor cells.

[0011] Figure 3 A vertical cross-section through a SiC semiconductor device according to an exemplary form is shown, the SiC semiconductor device having a transistor cell with a single-sided channel.

[0012] Figures 4A to 4EShows a vertical cross-section through a SiC semiconductor device according to other embodiments, the SiC semiconductor device having a Schottky contact and a transistor cell, the transistor cell having a single-sided channel.

[0013] Figures 5A to 5B Shows a vertical cross-section through a SiC semiconductor device having a Schottky contact according to an embodiment, the SiC semiconductor device having a transistor cell, the transistor cell having a single-sided channel.

[0014] Figure 6 Shows a vertical cross-section through a SiC semiconductor device according to an embodiment, the SiC semiconductor device having a transistor cell with a single-sided channel and a deep contact structure.

[0015] Figure 7 Shows a vertical cross-section through a SiC semiconductor device according to an embodiment, the SiC semiconductor device having a diode region between a shielding region and a body region.

[0016] Figures 8A to 8C Shows a vertical cross-section through a silicon carbide substrate for showing a method for manufacturing a SiC semiconductor device according to an embodiment, the silicon carbide substrate having a downwardly widened diode region for a Schottky contact.

[0017] Figures 9A to 9C Shows a vertical cross-section through a silicon carbide substrate for showing a method for manufacturing a SiC semiconductor device according to another embodiment, the silicon carbide substrate having a downwardly widened diode region for a Schottky contact. Detailed Description

[0018] In the following detailed description, reference is made to the accompanying drawings, which form a part of the present disclosure, and in which specific embodiments of a SiC semiconductor device are shown for purposes of illustration. It is understood that there are other embodiments. It is also understood that structural and / or logical changes may be made to these embodiments without departing from the scope defined by the claims. The description of the embodiments is thus non-limiting. In particular, unless otherwise indicated from the context, the features of the embodiments described below may be combined with the features of other embodiments described in the embodiments described.

[0019] The terms "having", "comprising", "including", "owning" and similar terms are open terms and indicate the existence of a fixed structure, element or feature, but do not exclude the existence of additional elements or features. Unless otherwise clearly indicated from the context, indefinite and definite articles shall include not only the plural but also the singular.

[0020] The expression "electrically connected" describes a low-ohmic connection between electrically connected components, such as direct contact between the relevant components or a connection via metal and / or highly doped semiconductors. The expression "electrically coupled" includes that one or more components suitable for current passage (Stromdurchlass) can be present between the "electrically coupled" components, such as the following components, which can be controlled such that they can establish a low-ohmic connection in a first state and a high-ohmic decoupling in a second state.

[0021] The drawings illustrate the relative doping concentrations by the symbols "-" or "+" next to the doping type "n" or "p". For example, "n-" indicates a doping concentration lower than that of the "n" doped region, while in the "n+" doped region, the doping concentration is higher than that in the "n" doped region. Doped regions with the same relative doping concentration do not necessarily have the same absolute doping concentration. For example, two different "n" doped regions can have the same doping concentration or different absolute doping concentrations. As long as no other indication is obtained from the context, the term "doping material concentration" indicates the net doping material concentration.

[0022] If a value range of data with one or two boundary values is defined for a physical variable, the prepositions "from" and "up to" or "less than" and "more than" include the corresponding boundary values together. Descriptions of the "from... up to" type are thus understood as "from at least... up to at most". Correspondingly, descriptions of the "less than..." ("more than...") type are understood as "at most..." ("at least...").

[0023] The elements whose atoms enter into a chemical compound or alloy form the main constituents of a layer or structure composed of that chemical compound or alloy. For example, nickel and silicon are the main constituents of a nickel silicide layer, and copper and aluminum are the main constituents of a copper-aluminum alloy. The following elements are the main constituents of a layer or structure composed of a material mixture: these elements are present in the material mixture in a defined ratio to each other. For example, the elements contained in a target for co-sputtering are the main constituents of a layer deposited by co-sputtering (Co-Sputtering). In addition to the main constituents, these layers or structures can have impurities caused by manufacturing.

[0024] Embodiments of the present disclosure relate to a semiconductor device having a gate structure. The gate structure extends from a first surface into the SiC semiconductor body. A body region in the SiC semiconductor body is adjacent to a first sidewall of the gate structure. The semiconductor device has a first shielding region and a second shielding region having a conductivity type of the conductivity type of the body region, wherein the first shielding region and the second shielding region are highly doped at least twice as high as the body region. Between the first shielding region and the second shielding region, a diode region forms a Schottky contact with a load electrode.

[0025] In some embodiments, the first shielding region and the second shielding region may have different sizing, such as for example having different vertical extents and / or different lateral extents. In further embodiments, the first shielding region and the second shielding region may have the same lateral and vertical extents within the manufacturing tolerances.

[0026] Generally, the first shielding region and the second shielding region may have different doping material concentrations and / or different lateral and / or vertical doping material concentration profiles. However, it is also possible that the first shielding region and the second shielding region have the same doping material concentration and / or lateral and / or vertical doping material concentration profiles within the manufacturing tolerances.

[0027] The gate structure may have a gate electrode and is part of a transistor cell, wherein the voltage difference between the gate electrode and the body region controls an inversion channel in the body region. The inversion channel is formed by minority carriers that are enriched along the gate structure in the body region. Electrically, the Schottky contact is in parallel with the following body diode: the body diode is formed via a pn junction between on the one hand a drift structure and on the other hand the body region and / or the shielding region. Due to the lower turn-on voltage of the Schottky contact, in the reverse-biased state of the semiconductor element and in the case of the inversion channel being turned off, the vast majority of the reverse current flows via the Schottky contact. The bipolar current through the body diode and the degradation of the SiC crystal caused by this bipolar current can be avoided as much as possible.

[0028] In an external Schottky diode electrically connected in parallel with the semiconductor device, line inductance may cause a response delay of the Schottky diode and thus during each switching process, a bipolar current flow through the body diode sufficient to trigger bipolar degradation may occur for a short period of time. The intrinsic Schottky contact reliably responds before the body diode in the case of the inversion channel being turned off.

[0029] The relatively highly doped shielding regions can reduce the electric field effective at the Schottky contact and thus reduce the leakage current flowing through the Schottky contact in the forward-biased state. For this purpose, the first shielding region and the second shielding region may be directly adjacent to the diode region respectively and form a pn junction with the diode region.

[0030] The distance between the lower edge of the first shielding region and / or the second shielding region from the first surface can be greater than the vertical extension of the gate structure, whereby the shielding effect of the shielding region can be greater than the shielding effect achievable through the body region, which can be doped significantly more weakly than the shielding region.

[0031] Between the first surface and the body region, the source region can be adjacent to at least the first sidewall of the gate structure, whereby, when the gate electrode formed in the gate structure is appropriately controlled, an inversion channel can be formed at least along the first sidewall of the gate structure.

[0032] A semiconductor device having a plurality of like transistor cells electrically connected in parallel has a plurality of gate structures and body regions, wherein each body region can be adjacent to the first sidewall of the gate structure respectively. The first shielding region can be adjacent to one of the body regions on the side opposite to the diode region, and the second shielding region can be adjacent to the other body region on the side opposite to the diode region, such that the body region above the shielding region can be connected to the first load electrode on the front side of the semiconductor device via an ohmic junction, in particular via a low-ohmic junction.

[0033] The first shielding region and the second shielding region can be adjacent to the following contact structures respectively on the sides opposite to the diode region: the contact structures extend from the first surface into the SiC semiconductor body and enable a low-ohmic coupling of the shielding region and the body region.

[0034] The first shielding region can be adjacent to the second sidewall of the gate structure respectively and contributes to shielding the gate structure.

[0035] To improve the shielding effect, the first shielding region can have a local doping material maximum in a first sub-segment between the second surface of the SiC semiconductor body opposite to the first surface and the gate structure.

[0036] The first sidewall of the gate structure can run parallel to the first main lattice plane and / or be inclined relative to the first main lattice plane in the SiC semiconductor body by a maximum of 2°, such that an inversion channel can be formed in the lattice plane with high carrier mobility in the SiC semiconductor body for the transistor cell, in which the (0001) lattice plane is inclined by a typical angular deviation α (English: off-axis angle) of 4° relative to the surfaces on the front and back sides of the SiC semiconductor body.

[0037] A semiconductor device having a plurality of like transistor cells connected in parallel has a corresponding number of gate structures. Between adjacent gate structures, the SiC semiconductor body can, on the one hand, form a first mesa without a diode region, and on the other hand, form a second mesa with a diode region. The body region of the transistor cell can be formed in the first mesa. The first shielding region can adjoin only the diode region, while the second shielding region can adjoin the diode region and the body region.

[0038] The first load electrode can have a first sublayer and a main layer, wherein at least one first segment of the first sublayer adjoins the diode region, and the main layer adjoins the first sublayer. The first sublayer can enable not only a Schottky contact with a low barrier height and a low turn-on voltage (threshold voltage), but also a low-ohmic contact with p-doped and n-doped regions in the SiC semiconductor body.

[0039] Alternatively or additionally, the first load electrode can have a structured sublayer that adjoins at least one of the source region and / or the shielding region, such that the characteristics of the Schottky contact and the ohmic contact of the doped region can be decoupled.

[0040] An intermediate layer dielectric can be formed between the first surface and the first load electrode, which separates the first load electrode from the gate structure. The first load electrode can have a Schottky contact structure that extends in the vertical direction through the diode region through an opening in the intermediate layer dielectric from the first load electrode at least up to the diode region, such that the Schottky contact is directly connected and connected with a small parasitic inductance.

[0041] The Schottky contact structure can adjoin the diode region directly and adjoin each of two shielding regions, and a pn junction is formed between the diode region and the shielding regions respectively.

[0042] The diode region can have a lower sub-region and an upper sub-region between the lower sub-region and the first surface, wherein the second average width of the lower sub-region is greater than the first average width of the upper sub-region. For example, the second average width of the lower sub-region corresponds to at least 120% (or at least 130% or at least 150% or at least 180%) of the first average width of the upper sub-region. The vertical extension of the lower sub-region can be at least 50 nm or at least 100 nm here. Widening towards the drift region through the diode region can indirectly increase the following voltage, from which the reverse current flows through the body diode increasing. Thus, it can be achieved that the reverse current up to a current intensity only higher than the unipolar current is discharged via the Schottky contact SC, such that bipolar degradation can be suppressed to a greater extent.

[0043] Figure 1 Shown is a semiconductor device 500, which can be, for example, an IGFET (insulated-gate field-effect transistor), such as a MOSFET (metal-oxide-semiconductor FET), where the abbreviation "MOSFET" represents not only an FET with a metal gate electrode but also an FET with a semiconductor gate electrode. The semiconductor device 500 can also be an IGBT (insulated-gate bipolar transistor) or an MCD (MOS-controlled diode).

[0044] The semiconductor device 500 is based on a SiC semiconductor body 100 formed using silicon carbide. For example, the SiC semiconductor body 100 has a silicon carbide crystal or is made of a silicon carbide crystal, where the silicon carbide crystal can have dopant atoms and / or impurities in addition to the main components "silicon" and "carbon", such as having hydrogen atoms and / or oxygen atoms. The polytype of the silicon carbide crystal can be, for example, 2H, 6H, 15R, or 4H.

[0045] The first surface 101 on the front side of the SiC semiconductor body 100 is flat or wrinkled. The normal 104 on the flat first surface 101 or on the middle plane of the wrinkled first surface 101 defines the vertical direction. The direction parallel to the flat first surface 101 or parallel to the middle plane of the wrinkled first surface 101 is the horizontal and lateral direction.

[0046] The semiconductor device 500 has a transistor cell TC, which has a gate structure 150 that extends from the first surface 101 on the front side of the SiC semiconductor body 100 into the SiC semiconductor body 100. A conductive gate electrode 155 is constructed in the gate structure 150, and the gate electrode 155 is electrically insulated from the SiC semiconductor body 100. A body region 120 constructed in the SiC semiconductor body 100 is adjacent to the first sidewall 151 of the gate structure 150. The gate dielectric 159 separates at least the body region 120 from the gate electrode 155.

[0047] The body region 120 forms a first pn junction pn1 with a drift structure 130 and a second pn junction pn2 with a source region 110. The source region 110 is constructed between the body region 120 and the first surface 101. The body region 120 separates the source region 110 from the drift structure 130. The drift structure 130 is constructed between the second surface 102 of the SiC semiconductor body 100 opposite the first surface 101 and the body region 120.

[0048] The body region 120 and the source region 110 can be electrically connected to a first load electrode 310. The first load electrode 310 can construct the source terminal S of the semiconductor device 500, or be electrically connected or coupled to the source terminal S.

[0049] The drift structure 130 includes at least one drift region 131, wherein in the off state, most of the electric field effective in the SiC semiconductor body 100 is eliminated within the drift region 131. The doping and vertical extension of the drift region 131 are designed according to the nominal off-capability of the semiconductor device 500. The average doping in the drift region 131 is related to the nominal off-capability and can be in the range from 5x10 15 cm -3 to 5x10 16 cm -3 for a semiconductor device 500 having a nominal breakdown voltage of 400V, especially between 1200V and 10kV. The vertical extension of the drift region 131 can be in the range from 3μm to 13μm for a semiconductor device 500 having a nominal breakdown voltage of 400V, especially 1200V, and an average doping of approximately 1x10 16 cm -3 .

[0050] The drift structure 130 can have a strongly doped base region 139 which directly adjoins the second surface 102. The base region 139 can directly adjoin the drift region 131. Alternatively, between the drift region 131 and the strongly doped base region 139, the drift structure 130 can have other doped regions of the same conductivity type as the drift region 131, wherein the maximum doping material concentration in the other doped regions can be higher than the maximum doping material concentration in the drift region 131 and lower than the maximum doping material concentration in the base region 139. Alternatively or additionally, between the first surface 101 and the drift region 131, the drift structure 130 can have other doped regions of the same conductivity type as the drift region 131, such as current distribution regions (Stromverteilungsgebiete), which are more highly doped than the drift region 131 and expand the carrier flow in the lateral direction in the on state for passing through the drift region 131, and / or the drift structure 130 can have a barrier region of the same conductivity type as the drift region 131, which affects (e.g., reduces) the emitter efficiency of the body region 120 or the emitter efficiency of another doped region of the same conductivity type as the body region 120.

[0051] The drift structure 130 is electrically connected to the second load electrode 320. The second load electrode 320 can form the drain terminal D of the semiconductor device 500, or can be electrically connected or coupled to the drain terminal D.

[0052] A gate dielectric 159 is formed between the gate electrode 155 and the body region 120, which separates the gate electrode 155 from the body region 120. The gate dielectric 159 can also insulate the gate electrode 155 from other regions in the SiC semiconductor body 100. According to one embodiment, the gate dielectric 159 can completely insulate the gate electrode 155 from the SiC semiconductor body 100. According to other embodiments, the gate structure 150 can have other dielectric structures, wherein the other dielectric structures can have a higher layer thickness than the gate dielectric 159, can have a different material composition than the gate dielectric 159 and / or can have at least one other dielectric material.

[0053] At least one first shielding region 161 and a second shielding region 162 are formed in the SiC semiconductor body 100, each of which has the conductivity type of the body region 120. The maximum dopant concentration in the first shielding region 161 and the second shielding region 162 is at least twice as high as the maximum dopant concentration in the body region 120.

[0054] A diode region 140 is constructed between the first shielding region 161 and the second shielding region 162, and the diode region 140 can be directly adjacent to the two shielding regions 161, 162, and can form a vertical pn junction pn0 with the two shielding regions 161, 162, respectively. The first shielding region 161 is here on the side of the diode region 140 facing the gate structure 150, while the second shielding region 162 is on the side of the diode region 140 facing away from the gate structure 150. The maximum width of the first shielding region 161 can be substantially equal to the maximum width of the second shielding region 162 (that is, within the scope of manufacturing tolerances). The maximum vertical extension of the first shielding region 161 can be substantially equal to the maximum vertical extension of the second shielding region 162. The first shielding region 161 and the second shielding region 162 can have lateral and vertical doping material concentration distributions that are as identical as possible.

[0055] The diode region 140 forms a Schottky contact SC with the first load electrode 310, wherein the Schottky contact SC is formed between the first shielding region 161 and the second shielding region 162. The diode region 140 may directly adjoin the drift structure 130, for example, adjoin the drift region 131. The doping material concentration in the diode region 140 may correspond to the doping material concentration in the drift region 131, or be higher than the doping material concentration in the drift region 131. According to one embodiment, the average doping material concentration in the diode region 140 is at least twice the average doping material concentration in the drift region 131. The Schottky contact SC may be formed along the first surface 101 and / or in a trench extending from the first surface 101 into the SiC semiconductor body 100.

[0056] The following description relates to a semiconductor device having an n-channel transistor cell TC. Corresponding content applies to a semiconductor device having a p-channel transistor cell. A sufficiently high voltage on the gate electrode 155 turns on the transistor cell TC. An inversion channel is formed in the body region 120 by field effect along the gate dielectric 159. The inversion channel forms a coherent path for the electrodes from the source region 110 to the drift structure 130 and enables load current flow through the body region 120.

[0057] A voltage drop on the gate electrode 155 below the threshold voltage turns off the transistor cell TC and turns off the semiconductor device 500. The potentials of the first shielding region 161 and the second shielding region 162 correspond to the potential of the first load electrode 310, such that the first shielding region 161 and the second shielding region 162 shield the potential of the Schottky contact SC relative to the second load electrode 320. In addition, the first shielding region 161 and the second shielding region 162 can pin voltage breakdown in the region of the horizontal pn junction pn3 between the shielding regions 161, 162 and the drift structure 130.

[0058] In the reverse-biased state of the semiconductor device 500, the first pn junction pn1 is polarized in the forward direction, such that as long as the voltage drop above the first pn junction pn1 exceeds the turn-on voltage of the body diode formed through the first pn junction pn1, a reverse current can flow between the second load electrode 320 and the first load electrode 310 via the first pn junction pn1 and the body region 120.

[0059] The current through the first pn junction pn1 is a bipolar carrier flow composed of holes and electrons. In the vicinity of the pn junction and in regions with a high doping material concentration change, enhanced recombination of holes and electrons occurs. The energy released here promotes the growth of crystalline defects, which increasingly damage the SiC crystal. For example, dislocations between lattice planes (basal plane dislocations, BPDs) can transform into stacking faults, which in 4H polytype silicon carbide particularly extend along the <0001> lattice plane and thus mostly transversely to the main current flow direction in the drift structure 130 and increasingly impede the current flow between the second load electrode 320 and the first load electrode 310.

[0060] Since the Schottky contact SC has a lower barrier height and a lower forward voltage compared to the first pn junction pn1, the Schottky contact SC responds before the body diode, such that in the semiconductor device 500 in a reverse-biased state and with the inversion channel of the transistor cell TC turned off, most of the current first flows through the Schottky contact SC. For example, the turn-on voltage of the body diode can be at least 2.7 V at 25 °C. The current flow through the turned-on transistor cell TC is unipolar and includes only a single type of carrier, such that no significant recombination occurs in the drift structure 130 even in the turned-on state of the transistor cell TC. No recombination of carriers occurs on a scale that could lead to a significant increase in stacking faults, either in the case where the inversion channel is turned on or in the case where the inversion channel is turned off.

[0061] As the current through the Schottky contact SC increases, the voltage drop across the Schottky contact SC increases. The characteristics of the Schottky contact SC can be sized such that: during operation of the semiconductor device 500, within the absolute maximum ratings, the voltage drop across the Schottky contact SC always remains less than the turn-on voltage of the intrinsic body diode.

[0062] Although in common applications, such as in a bridge circuit or in the rectifier stage of a low-voltage DC / DC converter, for the reverse-conducting state the transistor channel is usually opened by applying a suitable gate voltage, such that the current flows through the first pn junction pn1 only for a relatively short time. However, the transistor channel is turned on only after a certain minimum waiting time (i.e., Totzeit, dead time in English), in order to avoid, for example, a short circuit through simultaneously turned-on low-side and high-side switches in a bridge circuit. In applications with a long dead time or a high switching frequency, the short-time current flow through the first pn junction pn1 can thus contribute significantly to the switching losses.

[0063] Due to the lower turn-on voltage of the Schottky contact SC compared to the turn-on voltage of the bipolar diode formed through the first pn junction pn1 and the low forward voltage of this Schottky contact SC, in the semiconductor device 500, most of the reverse current flows through the Schottky contact SC, and less loss is generated there. In addition, the current flow through the Schottky contact SC is a unipolar carrier flow, and this unipolar carrier flow does not contribute to bipolar degradation.

[0064] The relatively highly doped first shielding region 161 and second shielding region 162 shield the Schottky contact SC from a relatively high electric field, and in this way reduce the leakage current passing through the Schottky contact SC. In addition, the first shielding region 161 and second shielding region 162 improve the surge current capability of the Schottky SC.

[0065] According to an embodiment, the distance v3 of the lower edges of the first shielding region 161 and second shielding region 162 from the first surface 101 is greater than the vertical extent v1 of the gate structure 150, and thus greater than the distance of the lower edge of the body region 120 from the first surface 101. The relatively large vertical extent of the first shielding region 161 and second shielding region 162 and the large distance between, on the one hand, the lower edges of the first shielding region 161 and second shielding region 162 and, on the other hand, the Schottky contact SC can improve the shielding effect.

[0066] According to an embodiment, the first shielding region 161 can be adjacent to the second sidewall 152 of the gate structure 150, such that the shielding effect of the first shielding region 161 acts not only on the Schottky contact SC but also on the lower edge of the gate structure 150.

[0067] Figure 2A and Figure 2B A semiconductor device 500 having a plurality of gate structures 150 is shown, the gate structures 150 having a horizontal longitudinal extent orthogonal to a horizontal first direction 191. The gate structures 150 can be configured as straight strips. The portions of the gate structures 150 can be arranged relative to one another with the same first center-to-center pitch pt1. The section of the SiC semiconductor body 100 between two adjacent gate structures 150 spaced apart by the first center-to-center pitch pt1 can be configured as a strip-shaped first mesa 181, in which the body region 120 of the transistor cell TC can be configured, wherein an inversion channel is formed in the body region 120 in the on-state of the semiconductor device 500.

[0068] The section of the SiC semiconductor body 100 between two adjacent gate structures 150 spaced apart by a second center-to-center pitch pt2 can be configured as a strip-shaped second mesa 182, in which one or more parallel strip-shaped diode regions 140 can be respectively configured. Between two adjacent gate structures 150 arranged with the second center-to-center pitch pt2, the diode regions 140 respectively form Schottky contacts SC with the first load electrode 310.

[0069] Between two adjacent gate structures 150 arranged at a second center-to-center spacing pt2, a first shielding region 161, a second shielding region 162, and other shielding regions may also be constructed, and these shielding regions respectively form vertical pn junctions pn0 with the diode region 140. The second center-to-center spacing pt2 may be greater than the first center-to-center spacing pt1. For example, the first center-to-center spacing pt1 is at least 40% and at most 60% of the second center-to-center spacing pt2.

[0070] According to an embodiment, the second center-to-center spacing pt2 is an integer multiple of the first center-to-center spacing pt1, such that the layout of the Schottky contacts SC can be obtained from a regular pattern by simply covering each gate structure 150, source region 110, and body region 120. If pt2 is greater than twice pt1, more than one diode region 140 may be constructed in the second mesa 182 along the horizontal first direction.

[0071] The third center-to-center spacing pt3 between adjacent diode regions 140 may also be an integer multiple of the first center-to-center spacing pt1. For example, pt3 ≥ 3xpt1, such that at least three gate structures 150 are constructed between two adjacent diode regions 140. The third center-to-center spacing pt3 may vary on the SiC semiconductor body 100, for example, increasing or decreasing towards the center of the SiC semiconductor body 100.

[0072] For example, within the transistor cell region (Transistorzellenfeld), the area share of the diode region 140 on the first surface 101 may be at least 15% and at most 50%, such that even in the case of the maximum allowable reverse current for the semiconductor device 500, the voltage drop above the Schottky contact SC is reliably maintained below the turn-on voltage of the body diode.

[0073] The transistor cell TC may be a transistor cell with a single-sided inversion channel or a transistor cell with a double-sided inversion channel. According to the shown embodiment, the body region 120 is directly adjacent to the opposing first sidewall and second sidewall of the gate structure 150.

[0074] In Figure 3In [the semiconductor device 500], the semiconductor device 500 is based on a SiC semiconductor body 100 having a silicon carbide crystal of 4H polytype. <0001>The lattice direction may be inclined at an angular deviation α between 2° and 8° relative to the normal 104. <11-20>The lattice direction is inclined at an angular deviation α relative to the first surface 101 and runs parallel to the transverse plane. <1-100>The lattice direction runs orthogonally to the transverse plane and to the horizontal first direction 191. The first sidewall 151 of the gate structure 150 runs parallel to the (11-20) lattice plane having high carrier mobility, and / or has an orientation deviation of at most 2° from the (11-20) lattice plane. The second sidewall 152 opposite the first sidewall 151 may have an orientation deviation twice the angular deviation α from the (11-20) lattice plane, and / or may have an orientation deviation of at most 2° from twice the angular deviation α of the (11-20) lattice plane.

[0075] The section of the SiC semiconductor body 100 between the gate structures 150 forms a first mesa 181 and a second mesa 182. In the first mesa 181 and in the second mesa 182, a body region 120 may be constructed, and the body region 120 is adjacent to the first sidewall 151 of the first adjacent gate structure 150 respectively. In addition, the first mesa 181 may respectively have other shielding regions 165, and the other shielding regions 165 are adjacent to the second sidewall 152 of the second adjacent gate structure 150. The body region 120 may be spaced apart from the second adjacent gate structure 150 by means of the other shielding regions 165, for example, within the same second mesa 181.

[0076] A first shielding region 161 and a second shielding region 162 are respectively constructed in the second mesa 182. The first shielding region 161 is adjacent to the second sidewall 152 of the second adjacent gate structure 150. The second shielding region 162 may be spaced apart from the first adjacent gate structure 150. For example, the second shielding region 162 may be adjacent to the body region 120 and adjacent to the source region 110 in the same second mesa 182.

[0077] The first shielding region 161, the second shielding region 162, and the other shielding regions 165 may have substantially the same maximum width and / or the same maximum vertical extent and / or as nearly as possible the same lateral and vertical doping material concentration distributions.

[0078] A diode region 140 may be constructed between the first shielding region 161 and the second shielding region 162. The diode region 140 may form a pn junction pn0 with the first shielding region 161 and the second shielding region 162, and form a Schottky contact SC with the first load electrode 310.

[0079] Figure 4AAn embodiment is shown, according to which a second center-to-center spacing pt2 between two gate structures 150 on opposite sides of the diode region 140 is twice a first center-to-center spacing pt1 on both sides of the first mesa 181. Transistor cells TC are respectively constructed in the first mesa 181.

[0080] The interlayer dielectric 210 separates the first load electrode 310 from the gate electrode 155 in the gate structure 150. The first load electrode 310 may include a Schottky contact structure 319 that extends vertically through the interlayer dielectric directly from the load electrode 310 to the diode region 140. The Schottky contact structure 319 may also be directly adjacent to the first and second shielding regions 161, 162 and form an ohmic junction with the first shielding region 161 and the second shielding region 162.

[0081] In Figure 4B it, the diode region 140 is highly doped at least twice as high as the drift region 131. A current distribution region 137 may be constructed between the body region 120 and the drift region 131, which is directly adjacent to the first sidewall 151 of the gate structure 150 and causes the load current to expand laterally towards the drift region 131 in the on-state of the semiconductor device 500. The current distribution region 137 has a higher doping material concentration than the drift region 131.

[0082] The current distribution region 137 may respectively extend from the adjacent shielding regions 161, 162, 165 to the other adjacent shielding regions 161, 162, 165. The spacing of the lower edge of the current distribution region 137 from the first surface 101 may be less than, equal to or greater than the spacing of the lower edges of the shielding regions 161, 162, 165 from the first surface 101.

[0083] According to an embodiment, the diode region 140 and the current distribution region 137 may have the same doping material concentration and the same vertical doping material concentration profile. For example, the diode region 140 and the current distribution region 137 may be obtained by the same manufacturing process, such as by n-doped epitaxy or by implanting doping atoms in the same implantation process.

[0084] The first shielding region 161, the second shielding region 162, and the other shielding regions 165 may each have a sub-region 169, which has a greater spacing from the first surface 101 than the lower edge of the gate structure 150. In the sub-region 169, the vertical doping material concentration distributions in the first shielding region 161, the second shielding region 162, and the other shielding regions 165 may each have a local maximum. The vertical doping material concentration distributions in the first shielding region 161, the second shielding region 162, and the other shielding regions 165 may have an absolute or global maximum in the section between the lower edge of the gate structure 150 and the first surface 101.

[0085] The first load electrode 310 may have a first sub-layer 311, which may be directly adjacent to the first surface 101 in the regions of the first mesa 181 and the second mesa 182. The first sub-layer 311 may have or be made of a material that, on the one hand, has a work function suitable for a Schottky contact SC and, on the other hand, forms a reliable low-ohmic contact not only with the p-doped regions in silicon carbide but also with the n-doped regions in silicon carbide. For example, the first sub-layer 311 has nickel aluminide (NiAl) and / or doped polysilicon or is made of NiAl, doped polysilicon, or both. In addition, the first load electrode 310 may have a main layer 315, which is made of, for example, copper, an alloy composed of copper and aluminum, an alloy composed of aluminum and silicon, or an alloy composed of aluminum, copper, and silicon.

[0086] In Figure 4C it, the first load electrode 310 has a structured second sub-layer 312, which is directly adjacent to the first surface 101 in the region of the first mesa 181 and may be adjacent to the first surface 101 selectively in the regions of the first shielding region 161, the second shielding region 162, and the source region 110 in the region of the second mesa 182, and there is no such second sub-layer 312 above at least one section of the diode region 140. The second sub-layer 312 may be constructed of or made of a material that forms a reliable ohmic contact, especially a low-ohmic contact, not only with the p-doped regions in silicon carbide but also with the n-doped regions in silicon carbide. For example, the second sub-layer 312 has NiAl or is made of NiAl.

[0087] The first sub-layer 311 is directly adjacent to the first surface 101 in the region of the diode region 140 and may be spaced apart from the first surface 101 via the second sub-layer 312 in other cases. The first sub-layer 311 may have a material with a work function suitable for silicon carbide, such as having a basic transition metal or transition metal nitride, such as Ti, TiN or MoN or made therefrom. Since the second sub-layer 312 may be deposited, activated and structured before the first sub-layer 311 is deposited, the structure of the first sub-layer 311 may remain unaffected by the second sub-layer 312.

[0088] The first surface 101 of the SiC semiconductor body 100 may be flat and planar in the regions of the first mesa 181 and the second mesa 182, as shown in Figures 4A - 4C As shown. Other embodiments may provide other trench structures that extend into the SiC semiconductor body 100 in addition to the gate structure 150 in the first mesa 181 and / or the second mesa 182. The other trench structures do not have a conductive structure directly connected to the gate electrode 155. For example, the other trench structures do not have a conductive structure, or only have a conductive structure that has no other electrical terminals (English: floating), is connected to the first load electrode 310, is connected to an auxiliary terminal of the semiconductor device, and / or is connected to an internal network node of the semiconductor device.

[0089] In Figure 4D In, between the diode region 140 and the second shielding region 162, the auxiliary trench structure 190 extends from the first surface 101 into the second mesa 182. The auxiliary trench structure 190 may have a conductive auxiliary material 195 and an auxiliary dielectric 199, where the auxiliary dielectric 199 separates the auxiliary material 195 from the SiC semiconductor body 100.

[0090] The auxiliary trench structure 190 may have the same dimensions as the gate structure 150 or may be different from the gate structure 150 in at least one dimension (such as in depth, horizontal width or horizontal longitudinal extent). The auxiliary dielectric 199 may have one or more of the same materials as the gate dielectric 159, the same structural configuration as the gate dielectric 159, and the same layer thickness as the gate dielectric 159, or may be different from the gate dielectric 159 in at least one structural feature. The auxiliary material 195 may have one or more of the same materials as the gate electrode 155.

[0091] The auxiliary material 195 can be electrically separated from the gate electrode 155. For example, the auxiliary material 195 is electrically connected to the first load electrode 310 in the case of a non-electrical terminal. Starting from a similar device without a Schottky contact, the semiconductor device 500 can be constructed with only a slight change to the implantation mask for the source region 110 and the body region 120 and only a slight change to the etching mask for making contact with the gate electrode 155 and the auxiliary material 195. Figure 4D of the semiconductor device 500.

[0092] Figure 4E The semiconductor device 500 is shown, which has a gate structure 150, a drift structure 130 with a drift region 131, a current distribution region 137, a first shielding region 161, a second shielding region 162, and other shielding regions 165, and transistor cells TC, as described above with reference to Figures 4A - 4C as described in. The diode region 140 between the first shielding region 161 and the second shielding region 162 is at least twice as highly doped as the drift region 131. The lower section of the diode region 140 has the same spacing from the first surface 101 as the current distribution region 137 from the first surface, and may have a similar or the same vertical doping material concentration profile as the current distribution region 137. The spacing of the lower edge of the current distribution region 137 from the first surface 101 can be less than, equal to, or greater than the spacing of the lower edges of the first, second, and other shielding regions 161, 162, 165 from the first surface 101.

[0093] The first shielding region 161, the second shielding region 162, and the other shielding regions 165 each have a sub-region 169, and a main region 167 between the first surface 101 and the sub-region 169. In the sub-region 169, the vertical doping material concentration profiles in the first shielding region 161, the second shielding region 162, and the other shielding regions 165 can each have a local maximum.

[0094] The sub-regions 169 of the other shielding regions 165 can each protrude laterally beyond the outer edge of the main region 167 of the other shielding regions 165. However, it is also possible that the sub-regions 169 of the other shielding regions 165 end flush with the outer edge of the main region 167 of the other shielding regions 165 within the manufacturing tolerances.

[0095] The sub-region 169 of the first shielding region 161 can be retracted from the lateral edge between the main region 167 of the first shielding region 161 and the diode region 140. The sub-region 169 of the second shielding region 162 can be retracted from the lateral edge of the main region 167 of the second shielding region 162 towards the diode region 140. However, it is also possible that the sub-region 169 of the first shielding region 161 and / or the sub-region of the second shielding region 162 end flush with the outer edge of the main region 167 of the first shielding region 161 or the second shielding region 162 within the manufacturing tolerances.

[0096] The illustration of the transition between the first shielding region 161, the second shielding region 162, and other shielding regions 165 and an adjacent doped region (e.g., to the diode region 140) is strongly simplified in the drawings. In reality, the transition neither runs along a flat surface nor strictly orthogonally. Rather, the transition is wavy and the actually drawn jumps with corners (Einsprung) are curved. Such a wavy course can cause the manufacturing tolerances mentioned above.

[0097] The diode region 140 has a lower sub-region 148 and an upper sub-region 142, where the upper sub-region 142 can extend from the first surface 101 up to the lower sub-region 148. The upper sub-region 142 of the diode region 140 is laterally constructed between the main regions 167 of two adjacent first and second shielding regions 161, 162 and has a first average width w1. The lower sub-region 148 is constructed between the sub-regions 169 of two adjacent first and second shielding regions 161, 162 and has a second average width w2. The second average width w2 can be at least 120% of the first average width w1. In some embodiments, the first average width w1 and the second average width w2 can be the same. The vertical extent v4 of the lower sub-region 148 is at least 50 nm, for example at least 100 nm.

[0098] The lateral width of the horizontal section of the pn junction pn3 between the first shielding region 161 and the second shielding region 162 on the one hand and a section of the drift structure 130 (in particular the low-doped drift region 131) on the other hand is significantly reduced. A larger part of the pn junction between the first shielding region 161 and the second shielding region 162 on the one hand and the Schottky contact SC on the other hand is the pn junction to the diode region 140, which is more highly doped than the drift region 131.

[0099] Due to the higher conductivity of the diode region 140 along the pn junction between the first shielding region 161 and the second shielding region 162 on the one hand and the diode region 140 on the other hand, the voltage drop along the pn junction can be reduced for a given current passing through the Schottky contact SC. Thereby, the following voltage can be shifted: from this voltage, the body region carries the reverse current. The reverse current can be discharged via the Schottky contact SC up to a current intensity that is only or approximately only higher than the unipolar current, such that the bipolar degradation mechanism can be suppressed as much as possible.

[0100] The lateral extent of the lower sub-region 148 can be adjusted, for example, by varying the width of the openings in the implantation mask to construct sub-regions 169 of the first shielding region 161, the second shielding region 162, and the other shielding regions 165. By further changing the implantation mask to construct the main regions 167 of the first shielding region 161, the second shielding region 162, and the other shielding regions 165, the first average width w1 can also be reduced such that in the upper sub-region 142, the shielding effect of the first shielding region 161 and the second shielding region 162 on the Schottky contact SC can be further improved. The second center-to-center spacing pt2 between the two gate structures 150 on the opposite sides of the Schottky contact SC can be kept constant here. The area of the contact region along the first surface 101 and thus the contact resistance to the first shielding region 161, the second shielding region 162, the other shielding regions 165, and the source region 110 can be kept unaffected.

[0101] Figure 5A A semiconductor device 500 is involved, which has a diode region 140 of a first conductivity type in a SiC semiconductor body 100, where the diode region 140 forms a Schottky contact SC with a load electrode 310 respectively. Along a horizontal first direction, at least one gate structure 150 can be constructed between two adjacent diode regions 140 respectively. The gate structure 150 extends from a first surface 101 into the SiC semiconductor body 100. At least one first sidewall 151 of the gate structure 150 is adjacent to a body region 120 of a second conductivity type, and the body region 120 is electrically connected to the load electrode 310.

[0102] The gate structure 150 can be constructed in a trench having an approximately V-shaped vertical cross-section. The gate electrode 155 can be constructed with an approximately uniform layer thickness along the sidewalls and the bottom of the gate structure 150. The two sidewalls 151, 152 can be constructed parallel to the lattice plane with the same or approximately the same high carrier mobility.

[0103] The section of the SiC semiconductor body 100 between the gate structures 150 forms a first mesa 181 and a second mesa 182. The first mesa 181 can respectively include a body region 120, which can extend from the second sidewall 152 of the first adjacent gate structure 150 to the first sidewall 151 of the second adjacent gate structure 150. The first mesa 181 can respectively have a source region 110 along two adjacent gate structures 150. Between the source regions 110, the body region 120 can have a highly doped body contact region 129, which can extend from the first surface 101 into the body region 120. The first mesa 181 can respectively include two transistor units TC.

[0104] The second mesa 182 may similarly include two transistor cells TC, respectively, which are each adjacent to one of two adjacent gate structures 150. A Schottky contact SC is constructed between the load electrode 310 and the diode region 140 between these two transistor cells TC. In the lateral direction, the diode region 140 may be adjacent to one of the body regions 120 and / or to one of the body contact regions 129, respectively.

[0105] A second center-to-center pitch pt2 between two gate structures 150 on opposite sides of the Schottky contact SC may be an integer multiple of a first center-to-center pitch pt1 between two adjacent gate structures on both sides of the first mesa 181.

[0106] According to Figure 5B , on both sides of the Schottky contact SC, deep first and second shielding regions 161, 162 may extend from the first surface 101 into the SiC semiconductor body 100, wherein a vertical spacing v3 of lower edges of the first and second shielding regions 161, 162 from the first surface 101 may be greater than a vertical extent v1 of the gate structure 150 in the SiC semiconductor body 100.

[0107] According to Figure 6 , first sidewalls 151 and second sidewalls 152 of the gate structure 150 run vertically with respect to the first surface 101. Two transistor cells TC are respectively constructed in the first mesa 181, wherein the trench contact 316 extends from the first load electrode 310 into the first mesa 181 and the second mesa 182.

[0108] The gate structure 150, the trench contact 316, and the first mesa 181 and the second mesa 182 may be strip structures. Alternatively, the gate structure 150 and / or the trench contact 316 may respectively form a grid. Alternatively, the first mesa 181 and the second mesa 182 may be sections of a mesa constructed in a grid pattern.

[0109] A vertical extent v2 of the trench contact 316 may roughly correspond to the vertical extent v1 of the gate structure 150 in the SiC semiconductor body 100.

[0110] The first shielding region 161, the second shielding region 162, and other shielding regions 165 that may exist when necessary may have a highly doped shielding contact region 168 under the trench contact 316. The shielding contact region 168 may be constructed between the main section of the corresponding shielding regions 161, 162, 165 and the trench contact 316. The lateral extent of the first shielding region 161, the second shielding region 162, and other shielding regions 165 that may exist when necessary may be greater than the corresponding lateral extent of the trench contact 316. The shielding regions 161, 162, 165 may extend along the sidewall of the trench contact 316 up to the source region 110, where the source region 110 is spaced apart from the adjacent gate structure 150 through the body region 120.

[0111] In the second mesa 182, two trench contacts 316 may be respectively constructed on both sides of the diode region 140 located therebetween. The first shielding region 161 and the second shielding region 162 may extend along the trench contact 316 up to the first surface 101 and form a vertical pn junction pn0 with the diode region 140.

[0112] According to Figure 7 the embodiment form, the diode region 140 extends from the first surface 101 up to the current distribution region 137 respectively between the shielding region 160 and the body region 120.

[0113] Figures 8A - 8C A method for manufacturing a semiconductor device 500 according to Figure 4E is shown. Here, Figure 4E the SiC semiconductor body 100 of the semiconductor device 500 according to

[0114] forms part of a silicon carbide substrate, for example, forms part of a SiC wafer or an epitaxial layer, and the first surface 101 of the SiC semiconductor body 100 corresponds to the main surface on the front side of the silicon carbide substrate. A first mask material is deposited on the first surface 101 of the SiC semiconductor body 100, and the first mask material is structured through a lithography method, where a first implantation mask 410 having a first opening 415 is obtained from the first mask material. Acceptor atoms are implanted through the opening 415 in the first implantation mask 410 with a high implantation energy.

[0115] Figure 8A The first implantation mask 410 and the sub-region 169 formed by the implanted acceptor atoms are shown. The sub-region 169 is constructed under the first mask opening 415 and is spaced apart from the first surface 101.

[0116] The first implantation mask 410 is removed. A second mask layer is deposited and structured by means of a lithography method. A second implantation mask 420 is obtained from the second mask layer. Other acceptor atoms are implanted through the openings 425 in the second implantation mask 420, wherein the maximum implantation energy is in this case less than the minimum implantation energy during the construction of the sub-region 169.

[0117] Figure 8B The second implantation mask 420 and the main region 167 formed by the implanted acceptor atoms are shown, the main region 167 being constructed between the first surface 101 and the sub-region 169 under the second opening 425. Other implantations into the region of the SiC semiconductor body 100 between the main regions 167 form the source region 110, the body region 120, the current distribution region 137 and the diode region 140. The other implantations can be carried out before or after the construction of the sub-region 169 and / or the main region 167. Gate trenches are constructed, wherein the source region 110, the body region 120 and the current distribution region 137 are constructed on the first sidewall of the gate trench, and wherein the main region 167 and the sub-region 169 are constructed on the second sidewall respectively opposite to the first sidewall.

[0118] Figure 8C A section of the SiC semiconductor device 500 with the diode region 140 and the first shielding region 161, the second shielding region 162 and the other shielding region 165 is shown, as described above in Figure 4E as described.

[0119] Figures 9A - 9C A method is shown in which the implantation mask for constructing the sub-region 169 is obtained from the implantation mask for constructing the main region 167.

[0120] Figure 9A The third implantation mask 430 on the first surface 101 is shown. Through the openings 435 in the third implantation mask 430, acceptor atoms are implanted into the SiC semiconductor body 100.

[0121] Figure 9A The main region 167 of the first shielding region, the second shielding region and the other shielding region formed by the implanted acceptor atoms is shown. By selectively forming a spacer 431 at the section of the third implantation mask 430 above the diode region 140, a fourth implantation mask 440 is formed. Through the openings 445 in the fourth implantation mask 440, acceptor atoms are implanted with an implantation energy that is higher than the maximum implantation energy for constructing the main region 167.

[0122] Figure 9B The sub-region 169 formed by the implanted acceptor atoms is shown, which partially has a lateral width smaller than that of the main region 167.

[0123] Figure 9C The SiC semiconductor body 100 is shown after constructing the gate structure 150, the source region 110, the body region 120, and the current distribution region 137.

Claims

1. A semiconductor device having: a gate structure (150) extending from a first surface (101) into a SiC semiconductor body (100); a body region (120) in the SiC semiconductor body (100), the body region (120) being adjacent to at least a first sidewall (151) of the gate structure (150); a first shielding region (161) and a second shielding region (162) having a conductivity type of the body region (120), wherein the first shielding region (161) and the second shielding region (162) are highly doped at least twice as high as the body region (120); and a diode region (140) forming a Schottky contact (SC) with a load electrode (310) between the first shielding region (161) and the second shielding region (162), wherein the diode region (140) has a lower sub-region (148), and an upper sub-region (142) between the lower sub-region (148) and the first surface (101), wherein a second average width (w2) of the lower sub-region (148) corresponds to at least 120% of a first average width (w1) of the upper sub-region (142).

2. The semiconductor device according to claim 1, wherein the diode region (140) forms pn junctions (pn0) with the first shielding region (161) and with the second shielding region (162) respectively.

3. The semiconductor device according to claim 1 or 2, wherein a spacing (v3) of a lower edge of the first shielding region (161) and / or the second shielding region (162) from the first surface (101) is greater than a vertical extension (v1) of the gate structure (150).

4. The semiconductor device according to claim 1 or 2, further having: a source region (110) between the first surface (101) and the body region (120), wherein the source region (110) is adjacent to at least the first sidewall (151) of the gate structure (150).

5. The semiconductor device according to claim 4, wherein the first shielding region (161) is adjacent to the body region (120) on a side opposite to the diode region (140), and the second shielding region (162) is adjacent to another body region (120).

6. The semiconductor device according to claim 5, wherein the first shielding region (161) and the second shielding region (162) are respectively adjacent to a contact structure (316) on a side opposite to the diode region (140), wherein the contact structure (316) extends from the first surface (101) into the SiC semiconductor body (100).

7. The semiconductor device according to claim 4, wherein the first shielding region (161) is adjacent to a second sidewall (152) of the gate structure (150), and the second shielding region (162) is adjacent to another body region (120).

8. The semiconductor device according to claim 7, wherein, in the first shielding region (161), the doping material concentration has a local maximum, and the local maximum is between the gate structure (150) and the second surface (102) of the SiC semiconductor body (100) opposite to the first surface (101).

9. The semiconductor device according to claim 7 or 8, wherein, the first sidewall (151) runs parallel to the first main lattice plane and / or is inclined with respect to the first main lattice plane in the SiC semiconductor body (100) by at most 2°.

10. The semiconductor device according to claim 7 or 8, which has a plurality of gate structures (150), wherein the SiC semiconductor body (100) has: a first mesa (181) between two adjacent gate structures (150), wherein the first mesa (181) does not have a diode region (140), and a second mesa (182) between two adjacent gate structures (150), wherein a diode region (140) is formed in the second mesa (182), the first shielding region (161) is adjacent to the diode region (140), and the second shielding region (162) is adjacent to the diode region (140) and adjacent to the body region (120).

11. The semiconductor device according to claim 10, which has a plurality of first mesas (181) and second mesas (182), wherein, adjacent gate structures (150) between which the first mesa (181) is formed are arranged with a first center-to-center pitch (pt1), adjacent gate structures (150) between which the second mesa (182) is formed are arranged with a second center-to-center pitch (pt2), and the first center-to-center pitch (pt1) is at least 40% and at most 60% of the second center-to-center pitch (pt2).

12. The semiconductor device according to claim 10, wherein, at least three first mesas (181) are formed between two adjacent second mesas (182).

13. The semiconductor device according to claim 4, wherein, the load electrode (310) has a main layer (315), and a first sub-layer (311) is between the main layer (315) and the first surface (101), and at least one section of the first sub-layer (311) is adjacent to the diode region (140).

14. The semiconductor device according to claim 13, wherein, the load electrode (310) has a second sub-layer (312), and the second sub-layer (312) is at least adjacent to the source region (110) and / or adjacent to at least one of the first shielding region (161) and the second shielding region (162).

15. The semiconductor device according to claim 1 or 2, wherein, The load electrode (310) has a Schottky contact structure (319) that extends in a vertical direction through an opening in an intermediate dielectric layer (210) toward the diode region (140), where the intermediate dielectric layer (210) separates the gate structure (150) from the load electrode (310).

16. The semiconductor device according to claim 15, wherein, the Schottky contact structure (319) is directly adjacent to the diode region (140), adjacent to the first shielding region (161), and adjacent to the second shielding region (162).

17. A semiconductor device having: a diode region (140) of a first conductivity type in a SiC semiconductor body (100), where the diode region (140) and a load electrode (310) form a Schottky contact (SC) respectively; wherein, along a horizontal first direction (191), at least one gate structure (150) is constructed between two adjacent diode regions (140) respectively, the at least one gate structure (150) extends from a first surface (101) into the SiC semiconductor body (100), where, at least one first sidewall (151) of the gate structure (150) is adjacent to a body region (120) of a second conductivity type, and the body region (120) is electrically connected to the load electrode (310), where the diode region (140) has a lower sub-region (148), and an upper sub-region (142) between the lower sub-region (148) and the first surface (101), where a second average width (w2) of the lower sub-region (148) corresponds to at least 120% of a first average width (w1) of the upper sub-region (142).

18. The semiconductor device according to claim 17, wherein, the load electrode (310) has a Schottky contact structure (319) that extends in a vertical direction through an opening in an intermediate dielectric layer (210) to one of the diode regions (140) in the SiC semiconductor body (100) respectively, where the intermediate dielectric layer (210) separates the gate structure (150) from the load electrode (310).

19. The semiconductor device according to any one of claims 17 to 18, wherein, at least three gate structures (150) are constructed between two adjacent diode regions (140).

20. A semiconductor device having: a gate structure (150) that extends from a first surface (101) into a SiC semiconductor body (100), where a drift region (131) of a first conductivity type is constructed in the SiC semiconductor body (100); a first mesa (181) and a second mesa (182) that are arranged in the SiC semiconductor body (100) between the gate structures (150); A body region (120) of a second conductivity type, the body region (120) being disposed in the first mesa (181) and the second mesa (182) of the SiC semiconductor body (100), wherein the body region (120) is adjacent to a first sidewall (151) of one of the gate structures in the gate structure (150); A first shielding region (161) of a second conductivity type, the first shielding region (161) being adjacent to a second sidewall (152) of one of the gate structures in the gate structure (150); A second shielding region (162) of a second conductivity type, the second shielding region (162) being adjacent to the body region (120) in the second mesa (182); and A diode region (140) of the conductivity type of the drift region (131), wherein the diode region (140) forms a Schottky contact (SC) with the load electrode (310) between the first shielding region (161) and the second shielding region (162).

21. The semiconductor device according to claim 20, wherein, The first sidewall (151) runs parallel to the (11-20) lattice plane in the SiC semiconductor body (100), or is inclined with respect to the (11-20) lattice plane by no more than 2°.

22. The semiconductor device according to any one of claims 20 to 21, wherein, At least three first mesas (181) are respectively constructed between two adjacent second mesas (182).

23. The semiconductor device according to claim 20 or 21, wherein, The average doping material concentration in the diode region (140) is higher than the average doping material concentration in the drift region (131).

24. The semiconductor device according to claim 20 or 21, further comprising: An auxiliary trench structure (190), the auxiliary trench structure (190) extending from the first surface (101) between the diode region (140) and the second shielding region (162) into the second mesa (182).

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