Earphone output muting circuit and earphone
By introducing an energy storage circuit and multiple control units into the headphone output mute circuit, the problem of impact noise when wired noise-canceling headphones are turned off is solved, achieving a silent effect for the headphone speaker, improving the user experience and reducing costs.
Patent Information
- Application Number
- CN201810710043.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2018-07-02
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2038-07-02
AI Technical Summary
In the existing technology, the impact noise caused by the mechanical toggle switch when wired noise-canceling headphones are turned off cannot be effectively eliminated, which affects the user's listening experience and may cause damage to the human ear.
An energy storage circuit and multiple control units, including the first to fourth control units, are introduced into the headphone output mute circuit. Through the combination of field-effect transistors and resistors, the surge voltage is suppressed and the signal transmission path is disconnected to ensure that the speaker does not emit surge noise.
It effectively eliminates the impact noise when the headphones are turned off, protects the user's hearing, improves the headphone user experience, and is low in cost and reliable in performance.
Smart Images

Figure CN110677755B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of noise-canceling headphone output circuit technology, and in particular to a headphone output mute circuit and a headphone. Background Technology
[0002] Since wired noise-canceling headphones are powered by AAA or AA alkaline batteries, a mechanical toggle switch is used for manual power on / off to prevent power consumption when not in use. Wired noise-canceling headphones typically employ a single-chip solution, with the headphone speaker directly connected to the output interface of the chip's headphone output unit circuit. When powered on, the single chip can suppress the impact noise emitted by the headphone speaker using its own headphone output control unit circuit. However, when powered off, the mechanical toggle switch causes a momentary power loss to the various circuit units within the chip, preventing the headphone output control unit circuit from immediately muting. This results in a brief surge voltage at the output interface of the headphone output unit circuit, which causes the headphone speaker to emit a brief "pop" noise. This surge voltage cannot be eliminated internally by the chip and must be eliminated using external mute circuitry. Currently, solutions for eliminating the surge noise generated by the mechanical toggle switch include using a more expensive dedicated chip or a simpler mute application solution.
[0003] In the process of researching this application, the inventors discovered that the prior art has at least the following technical problems:
[0004] Using current headphone noise cancellation solutions, a noticeable "pop" noise can still be heard in the headphone speaker that is close to the ear when the headphones are turned off. This does not effectively silence the headphones and affects the user's auditory experience, causing impact and damage to the ears. Summary of the Invention
[0005] The technical problem to be solved by the embodiments of the present invention is to provide a headphone output mute circuit and headphones that can reliably eliminate the surge voltage at the output interface of the headphone output unit when manually turned off, ensuring that no surge noise is emitted in the headphone speaker, thereby effectively protecting the user's hearing.
[0006] To solve the above-mentioned technical problems, the headphone output mute circuit and headphone described in the embodiments of the present invention adopt the following technical solution:
[0007] A headphone output mute circuit includes: an energy storage circuit, a first control unit, a second control unit, a third control unit, and a fourth control unit; wherein the third control unit and the fourth control unit each include multiple input terminals;
[0008] The input terminal of the energy storage circuit is connected to the output terminal of the switch used to control the power on / off of the headphones; the output terminal of the energy storage circuit is connected to the input terminal of the first control unit, the input terminal of the second control unit, an input terminal of the third control unit, and an input terminal of the fourth control unit; the energy storage circuit is used to store electrical energy when the headphones are powered on and to release electrical energy when the headphones are powered off.
[0009] The output terminal of the first control unit and the left channel output interface of the main control chip of the earphone are connected to an input terminal of the third control unit; the output terminal of the third control unit is connected to the left speaker input terminal of the earphone; the output terminal of the second control unit and the right channel output interface of the main control chip are connected to an input terminal of the fourth control unit; the output terminal of the fourth control unit is connected to the right speaker input terminal of the earphone; and some circuits in the first control unit and the second control unit are grounded;
[0010] The first control unit and the second control unit are respectively used to suppress the surge voltage generated by the left channel output interface and the right channel output interface due to momentary power failure; the third control unit is used to disconnect the signal between the left channel output interface and the left speaker input terminal when the headphones are turned off; the fourth control unit is used to disconnect the signal between the right channel output interface and the right speaker input terminal when the headphones are turned off.
[0011] Furthermore, in the headphone output mute circuit, the first control unit includes: a resistor R1 and a field-effect transistor Q1;
[0012] One end of the resistor R1 is connected to the output terminal of the energy storage circuit, and the other end is connected to the gate of the field-effect transistor Q1; the source of the field-effect transistor Q1 is grounded, and the drain of the field-effect transistor Q1 and the left channel output interface are connected to the input terminal of the third control unit.
[0013] Furthermore, in the aforementioned headphone output mute circuit, the second control unit includes: a resistor R2 and a field-effect transistor Q2;
[0014] One end of the resistor R2 is connected to the output terminal of the energy storage circuit, and the other end is connected to the gate of the field-effect transistor Q2; the source of the field-effect transistor Q2 is grounded, and the drain of the field-effect transistor Q2 and the right channel output interface are connected to the input terminal of the fourth control unit.
[0015] Furthermore, in the aforementioned headphone output mute circuit, the third control unit includes: a resistor R3 and a field-effect transistor Q3;
[0016] One end of the resistor R3 is connected to the output terminal of the energy storage circuit, and the other end is connected to the gate of the field-effect transistor Q3; the source of the field-effect transistor Q3 is connected to the left channel output interface, and the drain of the field-effect transistor Q3 is connected to the left speaker input terminal.
[0017] Furthermore, in the aforementioned headphone output mute circuit, the fourth control unit includes: a resistor R4 and a field-effect transistor Q4;
[0018] One end of the resistor R4 is connected to the output terminal of the energy storage circuit, and the other end is connected to the gate of the field-effect transistor Q4; the source of the field-effect transistor Q4 is connected to the right channel output interface, and the drain of the field-effect transistor Q4 is connected to the right speaker input terminal.
[0019] Furthermore, in the aforementioned headphone output mute circuit, the energy storage circuit includes: an energy storage unit, resistors R6, R7, and R8, diode D1, and field-effect transistor Q5;
[0020] One end of resistor R8 and the anode of diode D1 are connected to the output terminal of the switch; the other end of resistor R8 is connected to the gate of field-effect transistor Q5 and also grounded after being connected to resistor R7; the cathode of diode D1 and one end of the energy storage unit are connected to the drain of field-effect transistor Q5, and the other end of the energy storage unit is grounded; the source of field-effect transistor Q5 is connected to the input terminals of the first control unit, the second control unit, the third control unit, and the fourth control unit, and also grounded after being connected to resistor R6.
[0021] Furthermore, in the aforementioned headphone output mute circuit, the energy storage unit includes a resistor R5 and a capacitor C1 connected in parallel.
[0022] One end of the resistor R5 and the positive terminal of the capacitor C1 are connected together to the negative terminal of the diode D1 and to the drain of the field-effect transistor Q5; the other end of the resistor R5 and the negative terminal of the capacitor C1 are grounded.
[0023] An earphone includes: a power supply, a switch, a main control chip, a left speaker and a right speaker, and also includes the earphone output mute circuit described in any of the above technical solutions;
[0024] The output terminal of the power supply used to provide power to the headphones is connected to the input terminal of the switch, and the output terminal of the switch is connected to the input terminal of the main control chip and the input terminal of the headphone output mute circuit; the left channel output interface of the main control chip is connected to the input terminal of the left speaker through the headphone output mute circuit, and the right channel output interface of the main control chip is connected to the input terminal of the right speaker through the headphone output mute circuit.
[0025] Compared with the prior art, the embodiments of the present invention have the following main advantages:
[0026] This invention discloses a headphone output mute circuit and a headphone. The headphone output mute circuit includes: an energy storage circuit, a first control unit, a second control unit, a third control unit, and a fourth control unit. The energy storage circuit stores electrical energy when the headphone is powered on and releases electrical energy when the headphone is powered off. The first and second control units are respectively used to suppress the surge voltage generated by the left and right channel output interfaces due to momentary power failure. The third control unit is used to disconnect the signal between the left channel output interface and the left speaker input terminal when the headphone is powered off, and the fourth control unit is used to disconnect the signal between the right channel output interface and the right speaker input terminal when the headphone is powered off. The headphone output mute circuit of this invention, by adding two mute control units between the main control chip and the speaker, ensures that the headphone's mute effect, achieved through multiple control unit circuits, prevents abnormal noises and surge noises from emanating from the speaker, effectively protecting the user's hearing and improving the user's headphone experience. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0028] Figure 1 A block diagram of a headphone and headphone output mute circuit in the prior art;
[0029] Figure 2 This is a structural block diagram of an earphone and an earphone output mute circuit according to an embodiment of the present invention;
[0030] Figure 3 This is a schematic diagram of the headphone output mute circuit according to an embodiment of the present invention.
[0031] Explanation of reference numerals in the attached figures
[0032] 1-Power supply, 2-Switch, 3-Main control chip, 4-Headphone output mute circuit, 5-Left speaker, 6-Right speaker, 41-Energy storage circuit, 42-First control unit, 43-Second control unit, 44-Third control unit, 45-Fourth control unit, 411-Energy storage unit. Detailed Implementation
[0033] To enable those skilled in the art to better understand the solutions of the present invention, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the relevant accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. The accompanying drawings show preferred embodiments of the present invention. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present invention more thorough and comprehensive. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The terms “comprising” and “having”, and any variations thereof, in the specification, claims, and accompanying drawings are intended to cover a non-exclusive inclusion. For example, a process, method, system, product, or apparatus that comprises a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such processes, methods, products, or apparatus.
[0035] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0036] It should be noted that the terms "upper end," "lower end," "left end," and "right end" used in the following description only indicate the relative positional relationship between the components. This relative positional relationship may be reversed or changed when the components are flipped or rotated. The terms "first," "second," "third," and "fourth," etc., in the claims, specification, and accompanying drawings of this invention are used to distinguish different objects, not to describe a specific order.
[0037] refer to Figure 1This is a structural block diagram of a headphone and headphone output mute circuit in the prior art. The energy storage circuit 41, the first control unit 42, and the second control unit 43 constitute a simplified headphone output mute circuit 4. The output terminal of the power supply 1 for powering the headphones is connected to the input terminal of the switch 2 for controlling the headphones' power on / off state. The output terminal of the switch 2 is connected to the input terminal of the headphone's main control chip 3 and the input terminal of the energy storage circuit 41. The left and right channel output interfaces of the headphone's main control chip 3 are respectively connected to the input terminals of the left speaker 5 and the right speaker 6 of the headphones.
[0038] The output terminal of the energy storage circuit 41 is connected to the input terminals of the first control unit 42 and the second control unit 43. The output terminal of the first control unit 42, together with the left channel output interface of the main control chip 3, is connected to the input terminal of the left speaker 5 of the earphone; the output terminal of the second control unit 43, together with the right channel output interface of the main control chip 3, is connected to the input terminal of the right speaker 6 of the earphone. Parts of the circuits in the first control unit 42 and the second control unit 43 are grounded. The energy storage circuit 41 can be used to store a certain amount of electrical energy. Both the first control unit 42 and the second control unit 43 are used to suppress a short-term surge voltage generated by the main control chip 3 due to a momentary power outage.
[0039] Specifically, when the headphones are powered on via switch 2, the power supply 1 provides electrical energy to enable the main control chip 3 to operate normally, and also supplies electrical energy to the energy storage circuit 41 in the headphone output mute circuit 4 for storage. At this time, the first control unit 42 and the second control unit 43 are inactive. When the headphones are powered off via switch 2, the electrical energy stored in the energy storage circuit 41 of the headphone output mute circuit 4 can sustain the supply of electrical energy to the first control unit 42 and the second control unit 43 for a period of time. Therefore, the first control unit 42 partially suppresses the surge voltage generated by the momentary power failure of the left channel output interface of the main control chip 3 to the ground, and the second control unit 43 partially suppresses the surge voltage generated by the momentary power failure of the right channel output interface of the main control chip 3 to the ground.
[0040] However, due to the momentary power failure, part of the impact voltage generated by the left and right channel output interfaces of the main control chip 3 will be directly transmitted to the left speaker 5 and right speaker 6 of the headphones, respectively. As a result, the human ear will still hear a clear "pop" impact noise from the headphones' speakers, which cannot achieve an effective noise reduction effect and will cause impact and damage to the human ear, affecting the user's auditory experience and feeling.
[0041] refer to Figure 2This is a structural block diagram of an earphone and an earphone output mute circuit according to an embodiment of the present invention. The earphone output mute circuit 4 includes: an energy storage circuit 41, a first control unit 42, a second control unit 43, a third control unit 44, and a fourth control unit 45. Both the third control unit 44 and the fourth control unit 45 include multiple input terminals. It can be seen that the earphone output mute circuit 4 in this embodiment of the present invention, compared with the prior art, mainly adds the third control unit 44 and the fourth control unit 45. The third control unit 44 and the fourth control unit 45 are used to mute another portion of the voltage that has not been suppressed by the leakage current of the first control unit 42 and the second control unit 43.
[0042] The output of the power supply 1, which provides power to the headphones, is connected to the input of the switch 2, which controls the headphones' power on / off state. The output of the switch 2 is connected to the input of the main control chip 3 and the input of the energy storage circuit 41. The output of the energy storage circuit 41 is connected to the input of the first control unit 42, the input of the second control unit 43, an input of the third control unit 44, and an input of the fourth control unit 45.
[0043] The output terminal of the first control unit 42 and the left channel output interface of the main control chip 3 of the earphone are both connected to an input terminal of the third control unit 44. The output terminal of the third control unit 44 is connected to the input terminal of the left speaker 5 of the earphone. The output terminal of the second control unit 43 and the right channel output interface of the main control chip 3 are both connected to the input terminal of the fourth control unit 45. The output terminal of the fourth control unit 45 is connected to the input terminal of the right speaker 6 of the earphone. Furthermore, some circuits in the first control unit 42 and the second control unit 43 are grounded.
[0044] The energy storage circuit 41 stores electrical energy when the headphones are powered on and releases it to the first control unit 42, the second control unit 43, the third control unit 44, and the fourth control unit 45 when the headphones are powered off. The first control unit 42 and the second control unit 43 suppress the surge voltage generated by a momentary power outage at the left and right channel output interfaces of the main control chip 3, respectively. The third control unit 44 disconnects the signal between the left channel output interface of the main control chip 3 and the input terminal of the left speaker 5 when the headphones are powered off, and the fourth control unit 45 disconnects the signal between the right channel output interface of the main control chip 3 and the input terminal of the right speaker 6 when the headphones are powered off.
[0045] Specifically, when the headphones are powered on, part of the electrical energy flows into the main control chip 3 to enable its normal operation, and the other part flows into the energy storage circuit 41, where a portion of the electrical energy is stored. The electrical signal output from the energy storage circuit 41 is transmitted to the first control unit 42, the second control unit 43, the third control unit 44, and the fourth control unit 45. Simultaneously, the audio signals from the left and right channels of the main control chip 3 are transmitted to the third control unit 44 and the fourth control unit 45, respectively. At this time, the first control unit 42 and the second control unit 43 are not conducting, while the third control unit 44 and the fourth control unit 45 are conducting. Thus, the third control unit 44 and the fourth control unit 45 can normally transmit the audio signals transmitted by the main control chip 3 to the left speaker 5 and the right speaker 6, respectively, causing sound to be emitted from the left speaker 5 and the right speaker 6.
[0046] When the headphones are turned off via switch 2, the electrical energy stored in the energy storage circuit 41 of the headphone output mute circuit 4 can sustain the supply of power to the first control unit 42, the second control unit 43, the third control unit 44, and the fourth control unit 45 for a period of time. At this time, the first control unit 42 and the second control unit 43 are on, while the third control unit 44 and the fourth control unit 45 are off. Therefore, the first control unit 42 partially suppresses the surge voltage generated by the momentary power failure of the left channel output interface of the main control chip 3 by discharging it to ground, and the second control unit 43 partially suppresses the surge voltage generated by the momentary power failure of the right channel output interface of the main control chip 3 by discharging it to ground. Since the surge voltage cannot be transmitted to the left speaker 5 and the right speaker 6 through the third control unit 44 and the fourth control unit 45, the surge noise generated by the headphones being turned off can be effectively eliminated.
[0047] refer to Figure 3 This is a schematic diagram of the circuit structure of the headphone output mute circuit provided in an embodiment of the present invention. (Combined with...) Figure 2 and Figure 3 As shown in the figure, L_CH and R_CH represent the left and right channel output interfaces connected to the main chip 3, respectively; VBAT represents the output terminal connected to switch 2; L_SPK and R_SPK represent the left and right speakers of the headphones, respectively; GND represents the connection to the electrical network ground (or the negative terminal of an alkaline battery), i.e., grounding.
[0048] In some embodiments of the present invention, the first control unit 42 includes a resistor R1 and a field-effect transistor Q1. One end of the resistor R1 is connected to the output terminal of the energy storage circuit 41, and the other end is connected to the gate G of the field-effect transistor Q1. The source S of the field-effect transistor Q1 is grounded, and the drain D of the field-effect transistor Q1 and the left channel output interface of the main control chip 3 are connected together to the input terminal of the third control unit 44.
[0049] When the headphones are powered on, the field-effect transistor Q1 is turned off, and the electrical signal at the left channel output interface L_CH cannot be grounded through the source (S) and drain (D) of the field-effect transistor Q1. When the headphones are powered off, the field-effect transistor Q1 is turned on, and part of the impulse voltage signal at the left channel output interface L_CH is grounded through the drain (S) and source (D) of the field-effect transistor Q1, thus suppressing part of the impulse voltage signal.
[0050] In some embodiments of the present invention, the second control unit 43 includes a resistor R2 and a field-effect transistor Q2. One end of the resistor R2 is connected to the output terminal of the energy storage circuit 41, and the other end is connected to the gate G of the field-effect transistor Q2. The source S of the field-effect transistor Q2 is grounded, and the drain D of the field-effect transistor Q2 and the right channel output interface of the main control chip 3 are connected together to the input terminal of the fourth control unit 45.
[0051] When the headphones are powered on, the field-effect transistor Q2 is off, and the electrical signal at the right channel output interface R_CH cannot be grounded through the source (S) and drain (D) of the field-effect transistor Q2. When the headphones are powered off, the field-effect transistor Q2 is turned on, and part of the impulse voltage signal at the right channel output interface R_CH is grounded through the drain (D) and source (S) of the field-effect transistor Q2, thus suppressing part of the impulse voltage signal.
[0052] In some embodiments of the present invention, the third control unit 44 includes a resistor R3 and a field-effect transistor Q3. One end of the resistor R3 is connected to the output terminal of the energy storage circuit 41, and the other end is connected to the gate G of the field-effect transistor Q3. The source S of the field-effect transistor Q3 is connected to the left channel output interface of the main control chip 3, and the drain D of the field-effect transistor Q3 is connected to the input terminal of the left speaker 5.
[0053] When the headphones are powered on, the field-effect transistor Q3 is turned on, and the electrical signal at the left channel output interface L_CH is transmitted to the input terminal of the left speaker 5 through the source (S) and drain (D) of the field-effect transistor Q3. When the headphones are powered off, the field-effect transistor Q3 is turned off, so the other part of the impulse voltage signal at the left channel output interface L_CH cannot be transmitted to the input terminal of the left speaker 5 through the source (S) and drain (D) of the field-effect transistor Q3, thereby eliminating the impulse noise generated by the other part of the impulse voltage.
[0054] In some embodiments of the present invention, the fourth control unit 45 includes a resistor R4 and a field-effect transistor Q4. One end of the resistor R4 is connected to the output terminal of the energy storage circuit 41, and the other end is connected to the gate G of the field-effect transistor Q4. The source S of the field-effect transistor Q4 is connected to the right channel output interface of the main control chip 3, and the drain D of the field-effect transistor Q4 is connected to the input terminal of the right speaker 6.
[0055] When the headphones are powered on, the field-effect transistor Q4 is turned on, and the electrical signal at the right channel output interface R_CH is transmitted to the input terminal of the right speaker 6 through the source (S) and drain (D) of the field-effect transistor Q4. When the headphones are powered off, the field-effect transistor Q4 is turned off, so the other part of the impulse voltage signal at the right channel output interface R_CH cannot be transmitted to the input terminal of the right speaker 6 through the source (S) and drain (D) of the field-effect transistor Q4, thereby eliminating the impulse noise generated by the other part of the impulse voltage.
[0056] In some embodiments of the present invention, the energy storage circuit 41 includes: an energy storage unit 411, a resistor R6, a resistor R7, a resistor R8, a diode D1, and a field-effect transistor Q5.
[0057] One end of resistor R8 and the anode of diode D1 are connected to the output terminal of switch 2. The other end of resistor R8 is connected to the gate G of field-effect transistor Q5 and also grounded after being connected to resistor R7. The cathode of diode D1 and one end of energy storage unit 411 are connected to the drain D of field-effect transistor Q5, and the other end of energy storage unit 411 is grounded. The source S of field-effect transistor Q5 is connected to the input terminals of the first control unit 42, the second control unit 43, the third control unit 44, and the fourth control unit 45, and also grounded after being connected to resistor R6.
[0058] When the headphones are turned on, electrical energy flows into the energy storage circuit 41 through VBAT. Part of the electrical energy flows into the energy storage unit 411 and the drain D of the field-effect transistor Q5 after passing through the diode D1, and is stored through the energy storage unit 411. Another part of the electrical energy is grounded through the resistors R8 and R7, where the resistance ratio of the resistors R7 and R8 is appropriate. The voltage shared across the resistor R7 is transmitted to the gate G of the field-effect transistor Q5, causing the field-effect transistor Q5 to be turned off, and the voltage across the resistor R6 to be 0V.
[0059] When the headphones are turned off, no electrical energy flows into the energy storage circuit 41. The electrical energy stored in the energy storage unit 411 continues to flow into the drain D of the field-effect transistor Q5 for a period of time. The diode D1 blocks the flow of electrical energy through the resistors R8 and R7, so the voltage across the resistor R7 is approximately 0V. The field-effect transistor Q5 is turned on, and thus, the electrical energy stored in the energy storage unit 411 flows from the drain D of the field-effect transistor Q5 to the source S and then to the resistor R6. The resistor R6 has a suitable voltage value and can be transmitted to the first control unit 42, the second control unit 43, the third control unit 44, and the fourth control unit 45.
[0060] In one possible implementation, the energy storage unit 411 includes a resistor R5 and a capacitor C1 connected in parallel. One end of the resistor R5 and the positive terminal of the capacitor C1 are connected to the negative terminal of the diode D1 and then to the drain of the field-effect transistor Q5. The other end of the resistor R5 and the negative terminal of the capacitor C1 are grounded. The energy storage unit 411 stores and releases electrical energy through the capacitor C1.
[0061] In some embodiments of the present invention, the field-effect transistors Q1 and Q2 are N-channel field-effect transistors, and the field-effect transistors Q3, Q4 and Q5 are P-channel field-effect transistors.
[0062] Further integration Figure 2 and Figure 3 As shown. Specifically, when the headphones are powered on via switch 2, the power supply 1 provides electrical energy to enable the main control chip 3 to function normally, and also provides electrical energy to the energy storage circuit 41 in the headphone output mute circuit 4, storing some of the electrical energy through the energy storage unit 411. Simultaneously, the audio signals from the left and right channels of the main control chip 3 are transmitted to the third control unit 44 and the fourth control unit 45, respectively. At this time, the field-effect transistors Q1 and Q2 are cut off, while the field-effect transistors Q3 and Q4 are turned on. Therefore, the first control unit 42 and the second control unit 43 are inactive, while the third control unit 44 and the fourth control unit 45 normally transmit the audio signals transmitted by the main control chip 3 to the left speaker 5 and the right speaker 6, respectively, causing sound to be emitted from the left speaker 5 and the right speaker 6.
[0063] When the headphones are turned off via switch 2, the electrical energy stored in the energy storage unit 411 of the energy storage circuit 41 of the headphone output mute circuit 4 can sustain the supply of electrical energy to the first control unit 42, the second control unit 43, the third control unit 44, and the fourth control unit 45 for a period of time. At this time, the field-effect transistors Q1 and Q2 are turned on, while the field-effect transistors Q3 and Q4 are turned off. Therefore, the first control unit 42 partially suppresses the surge voltage generated by the momentary power failure of the left channel output interface of the main control chip 3 by discharging it to ground, and the second control unit 43 partially suppresses the surge voltage generated by the momentary power failure of the right channel output interface of the main control chip 3 by discharging it to ground. Since the surge voltage cannot be transmitted to the left speaker 5 and the right speaker 6 through the third control unit 44 and the fourth control unit 45, the surge noise generated by the headphones being turned off can be effectively eliminated.
[0064] The headphone output mute circuit described in this embodiment adds two control units for mute between the main control chip and the headphone speaker. This allows the headphone to achieve a mute effect through multiple control unit circuits, which can completely, effectively, and reliably eliminate the surge voltage at the output interface of the output unit when the headphone is manually turned off. This ensures that no abnormal noise or surge noise is emitted from the speaker, effectively protecting the user's hearing and improving the user's headphone experience. Moreover, it is low in cost, reliable in performance, and has high practical value.
[0065] Another embodiment of the present invention discloses an earphone, with reference to Figure 1 As shown, the headphones include: a power supply 1, a switch 2, a main control chip 3, a left speaker 5, a right speaker 6, and the headphone output mute circuit 4 described in any of the above technical solutions.
[0066] The output terminal of the power supply 1 is connected to the input terminal of the switch 2. The output terminal of the switch 2 is connected to the input terminal of the main control chip 3 and the input terminal of the headphone output mute circuit 4. The left channel output interface of the main control chip 3 is connected to the input terminal of the left speaker 5 through the headphone output mute circuit 4, and the right channel output interface of the main control chip 3 is connected to the input terminal of the right speaker 6 through the headphone output mute circuit 4.
[0067] The power supply 1 supplies power to the headphones, the switch 2 controls the headphones' power on / off state, and the main control chip 3 performs digital-to-analog conversion on the audio signals received by the headphones. The headphone output mute circuit 4 eliminates the surge voltage emitted at the left and right channel output interfaces of the main control chip 3 when the headphones are turned off. The left speaker 5 and right speaker 6 output the processed left and right channel audio signals from the headphones, respectively.
[0068] In some possible embodiments of another embodiment of the present invention, the power supply 1 is powered by a No. 5 (AA) or No. 7 (AAA) alkaline battery.
[0069] In some possible implementations of another embodiment of the present invention, the switch 2 is a mechanical toggle touch switch, which allows manual switching of the headphones on and off.
[0070] Furthermore, in some possible implementations of another embodiment of the present invention, the headphones used in the above technical solution are wired noise-canceling headphones.
[0071] In another embodiment of the present invention, the headphones add two control units for muting between the main control chip and the speaker through the headphone output mute circuit. This allows the mute effect of the multiple control unit circuits to completely, effectively, and reliably eliminate the surge voltage at the output interface of the headphone output unit when manually turned off, ensuring that no abnormal noise or surge noise is emitted from the headphone speaker. This effectively protects the user's hearing, improves the user's experience and enjoyment of the headphones, and is low in cost, reliable in performance, and has high practical value.
[0072] In the embodiments provided by this invention, it should be understood that the disclosed circuits and devices can also be implemented in other ways. For example, the circuit embodiments described above are merely illustrative. For example, the division of units is merely a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or circuits may be combined or integrated into another system, or some features may be ignored or not executed.
[0073] This invention is not limited to the embodiments described above. The above descriptions are preferred embodiments of this invention, and are only used to illustrate the invention and not to limit its scope. It should be noted that those skilled in the art can still make several improvements and modifications to the technical solutions described in the foregoing specific embodiments, or make equivalent substitutions for some of the technical features, without departing from the principles of this invention. Any equivalent structures made using the content of this specification and drawings, directly or indirectly applied to other related technical fields, should also be considered as included within the protection scope of this invention.
Claims
1. A headphone output mute circuit, characterized in that, include: The system includes an energy storage circuit, a first control unit, a second control unit, a third control unit, and a fourth control unit; wherein the third control unit and the fourth control unit each include multiple input terminals. The input terminal of the energy storage circuit is connected to the output terminal of the switch used to control the power on / off of the headphones; the output terminal of the energy storage circuit is connected to the input terminal of the first control unit, the input terminal of the second control unit, an input terminal of the third control unit, and an input terminal of the fourth control unit; the energy storage circuit is used to store electrical energy when the headphones are powered on and to release electrical energy when the headphones are powered off. The output terminal of the first control unit and the left channel output interface of the main control chip of the earphone are connected to an input terminal of the third control unit; the output terminal of the third control unit is connected to the left speaker input terminal of the earphone; the output terminal of the second control unit and the right channel output interface of the main control chip are connected to an input terminal of the fourth control unit; the output terminal of the fourth control unit is connected to the right speaker input terminal of the earphone; and some circuits in the first control unit and the second control unit are grounded; The first control unit and the second control unit are respectively used to suppress the surge voltage generated by the left channel output interface and the right channel output interface due to momentary power failure; the third control unit is used to disconnect the signal between the left channel output interface and the left speaker input terminal when the headphones are turned off; the fourth control unit is used to disconnect the signal between the right channel output interface and the right speaker input terminal when the headphones are turned off. The energy storage circuit includes: an energy storage unit, resistors R6, R7, and R8, diode D1, and field-effect transistor Q5; One end of resistor R8 and the anode of diode D1 are connected to the output terminal of the switch; the other end of resistor R8 is connected to the gate of field-effect transistor Q5 and also grounded after being connected to resistor R7; the cathode of diode D1 and one end of the energy storage unit are connected to the drain of field-effect transistor Q5, and the other end of the energy storage unit is grounded; the source of field-effect transistor Q5 is connected to the input terminals of the first control unit, the second control unit, the third control unit, and the fourth control unit, and also grounded after being connected to resistor R6.
2. The headphone output mute circuit according to claim 1, characterized in that, The first control unit includes: a resistor R1 and a field-effect transistor Q1; One end of the resistor R1 is connected to the output terminal of the energy storage circuit, and the other end is connected to the gate of the field-effect transistor Q1; the source of the field-effect transistor Q1 is grounded, and the drain of the field-effect transistor Q1 and the left channel output interface are connected to the input terminal of the third control unit.
3. The headphone output mute circuit according to claim 1, characterized in that, The second control unit includes: resistor R2 and field-effect transistor Q2; One end of the resistor R2 is connected to the output terminal of the energy storage circuit, and the other end is connected to the gate of the field-effect transistor Q2; the source of the field-effect transistor Q2 is grounded, and the drain of the field-effect transistor Q2 and the right channel output interface are connected to the input terminal of the fourth control unit.
4. The headphone output mute circuit according to claim 1, characterized in that, The third control unit includes: resistor R3 and field-effect transistor Q3; One end of the resistor R3 is connected to the output terminal of the energy storage circuit, and the other end is connected to the gate of the field-effect transistor Q3; the source of the field-effect transistor Q3 is connected to the left channel output interface, and the drain of the field-effect transistor Q3 is connected to the left speaker input terminal.
5. The headphone output mute circuit according to claim 1, characterized in that, The fourth control unit includes: resistor R4 and field-effect transistor Q4; One end of the resistor R4 is connected to the output terminal of the energy storage circuit, and the other end is connected to the gate of the field-effect transistor Q4; the source of the field-effect transistor Q4 is connected to the right channel output interface, and the drain of the field-effect transistor Q4 is connected to the right speaker input terminal.
6. The headphone output mute circuit according to claim 5, characterized in that, The energy storage unit includes a resistor R5 and a capacitor C1 connected in parallel; One end of the resistor R5 and the positive terminal of the capacitor C1 are connected together to the negative terminal of the diode D1 and to the drain of the field-effect transistor Q5; the other end of the resistor R5 and the negative terminal of the capacitor C1 are grounded.
7. An earphone, comprising: The power supply, switch, main control chip, left speaker and right speaker are characterized in that they further include the headphone output mute circuit as described in any one of claims 1-6; The output terminal of the power supply used to provide power to the headphones is connected to the input terminal of the switch, and the output terminal of the switch is connected to the input terminal of the main control chip and the input terminal of the headphone output mute circuit; the left channel output interface of the main control chip is connected to the input terminal of the left speaker through the headphone output mute circuit, and the right channel output interface of the main control chip is connected to the input terminal of the right speaker through the headphone output mute circuit.
Citation Information
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