An encoder tester

Abstract

The present invention discloses an encoder tester, which includes an input module and two AC / DC conversion modules. The input module is connected to an encoder after passing through a six-channel opto-coupler isolation module. The encoder converts four differential signals and then connects to a signal collector. The signal collector is connected to a slave ARM chip and a slave DSP chip. The slave ARM chip and the slave DSP chip are connected to a host ARM chip. The host ARM chip is connected to a Flash memory chip, an SPI absolute encoder signal input port, a level conversion chip, a display external connector, a PWM output, and a communication chip module. The host ARM chip stores measurement data in the Flash memory chip. The test CPU of this device is optional and supports two mainstream MCUs, namely DSP and ARM.

Description

Technical Field

[0001] The present invention relates to the technical field of encoders, and particularly relates to an encoder tester. Background Art

[0002] An encoder is a device that encodes signals or data and converts them into signal forms that can be used for communication, transmission, and storage. Encoders have a relatively high application ratio in the OEM market and are mainly used in industries such as machine tools, elevators, servo motor supporting, textile machinery, packaging machinery, printing machinery, and lifting machinery. However, it is very difficult to identify and determine the performance of an encoder before use, which often brings inconvenience to the subsequent production using the encoder. Therefore, in order to facilitate the testing of the performance of a single encoder and the comparison of the performance of two encoders, an encoder tester is specifically designed for this purpose. Summary of the Invention

[0003] The purpose of the present invention is to provide an encoder tester to solve the problems raised in the above background art. To achieve the above purpose, the present invention provides the following technical solution: An encoder tester includes an input module and two AC / DC conversion modules. The input module is connected to an encoder after passing through a six-channel opto-coupler isolation module. The encoder converts four differential signals and then connects to a signal collector. The signal collector is connected to a slave ARM chip and a slave DSP chip. The slave ARM chip and the slave DSP chip are connected to a host ARM chip. The host ARM chip is connected to a Flash storage chip, an SPI absolute encoder signal input port, a level conversion chip, a display external connector, a PWM output, and a communication chip module. The host ARM chip stores the measurement data in the Flash storage chip.

[0004] Preferably, there are 12 six-channel opto-coupler isolation modules, which are U1, U2, U5, U3, U4, U16, U10, U11, U14, U12, U13, and U15 respectively;

[0005] The six-channel opto-coupler isolation module includes Input I and Input II. Input I is connected to pin 1 of the opto-coupler after being in series with resistor R. Input II is connected to one end of a capacitor and pin 2 of the opto-coupler. A 2KΩ resistor is connected between pin 1 and pin 2 of the opto-coupler. The other end of the capacitor is grounded. Pin 6 of the opto-coupler is connected to pin 4 after being in series with a 4.7KΩ resistor and finally connected to the output port. Pin 5 is grounded. The model of the opto-coupler is H11L1;

[0006] The input I of U1, U2, U5, U3, U4, U16, U10, U11, U14, U12, U13 and U15 is connected to pin 1 of the input module. The input II of U1 and U10 is connected to pin 3 of the input module. The input II of U2 and U11 is connected to pin 4 of the input module. The input II of U5 and U14 is connected to pin 5 of the input module. The input II of U3 and U12 is connected to pin 6 of the input module. The input II of U4 and U13 is connected to pin 7 of the input module. The input II of U16 and U15 is connected to pin 8 of the input module. The output ports of U1, U2, U5, U3, U4, U16, U10, U11, U14, U12, U13 and U15 are connected to the encoder.

[0007] Preferably, there are 2 encoders, namely U6 and U17. The output ports of U1, U2, U5, U3, U4, U16 are respectively connected to pin 2, pin 1, pin 6, pin 7, pin 10 and pin 9 of U6. The output ports of U10, U11, U14, U12, U13 and U15 are respectively connected to pin 2, pin 1, pin 6, pin 7, pin 10 and pin 9 of U17. The models of U6 and U17 are DS90C032B.

[0008] Preferably, there are 4 signal collectors, namely U7, U8, U18 and U19. Pin 3 and pin 4 of U7 are connected to pin 3 of U6. Pin 5 and pin 6 of U7 are connected to pin 5 of U6. Pin 7 and pin 8 of U7 are connected to pin 11 of U6. Pin 3 and pin 4 of U8 are connected to pin 1 of U6. Pin 5 and pin 6 of U8 are connected to pin 7 of U6. Pin 7 and pin 8 of U8 are connected to pin 9 of U6. Pin 3 and pin 4 of U18 are connected to pin 3 of U17. Pin 5 and pin 6 of U18 are connected to pin 5 of U17. Pin 7 and pin 8 of U17 are connected to pin 11 of U17. Pin 3 and pin 4 of U19 are connected to pin 3 of U17. Pin 5 and pin 6 of U19 are connected to pin 5 of U17. Pin 7 and pin 8 of U19 are connected to pin 11 of U17. U7, U8, U18 and U19 are connected to the slave ARM chip and the slave DSP chip through pins.

[0009] Preferably, pin 20, pin 18, and pin 16 of U7 and U8 are respectively connected to pin 101, pin 102, and pin 100 of the slave ARM chip, and pin 20, pin 18, and pin 16 of U18 and U19 are respectively connected to pin 98, pin 99, and pin 97 of the slave ARM chip; pin 21, pin 19, and pin 17 of U7 and U8 are respectively connected to pin 6, pin 7, and pin 2 of the slave DSP chip, and pin 21, pin 19, and pin 17 of U18 and U19 are respectively connected to pin 69, pin 75, and pin 85 of the slave DSP chip. Pin 13 to pin 16 of the slave ARM chip are respectively connected to pin 13, pin 14, pin 16, and pin 15 of the host ARM chip, and pin 50 and pin 51 of the slave ARM chip are respectively connected to pin 49 and pin 48 of the host ARM chip; pin 43 and pin 50 of the slave DSP chip are respectively connected to pin 51 and pin 50 of the host ARM chip.

[0010] Preferably, after a 32.768KHZ crystal oscillator X1 is connected between pin 31 and pin 32 of the slave ARM chip, 10PF capacitors C9 and C10 are respectively connected in series and then grounded together. A 1MΩ resistor R1 and a 10MHZ crystal oscillator X1 are connected in parallel between pin 37 and pin 38, and then 22PF capacitors C7 and C8 are respectively connected in series and then grounded together. Pin 122 is connected to inductor L1 and then grounded after being connected to pin 112, pin 103, pin 75, pin 52, pin 39, and pin 11. Pin 61 and pin 120 are respectively connected to inductor L3 and L2 and then connected to a high potential. A capacitor C6 is connected to pin 120 in parallel with inductor L2 and then grounded. Pin 54, pin 113, and pin 121 are respectively connected to 2.2UF capacitors C22, C20, and C18 and then grounded together. Pin 64 to pin 66 are respectively connected to pin 5, pin 3, and pin 4 of the programming port. A 10KΩ resistor R39 is connected between pin 65 of the slave ARM chip and the high potential. Pin 64 is connected to pin 2 of the IC integrated block. A 1KΩ resistor R40 is connected between pin 2 and pin 3. A 1UF capacitor C19 and a 1UF capacitor C21 are connected in parallel between pin 1 and pin 2 and then grounded. Pin 5, pin 13, pin 38, pin 61, pin 79, pin 93, pin 3, pin 14, pin 37, pin 63, pin 81, and pin 91 of the slave DSP chip are connected to 2.2UF capacitors and then grounded. Pin 12, pin 67, pin 70 to pin 72 are connected to the external connector pins. Pin 46 is connected to a 0.1UF capacitor and then connected to pin 90.

[0011] Preferably, there are 2 SPI absolute encoder signal input ports. The SPI absolute encoder signal input ports include input terminals. Pins 2 to 5 of the input terminals are respectively connected to pins 9 and 11 to 13 of the integrated circuit. Pins 4 to 6 of the integrated circuit are respectively connected to pins 2, 16 and 14 of Encoder II. The 2 SPI absolute encoder signal input ports are respectively connected to U6 and U17. The model of the SPI absolute encoder is ISO7241A.

[0012] Preferably, the two AC / DC conversion modules are two 220VAC to 5V DC modules. One is for powering the encoder, and the other is for converting the voltage to 3.3V for powering the slave ARM chip, the slave DSP chip and the host ARM chip. U3 powers the 5V DC module. The level conversion chip converts 3.3V digital signals into 5V digital signals. The model of the level conversion chip is SN74LVCC4245APW.

[0013] Preferably, the PWM output and communication chip module has 2 communication ports and 2 PWM wave output ports. The 2 communication ports are Communication Port I and Communication Port II respectively, and are connected to pins 46 and 47 of the host ARM chip. The PWM wave output ports are PWM Wave Output Port I and PWM Wave Output Port II respectively, and are connected to pins 86 and 87 of the host ARM chip.

[0014] Preferably, the models of the slave ARM chip and the host ARM chip are M483KIDAE, and the model of the slave DSP chip is TMS320F28069.

[0015] The technical effects and advantages of the present invention: The present invention can simultaneously collect two-channel encoder signals for comparative tests such as speed fluctuation and pulse number; the signal source for collection can be selected as differential signal or single-ended signal; the test CPU is optional, supporting two mainstream MCUs, DSP and ARM; it supports sending the collected data results to the PC side and saving them to Excel for further data analysis; the signal collection adopts an opto-isolation scheme and will not affect the operation of the servo controller. Description of the Drawings

[0016] Figure 1 It is the circuit schematic diagram of the SPI absolute encoder signal input port of the present invention;

[0017] Figure 2 It is the pin wiring diagram of the input module of the present invention;

[0018] Figure 3 It is the circuit schematic diagram of the AC / DC conversion module of the present invention;

[0019] Figure 4 Pin connection diagram of the six-channel optical coupler isolator module of the present invention;

[0020] Figure 5 Pin connection diagram of the encoder of the present invention;

[0021] Figure 6 Pin connection diagram of the signal collector of the present invention;

[0022] Figure 7 Pin connection diagram of the slave ARM chip of the present invention;

[0023] Figure 8 Pin connection diagram of the slave DSP chip of the present invention;

[0024] Figure 9 Pin connection diagram of the host ARM chip of the present invention;

[0025] Figure 10 Pin connection diagram of the SPI absolute encoder signal input port of the present invention;

[0026] Figure 11 Pin connection diagram of the level conversion chip of the present invention;

[0027] Figure 12 Schematic diagram of the PWM output and communication chip module circuit of the present invention;

[0028] Figure 13 is Figure 9 Enlarged view at location A in

[0029] Figure 14 is Figure 9 Enlarged view at location B in

[0030] Figure 15 is Figure 9 Enlarged view at location C in

[0031] Figure 16 is Figure 9 Enlarged view at location D in

[0032] Figure 17 is Figure 8 Enlarged view at location E in

[0033] Figure 18 is Figure 8 Enlarged view at location F in

[0034] Figure 19 is Figure 8 Enlarged view at location G in

[0035] Figure 20 Schematic diagram of the input end circuit of the six-channel optical coupler isolator module.

[0036] In the figure: 1 - input module, 2 - AC / DC conversion module, 3 - six-channel opto-coupler isolation module, 4 - encoder, 5 - signal collector, 6 - slave ARM chip, 7 - slave DSP chip, 8 - master ARM chip, 9 - Flash memory chip, 10 - SPI absolute encoder signal input port, 11 - level conversion chip, 12 - external connector for display screen, 13 - PWM output and communication chip module, 14 - programming port, 15 - IC integrated circuit, 16 - integrated circuit, 17 - encoder II, 31 - input I, 32 - input II, 131 - communication port I, 132 - communication port II, 133 - PWM wave output port I, 134 - PWM wave output port II. Specific implementation

[0037] In order to make the implementation means, creative features, achieved purposes and effects of the present invention easy to understand, the present invention will be further described below with reference to specific illustrations. In the description of the present invention, it should be noted that unless otherwise clearly specified and limited, the terms "installation", "connection", and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, an integral connection or a mechanical connection, or an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, and the interiors of two components can be connected.

[0038] Embodiment 1

[0039] As Figures 2 to 9 shown, an encoder tester includes an input module 1 and two AC / DC conversion modules 2. The input module 1 is connected to the encoder 4 through a six-channel opto-coupler isolation module 3. The encoder 4 converts four differential signals and then connects to a signal collector 5. The signal collector 5 is connected to a slave ARM chip 6 and a slave DSP chip 7. The slave ARM chip 6 and the slave DSP chip 7 are connected to a master ARM chip 8. The master ARM chip 8 is connected to a Flash memory chip 9, an SPI absolute encoder signal input port 10, a level conversion chip 11, an external connector for a display screen 12, and a PWM output and communication chip module 13. The master ARM chip 8 stores the measurement data in the Flash memory chip 9.

[0040] Embodiment 2

[0041] As Figures 1 to 20An encoder tester shown in the figure includes an input module 1 and two AC / DC conversion modules 2. The input module 1 is connected to an encoder 4 after passing through a six-channel opto-coupler isolation module 3. The encoder 4 converts four differential signals and then connects to a signal collector 5. The signal collector 5 is connected to a slave ARM chip 6 and a slave DSP chip 7. The slave ARM chip 6 and the slave DSP chip 7 are connected to a host ARM chip 8. The host ARM chip 8 is connected to a Flash storage chip 9, an SPI absolute encoder signal input port 10, a level conversion chip 11, a display external connector 12, a PWM output and communication chip module 13. The host ARM chip 8 stores the measurement data in the Flash storage chip 9.

[0042] Preferably, there are 12 six-channel opto-coupler isolation modules 3, which are U1, U2, U5, U3, U4, U16, U10, U11, U14, U12, U13 and U15 respectively;

[0043] The six-channel opto-coupler isolation module 3 includes an input I 31 and an input II 32. The input I 31 is connected to the pin 1 of the opto-coupler after being connected in series with a resistor R. The input II 32 is connected to one end of a capacitor and the pin 2 of the opto-coupler. A 2KΩ resistor is connected between the pin 1 and the pin 2 of the opto-coupler. The other end of the capacitor is grounded. The pin 6 of the opto-coupler is connected to the pin 4 after being connected in series with a 4.7KΩ resistor, and finally connected to the output port. The pin 5 is grounded. The model of the opto-coupler is H11L1;

[0044] The input I of U1, U2, U5, U3, U4, U16, U10, U11, U14, U12, U13 and U15 is connected to the pin 1 of the input module. The input II of U1 and U10 is connected to the pin 3 of the input module. The input II of U2 and U11 is connected to the pin 4 of the input module. The input II of U5 and U14 is connected to the pin 5 of the input module. The input II of U3 and U12 is connected to the pin 6 of the input module. The input II of U4 and U13 is connected to the pin 7 of the input module. The input II of U16 and U15 is connected to the pin 8 of the input module. The output ports of U1, U2, U5, U3, U4, U16, U10, U11, U14, U12, U13 and U15 are connected to the encoder.

[0045] Preferably, two encoders 4 are provided, namely U6 and U17. The output ports of U1, U2, U5, U3, U4, and U16 are respectively connected to pins 2, 1, 6, 7, 10, and 9 of U6. The output ports of U10, U11, U14, U12, U13, and U15 are respectively connected to pins 2, 1, 6, 7, 10, and 9 of U17. The models of U6 and U17 are DS90C032B.

[0046] Preferably, four signal collectors 5 are provided, namely U7, U8, U18, and U19. Pin 3 and pin 4 of U7 are connected to pin 3 of U6. Pin 5 and pin 6 of U7 are connected to pin 5 of U6. Pin 7 and pin 8 of U7 are connected to pin 11 of U6. Pin 3 and pin 4 of U8 are connected to pin 1 of U6. Pin 5 and pin 6 of U8 are connected to pin 7 of U6. Pin 7 and pin 8 of U8 are connected to pin 9 of U6. Pin 3 and pin 4 of U18 are connected to pin 3 of U17. Pin 5 and pin 6 of U18 are connected to pin 5 of U17. Pin 7 and pin 8 of U17 are connected to pin 11 of U17. Pin 3 and pin 4 of U19 are connected to pin 3 of U17. Pin 5 and pin 6 of U19 are connected to pin 5 of U17. Pin 7 and pin 8 of U19 are connected to pin 11 of U17. U7, U8, U18, and U19 are connected to slave ARM chip 6 and slave DSP chip 7 through pins.

[0047] Preferably, pins 20, 18, and 16 of U7 and U8 are respectively connected to pins 101, 102, and 100 of the slave ARM chip. Pins 20, 18, and 16 of U18 and U19 are respectively connected to pins 98, 99, and 97 of slave ARM chip 6. Pins 21, 19, and 17 of U7 and U8 are respectively connected to pins 6, 7, and 2 of slave DSP chip 7. Pins 21, 19, and 17 of U18 and U19 are respectively connected to pins 69, 75, and 85 of slave DSP chip 7. Pins 13 to 16 of the slave ARM chip are respectively connected to pins 13, 14, 16, and 15 of host ARM chip 8. Pins 50 and 51 of slave ARM chip 6 are respectively connected to pins 49 and 48 of host ARM chip 8. Pins 43 and 50 of slave DSP chip 7 are respectively connected to pins 51 and 50 of host ARM chip 8.

[0048] Preferably, after connecting a 32.768KHZ crystal oscillator X1 between pin 31 and pin 32 of the slave ARM chip 6, 10PF capacitors C9 and C10 are respectively connected in series and then grounded together. After connecting a 1MΩ resistor R1 and a 10MHZ crystal oscillator X1 in parallel between pin 37 and pin 38, 22PF capacitors C7 and C8 are respectively connected in series and then grounded together. Pin 122 is connected to inductor L1 and then grounded after being connected to pin 112, pin 103, pin 75, pin 52, pin 39 and pin 11. Pin 61 and pin 120 are respectively connected to inductor L3 and L2 and then connected to a high potential. A capacitor C6 is connected to pin 120 to be in parallel with inductor L2 and then grounded. Pin 54, pin 113 and pin 121 are respectively connected to 2.2UF capacitors C22, C20 and C18 and then grounded together. Pins 64 to 66 are respectively connected to pins 5, 3 and 4 of the programming port. A 10KΩ resistor R39 is connected between pin 65 of the slave ARM chip 6 and the high potential. Pin 64 is connected to pin 2 of the IC integrated block. A 1KΩ resistor R40 is connected between pin 2 and pin 3. A 1UF capacitor C19 and a 1UF capacitor C21 are connected in parallel between pin 1 and pin 2 and then grounded. Pins 5, 13, 38, 61, 79, 93, 3, 14, 37, 63, 81 and 91 of the slave DSP chip 7 are connected to 2.2UF capacitors and then grounded. Pins 12, 67, 70 to 72 are connected to the external connector pins. Pin 46 is connected to a 0.1UF capacitor and then connected to pin 90.

[0049] Preferably, there are 2 SPI absolute encoder signal input ports 10. The SPI absolute encoder signal input port 10 includes an input terminal 101. Pins 2 to 5 of the input terminal 101 are respectively connected to pins 9 and 11 to 13 of the integrated circuit 16. Pins 4 to 6 of the integrated circuit 16 are respectively connected to pins 2, 16 and 14 of the encoder II 17. The 2 SPI absolute encoder signal input ports 10 are respectively connected to U6 and U17. The SPI absolute encoder model is ISO7241A.

[0050] Preferably, the two-way AC / DC conversion module 2 is a two-way 220V AC to 5V DC module. One way supplies power to the encoder 4, and the other way supplies power to convert the slave ARM chip 6, the slave DSP chip 7 and the host ARM chip 8 into 3.3V voltage. U3 supplies power to the 5V DC module. The level conversion chip 11 converts the 3.3V digital signal into a 5V digital signal for voltage conversion. The model of the level conversion chip 11 is SN74LVCC4245APW.

[0051] Preferably, the PWM output and communication chip module 13 is provided with 2 communication ports and 2 PWM wave output ports. The 2 communication ports are communication port Ⅰ 131 and communication port Ⅱ 132 respectively, and are connected to pin 46 and pin 47 of the host ARM chip 8. The PWM wave output ports are PWM wave output port Ⅰ 133 and PWM wave output port Ⅱ 134 respectively, and are connected to pin 86 and pin 87 of the host ARM chip 8. The PWM output and communication chip module 13 uses communication chip U26 to send data to the computer and outputs two PWM waves through opto-coupler isolation.

[0052] Preferably, the model of the slave ARM chip 6 and the host ARM chip 8 is M483KIDAE, and the model of the slave DSP chip 7 is TMS320F28069.

[0053] The process flow and working principle of the present invention are as follows: The signal input port of the encoder 4 uses a six-channel opto-coupler isolation module 3 for six-channel opto-coupler isolation. After isolation, the data is transmitted to the encoder 4, and the four-channel signal is converted and input into the signal collector 5 for differential signal acquisition or single-ended signal acquisition. The acquired data is transmitted to the slave ARM chip 6 and the slave DSP chip 7 for data analysis and processing. The processed data is transmitted to the host ARM chip 8. The data collected by the slave ARM chip 6 and the slave DSP chip 7 is stored in the Flash memory chip 9 and compared and analyzed. Finally, the analysis result is displayed on the 7-inch LCD display through the display external connector 12.

[0054] Finally, it should be noted that the above are only the preferred embodiments of the present invention and are not used to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An encoder tester includes an input module and two AC / DC conversion modules. It is characterized in that: The input module is connected to the encoder after passing through a six-channel opto-coupler isolation module. The encoder converts four differential signals and then connects to a signal collector. The signal collector is connected to a slave ARM chip and a slave DSP chip. The slave ARM chip and the slave DSP chip are connected to a master ARM chip. The master ARM chip is connected to a Flash memory chip, an SPI absolute encoder signal input port, a level conversion chip, a display external connector, a PWM output, and a communication chip module. The master ARM chip stores the measurement data in the Flash memory chip. After connecting a 32.768KHZ crystal oscillator X1 between pin 31 and pin 32 of the slave ARM chip, 10PF capacitors C9 and C10 are respectively connected in series and then grounded together. After connecting a 1MΩ resistor R1 and a 10MHZ crystal oscillator X1 in parallel between pin 37 and pin 38, 22PF capacitors C7 and C8 are respectively connected in series and then grounded together. Pin 122 is connected to an inductor L1 and then grounded after being connected to pin 112, pin 103, pin 75, pin 52, pin 39, and pin 11. Pin 61 and pin 120 are respectively connected to inductors L3 and L2 and then connected to a high potential. A capacitor C6 is connected to pin 120 to be in parallel with inductor L2 and then grounded. Pin 54, pin 113, and pin 121 are respectively connected to 2.2UF capacitors C22, C20, and C18 and then grounded together. Pin 64 to pin 66 are respectively connected to pin 5, pin 3, and pin 4 of the programming port. A 10KΩ resistor R39 is connected between pin 65 of the slave ARM chip and the high potential. Pin 64 is connected to pin 2 of an IC integrated block. A 1KΩ resistor R40 is connected between pin 2 and pin 3. A 1UF capacitor C19 and a 1UF capacitor C21 are connected in parallel between pin 1 and pin 2 and then grounded. Pins 5, 13, 38, 61, 79, 93, 3, 14, 37, 63, 81, and 91 of the slave DSP chip are connected to 2.2UF capacitors and then grounded. Pins 12, 67, 70 to 72 are connected to the pins of the external connector. Pin 46 is connected to a 0.1UF capacitor and then connected to pin 90. The model of the slave ARM chip and the master ARM chip is M483KIDAE, and the model of the slave DSP chip is TMS320F28069.

2. An encoder tester according to claim 1, It is characterized in that: There are 12 six-channel opto-coupler isolation modules, which are U1, U2, U5, U3, U4, U16, U10, U11, U14, U12, U13, and U15 respectively; The six-channel opto-coupler isolation module includes Input I and Input II. Input I is connected to pin 1 of the opto-coupler after being in series with resistor R. Input II is connected to one end of a capacitor and pin 2 of the opto-coupler. A 2KΩ resistor is connected between pin 1 and pin 2 of the opto-coupler. The other end of the capacitor is grounded. Pin 6 of the opto-coupler is connected to pin 4 after being in series with a 4.7KΩ resistor, and finally connected to the output port. Pin 5 is grounded. The model of the opto-coupler is H11L1; The Input I of U1, U2, U5, U3, U4, U16, U10, U11, U14, U12, U13, and U15 is connected to pin 1 of the input module. The Input II of U1 and U10 is connected to pin 3 of the input module. The Input II of U2 and U11 is connected to pin 4 of the input module. The Input II of U5 and U14 is connected to pin 5 of the input module. The Input II of U3 and U12 is connected to pin 6 of the input module. The Input II of U4 and U13 is connected to pin 7 of the input module. The Input II of U16 and U15 is connected to pin 8 of the input module. The output ports of U1, U2, U5, U3, U4, U16, U10, U11, U14, U12, U13, and U15 are connected to the encoder.

3. An encoder tester according to claim 2, characterized in that: There are 2 encoders, namely U6 and U17. The output ports of U1, U2, U5, U3, U4, and U16 are respectively connected to pin 2, pin 1, pin 6, pin 7, pin 10, and pin 9 of U6. The output ports of U10, U11, U14, U12, U13, and U15 are respectively connected to pin 2, pin 1, pin 6, pin 7, pin 10, and pin 9 of U17. The models of U6 and U17 are DS90C032B.

4. An encoder tester according to claim 3, characterized in that: There are 4 signal collectors, namely U7, U8, U18, and U19. Pin 3 and pin 4 of U7 are connected to pin 3 of U6. Pin 5 and pin 6 of U7 are connected to pin 5 of U6. Pin 7 and pin 8 of U7 are connected to pin 11 of U6. Pin 3 and pin 4 of U8 are connected to pin 1 of U6. Pin 5 and pin 6 of U8 are connected to pin 7 of U6. Pin 7 and pin 8 of U8 are connected to pin 9 of U6. Pin 3 and pin 4 of U18 are connected to pin 3 of U17. Pin 5 and pin 6 of U18 are connected to pin 5 of U17. Pin 7 and pin 8 of U17 are connected to pin 11 of U17. Pin 3 and pin 4 of U19 are connected to pin 3 of U17. Pin 5 and pin 6 of U19 are connected to pin 5 of U17. Pin 7 and pin 8 of U19 are connected to pin 11 of U17. U7, U8, U18, and U19 are connected to the slave ARM chip and the slave DSP chip through pins.

5. An encoder tester according to claim 4, It is characterized in that: Pin 20, pin 18 and pin 16 of the U7 and U8 are respectively connected to pin 101, pin 102 and pin 100 of the slave ARM chip, and pin 20, pin 18 and pin 16 of the U18 and U19 are respectively connected to pin 98, pin 99 and pin 97 of the slave ARM chip; Pin 21, pin 19 and pin 17 of the U7 and U8 are respectively connected to pin 6, pin 7 and pin 2 of the slave DSP chip, and pin 21, pin 19 and pin 17 of the U18 and U19 are respectively connected to pin 69, pin 75 and pin 85 of the slave DSP chip. Pin 13 to pin 16 of the slave ARM chip are respectively connected to pin 13, pin 14, pin 16 and pin 15 of the host ARM chip, and pin 50 and pin 51 of the slave ARM chip are respectively connected to pin 49 and pin 48 of the host ARM chip; Pin 43 and pin 50 of the slave DSP chip are respectively connected to pin 51 and pin 50 of the host ARM chip.

6. An encoder tester according to claim 5, It is characterized in that: There are 2 SPI absolute encoder signal input ports. The SPI absolute encoder signal input port includes an input terminal. Pin 2 to pin 5 of the input terminal are respectively connected to pin 9 and pin 11 to pin 13 of the integrated circuit. Pin 4 to pin 6 of the integrated circuit are respectively connected to pin 2, pin 16 and pin 14 of the encoder II. The 2 SPI absolute encoder signal input ports are respectively connected to U6 and U17. The SPI absolute encoder model is ISO7241A.

7. An encoder tester according to claim 6, It is characterized in that: The two AC / DC conversion modules are two 220VAC to 5V DC modules. One is for powering the encoder, and the other is for converting the slave ARM chip, the slave DSP chip and the host ARM chip into 3.3V voltage for power supply. U3 powers the 5V DC module. The level conversion chip converts the 3.3V digital signal into a 5V digital signal. The model of the level conversion chip is SN74LVCC4245APW.

8. An encoder tester according to claim 7, It is characterized in that: The PWM output and communication chip module is provided with 2 communication ports and 2 PWM wave output ports. The 2 communication ports are respectively communication port I and communication port II, and are connected to pin 46 and pin 47 of the host ARM chip. The PWM wave output ports are respectively PWM wave output port I and PWM wave output port II, and are connected to pin 86 and pin 87 of the host ARM chip.

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