A method for reducing stress in an SOI silicon wafer

Abstract

The application provides a preparation method for reducing stress of SOI silicon wafer, which comprises the following steps: oxidizing a first silicon wafer to obtain a first silicon wafer with an oxide layer; injecting hydrogen ions into the first silicon wafer with the oxide layer, cleaning the first silicon wafer after the injection by using concentrated sulfuric acid and hydrogen peroxide mixture, SC1 and SC2 to obtain a first silicon wafer after the injection; performing first low-temperature annealing treatment on the first silicon wafer after the injection, cleaning the first silicon wafer after the treatment by using SC1 and SC2 to obtain a first silicon wafer after the treatment; cleaning a second silicon wafer by using SC1 and SC2, bonding the cleaned second silicon wafer with the first silicon wafer after the treatment at room temperature, and performing second low-temperature annealing treatment to obtain a bonded wafer; performing wafer splitting on the bonded wafer to obtain SOI; and removing the SOI film with a thickness of 500-2000 angstroms by chemical mechanical polishing, so that the SOI silicon wafer with small bending value is prepared.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of microelectronic technology, and in particular to a preparation method for reducing stress of SOI silicon wafer. BACKGROUND

[0002] Silicon-On-Insulator (SOI) is a new type of silicon-based semiconductor material with a unique "Si / insulating layer / Si" three-layer structure. SOI technology introduces an insulating buried layer (i.e., buried oxide layer) between the top silicon layer and the back substrate, and achieves full dielectric isolation of the device and the substrate through the insulating buried layer (usually silicon dioxide SiO2).

[0003] By forming a semiconductor thin film on an insulator, SOI material has advantages that bulk silicon cannot match: (1) it can achieve dielectric isolation of components in integrated circuits, and completely eliminates the parasitic latch-up effect in bulk silicon CMOS circuits; (2) integrated circuits made of SOI have small parasitic capacitance, high integration density, high speed, simple process, small short channel effect, and are particularly suitable for low-voltage and low-power circuits, etc. Therefore, SOI will be widely used in deep sub-micron low-voltage and low-power integrated circuits.

[0004] Currently, SOI materials mainly include: (1) SIMOX (Separation by Implanted Oxygen) material for oxygen isolation, suitable for making thin film fully depleted very large scale integrated circuits; (2) BESOI (Bonding-Etchback SOI) material for silicon wafer bonding and back etching, suitable for making partially depleted integrated circuits; (3) Smart Cut SOI material combining bonding and implantation, etc.

[0005] However, in the existing preparation process of SOI, the silicon wafer after implanting hydrogen ions will generate a large stress inside, the Bow value will increase, resulting in an increase in the final SOI bow, thereby affecting the quality of the final SOI product. Therefore, it is urgent to develop a method for reducing the stress of SOI silicon wafer to meet people's needs. SUMMARY

[0006] The purpose of the present application is to provide a preparation method for reducing the stress of SOI silicon wafer, which reduces the stress inside the SOI silicon wafer through low-temperature annealing after implantation, thereby preparing an SOI silicon wafer with a small bow value.

[0007] The present invention provides a preparation method for reducing stress of an SOI silicon wafer, comprising: oxidizing a first silicon wafer at a temperature of 850 to 1150° C. in a hydrogen and oxygen atmosphere to obtain a first silicon wafer having an oxide layer; injecting hydrogen ions into the first silicon wafer having the oxide layer to a depth of 500 to 10,000 Å; after the injection, sequentially washing for 1 to 60 minutes using a mixture of concentrated sulfuric acid and hydrogen peroxide in a volume ratio of 3:1 to 5:1, SC1, and SC2 to obtain the injected first silicon wafer; performing a first low-temperature annealing treatment on the injected first silicon wafer, and then washing for 1 to 60 minutes using SC1 and SC2 to obtain the treated first silicon wafer; wherein the conditions for the first low-temperature annealing treatment are: using nitrogen protection, gas The method comprises the following steps: a flow rate of 5 to 20 L / min, an annealing temperature of 100 to 400°C, and an annealing time of 0.5 to 5 hours; cleaning the second silicon wafer with SC1 and SC2 for 1 to 60 minutes, bonding the cleaned second silicon wafer to the treated first silicon wafer at room temperature, and performing a second low-temperature annealing treatment to obtain a bonded wafer; wherein the bonding conditions are: an ion activation time of 0 to 30 seconds; the second low-temperature annealing conditions are: 100 to 350°C, a nitrogen flow rate of 1 to 10 L / min, and an annealing time of 0.5 to 5 hours; splitting the bonded wafer to obtain an SOI; and removing 500 to 2000 Å of the SOI film thickness with chemical mechanical polishing to obtain an SOI with a curvature value less than 10 μm.

[0008] Optionally, the first silicon wafer and the second silicon wafer have the same size.

[0009] Optionally, the second silicon wafer is a silicon wafer with arbitrary resistivity and crystal orientation.

[0010] Optionally, the second silicon wafer is an oxide wafer or a photolithography wafer.

[0011] Optionally, the splitting process is: placing the bonded wafer into a microwave splitting machine, heating the bonded wafer to 100-200°C in the chamber of the microwave splitting machine, and keeping it warm for 10-30 minutes; turning on the microwave magnetron head of the microwave splitting machine for splitting, the time is 1-10 minutes, and the SOI is obtained after splitting.

[0012] The preparation method for reducing stress of an SOI silicon wafer of the present invention reduces stress inside the SOI silicon wafer by low-temperature annealing after implantation, thereby preparing an SOI silicon wafer with a small curvature value. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0014] Figure 1Flowchart of a method for reducing stress in a SOI silicon wafer according to an embodiment of the present invention;

[0015] Figure 2 Schematic diagram of the preparation method for reducing stress of SOI silicon wafer according to an embodiment of the present invention. DETAILED DESCRIPTION

[0016] Various example embodiments will now be described more fully with reference to the accompanying drawings, in which some example embodiments are shown.

[0017] Refer to the following Figure 1 and Figure 2 A preparation method for reducing stress in an SOI silicon wafer according to an embodiment of the present invention is described.

[0018] Example 1.

[0019] Figure 1 Flowchart of a method for reducing stress in SOI silicon wafers according to an embodiment of the present invention. Figure 2 Schematic diagram of the preparation method for reducing stress of SOI silicon wafer according to an embodiment of the present invention.

[0020] Reference Figure 1 and Figure 2 In step S10, the first silicon wafer is oxidized at a temperature of 1050° C. in an atmosphere of hydrogen (H 2 ) and oxygen (O 2 ) to obtain a first silicon wafer having an oxide layer (eg, silicon dioxide SiO 2 ).

[0021] As an example, the first silicon wafer may be an 8-inch P-type silicon wafer, and its crystal orientation may be <100> or <111> , the resistivity is 8 to 12 ohm.cm, but the present invention is not limited thereto.

[0022] As an example, the oxide layer is silicon dioxide.

[0023] Preferably, the first silicon wafer with an oxide layer is cleaned to remove surface contaminants, and then a particle tester and a film thickness tester are used to test the surface particles of the first silicon wafer with an oxide layer @0.2um<2ea and the thickness of the oxide layer is 1000A±50A (angstroms).

[0024] In step S20, hydrogen ions (H + ), and after the injection, the silicon wafer was cleaned in sequence with a mixture of concentrated sulfuric acid and hydrogen peroxide (H2O2), SC1, and SC2 for 30 minutes to obtain the first silicon wafer after injection.

[0025] Preferably, the implantation depth is 6000 Å.

[0026] Here, the mixture of concentrated sulfuric acid and hydrogen peroxide is used to remove organic matter, the volume ratio of the concentrated sulfuric acid to the hydrogen peroxide being 3:1; SC1 is a mixed solution of ammonia, hydrogen peroxide and ultrapure water, used to remove surface particles; and SC2 is a mixed solution of hydrochloric acid, hydrogen peroxide and ultrapure water, used to clean metal contamination.

[0027] The surface particles of the silicon wafer with the implanted oxide layer are then tested using a test device, the result being that the surface particles of the silicon wafer with the implanted oxide layer are 0.2um < 5ea.

[0028] In step S30, the first silicon wafer after implantation is subjected to a first low-temperature annealing process. The hydrogen ions in the lattice gaps are driven out by increasing the low-temperature annealing, so that the lattice expansion returns to the level before implantation, the bending degree of the silicon wafer is reduced, and the stress of the silicon wafer is reduced. The first silicon wafer after treatment is obtained by cleaning for 30 minutes using SC1 and SC2.

[0029] As an example, the conditions of the first low-temperature annealing process are as follows: nitrogen (N2) protection, gas flow 15L / min; annealing temperature 200℃, annealing time 3h.

[0030] The surface particles of the silicon wafer after treatment are then tested using a test device, the result being that the surface particles of the silicon wafer after treatment are 0.2um < 10ea.

[0031] In step S40, the second silicon wafer is cleaned using SC1 and SC2 for 1-60 minutes, and then the cleaned second silicon wafer and the first silicon wafer after treatment are bonded at room temperature and subjected to a second low-temperature annealing process, to obtain a bonded wafer.

[0032] As an example, the first silicon wafer and the second silicon wafer are of the same size.

[0033] Specifically, the second silicon wafer is a silicon wafer of any resistivity and crystal orientation.

[0034] Preferably, the second silicon wafer is an oxidized wafer or a light wafer.

[0035] As an example, the bonding conditions are as follows: ion activation time is 20s. That is, the surface is treated for 20s using plasma activation technology to enhance the pre-bonding force during bonding, to perform pre-bonding, so that the cleaned second silicon wafer and the first silicon wafer after treatment are bonded together.

[0036] As an example, the conditions of the second low-temperature annealing process are as follows: 300℃, nitrogen flow 5L / min, annealing time 3h, the purpose being to increase the bonding force to bond the two silicon wafers together.

[0037] In step S50, the bonded wafer is subjected to wafer splitting, to obtain an SOI.

[0038] As an example, the splitting process is as follows: the bonded wafer is placed in a microwave splitting machine, the temperature of the bonded wafer is raised to 150° C. in the chamber of the microwave splitting machine, and kept warm for 25 minutes; the microwave magnetron head of the microwave splitting machine is turned on for splitting, and the time is 4 minutes. After splitting, the SOI is obtained.

[0039] In step S60, chemical mechanical polishing (CMP) is used to remove 1000 Å of the SOI film thickness.

[0040] Preferably, the removal rate of the chemical mechanical polishing is: 10A / s.

[0041] As you can understand, hydrogen is a reactive element. Once implanted into silicon, it immediately combines with impurities, defects, and dangling bonds within the silicon to form various hydrogen complexes. Furthermore, a small amount of hydrogen may reside in the interstitial spaces of the crystal lattice, existing in either atomic or molecular form. Regardless of the form of hydrogen implanted, it causes expansion of the crystal lattice, introducing strain. This results in an increase in the geometric curvature of the silicon wafer, and consequently, in the curvature of the resulting SOI.

[0042] The present invention's first low-temperature annealing treatment after implantation effectively reduces stress and curvature in SOI wafers. Without the low-temperature annealing, SOI wafers with implantation exhibit a relatively high curvature, exceeding 40 μm. However, the SOI wafer fabricated using the present invention exhibits an even better curvature, less than 10 μm.

[0043] The beneficial effects of the method for reducing stress in SOI silicon wafers according to an embodiment of the present invention will be described in detail below with reference to examples.

[0044] Taking the method for preparing SOI without low-temperature annealing after implantation as a comparative example, the comparison of the curvature values ​​of Example 1 of the present invention and the comparative example is shown in Table 1.

[0045] Table 1: Comparison of curvature values ​​of Example 1 and Comparative Example

[0046]

[0047]

[0048] As shown in Table 1, the curvature values ​​of the three SOI silicon wafers prepared using the method of Example 1 of the present invention are 6.7μm, 7.3μm, and 8.5μm, respectively, all less than 10μm. In contrast, the curvature value of the SOI silicon wafer prepared in the comparative example without low-temperature annealing after implantation is larger, exceeding 40μm. Therefore, the curvature value of the SOI silicon wafer prepared in Example 1 of the present invention is significantly smaller than the curvature value of the SOI silicon wafer prepared without low-temperature annealing (the comparative example), indicating that the SOI silicon wafer prepared in Example 1 of the present invention has a better curvature value.

[0049] Example 2.

[0050] This embodiment provides a preparation method for reducing stress in SOI silicon wafers, comprising:

[0051] The first silicon wafer is oxidized at a temperature of 900° C. in a hydrogen and oxygen atmosphere to obtain a first silicon wafer having an oxide layer.

[0052] The first silicon wafer having the oxide layer is injected with hydrogen ions at a depth of 1000 Å; after the injection, it is cleaned in sequence with a mixture of concentrated sulfuric acid and hydrogen peroxide at a volume ratio of 4:1, SC1, and SC2 for 1 to 60 minutes to obtain the injected first silicon wafer.

[0053] The first silicon wafer after injection was subjected to a first low-temperature annealing treatment, and then cleaned for 50 minutes using SC1 and SC2 to obtain a treated first silicon wafer; wherein the conditions for the first low-temperature annealing treatment are: nitrogen protection, a gas flow rate of 5 L / min, an annealing temperature of 350°C, and an annealing time of 1.5 hours.

[0054] The second silicon wafer was cleaned for 50 minutes using SC1 and SC2, and then the cleaned second silicon wafer was bonded to the treated first silicon wafer at room temperature and subjected to a second low-temperature annealing treatment to obtain a bonded wafer. The bonding conditions were: an ion activation time of 10 seconds; and the second low-temperature annealing conditions were: 150°C, a nitrogen flow rate of 3 L / min, and an annealing time of 1 hour.

[0055] The bonded wafer is split to obtain SOI.

[0056] Chemical mechanical polishing is used to remove 600 Å of the SOI film thickness, thereby obtaining an SOI with a curvature value less than 10 μm.

[0057] The beneficial effects of the method for reducing stress in SOI silicon wafers according to an embodiment of the present invention will be described in detail below with reference to examples.

[0058] Taking the method for preparing SOI without low-temperature annealing after implantation as a comparative example, the comparison of the curvature values ​​of Example 2 of the present invention and the comparative example is shown in Table 2.

[0059] Table 2: Comparison of curvature values ​​between Example 2 and Comparative Example

[0060] Film number Example 2 Comparative Example 4# 6.5μm 41.5μm 5# 6.3μm 42.7μm 6# 6.8μm 40.5μm

[0061] It should be understood that the parts of this embodiment that are the same as those in the first embodiment will not be repeated.

[0062] Example 3.

[0063] This embodiment provides a preparation method for reducing stress in SOI silicon wafers, comprising:

[0064] The first silicon wafer is oxidized at a temperature of 1100° C. in a hydrogen and oxygen atmosphere to obtain a first silicon wafer having an oxide layer.

[0065] The first silicon wafer having the oxide layer was injected with hydrogen ions at a depth of 8000 Å. After the injection, the wafer was cleaned for 10 minutes using a mixture of concentrated sulfuric acid and hydrogen peroxide at a volume ratio of 5:1, SC1, and SC2 to obtain the injected first silicon wafer.

[0066] The first silicon wafer after injection is subjected to a first low-temperature annealing treatment, and then cleaned for 10 minutes using SC1 and SC2 to obtain a treated first silicon wafer; wherein the conditions for the first low-temperature annealing treatment are: nitrogen protection, a gas flow rate of 10 L / min, an annealing temperature of 350°C, and an annealing time of 2 hours.

[0067] The second silicon wafer was cleaned for 20 minutes using SC1 and SC2, and then the cleaned second silicon wafer was bonded to the treated first silicon wafer at room temperature and subjected to a second low-temperature annealing treatment to obtain a bonded wafer. The bonding conditions were: an ion activation time of 30 seconds; and the second low-temperature annealing conditions were: 200°C, a nitrogen flow rate of 9 L / min, and an annealing time of 4 hours.

[0068] The bonded wafer is split to obtain SOI.

[0069] Chemical mechanical polishing is used to remove 1500 Å of the SOI film thickness, thereby obtaining an SOI with a curvature value less than 10 μm.

[0070] The beneficial effects of the method for reducing stress in SOI silicon wafers according to an embodiment of the present invention will be described in detail below with reference to examples.

[0071] Taking the method for preparing SOI without low-temperature annealing after implantation as a comparative example, the comparison of the curvature values ​​of Example 3 of the present invention and the comparative example is shown in Table 2.

[0072] Table 3: Comparison of curvature values ​​of Example 3 and Comparative Example

[0073]

[0074]

[0075] In summary, it can be seen from the data of Example 1, Example 2, Example 3 and the comparative example that the SOI curvature (Bow) value produced by the preparation method of the embodiment of the present invention is smaller, so the stress of the SOI is lower, which is suitable for industrial production and can be mass-produced to obtain SOI of better quality.

[0076] It should be understood that the parts of this embodiment that are the same as those in the first embodiment will not be repeated.

[0077] While the invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A preparation method for reducing stress of SOI silicon wafer, characterized in that: The preparation method comprises: Oxidizing the first silicon wafer at a temperature of 850-1150° C. in a hydrogen and oxygen atmosphere to obtain a first silicon wafer having an oxide layer; The first silicon wafer having the oxide layer is implanted with hydrogen ions at a depth of 500 to 10,000 Å; after the implantation, the wafer is cleaned for 1 to 60 minutes using a mixture of concentrated sulfuric acid and hydrogen peroxide in a ratio of 3:1 to 5:1, SC1, and SC2, to obtain the implanted first silicon wafer; Performing a first low-temperature annealing treatment on the implanted first silicon wafer, and then cleaning it with SC1 and SC2 for 1 to 60 minutes to obtain a treated first silicon wafer; wherein the conditions of the first low-temperature annealing treatment are: using nitrogen protection, a gas flow rate of 5 to 20 L / min, an annealing temperature of 100 to 400° C., and an annealing time of 0.5 to 5 hours; The second silicon wafer is cleaned using SC1 and SC2 for 1 to 60 minutes, and then the cleaned second silicon wafer is bonded to the treated first silicon wafer at room temperature and subjected to a second low-temperature annealing treatment to obtain a bonded wafer; wherein the bonding conditions are: an ion activation time of 0 to 30 seconds; and the second low-temperature annealing conditions are: 100 to 350° C., a nitrogen flow rate of 1 to 10 L / min, and an annealing time of 0.5 to 5 hours; Splitting the bonded wafer to obtain SOI; Using chemical mechanical polishing to remove 500 to 2000 Å of the SOI film thickness to obtain an SOI with a curvature value less than 10; The first silicon wafer and the second silicon wafer have the same size; The second silicon wafer is a silicon wafer with arbitrary resistivity and crystal orientation; The second silicon wafer is an oxide wafer or a light wafer; The splitting process is as follows: placing the bonded wafer into a microwave splitting machine, heating the bonded wafer to 100-200° C. in the chamber of the microwave splitting machine and keeping the temperature for 10-30 minutes; turning on the microwave magnetron head of the microwave splitting machine to perform splitting for 1-10 minutes, and obtaining the SOI after splitting.

2. The preparation method according to claim 1, wherein The oxidation temperature is 1050°C, the injection depth is 6000A, and the volume ratio of the concentrated sulfuric acid and hydrogen peroxide mixture is 3:1; The conditions of the first low-temperature annealing treatment are: nitrogen protection, gas flow rate 15 L / min, annealing temperature 200° C., annealing time 3 h; The bonding conditions are: ion activation time of 20s; the second low-temperature annealing conditions are: 300°C, nitrogen flow rate of 5L / min, and annealing time of 3h; Chemical mechanical polishing was used to remove 1000 Å of the SOI film.

3. The preparation method according to claim 1, wherein The oxidation temperature is 900°C, the injection depth is 1000A, and the volume ratio of the concentrated sulfuric acid and hydrogen peroxide mixture is 4:1; The conditions of the first low-temperature annealing treatment are: nitrogen protection, gas flow rate 5 L / min, annealing temperature 350° C., annealing time 1.5 h; The bonding conditions are: ion activation time of 10s; the second low-temperature annealing treatment conditions are: 150°C, nitrogen flow rate of 3L / min, and annealing time of 1h; Chemical mechanical polishing was used to remove 600 Å of the SOI film.

4. The preparation method according to claim 1, wherein The oxidation temperature is 1100°C, the injection depth is 8000A, and the volume ratio of the concentrated sulfuric acid and hydrogen peroxide mixture is 5:1; The conditions of the first low-temperature annealing treatment are: nitrogen protection, gas flow rate 10 L / min, annealing temperature 350° C., annealing time 2 h; The bonding conditions are: ion activation time of 30s; the second low-temperature annealing conditions are: 200°C, nitrogen flow rate of 9L / min, and annealing time of 4h; Chemical mechanical polishing was used to remove 1500 Å of the SOI film.

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