Process for manufacturing microelectromechanical devices, in particular electroacoustic modules
By testing ASICs at the wafer level and using a process with redistributed structures and strut connections, the challenges of flexibility and testing in MEMS device manufacturing have been solved, enabling efficient MEMS device manufacturing and performance improvement.
Patent Information
- Application Number
- CN201910660882.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-07-23
- Filing Date
- 2019-07-22
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2039-07-22
AI Technical Summary
Existing technologies have low flexibility in manufacturing MEMS devices, make it difficult to test ASICs, and require the same pitch for the electrical connection pads between the transducer and the ASIC, resulting in complex and inflexible manufacturing processes.
A process for manufacturing MEMS devices is employed that allows for ASIC testing at the wafer level by forming mechanical and electrical coupling between ASIC components and MEMS wafers, and achieves efficient coupling between transducers and ASICs through redistributed structures and strut connections, reducing connection complexity.
This enables ASIC testing at the wafer level, improving the flexibility and precision of the manufacturing process, allowing for the formation of thin-film structures, and enhancing the performance and reliability of electroacoustic modules.
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Figure CN110745775B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to a process for manufacturing microelectromechanical system (MEMS) devices and, in particular, electroacoustic modules. BACKGROUND
[0002] As is known, nowadays there are many ultrasonic sensors available, which are adapted to transmit and receive acoustic waves at frequencies higher than 20 kHz. Typically, in addition to the transducer of the electroacoustic type, the ultrasonic sensor comprises an electric circuit adapted to drive the transducer and, after receiving the echo acoustic signal, to amplify the electric signal generated by the transducer itself. Thus, at different time periods, the transducer acts both as a sound emitter and as a sound receiver.
[0003] If we designate the acoustic signal (or acoustic beam) transmitted by the transducer and the acoustic signal (or acoustic beam) impinging on the transducer (for example, after reflection of the stimulus acoustic signal by an obstacle) as "stimulus acoustic signal" and "response acoustic signal", respectively, it is known, for example in the field of ultrasonic imaging, the need to be able to focus the stimulus acoustic signal. In order to control the emission in space of the stimulus acoustic signal, it is known to provide a plurality of transducers (each of which emits a spherical acoustic wave) and to control them with driving signals appropriately phase-shifted with respect to each other, so that the sum of the stimulus acoustic signals generated by the transducers forms an acoustic beam having the desired spatial distribution.
[0004] This is to say, in order to improve the performance, in particular as regards the performance of amplifying the echo, typically the transducers formed by corresponding MEMS devices arranged according to a matrix are arranged as close as possible to the electronic circuit, and in particular to the part of the electronic circuit having the function of amplifying the electric signal generated by the transducer. However, this is difficult because the number of transducers typically used is very high (of the order of thousands).
[0005] In fact, since each transducer is coupled to a respective ASIC (Application Specific Integrated Circuit) forming the receiver and driving circuit associated with the transducer, it is necessary to manage the thousands of connections existing between the transducers and the ASICs connected to them, controlling the delay introduced by the different channels (each of which is understood to be formed by a transducer, a corresponding driving circuit and a corresponding receiver) and the jitter existing between the individual channels.
[0006] This is to say that a manufacturing process is currently known which envisages processing a first semiconductor wafer and a second semiconductor wafer to form a plurality of transducers in the first wafer and also a plurality of ASICs in the second wafer. Then, the first wafer and the second wafer are coupled together so that the transducers are coupled to the corresponding ASICs. However, this process is characterized by low flexibility since it envisages adopting a single manufacturing technology for both the driving circuit and the receiving circuit. Moreover, this manufacturing process does not allow testing the ASICs unless the process itself is completed. Furthermore, this manufacturing process requires that the pitch of the electrical connection pads in the first wafer and in the second wafer should be the same. SUMMARY
[0007] Therefore, the object of the present disclosure is to provide a process for manufacturing a MEMS device which will overcome, at least in part, the drawbacks of the prior art.
[0008] According to the present disclosure, a manufacturing process and a MEMS device are provided. BRIEF DESCRIPTION OF DRAWINGS
[0009] For a better understanding of the present disclosure, its preferred embodiments will now be described, by way of non-limiting example only, with reference to the attached drawings, wherein:
[0010] Figure 1 is a schematic cross-sectional view of an electroacoustic module;
[0011] Figure 2 is a schematic top plan view of a partially removed reconstituted wafer;
[0012] Figure 3 is a schematic cross-sectional view of a portion of the reconstituted wafer shown in Figure 2 is a schematic cross-sectional view of a portion of the reconstituted wafer shown in Figure 2
[0013] Figure 4 is a schematic cross-sectional view of a semiconductor wafer during a step of the present manufacturing process;
[0014] Figures 5 to 9 is a schematic cross-sectional view of a multi-wafer assembly during successive steps of a variant of the present manufacturing process;
[0015] Figure 10 is a schematic cross-sectional view of an assembly comprising a plurality of dies during a step of a variant of the present manufacturing process;
[0016] Figure 11 is a schematic cross-sectional view of a portion of the reconstituted wafer; and
[0017] Figures 12 to 15 is a schematic cross-sectional view of a wafer-die assembly during successive steps of a variant of the present manufacturing process. DETAILED DESCRIPTION
[0018] Figure 1 An electro-acoustic module 1 is shown, which comprises a first die 2 and a second die 4, inside which a first integrated circuit 6 and a second integrated circuit 8 are respectively formed, for example by means of ASICs of the known type. Each of the first integrated circuit 6 and the second integrated circuit 8 comprises a respective transmitting circuit and a respective receiving circuit, denoted with 10 and 12, respectively, in the case of the first integrated circuit 6, and with 14 and 16, respectively, in the case of the second integrated circuit 8.
[0019] Although not shown in detail, in each of the first integrated circuit 6 and the second integrated circuit 8, the corresponding transmitting circuit and receiving circuit are electrically connected to a corresponding plurality of metal bumps, denoted with 18 and 20, respectively, and also referred to as "micro bumps". Again in a manner known per se, the bumps 18, 20 are electrically connected to the so-called final metallization of the corresponding die.
[0020] The electro-acoustic module 1 further comprises a coating region 22, for example made of epoxy resin, which encloses the first die 2 and the second die 4 and a portion of the corresponding bumps 18, 20. The coating region 22 comprises a first surface SI and a second surface S2. The bumps 18, 20 of the first die 2 and of the second die 4 extend through the first surface SI. Furthermore, extending through the coating region 22 are a plurality of vertical connection regions 24 of the type known as "through- mold vias" (TMVs), each of which is made of a metal material and extends through the first surface SI and the second surface S2.
[0021] The electro-acoustic module 1 further comprises a redistribution structure 26, which comprises a dielectric region 28, a plurality of electrically conductive paths 30 (qualitatively represented) and a plurality of internal pads 32 and external pads 34.
[0022] For example, the dielectric region 28 is made of polyimide (otherwise, for example, polyamide or resin with glass fibers) and extends in contact with the first surface SI. The dielectric region 28 has a third surface S3 and a fourth surface S4, which contacts the first surface SI.
[0023] The internal pads 32 are made of a metallic material and extend through the first surface S1 to contact the corresponding bumps 18, 20 of the first die 2 or of the second die 4. The external pads 34 are made of a metallic material and extend through the third surface S3. Moreover, the electrically conductive paths 30, e.g. made of the same metallic material (e.g. copper) as the metallic material of the internal pads 32 and of the external pads 34, connect each internal pad 32 to a corresponding external pad 34 or, otherwise, to a portion of the corresponding vertical connection area 24 extending through the first surface S1. In this regard, the portion of the vertical connection area 24 extending through the second surface S2 is adapted to be electrically connected to a PCB (Printed Circuit Board) not shown.
[0024] The electro-acoustic module 1 further comprises a plurality of pillars 36 made of a metallic material, e.g. copper, extending from the third surface S3 in a direction perpendicular to the first surface S1, to the second surface S2, to the third surface S3 and to the fourth surface S4. For example, each pillar 36 has a cylindrical shape. Moreover, each pillar 36 contacts, at a respective first end, a corresponding external pad 34.
[0025] The electro-acoustic module 1 further comprises a structure 38, hereinafter referred to as “transducing structure 38”.
[0026] The transducing structure 38 comprises a multilayer region 39 having a fifth surface S5 and a sixth surface S6, the fifth surface S5 facing the third surface S3.
[0027] By way of example, the multilayer region 39 comprises a passivation layer 41a, a first dielectric layer 41b, a semiconductor layer 41c and a second dielectric layer 41d, now described with reference to the orientation taken by the electro-acoustic module 1 in Figure 1 in the electro-acoustic module 1.
[0028] In detail, the passivation layer 41a forms the fifth surface S5 and is, for example, made of silicon nitride. Moreover, the first dielectric layer 41b extends underneath the passivation layer 41a it directly contacts and is, for example, made of silicon oxide. The semiconductor layer 41c extends underneath the first dielectric layer 41b it directly contacts. For example, the second dielectric layer 41d is made of silicon oxide. Moreover, the second dielectric layer 41d extends underneath the semiconductor layer 41c it directly contacts and forms the sixth surface S6.
[0029] The transducing structure 38 further comprises a semiconductor region 42, hereinafter referred to as “non-deformable region 42”.
[0030] In detail, the non-deformable region 42 extends under the second dielectric layer 41d that it directly contacts. Moreover, the non-deformable region 42 is delimited at the bottom by the seventh surface S7 and laterally delimits a plurality of recesses 52.
[0031] In more detail, each recess 52 has, for example, a cylindrical shape. Moreover, the portion of the multilayer region 39 that delimits the top of the corresponding recess 52 acts as a membrane (denoted with 40), while the non-deformable region 42 acts as a non-deformable frame to which the membrane is fixed.
[0032] Without implying any generality loss, in Figure 1 In the top plan view, the non-deformable region 42 has, for example, a rectangular envelope. For example, the membrane 40 can have a thickness between 5 pm and 7 pm.
[0033] The fifth surface S5 carries a plurality of pads 50 made of a metallic material, which will be referred to as "driving pads 50". In particular, each driving pad 50 extends on the passivation layer 41a to contact the corresponding pillar 36. In other words, each pillar 36 is interposed between the corresponding external pad 34 and the corresponding driving pad 50.
[0034] The electroacoustic module 1 further comprises a sealing region 53, for example made of benzocyclobutene (BCB), and extending between the multilayer region 39 and the dielectric region 28 of the redistribution structure 26 to laterally delimit an enclosed cavity 55, which is also delimited by the fourth surface S4 and by the fifth surface S5. The pillars 36 extend inside the enclosed cavity 55.
[0035] The electroacoustic module 1 further comprises a plurality of actuators 56. By way of example, the electroacoustic module 1 comprises one actuator 56 for each membrane 40. Each actuator 56 extends in the enclosed cavity 55, contacting the corresponding membrane 40.
[0036] In more detail, each actuator 56 comprises a respective piezoelectric region 70 and a respective protection region 72, as well as a pair of electrodes (not shown) electrically connected to the corresponding driving pad 50. The protection region 72 covers the piezoelectric region 70 and can be made, for example, of the same material as the material of the passivation layer 41a, which together with the passivation layer 41a can form, for example, a single monolithic region that wraps the piezoelectric region 70 and the corresponding electrodes. Moreover, between the protection region 72 and the third surface S3, there is a distance w, for example, between 3 pm and 5 pm.
[0037] As mentioned previously, and without implying any generality, each actuator 56 is electrically coupled to a pair of drive pads 50, and thus, to a pair of corresponding bumps of the first die 2 or of the second die 4. In particular, this electrical coupling is obtained through the corresponding pillar 36 and the corresponding external pad 34, the corresponding conductive path 30 and the corresponding internal pad 32. In this way, for example, if we assume that the actuator 56 is connected to the first die 2, in a first time interval, the actuator 56 can receive an electrical control signal generated by the transmitting circuit 10 of the first die 2, which causes a corresponding deformation of the membrane 40 mechanically coupled to the actuator 56, with the result that a sound wave is generated. Moreover, in a second time interval different from the first time interval, the deformation of the membrane 40 (for example, due to an echo acoustic signal impinging thereon) causes a corresponding deformation of the actuator 56, which generates an electrical response signal received by the receiving circuit 12 of the first die 2, which can process the electrical response signal and then supply a corresponding output signal to an external computer (not shown) through the corresponding vertical connection area 24.
[0038] In other words, a portion of the actuator 56 and thus of the corresponding membrane 40 is electrically coupled to the first die 2, while another portion of the actuator 56 and thus of the corresponding membrane 40 is electrically coupled to the second die 40. Without implying any generality, each membrane 40 is connected to both the transmitting circuit and the receiving circuit of the corresponding die. Moreover, again without implying any generality, in the die, a protection mechanism of the receiving circuit can be implemented during transmission; alternatively, the transmission signal and the reception signal can be transported to / from the membrane 40 through two different pillars 36, in which case the membrane 40 acts as a protection element.
[0039] This is to say that the electroacoustic module 1 can be manufactured according to a process described hereinafter.
[0040] First, as shown in Figure 2 , a component 74 is formed, which, in order to be clear hereinafter, will be referred to as "ASIC component 74" hereinafter. The ASIC component 74 comprises a plurality of unit portions 76 (only one of which is marked as unit portion 76 in Figure 2 , but 10 unit portions are shown) identical to each other and laterally spaced apart; the term "unit" precisely takes into account the fact that these portions represent units (or, equivalently, elementary portions) identical to each other and repeated in space.
[0041] In detail, the unit portion 76 is shown in Figure 3 and described hereinafter, limited to the case in which the ASIC component 74 is a component of the first die 2. Figure 1the differences from the case illustrated in Figure 1 the elements already illustrated in
[0042] In greater detail, as illustrated in Figure 1 without the differences outlined below, the unit portion 76 is identical to the portion of the electro-acoustic module 1 extending between the third surface S3 and the first surface S1.
[0043] The coating region, indicated here with 122, is shared by the unit portion 76 of the ASIC assembly 74; i.e., it forms a single region of the ASIC assembly 74. Likewise, the dielectric regions of the redistribution structure, these elements being indicated here with 126 and 128, respectively, and being referred to hereinafter as "assembly dielectric region 128" and "assembly redistribution structure 126", respectively, are shared by the unit portion 76 of the ASIC assembly 74. Furthermore, the first surface, the second surface and the third surface are shared by the unit portion 76 of the ASIC assembly 74; i.e., they each represent a portion of the first wafer surface S1', of the second wafer surface S2' and of the third wafer surface S3', respectively.
[0044] In addition, extending on the unit portion 76 is a support 75, for example made of glass (not illustrated in Figure 2 ), which is shared by the unit portion 76 of the ASIC assembly 74.
[0045] Without implying any loss of generality, the manufacturing of the ASIC assembly 74 can be carried out, in a per se known manner, by means of a machining technique of the so-called FOWLP (Fan-Out Wafer Level Packaging) type. In this respect, the first die 2 and the second die 4 of the unit portion 76 can be manufactured, in a per se known manner, by adopting a so-called wafer level manufacturing technique which enables a plurality of dies to be manufactured accurately starting from the same semiconductor wafer (not illustrated) and then enables these dies to be separated (singulated) by means of a slicing operation. After possible testing steps, the dies thus formed are again mechanically coupled, by coupling with the assembly redistribution structure 126, to accurately form the ASIC assembly 74.
[0046] In fact, after the dies have been singulated beforehand, the ASIC assembly 74 is formed by a die assembly which is fixed together so as to substantially have the shape of a wafer, in the sense that the assembly can be superimposed on top of a suitably processed semiconductor wafer (as described hereinafter). In other words, the ASIC assembly 94 represents a kind of reconstituted wafer. Furthermore, the dies of the ASIC assembly 74 share a single redistribution structure accurately formed by the assembly redistribution structure 126.
[0047] This manufacturing process also envisages the provision of a plurality of ASIC assemblies 74 on a single semiconductor wafer, in a per se known manner.Figure 4 The processing of a semiconductor material wafer 80 shown herein, which will be referred to hereinafter as “MEMS wafer 80”.
[0048] In detail, the MEMS chip 80 includes a top surface S a and bottom surface S b The defined single semiconductor body 82 (the terms "top" and "bottom" refer to the components formed by...) Figure 4 The orientation adopted by the MEMS chip 80 in the middle.
[0049] On the top surface S a Extending above are multiple corresponding unit parts 84 (in Figure 4 The diagram shows two corresponding cell portions 84 of the plurality of corresponding cell portions 84, which are identical to each other. Furthermore, apart from the differences described below, each cell portion 84 is identical to the transducer structure 38. Specifically, the cell portion 84 has no non-deformable region 42 and extends over the semiconductor body 82 such that the corresponding second dielectric layer 41d is on the top surface S. a Extending upwards. In addition, each unit portion 84 includes a plurality of corresponding pillars 36, which contact corresponding drive pads 50.
[0050] Referring again to the MEMS wafer 80, extending within the semiconductor body 82 are a plurality of buried dielectric regions 86, for example made of silicon oxide (one buried dielectric region 86 for each cell portion 84). Without implying any general loss, the MEMS wafer 80 includes a plurality of buried dielectric regions 86 equal in number to the cell portions 84, which are located at the top surface S. a Extending at a certain distance from each other; in addition, each buried dielectric region 86 laterally defines a number of cavities 88 equal to the number of membranes 40 of the electroacoustic module 1 (in Figure 4 Only one of the cavities 88 is indicated by a dashed line in the image. These cavities 88 will be referred to as “filled cavities 88” in the following text because they are filled by the corresponding portions of the semiconductor body 82.
[0051] If again Figure 4 As can be seen, the cell portions 84 are laterally spaced apart from each other on the underlying semiconductor body 82, such that the multilayer regions 39 of the cell portions 84 laterally define a cavity 90, which will be referred to below as the "wafer cavity 90". The wafer cavity 90 is located at the bottom by the top surface S of the semiconductor body 82. a Define.
[0052] Next, as in Figure 5As shown, the ASIC component 74 and the MEMS wafer 80 are mechanically and electrically coupled together to couple each cell portion 84 of the MEMS wafer 80 to a corresponding cell portion 76 of the ASIC component 74. Specifically, the pillars 36 of each cell portion 84 of the MEMS wafer 80 are soldered to the external pads 34 of the corresponding cell portion 76 of the ASIC component 74.
[0053] Furthermore, before or after the mechanical coupling of the ASIC component 74 and the MEMS chip 80, the chip cavity 90 is filled with a bonding region 92. Therefore, this bonding region 92 and the top surface S of the semiconductor body 82 are connected. a The contact extends. Furthermore, the bonding region 92, for example made of benzocyclobutene (BCB), extends until it contacts the third wafer surface S3', to connect the top surface S of the semiconductor body 82. a The component dielectric region 128 is incorporated into the component redistribution structure 126. Thus, the ASIC component 74 and the MEMS chip 80 form a multi-chip component 94.
[0054] More specifically, where the bonding region 92 is formed prior to the mechanical coupling between the ASIC component 74 and the MEMS wafer 80, the bonding region 92 is selectively deposited on the top surface S of the semiconductor body 82 according to a pre-set pattern. a Alternatively, as previously mentioned, the bonding region 92 can be injected after the ASIC component 74 and the MEMS chip 80 have been coupled together.
[0055] Next, as in Figure 6 As shown in the figure, from the bottom surface S b The process begins with mechanical polishing of the semiconductor body 82 to expose the buried dielectric region 86. This polishing operation can be performed on surfaces already in use, without implying any general loss. Figure 6 This occurs after the multi-wafer assembly 94 is arranged precisely as shown in the diagram (i.e., such that the support 75 is arranged at the bottom). The remaining portion of the semiconductor body, indicated by 182, is formed by surface S. c Define the surface S c The term "intermediate surface S" will be used in the following text. c Therefore, the buried dielectric region 86 and the filling cavity 88 are formed on the intermediate surface S. c superior.
[0056] Next, as in Figure 7As shown, a photolithography process is performed in which the now exposed buried dielectric region 86 serves as a hard mask. In this manner, a first portion of the semiconductor material extending into the filled cavity 88 and the semiconductor material disposed on the first portion of the semiconductor material and the top surface S are selectively removed. a The corresponding second part. The remaining portion of the semiconductor body 182 forms a wafer semiconductor region 142, which is designed to form non-deformable regions 42 of multiple electroacoustic modules after the slicing operation described below. The above photolithography process also requires exposing the bonding region 92.
[0057] Following the aforementioned photolithography process performed simultaneously on the entire MEMS wafer 80, the portion of each multilayer region 39 forming the aforementioned film 40 is exposed. In fact, Figure 6 and Figure 7 The operation shown in the diagram represents a so-called backend operation, and requires the release of membrane 40.
[0058] Next, as in Figure 8 As shown, a covering region 96, made of, for example, epoxy resin, is formed on the MEMS wafer 80. Among other things, the covering region 96 covers the exposed portions of the buried dielectric region 86, the wafer semiconductor region 142, and the second dielectric layer 41d.
[0059] Next, as in Figure 9 As shown, the support 75 is removed, and then a slicing operation is performed along the scribing line 99 (schematically indicated by dashed lines). This slicing operation requires so-called partitioning of the multiple devices 101 starting from the multi-wafer assembly 94, if not in Figure 1 The presence of the buried dielectric region 86 (not shown) indicates that each of the plurality of devices 101 is associated with the presence of the dielectric region 86. Figure 1 The electroacoustic module 1 shown is the same. The cut portion of the combined region 92 forms the corresponding sealing region 53. Figure 1 ).
[0060] Depending on the variation of the manufacturing process, it forms (in) Figure 10 The component 110 shown below will be referred to as the multi-die assembly 110. Now refer to the component 110 relative to the one shown in the diagram. Figure 4 The differences shown in the diagram for MEMS wafer 80 are described in relation to the multi-die assembly 110.
[0061] In detail, the multi-die assembly 110 includes a plurality of semiconductor bodies (denoted by 282) Figure 10The diagram shows two of the plurality of semiconductor bodies, each of which carries a corresponding unit portion (denoted as 284 here). Extending inside each semiconductor body 282 is a corresponding buried dielectric region (denoted as 286). These are respectively labeled S... a 'and S b 'This indicates that the top and bottom surfaces of each semiconductor body 282 are defined.
[0062] The multi-die assembly 110 further includes, for example, a support 200 formed of an adhesive tape, on which the bottom surface S of the semiconductor body 282 is placed. b In practice, each semiconductor body 282 together with the corresponding cell portion 284 forms a corresponding die, which is supported by the support member 200 and will be referred to below as "transducer die 201". The transducer dies 201 are laterally offset relative to each other to laterally define the inter-die cavity 290.
[0063] As in Figure 11 As shown, a bonding region 92 is formed on the third wafer surface S3' of the ASIC component 74, for example by means of a local implantation process.
[0064] Next, as in Figure 12 As shown, the multi-die assembly 110 and the ASIC assembly 74 are mechanically coupled and electrically coupled to form assembly 294, which will be referred to below as “wafer-die assembly 294”.
[0065] Then, as in Figure 13 As shown, the support member 200 is removed. Furthermore, a gap region 295 (optional) can be formed, for example, by performing an epoxy resin injection process. Specifically, the gap region 295 fills the gaps present between the semiconductor bodies 282 and is therefore laterally defined by the latter. Additionally, the gap region 295 contacts the bonding region 92.
[0066] Next, as in Figure 14 As shown, the wafer-die assembly 294 is arranged with a support 75 at the bottom and a semiconductor body 282 at the top. Additionally, see the embodiment reference. Figure 6 and Figure 7 The operation described. In other words, the semiconductor body 282 is mechanically ground to expose the corresponding buried dielectric regions 286, so that they can be used as hard masks for subsequent photolithography processes that form the non-deformable region 42.
[0067] Next, as in Figure 15As shown in the figure, a covering region (denoted with 296) is formed on the wafer semiconductor region 142. The subsequent removal of the support 75 and the execution of the slicing operation (not shown) then make it possible to form a plurality of electroacoustic modules.
[0068] The foregoing description clearly presents the advantages offered by the present manufacturing process.
[0069] In particular, the present process envisages the formation of a reconstituted wafer by using dies forming ASICs, which can be tested before the formation of the reconstituted wafer for the advantage of the final reliability. Moreover, the presence of the redistribution structure of the reconstituted wafer makes it possible to decouple the pitch of the dies of the reconstituted wafer (in particular, the pitch of the bumps) from the pitch of the membrane (in particular, the pitch of the drive pads 50). The subsequent release of the membrane of the MEMS wafer 80 is carried out at wafer level, therefore, with a high degree of parallelization and with the possibility of producing particularly thin membranes (i.e., with a thickness less than 10 pm). Moreover, in the case of variants of the manufacturing process, it is possible to arrange the semiconductor bodies 282 on the support 200 with high precision, thus improving the tolerances of the electroacoustic modules thus obtained.
[0070] The present manufacturing process also makes it possible to use different technologies for the manufacturing of the MEMS transducers and of the dies of the reconstituted wafer.
[0071] Finally, it is clear that modifications and changes can be made to the manufacturing process described and illustrated herein without thereby departing from the scope of protection of the present disclosure.
[0072] For example, instead of the struts, there can be non-deformable conductive structures having the shape of hollow cylinders, or else the shape of prisms (which are also hollow) having a polygonal base. In this way, the shape of the membrane is defined by these conductive structures, rather than by the shape of the recesses 52 (and, therefore, rather than by the shape of the non-deformable regions 42). Therefore, there can be no non-deformable regions 42, in which case there can also be no buried dielectric regions 86.
[0073] Moreover, each electroacoustic module can comprise a number of dies different from the one shown, in which case the manufacturing process is modified accordingly. The transmit and receive circuits can be formed in different dies. In this case, the transmit and receive circuits can be formed by using different technologies.
[0074] In general, the actuators can be of a type different from the one already described. For example, the actuators can implement an electrostatic type rather than a piezoelectric type of actuation mechanism. Likewise, the arrangement of the actuators with respect to the corresponding membrane can also be different from the one already described.
[0075] Finally, instead of bumps 18, 20, other electrically conductive connection elements can be used, such as corresponding pillars. More generally, all electrically conductive connection elements described herein are provided by way of example only.
[0076] Various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the detailed description. The terms used in the following claims should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims. Rather, the scope of the claims will include all embodiments falling within the scope of the claims and equivalents thereof.
Claims
1. A method for manufacturing a MEMS device, comprising: forming a first assembly, the first assembly comprising: a dielectric coating region having a first surface and a second surface; a dielectric redistribution region having a first surface and a second surface, the first surface of the dielectric redistribution region contacting the first surface of the dielectric coating region; and a first plurality of cell portions laterally spaced apart from one another, each cell portion of the first plurality of cell portions comprising: a respective die, the respective die being arranged in the dielectric coating region and comprising a corresponding electronic circuit; a plurality of corresponding first electrically conductive connection elements positioned in the dielectric coating region, extending to the first surface, and electrically coupled to the respective die; a plurality of corresponding second electrically conductive connection elements positioned in the dielectric redistribution region and extending to the second surface of the dielectric redistribution region; and a plurality of electrically conductive redistribution paths extending in the dielectric redistribution region and connecting the second electrically conductive connection elements to the first electrically conductive connection elements; forming a second assembly comprising a second plurality of cell portions, each cell portion of the second plurality of cell portions comprising a respective semiconductor portion and a number of corresponding third electrically conductive connection elements; mechanically coupling the first assembly and the second assembly such that the third electrically conductive connection elements of each cell portion of the second assembly are in electrical contact with the second electrically conductive connection elements of a corresponding one of the cell portions of the first assembly; and after mechanically coupling the first assembly and the second assembly, removing at least a portion of the semiconductor portion of each cell portion of the second assembly to form a plurality of corresponding membranes from each cell portion of the second assembly.
2. The method of claim 1, wherein, forming the second assembly comprises, for each cell portion of the second assembly, forming a plurality of corresponding actuators electrically coupled to the third electrically conductive connection elements of the cell portion, each actuator being electrically controllable and configured to cause a deformation of a corresponding membrane of the plurality of corresponding membranes.
3. The method of claim 2, wherein: each cell portion of the second assembly further comprises a respective support structure contacting the corresponding semiconductor portion of the cell portion and mechanically coupled to the corresponding actuators; and in each cell portion of the second assembly, the corresponding third electrically conductive connection elements are arranged on a first side of the support structure and the corresponding semiconductor portion of the cell portion is arranged on an opposite second side of the support structure.
4. The method of claim 3, wherein, the support structure comprises at least one dielectric layer; and wherein removing the at least a portion of the semiconductor portion forms the corresponding membrane from the support structure of each cell portion of the second assembly.
5. The method of claim 3, wherein, The third conductive connection elements have an elongated shape; and wherein mechanically coupling the first assembly and the second assembly is implemented in such a way that the support structure of each unit portion of the second assembly, together with the dielectric redistribution region, bounds a cavity, the corresponding third conductive connection element extending in the cavity.
6. The method of claim 1, wherein, Each unit portion of the second assembly comprises a corresponding buried dielectric region extending in a corresponding semiconductor portion, the corresponding semiconductor portion having a respective proximal surface and a respective distal surface, the respective proximal surface facing the corresponding third conductive connection element; and wherein removing the at least part of the semiconductor portion of each unit portion of the second assembly comprises: removing semiconductor material starting from the distal surface of the semiconductor portion to expose the corresponding buried dielectric region; and selectively removing other semiconductor material by using the corresponding buried dielectric region as a mask.
7. The method of claim 1, wherein, Forming the second assembly comprises: providing a wafer of semiconductor material, the wafer comprising a semiconductor body forming the semiconductor portions of the unit portions of the second assembly.
8. The method of claim 1, wherein, Forming the second assembly comprises: mechanically coupling a plurality of preliminary dies to a support element, each preliminary die forming a corresponding unit portion of the second assembly.
9. The method of claim 1, wherein, The first conductive connection elements are micro-bumps; and wherein the dielectric redistribution region comprises a plurality of corresponding pads respectively contacting the micro-bumps.
10. The method of claim 1, further comprising: after removing the at least part of the semiconductor portion of each unit portion of the second assembly, implementing a dicing operation forming MEMS devices, each MEMS device comprising the following parts coupled together: a corresponding unit portion of the first assembly and a corresponding unit portion of the second assembly.
11. A MEMS device, comprising: a dielectric coating region having a first surface and a second surface; a dielectric redistribution region having a first surface and a second surface, the first surface of the dielectric redistribution region contacting the first surface of the dielectric coating region; a die having electronic circuitry arranged in the dielectric coating region; a plurality of first conductive connection elements positioned in the dielectric coating region, extending to the first surface of the dielectric coating region, and electrically coupled to the die; a plurality of second conductive connection elements positioned in the dielectric redistribution region, and extending to the second surface of the dielectric redistribution region; a plurality of conductive redistribution paths extending in the dielectric redistribution region and connecting the second conductive connection elements to the first conductive connection elements; a third conductive connection element in electrical contact with the second conductive connection elements; a plurality of membranes; and a plurality of membranes; and a plurality of actuators electrically coupled to the third electrically conductive connection elements, each actuator also electrically controllable to cause deformation of a corresponding membrane of the plurality of membranes.
12. The apparatus of claim 11, further comprising: a support structure forming the membranes, and the actuators being mechanically coupled to the support structure; wherein the third electrically conductive connection elements have an elongated shape and are arranged on a side of the support structure facing the dielectric redistribution region.
13. A method for manufacturing MEMS devices, comprising: forming a first assembly, the first assembly comprising: a dielectric coating region; a dielectric redistribution region in contact with the dielectric coating region; and a first plurality of cell portions laterally spaced apart from each other, each cell portion of the first plurality of cell portions comprising: a respective die in the dielectric coating region and comprising a corresponding electronic circuit; a plurality of corresponding first electrically conductive connection elements positioned in the dielectric coating region and electrically coupled to the respective die; a plurality of corresponding second electrically conductive connection elements positioned in the dielectric redistribution region; and a plurality of electrically conductive redistribution paths extending in the dielectric redistribution region and connecting the second electrically conductive connection elements to the first electrically conductive connection elements; forming a second assembly comprising a second plurality of cell portions, each cell portion of the second plurality of cell portions comprising a respective semiconductor portion and a number of third electrically conductive connection elements; mechanically coupling the first assembly and the second assembly so that the third electrically conductive connection elements of each cell portion of the second assembly are in electrical contact with the second electrically conductive connection elements of a corresponding cell portion of the cell portions of the first assembly; after mechanically coupling the first assembly and the second assembly, removing at least a portion of the semiconductor portion of each cell portion of the second assembly to form a plurality of corresponding membranes from each cell portion of the second assembly; and after removing the at least a portion of the semiconductor portion of each cell portion of the second assembly, performing a dicing operation to form MEMS devices, each MEMS device comprising the following portions coupled together: a corresponding cell portion of the first assembly and a corresponding cell portion of the second assembly.
14. The method of claim 13, wherein, forming the second assembly comprises, for each cell portion of the second assembly, forming a plurality of corresponding actuators electrically coupled to the third electrically conductive connection elements of the cell portion, each actuator being electrically controllable and configured to cause deformation of a corresponding membrane of the plurality of corresponding membranes.
15. The method of claim 14, wherein: each cell portion of the second assembly further comprises a respective support structure contacting the corresponding semiconductor portion of the cell portion and mechanically coupled to the corresponding actuators; and In each unit portion of the second assembly, the corresponding third electrically conductive connection element is arranged on a first side of the support structure, the corresponding semiconductor portion of the unit portion being arranged on an opposite second side of the support structure.
16. The method of claim 15, wherein, Removing the at least part of the semiconductor portion forms the corresponding membrane from the support structure of each unit portion of the second assembly.
17. The method of claim 15, wherein, The third electrically conductive connection element has an elongated shape; and wherein mechanically coupling the first assembly and the second assembly is implemented in such a way that the support structure of each unit portion of the second assembly, together with the dielectric redistribution region, defines a cavity, the corresponding third electrically conductive connection element extending in the cavity.
18. The method of claim 13, wherein, Each unit portion of the second assembly comprises a corresponding buried dielectric region extending in the corresponding semiconductor portion, the corresponding semiconductor portion having a respective proximal surface and a respective distal surface, the respective proximal surface facing the corresponding third electrically conductive connection element; And wherein removing the at least part of the semiconductor portion of each unit portion of the second assembly comprises: removing semiconductor material from the distal surface of the semiconductor portion to expose the corresponding buried dielectric region; and selectively removing further semiconductor material by using the corresponding buried dielectric region as a mask.
19. The method of claim 13, wherein, Forming the second assembly comprises: providing a wafer of semiconductor material, the wafer comprising a semiconductor body forming the semiconductor portions of the unit portions of the second assembly.
20. The method of claim 13, wherein, Forming the second assembly comprises: mechanically coupling a plurality of preliminary dies to a support element, each preliminary die forming a corresponding unit portion of the second assembly. mechanically coupling a plurality of preliminary dies to a support element, each preliminary die forming a corresponding unit portion of the second assembly.
Citation Information
Patent Citations
MEMS device
CN210710732U
Method for eutectic bonding of two carrier devices
US20150232329A1