Lithography machine wafer stage

By designing particle-accommodating grooves on the supports of the lithography machine wafer stage, the impact of impurities on the wafer surface during the lithography process was solved, achieving higher lithography accuracy and support protection.

CN110750033BActive Publication Date: 2026-07-24CHANGXIN MEMORY TECH INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHANGXIN MEMORY TECH INC
Filing Date
2018-07-24
Publication Date
2026-07-24

AI Technical Summary

Technical Problem

Existing technologies cannot effectively detect and handle particulate impurities generated on the wafer surface and pillars during photolithography, leading to defocusing or misalignment of the photolithography pattern. Furthermore, existing cleaning methods are prone to damaging the pillars.

Method used

Particle-accommodating grooves, including inverted conical or V-shaped recessed structures, are designed on the upper surface of the support pillars of the lithography machine wafer stage to adsorb and accommodate impurities, keep the wafer surface level, and prevent impurities from affecting the lithography process.

Benefits of technology

It effectively avoids the influence of impurities on the wafer surface during photolithography, keeps the wafer surface flat, reduces photolithography defects and pillar damage, and improves photolithography accuracy.

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Abstract

The present application relates to the field of semiconductor integrated circuit manufacturing, and particularly relates to a wafer stage of a photoetching machine, which comprises a substrate carrier, the substrate carrier is arranged in a chamber capable of being vacuumized; a plurality of pillars, the plurality of pillars are sequentially arranged on the substrate carrier, and any two adjacent pillars form an adsorption gap; the upper surfaces of the plurality of pillars are located on the same plane; the adsorption gap can adsorb and position the wafer on the upper surfaces of the pillars during the vacuumization of the chamber; the upper surface of the pillar is provided with a particle accommodating groove at the center position; and the groove depth of the particle accommodating groove is smaller than the height of the pillar. The present application can effectively solve the influence of the particle impurities generated on the wafer surface or the pillars on the photoetching exposure of the wafer surface during the photoetching exposure process.
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Citation Information

Patent Citations

  • CN107831638A

  • CN203967038U

  • CN208689361U

  • JP1996330401A

  • JP2011003572A