Frequency conversion pulse X-ray control circuit and pulse flaw detection device

Abstract

The present invention discloses a variable frequency pulse X-ray control circuit and a pulse flaw detection device. The variable frequency pulse X-ray control circuit includes a single chip microcomputer, a synchronization circuit, a power supply circuit, a primary voltage setting circuit, a voltage regulating chopper drive circuit, an inverter chopper drive circuit and a high voltage drive circuit. The primary voltage setting circuit outputs a set voltage according to a voltage setting signal, and the voltage regulating chopper drive circuit outputs a voltage regulating signal according to the set voltage when receiving a voltage regulating control signal. The synchronization circuit outputs a synchronization pulse signal according to the received synchronization signal, and the inverter chopper drive circuit outputs a preset high voltage drive signal according to the received inverter control signal. The high voltage drive circuit outputs a high voltage pulse power supply signal to drive the X-ray tube head according to the high voltage drive signal. So that the imaging device is turned on later than the X-ray and turned off earlier than the X-ray, thereby filtering out interference fringes.

Description

Technical Field

[0001] The invention relates to the technical field of variable frequency pulse portable X-ray flaw detection circuits, and in particular to a variable frequency pulse X-ray control circuit and a pulse flaw detection device. Background Art

[0002] At present, X-ray real-time imaging detection system has a very wide range of applications in the field of non-destructive testing. It is widely used in industrial sectors such as shipbuilding, petroleum, chemical industry, machinery, aerospace, transportation and construction. It is generally used for quality inspection of hulls, pipelines, high-pressure vessels, boilers, aircraft, vehicles and bridges. It can be used to display the surface and internal defects of parts and welds made of materials to evaluate the quality of products. Because it can detect extremely fine cracks, hairlines, white spots, folds, inclusions and other defects on the surface of materials, and can intuitively display the location, shape, size and severity of defects, the repeatability of defect inspection is good. It has been widely used in flaw detection of pipes, bars, profiles, welded parts, machined parts and forgings.

[0003] Among them, domestic real-time imaging detection systems mainly use mobile high-frequency X-ray flaw detectors, but domestically produced portable X-ray flaw detectors are all variable frequency flaw detectors, which are characterized by outputting pulsed X-rays and can only be used for film photography, and cannot be used for static snapshots or dynamic imaging of imaging devices. The disadvantages of film imaging are long detection cycles, slow detection speeds, high detection costs, environmental pollution caused by film developer solutions, and limited shelf life of negatives. When existing variable frequency portable X-ray flaw detectors are used for real-time imaging, serious interference stripes will appear on the image. Summary of the invention

[0004] The main purpose of the present invention is to provide a variable frequency pulse X-ray control circuit to solve the technical problem of interference stripes appearing during real-time imaging of existing variable frequency pulse portable X-ray flaw detectors.

[0005] To achieve the above object, the present invention provides a variable frequency pulse X-ray control circuit, which includes a single chip microcomputer, a synchronization circuit, a power supply circuit, a primary voltage setting circuit, a voltage regulating chopper drive circuit, an inverter chopper drive circuit and a high voltage drive circuit.

[0006] The control circuit is used to output a voltage setting signal, a voltage regulation control signal and a voltage regulation control signal when receiving an imaging acquisition signal;

[0007] The primary voltage setting circuit is used to output a set voltage according to the voltage setting signal;

[0008] The voltage regulating chopper drive circuit is used to output a voltage regulating signal according to the set voltage when receiving the voltage regulating control signal;

[0009] The power supply circuit is used to step down the voltage of the rectified and filtered AC power supply signal according to the voltage regulation signal;

[0010] The synchronization circuit is used to receive a synchronization signal output by the imaging device and output a synchronization pulse signal according to the synchronization signal;

[0011] The inverter chopper drive circuit is used to output a preset high-voltage drive signal according to the synchronization pulse signal when receiving the inverter control signal;

[0012] The high-voltage driving circuit is used to output a high-voltage pulse power signal to drive the X-ray tube head according to the high-voltage driving signal;

[0013] The pulse of the high-voltage pulse power supply signal is synchronized with the pulse of the imaging acquisition signal, and the pulse width of the high-voltage pulse power supply signal is greater than the pulse width of the imaging acquisition signal.

[0014] Optionally, the inverter chopper drive circuit presets an operating clock signal, a period time constant of the operating clock signal is greater than a period time constant of the imaging acquisition signal, and when the inverter chopper drive circuit is in a suspended mode, the high-voltage pulse power supply signal is equal to the operating clock signal;

[0015] When the inverter chopper drive circuit is in a synchronous mode, the high-voltage pulse power signal is equal to the synchronous pulse signal.

[0016] Optionally, the single-chip microcomputer includes a voltage setting signal output terminal, a voltage regulation control signal output terminal and an inverter control signal output terminal, the controlled terminal of the power supply circuit is connected to the output terminal of the voltage regulation chopper drive circuit, and the output terminal of the power supply circuit is connected to the input terminal of the high-voltage drive circuit; the input terminal of the synchronization circuit is connected to the imaging device, and the output terminal of the synchronization circuit is connected to the input terminal of the inverter chopper drive circuit. The voltage setting signal output terminal of the single-chip microcomputer is connected to the input terminal of the primary voltage setting circuit. The voltage regulation control signal output terminal of the single-chip microcomputer is connected to the controlled terminal of the voltage regulation chopper drive circuit. The inverter control signal output terminal of the single-chip microcomputer is connected to the controlled terminal of the inverter chopper drive circuit. The input terminal of the voltage regulation chopper drive circuit is connected to the output terminal of the primary voltage setting circuit; the controlled terminal of the high-voltage drive circuit is connected to the output terminal of the inverter chopper drive circuit, and the output terminal of the high-voltage drive circuit is connected to the interface terminal of the X-ray tube head.

[0017] Optionally, the variable frequency pulsed X-ray control circuit also includes a primary voltage sampling circuit, the output end of the power supply circuit includes an anode output end and a cathode output end, the single-chip microcomputer preferably includes a voltage sampling end, the anode output end of the power supply circuit is connected to the first end of the primary voltage sampling circuit, the cathode output end of the power supply circuit is connected to the second end of the primary voltage sampling circuit; the sampling output end of the primary voltage sampling circuit is connected to the voltage sampling end of the single-chip microcomputer.

[0018] Optionally, the variable frequency pulse portable X-ray flaw detector processor structure also includes a tube current acquisition circuit, and the single chip microcomputer also includes a current acquisition end, the input end of the tube current acquisition circuit is connected to the interface end of the X-ray tube head, and the output end of the tube current acquisition circuit is connected to the current acquisition end of the single chip microcomputer.

[0019] Optionally, the inverter chopper drive circuit includes a first chip, a second chip, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first diode, a second diode, a first sliding resistor, a first capacitor, a second capacitor and a third capacitor. The first chip includes a reverse input pin, a same-phase input pin, a synchronous control pin, an oscillator output pin, an external capacitor pin, an external resistor pin, a discharge pin, a soft start pin, a chip power pin, an external control pin, an output terminal A pin, a ground pin, an output stage power access pin, an output terminal B pin, a reference voltage pin and a compensation pin. The second chip includes a reference power pin, an input pin, an anode voltage pin, a cathode voltage pin, a voltage detection pin and a control pin. The control signal output pin of the first chip is connected to the compensation pin of the first chip, the in-phase input pin of the first chip, the reference voltage pin of the first chip and the first end of the third capacitor are connected, the synchronization control pin of the first chip is the input end of the inverter chopper drive circuit, the external capacitor pin of the first chip, the first end of the first resistor and the first end of the first capacitor are interconnected, the external resistor pin of the first chip is connected to the first end of the second resistor, the discharge pin of the first chip is connected to the second end of the first resistor, the soft start pin of the first chip is connected to the first end of the second capacitor, the external control pin of the first chip, the first diode The cathode and the first end of the third resistor are interconnected, the output terminal A pin of the first chip, the ground of the first chip and the output terminal B pin of the first chip are all grounded, the output stage power pin of the first chip is connected to the first end of the fifth resistor, the chip power pin of the first chip, the reference power pin of the second chip, the first end of the fourth capacitor and the first end of the seventh resistor are all connected to the second power supply; the input pin of the second chip is connected to the second end of the fifth resistor, the anode voltage pin of the second chip is connected to the first power supply, the cathode voltage pin of the second chip is connected to the fifth power supply, the voltage detection pin of the second chip is connected to the anode of the second diode, and the The control signal output pin is connected to the first end of the sixth resistor; the cathode of the second diode is the reference voltage output end of the inverter chopper drive circuit; the anode of the first diode is connected to the second end of the seventh resistor, and the connection node is the controlled end of the inverter chopper drive circuit; the second end of the sixth resistor is the output end of the inverter chopper drive circuit; the second end of the fourth capacitor and the second end of the third capacitor are grounded; the first end of the first sliding resistor is connected to the second end of the second resistor, and the second end of the first sliding resistor, the sliding end of the first sliding resistor, the second end of the first capacitor, the second end of the second capacitor and the second end of the third resistor are interconnected.

[0020] Optionally, the synchronization circuit includes a third chip, a first optocoupler device, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a third diode, a fourth diode, a fifth diode, a sixth diode, a fourth capacitor, a fifth capacitor and a sixth capacitor. The third chip includes a forward input pin, a reverse input pin, a power pin, a ground pin, a first output pin and a second output pin. The forward input pin of the third chip, the first end of the eighth resistor and the first end of the ninth resistor are interconnected. The reverse input pin of the third chip is connected to the second end of the ninth resistor, and the connection node is the reverse input end of the synchronization circuit. The power pin of the third chip, the first end of the fifth capacitor, the cathode of the fourth diode, the first end of the sixth diode, the first end of the eleventh resistor, the cathode of the fifth diode, and the ground pin are connected to each other. The first terminal of the twelfth resistor is connected to the second terminal of the tenth resistor, the second terminal of the twelfth resistor, the second terminal of the sixth capacitor, the second terminal of the eleventh resistor, the anode of the fifth diode and the reverse input terminal of the first optocoupler are interconnected; the power supply terminal of the first optocoupler is connected to the first terminal of the thirteenth resistor, and the output terminal of the first optocoupler is connected to the anode of the sixth diode; the second terminal of the thirteenth resistor is connected to the fourth power supply; the cathode of the sixth diode is the output terminal of the synchronization circuit.

[0021] Optionally, a model of the first chip is SG3525 or KA3525.

[0022] Optionally, a model of the second chip is M57962.

[0023] Optionally, the high-voltage drive circuit includes a first transistor, a second transient diode and a twenty-nine resistor, the base of the first transistor, the first end of the second transient diode and the first end of the twenty-nine resistor are interconnected, and their connection node is the controlled end of the high-voltage drive circuit, the collector of the first transistor is the input end of the high-voltage drive circuit, the emitter of the first transistor, the second end of the second transient diode and the second end of the twenty-nine resistor are interconnected, and their connection node is the output end of the high-voltage drive circuit.

[0024] Optionally, the third chip is a photoelectric isolation chip.

[0025] Optionally, a model of the third chip is 6N139.

[0026] The present invention also provides a pulse flaw detection device, which includes a host computer, an imaging device, an X-ray tube head, and the variable frequency pulse X-ray control circuit as described above;

[0027] The host computer is used to send an imaging acquisition signal;

[0028] The imaging device is connected to the variable frequency pulse X-ray control circuit and the host computer; the imaging device is used to receive the imaging acquisition signal sent by the host computer and output the synchronization signal according to the imaging acquisition signal;

[0029] The X-ray tube head is connected to the variable frequency pulse X-ray control circuit and is used to work according to the high voltage pulse power supply signal output by the variable frequency pulse X-ray control circuit.

[0030] The technical solution of the present invention is based on the discovery of the researchers when using a variable frequency pulse portable X-ray flaw detector for real-time imaging: when the variable frequency pulse portable X-ray flaw detector has serious interference stripes during imaging, it is generally because during the imaging process of the imaging device, the signal controlling the X-ray flaw detector is a variable frequency signal, and the signal when the imaging device performs imaging acquisition is also a variable frequency signal, and the frequencies of the two signals are not synchronized, so the interference stripes will be reflected in the imaging effect. Based on the above discovery, in the improved circuit, the imaging device receives the imaging acquisition signal and outputs a synchronization signal according to the imaging acquisition signal. A synchronization circuit is added to convert the signal synchronized with the imaging acquisition signal into a synchronization pulse signal and transmit it to the inverter chopper drive circuit. The inverter chopper drive circuit outputs a preset high-voltage drive signal according to the synchronization pulse signal, so that the pulse of the high-voltage pulse power supply signal is synchronized with the pulse of the imaging acquisition signal, and the pulse width of the high-voltage pulse power supply signal is greater than the pulse width of the imaging acquisition signal, so that the imaging device can work later than the X-ray flaw detector, and the imaging device can be shut down earlier than the X-ray flaw detector. Thereby eliminating the interference stripes caused by the asynchronization of the imaging signal and the X-ray signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0032] Figure 1 A schematic diagram of a module of an embodiment of a variable frequency pulse X-ray control circuit of the present invention;

[0033] Figure 2A schematic diagram of a module of an embodiment of a variable frequency pulse X-ray control circuit of the present invention;

[0034] Figure 3 A circuit diagram of an embodiment of a variable frequency pulse X-ray control circuit of the present invention;

[0035] Figure 4 It is a schematic diagram of the changes of multiple signals in the variable frequency pulse X-ray control circuit of the present invention;

[0036] Figure 5 It is a module schematic diagram of the pulse flaw detection device of the present invention.

[0037] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0038] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0039] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back...), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0040] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or suggesting their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0041] With the popularization of real-time imaging technology and the reduction of the price of imaging devices, portable X-ray real-time imaging detection systems are gradually becoming popular abroad. However, the price of portable high-frequency constant-voltage X-ray flaw detectors is currently expensive, so they cannot be widely used in China. At present, the domestic demand is for real-time imaging detection systems with moderate prices, strong penetration, high duty cycle, and suitable for industrial field applications, but the imaging detection systems at home and abroad cannot meet this requirement.

[0042] The high-frequency X-rays used by the imaging device during imaging are continuous during the acquisition period. However, since the high-voltage pulse power supply signal is a pulse signal, when the high-voltage pulse power supply signal is used to drive the X-ray flaw detector, the pulsed X-rays obtained may not all be present during the acquisition period, so interference stripes will appear.

[0043] Based on the above technical problems, if the integral noise reduction technology is used to eliminate interference fringes, the exposure time will be too long and the efficiency will be too low.

[0044] In order to solve the problem of interference stripes appearing when an imaging device is imaging, the present invention proposes a variable frequency pulse X-ray control circuit for solving the problem of interference stripes appearing when an existing variable frequency pulse portable X-ray flaw detector is imaging in real time.

[0045] In one embodiment, a variable frequency pulsed X-ray control circuit is used to drive an imaging device 10 and an X-ray tube head 90, and includes a single chip microcomputer 40, a synchronization circuit 20, a power supply circuit 70, a primary voltage setting circuit 50, a voltage regulating chopper drive circuit 60, an inverter chopper drive circuit 30 and a high voltage drive circuit 80.

[0046] Among them, when the control circuit receives the imaging acquisition signal, it outputs a voltage setting signal, a voltage regulation control signal and an inversion control signal. The imaging acquisition signal here refers to a signal that controls the imaging device 10 to start imaging data acquisition. First, the primary voltage setting circuit 50 outputs a setting voltage according to the voltage setting signal. When the voltage regulation chopper drive circuit receives the voltage regulation control signal, it outputs a voltage regulation signal according to the setting voltage. The power supply circuit 70 steps down the rectified and filtered AC power supply signal according to the voltage regulation signal, so that an adjustable DC power supply can be output. Subsequently, the imaging device 10 receives the imaging acquisition signal and outputs a synchronization signal according to the imaging acquisition signal. The synchronization circuit 20 outputs a synchronization pulse signal according to the synchronization signal. This synchronization signal is a signal with the same frequency as the imaging acquisition signal. When the inversion chopper drive circuit receives the inversion control signal, it outputs a preset high-voltage drive signal according to the pulse signal. The high-voltage driving circuit 80 outputs a high-voltage pulse power signal to drive the X-ray tube head 90 according to the high-voltage driving signal. It is worth noting that the inverter chopper driving circuit outputs a preset high-voltage driving signal according to the synchronous pulse signal setting. The preset relationship here means that the relationship between the synchronous pulse signal and the high-voltage driving signal can be determined by a specific operation relationship, and the result is that the pulse of the high-voltage pulse power signal is synchronized with the pulse of the imaging acquisition signal, and the pulse width of the high-voltage pulse power signal is greater than the pulse width of the imaging acquisition signal. The pulse schematic diagram is as follows Figure 4 As shown, the imaging device 10 is operated later than the X-ray flaw detector, and the imaging device 10 is shut down earlier than the X-ray flaw detector, thereby eliminating interference fringes caused by the asynchrony between the imaging signal and the X-ray signal.

[0047] It should be noted that any connection relationship that realizes signal transmission between the above-mentioned functional circuits is acceptable and is not limited. In this embodiment, the following connection relationship is used to realize signal transmission between the above-mentioned functional circuits, such as Figure 1 As shown, the single-chip microcomputer 40 includes a voltage setting signal output terminal, a voltage regulating control signal output terminal and an inverter control signal output terminal. The controlled terminal of the power supply circuit 70 is connected to the output terminal of the voltage regulating chopper drive circuit, and the output terminal of the power supply circuit 70 is connected to the input terminal of the high-voltage drive circuit 80; the input terminal of the synchronization circuit 20 is connected to the imaging device 10, and the output terminal of the synchronization circuit 20 is connected to the input terminal of the inverter chopper drive circuit 30. The voltage setting signal output terminal of the single-chip microcomputer 40 is connected to the input terminal of the primary voltage setting circuit 50, the voltage regulating control signal output terminal of the single-chip microcomputer 40 is connected to the controlled terminal of the voltage regulating chopper drive circuit 60, and the inverter control signal output terminal of the single-chip microcomputer 40 is connected to the controlled terminal of the inverter chopper drive circuit 30. The input terminal of the voltage regulating chopper drive circuit 60 is connected to the output terminal of the primary voltage setting circuit 50; the controlled terminal of the high-voltage drive circuit 80 is connected to the output terminal of the inverter chopper drive circuit 30, and the output terminal of the high-voltage drive circuit 80 is connected to the interface terminal of the X-ray tube head 90.

[0048] In one embodiment, in order to facilitate the purpose of "presetting the pulse of the high-voltage pulse power supply signal and the pulse of the imaging acquisition signal to be synchronized", the "high-voltage pulse power supply signal" can be preset in the following manner:

[0049] First, an internal operating clock signal is preset in the inverter chopper drive circuit 30, the operating clock signal cycle time constant is greater than the imaging acquisition signal cycle time constant, and the operating clock signal pulse width is greater than the imaging acquisition signal pulse width.

[0050] When the inverter chopper drive circuit 30 is in the suspended mode, the high-voltage pulse power signal is equal to the operating clock signal, thereby controlling the X-ray tube head 90 to turn on. Since the pulse width of the high-voltage pulse power signal is greater than the pulse width of the synchronization pulse signal at this time, the X-ray tube head 90 emits X-rays earlier than the imaging device 10 collects images.

[0051] When the inverter chopper drive circuit 30 is in the synchronous mode, the high-voltage pulse power signal is equal to the synchronous pulse signal, thereby controlling the X-ray tube head 90 to be turned off. Since the pulse width of the high-voltage pulse power signal is greater than the pulse width of the synchronous pulse signal at this time, the time when the X-ray tube head 90 stops outputting X-rays is later than the time when the imaging device 10 collects images.

[0052] In one embodiment, if Figure 2 As shown, the variable frequency pulse X-ray control circuit also includes a primary voltage sampling circuit A1, the output end of the power supply circuit 70 includes an anode output end and a cathode output end, and the single chip microcomputer 40 also includes a voltage sampling end, the anode output end of the power supply circuit 70 is connected to the first end of the primary voltage sampling circuit A1, and the cathode output end of the power supply circuit 70 is connected to the second end of the primary voltage sampling circuit A1. The sampling output end of the primary voltage sampling circuit A1 is connected to the voltage sampling end of the single chip microcomputer 40.

[0053] In the above embodiment, the primary voltage sampling circuit A1 is used to collect the voltage value output by the power supply circuit 70, so that the microcontroller 40 can determine whether the voltage value is too high, and feedback-adjust the output of the power supply circuit 70 to facilitate overvoltage protection and undervoltage protection.

[0054] In one embodiment, if Figure 2 As shown, the variable frequency pulse X-ray control circuit also includes a tube current acquisition circuit A2, and the single chip microcomputer 40 also includes a current acquisition end. The input end of the tube current acquisition circuit A2 is connected to the power supply end of the X-ray tube head 90, and the output end of the tube current acquisition circuit A2 is connected to the current acquisition end of the single chip microcomputer 40.

[0055] The tube current sampling circuit is used to sample the working current of the X-ray tube head 90. When the working current of the X-ray tube head 90 is too large, the driving and power supply of the X-ray tube head 90 can be stopped in time, thereby achieving the purpose of protecting the X-ray tube head 90 and the variable frequency pulse X-ray control circuit.

[0056] In one embodiment, if Figure 3As shown, the inverter chopper drive circuit 30 includes a first chip U1, a second chip U2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a first diode D1, a second diode D2, a first sliding resistor RS1, a first capacitor C1, a second capacitor C2 and a third capacitor C3. The first chip U1 includes a reverse input pin 1, a non-inverting input pin 2, a synchronous control pin 3, an oscillator output pin 4, an external capacitor pin 5, an external resistor pin 6, a discharge pin 7, a soft start pin 8, a compensation pin 9, an external control pin 10, an output terminal A pin 11, a ground pin 12, an output stage power supply access pin 13, an output terminal B pin 14, The chip power pin 15 and the reference voltage pin 16, the second chip U2 includes a reference power pin 14, an input pin 13, an anode voltage pin 4, a cathode voltage pin 6, a voltage detection pin 1 and a control signal output pin 5, the reverse input pin 1 of the first chip U1 is connected to the compensation pin 9 of the first chip U1, the in-phase input pin 2 of the first chip U1, the reference voltage pin 16 of the first chip U1 and the first end of the third capacitor C3 are connected, the synchronization control pin 3 of the first chip U1 is the input end of the inverter chopper drive circuit 30, the external capacitor pin 5 of the first chip U1, the first end of the first resistor R1 and the first end of the first capacitor C1 are interconnected, the external resistor pin 6 of the first chip U1 is connected to the first end of the second resistor R2, the first The discharge pin 7 of the chip U1 is connected to the second end of the first resistor R1, the soft start pin 8 of the first chip U1 is connected to the first end of the second capacitor C2, the external control pin 10 of the first chip U1, the cathode of the first diode and the first end of the third resistor R3 are interconnected, the output terminal A pin 11 of the first chip U1, the ground 12 of the first chip U1 and the output terminal B pin 14 of the first chip U1 are all grounded, the output stage power access pin 13 of the first chip U1 is connected to the first end of the fifth resistor R5, the chip power pin 15 of the first chip U1, the reference power pin 14 of the second chip U2, the first end of the fourth capacitor and the first end of the seventh resistor R7 are all connected to the second power supply V2; the input pin 1 of the second chip U2 3 is connected to the second end of the fifth resistor R5, the anode voltage pin 4 of the second chip U2 is connected to the first power supply V1, the cathode voltage pin 6 of the second chip U2 is connected to the fifth power supply V5, the voltage detection pin 1 of the second chip U2 is connected to the anode of the second diode D2, and the control signal output pin 5 of the second chip U2 is connected to the first end of the sixth resistor R6; the cathode of the second diode D2 is the voltage detection end of the inverter chopper drive circuit 30; the anode of the first diode D1 is connected to the second end of the seventh resistor, and the connection node thereof is the controlled end of the inverter chopper drive circuit 30; the second end of the sixth resistor R6 is the output end of the inverter chopper drive circuit 30; the second end of the fourth capacitor and the second end of the third capacitor C3 are grounded;The first end of the first sliding resistor RS1 is connected to the second end of the second resistor R2, and the second end of the first sliding resistor RS1, the sliding end of the first sliding resistor RS1, the second end of the first capacitor C1, the second end of the second capacitor C2 and the second end of the third resistor R3 are interconnected. ;

[0057] Among them, the synchronous pulse signal is input through the synchronous control pin 3 of the first chip U1, and under the action of the inverter control signal, the pulse width and pulse size of the synchronous pulse signal are modulated, and then output through the second chip U2, thereby realizing the modulation of the synchronous pulse signal, so that the high-voltage driving signal that drives the X-ray tube head 90 can realize the control of the X-ray tube head 90 by the imaging acquisition signal, as a result, the pulse of the high-voltage pulse power supply signal is synchronized with the pulse of the imaging acquisition signal, and the pulse width of the high-voltage pulse power supply signal is greater than the pulse width of the imaging acquisition signal. For details, please refer to Figure 4 It is explained that the pulse width of the internal running clock signal preset in the first chip U1 is greater than the width of the synchronous pulse signal. At this time, since the synchronous pulse signal is slightly delayed compared to the imaging acquisition signal, when the synchronous pulse signal is not input, the synchronous control pin 3 of the first chip U1 is suspended. At this time, the high-voltage pulse power signal is equal to the high level of the running clock signal. When the synchronous pulse signal inputs a high level, it means that the synchronous control pin 3 of the first chip U1 is high. At this time, the high-voltage pulse power signal is equal to the high level of the synchronous pulse signal. At this time, it is only necessary to completely cover the high level time of the imaging acquisition signal with the high level time of the running clock signal to realize that the X-ray tube head 90 is turned on earlier than the imaging device 10. When the synchronous pulse signal inputs a low level, it means that the synchronous control pin 3 of the first chip U1 is in a low-level suspended mode. At this time, the high-voltage pulse power signal is equal to the internally set clock signal. At this time, the low level time of the pulse signal is later than the low level time of the imaging acquisition signal, so that the X-ray tube head 90 is turned off later than the imaging device 10. Thus, the above process realizes the purpose that the imaging device 10 works later than the X-ray flaw detector, and the imaging device 10 is shut down earlier than the X-ray flaw detector. Thus, the interference stripes caused by the asynchronism between the imaging signal and the X-ray signal are eliminated. At this time, the voltage detection pin 1 of the second chip U2 detects the voltage of the high-voltage drive circuit 80 to achieve overvoltage protection. It can be achieved that when the imaging acquisition is performed, the variable frequency X-ray exists, and the variable frequency X-ray is delayed to be shut down after the imaging acquisition is completed. The start time to the end time of the pulse-by-pulse ray is greater than the start time to the end time of the imaging device 10 acquisition, so it is possible to remove the interference of water ripples in a single frame image.

[0058] Optionally, in order to save costs, the single chip microcomputer 40 may use a chip of model STM32F103CBT6.

[0059] In one embodiment, the synchronization circuit 20 includes a third chip U3, a first optocoupler device OP1, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a fourth capacitor C4, a fifth capacitor C5 and a sixth capacitor C6. The third chip U3 includes a forward input pin, a reverse input pin, a power pin, a ground pin, a first output pin and a second output pin. The forward input pin of the third chip U3, the first end of the eighth resistor R8 and the first end of the ninth resistor R9 are interconnected. The reverse input pin of the third chip U3 is connected to the second end of the ninth resistor R9, and the connection node is the reverse input end of the synchronization circuit 20. The power pin of the third chip U3, the first end of the fifth capacitor C5, the cathode of the fourth diode D4, the first end of the sixth diode D6, the eleventh resistor R The first end of the twelfth resistor R12 is connected to the second end of the tenth resistor R10, the second end of the twelfth resistor R12, the second end of the sixth capacitor C6, the second end of the eleventh resistor R11, the anode of the fifth diode D5 and the reverse input end of the first optocoupler OP1 are interconnected; the power supply end of the first optocoupler OP1 is connected to the first end of the thirteenth resistor R13, and the output end of the first optocoupler OP1 is connected to the anode of the sixth diode D6; the second end of the thirteenth resistor R13 is connected to the fourth power supply V4; the cathode of the sixth diode D6 is the output end of the synchronization circuit 20.

[0060] The synchronization signal is converted into a pulse signal by the third chip U3 through a non-ground signal conversion, and then is converted into a signal that can be recognized by the first chip U1 through a second isolation conversion through the first optical coupler device OP1. At this time, since the isolation conversion takes time, the pulse signal is slightly delayed compared to the imaging acquisition signal, but its cycle time constant does not change.

[0061] In one embodiment, if Figure 3 As shown, the power supply circuit 70 includes a filter circuit 701, a rectifier circuit 702 and a BUCK circuit 703. The input end of the filter circuit 701 is the input end of the power supply circuit 70. The input end of the filter circuit 701 is used to access the AC power supply. The output end of the filter circuit 701 is connected to the input end of the rectifier circuit 702. The output end of the rectifier circuit 702 is connected to the input end of the BUCK circuit 703. The controlled end of the BUCK circuit 703 is the controlled end of the power supply circuit 70. The output end of the BUCK circuit 703 is the output end of the power supply circuit 70.

[0062] Alternatively, if Figure 3 As shown, the filter circuit 701 is composed of a first switch S1, a second switch S2, a fuse F1, a twenty-first resistor R21, a twelfth capacitor C12, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, a first inductor L1 and a second inductor L2. After the AC power supply is input through the port P1 / P2, the ripple in the output voltage is filtered out by the filter circuit 701.

[0063] Alternatively, if Figure 3 As shown, the rectifier circuit 702 is composed of a sixteenth capacitor C16 and a first rectifier chip DT1, and is used to convert the input AC voltage into a DC voltage, such as converting 220V AC into 300V DC.

[0064] Alternatively, if Figure 3 As shown, the BUCK circuit 703 is composed of a second transistor Q2, a first transient diode TVS1, a twenty-second resistor R22, an eighth diode D8, a seventeenth capacitor C17 and a third inductor L3, so that the adjustable DC power supply can be adjusted as needed according to the voltage regulation control signal of the microcontroller 40.

[0065] Alternatively, if Figure 3 As shown, the primary voltage setting circuit 50 is composed of a second optical coupler device OP2, a fourteenth resistor R14, a fifteenth resistor R15, a second sliding resistor RS2 and a seventh capacitor C7.

[0066] The second optocoupler device can isolate and output the output voltage setting signal output by the single chip microcomputer 40 to the voltage regulating chopper drive circuit 60 .

[0067] Alternatively, if Figure 3 As shown, the voltage regulating chopper drive circuit 60 is composed of a fourth chip U4, a fifth chip U5, a third sliding resistor RS3, a seventh capacitor C7, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a nineteenth resistor R19 and a twentieth resistor R20.

[0068] Among them, the output voltage setting signal is filtered out impurities by the filter capacitor composed of the third sliding resistor RS3, the fourteenth resistor R14, the fifteenth resistor R15 and the seventh capacitor C7, the fourth chip U4 changes the output voltage setting signal according to the voltage regulation control signal, and the fifth chip U5 outputs the changed voltage setting signal.

[0069] Optionally, the model of the first chip U1 is SG3525 or KA3525.

[0070] Optionally, the model of the second chip U2 is M57962.

[0071] In one embodiment, the high-voltage driving circuit 80 includes a first transistor Q1, a second transient diode TVS2 and a twenty-ninth resistor R29. The base of the first transistor Q1, the first end of the second transient diode TVS2 and the first end of the twenty-ninth resistor R29 are interconnected, and their connection node is the controlled end of the high-voltage driving circuit 80. The collector of the first transistor Q1 is the input end of the high-voltage driving circuit 80. The emitter of the first transistor Q1, the second end of the second transient diode TVS2 and the second end of the twenty-ninth resistor R29 are interconnected, and their connection node is the output end of the high-voltage driving circuit 80.

[0072] Among them, the first transistor Q1 is turned on and off according to the high-voltage driving signal, thereby outputting a high-voltage pulse power signal at the transmitting end to drive the X-ray tube head 90. In addition, the second transient diode TVS2 can absorb the surge power of the emitter or base of the first transistor Q1, stabilize the voltage between the emitter and the base of the first transistor Q1, and thus effectively protect the first transistor Q1.

[0073] Optionally, the first transistor Q1 is an NPN transistor.

[0074] In one embodiment, the third chip U3 is a photoelectric isolation chip.

[0075] Optionally, the model of the third chip U3 is 6N139.

[0076] Optionally, the variable frequency pulse X-ray control circuit is further provided with a third optical coupler device OP3 and a fourth optical coupler device OP4 for isolating and outputting a voltage regulation control signal.

[0077] Optionally, the variable frequency pulse X-ray control circuit is further provided with a sixth optocoupler device OP6 and a seventh optocoupler device OP7 for isolating and outputting an inverter control signal.

[0078] In one embodiment, the primary voltage sampling circuit A1 is composed of a fifth optocoupler device OP5, a twenty-fourth resistor R24 ​​and a twenty-third resistor R23. The twenty-fourth resistor R24 ​​and the twenty-third resistor R23 perform voltage division sampling. The fifth optocoupler device OP5 can isolate the sampled voltage signal and input it to the microcontroller 40, thereby protecting the microcontroller 40.

[0079] In one embodiment, the tube current sampling circuit consists of a tenth diode D12, a thirty-third resistor R33, a twenty-second capacitor C22 and a third transient diode TVS3. The third transient diode TVS3 stabilizes the input voltage value, the tenth diode D12 unidirectionally conducts the input sampling current, and the thirty-third resistor R33 and the twenty-second capacitor C22 can filter out noise in the sampling current.

[0080] Optionally, the imaging device 10 is an imaging plate.

[0081] The following combination Figure 1 , 2 , 3, 4 illustrate the principle of the present invention:

[0082] The imaging device 10 inputs the synchronization signal generated by the corresponding imaging acquisition signal to the third chip U3 through the sixth terminal P6 and the seventh terminal P7. The third chip U3 isolates and converts the synchronization signal into a synchronization pulse signal (24V), and then converts it into a pulse signal (2.8V) within a safe voltage range that can be recognized by the first chip U1 through secondary isolation via the first optocoupler device OP1. An internal operating clock signal is preset in the first chip U1, and the operating clock signal of the first chip U1 can be set by the inverter control signal. The pulse width of the running clock signal is greater than the pulse width of the synchronization pulse signal. At this time, since the synchronization pulse signal is slightly delayed compared to the imaging acquisition signal, when the synchronization pulse signal is not input, the synchronization control pin 3 of the first chip U1 is suspended. At this time, the synchronization pulse signal is equal to the running clock signal. When the pulse signal input is high level, that is, the synchronization control pin 3 of the first chip U1 is high level, the synchronization pulse signal is equal to the high level of the running clock signal. At this time, it is only necessary to completely cover the high level time of the imaging acquisition signal with the high level time of the running clock signal, so that the pulse of the output high-voltage drive signal is consistent with the imaging acquisition signal, and the pulse width of the high-voltage drive signal is greater than the imaging acquisition signal. Then, the transmitting end of the first transistor Q1 is controlled to generate a high-voltage pulse power supply signal. The high-voltage pulse power supply signal is output to the X-ray tube head 90 via the third terminal P3 and the fourth terminal P4. The high-voltage pulse power supply signal is also a high-level signal synchronized with the high-voltage drive signal. The high level of the high-voltage pulse power supply signal is earlier than the high level time of the imaging acquisition signal, so that the X-ray tube head 90 is turned on earlier than the imaging device 10.

[0083] When the synchronous pulse signal input is at a low level, that is, the synchronous control pin 3 of the first chip U1 is at a low level, the high-voltage drive signal is equal to the low level of the pulse signal. At this time, the low level time of the high-voltage drive signal is later than the low level time of the imaging acquisition signal, and the low level time of the high-voltage pulse power signal is equal to the low level time of the pulse signal, so that the X-ray tube head 90 is closed later than the imaging device 10. The pulse of the high-voltage pulse power signal is consistent with the imaging acquisition signal and the pulse width of the high-voltage pulse power signal is greater than the imaging acquisition signal, so that the imaging device 10 can be turned on later than the X-ray tube head 90 in one pulse cycle, and the imaging device 10 can be turned off earlier than the X-ray tube head 90, so that the imaging within a period of time will not have interfering water ripples caused by the short-term absence of X-rays. This is repeated many times, and multiple short videos can be spliced ​​into a long video to facilitate observation, so that the observation results are more accurate, and interfering water ripples can be greatly reduced.

[0084] Simply put, when the system starts to capture images, the imaging device 10 sends out a synchronization signal according to the imaging capture signal. The synchronization signal is converted by the third chip U3 and the first optocoupler OP1 respectively. Due to the transmission time of the photoelectric coupling, this signal must go through the transmission time of the third chip U3 and the first optocoupler OP1 before reaching the third pin synchronization end of the first chip U1 (KA3525). At the same time, when the third pin of the first chip U1 (KA3525) is in a suspended state, its operating clock runs according to the internally set operating clock signal, and enters the synchronization mode after experiencing the transmission time of the photoelectric coupling, that is, when the third pin of the first chip U1 (KA3525) is suspended and at a high level, the high-voltage drive signal and the high-voltage pulse power supply signal are equal to the operating clock signal, that is, both are high-level signals. At this time, the X-ray tube head 90 is turned on, so that the X-ray is turned on earlier than the synchronization signal of the imaging board. Similarly, when the imaging board is finished collecting, the synchronization signal of the end of collection still needs to pass through the transmission time of the photoelectric coupling to the 3rd pin of KA3525. At this time, the high-voltage drive signal and the high-voltage pulse power supply signal are equal to the low level of the synchronization pulse signal, that is, later than the low level of the imaging acquisition signal, so that the X-ray tube head 90 is closed later than the imaging device 10. During this transmission time, the X-ray is still in the on state, but the collection and imaging has ended. In this way, the imaging device 10 can be closed before the X-ray tube head 90. However, it should be noted that the time constant of one cycle of the internal setting clock of the first chip U1 (KA3525) must be greater than one cycle time of the imaging board collection synchronization signal. This can be achieved through the inverter control signal.

[0085] The present invention also provides a pulse flaw detection device, such as Figure 5 As shown, the pulse flaw detection device includes a host computer 100, an imaging device 10, an X-ray tube head 90 and the above variable frequency pulse X-ray control circuit, and the variable frequency pulse X-ray control circuit is respectively connected to the imaging device 10 and the X-ray tube head 90. The imaging device 10 is connected to the host computer 100.

[0086] Among them, the host computer 100 sends out an imaging acquisition signal, the imaging device 90 receives the imaging acquisition signal sent by the host computer 100, and outputs a synchronization signal according to the imaging acquisition signal, and the X-ray tube head works according to the high-voltage pulse power supply signal output by the variable frequency pulse X-ray control circuit.

[0087] It is worth noting that, because the pulse flaw detection device of the present invention includes all embodiments of the above-mentioned variable frequency pulse X-ray control circuit, the pulse flaw detection device of the present invention has all the beneficial effects of the above-mentioned variable frequency pulse X-ray control circuit, which will not be repeated here.

[0088] Optionally, the host computer 100 may be a host computer.

[0089] Alternatively, if Figure 2 As shown, the imaging device 90 can be directly connected to the host computer 100, so that the host computer 100 can remotely control the pulse flaw detection device.

[0090] Optionally, the imaging device can also be connected to the host computer 100 and the single-chip microcomputer via a cable. The connection between the three can facilitate data exchange, and can also facilitate remote control of the imaging device and the single-chip microcomputer of the pulse flaw detection device through the host computer 100.

[0091] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the inventive concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A variable frequency pulse X-ray control circuit, characterized in that: The variable frequency pulse X-ray control circuit includes a single chip microcomputer, a synchronization circuit, a power supply circuit, a primary voltage setting circuit, a voltage regulating chopper drive circuit, an inverter chopper drive circuit and a high voltage drive circuit. The control circuit is used to output a voltage setting signal, a voltage regulation control signal and an inverter control signal when receiving an imaging acquisition signal; The primary voltage setting circuit is used to output a set voltage according to the voltage setting signal; The voltage regulating chopper drive circuit is used to output a voltage regulating signal according to the set voltage when receiving the voltage regulating control signal; The power supply circuit is used to step down the voltage of the rectified and filtered AC power supply signal according to the voltage regulation signal; The synchronization circuit is used to receive a synchronization signal output by the imaging device and output a synchronization pulse signal according to the synchronization signal; The inverter chopper drive circuit is used to output a preset high-voltage drive signal according to the pulse signal when receiving the inverter control signal; The high-voltage driving circuit is used to output a high-voltage pulse power signal to drive the X-ray tube head according to the high-voltage driving signal; The pulse of the high-voltage pulse power supply signal is synchronized with the pulse of the imaging acquisition signal, and the pulse width of the high-voltage pulse power supply signal is greater than the pulse width of the imaging acquisition signal; The inverter chopper drive circuit presets an operating clock signal, the time constant of one cycle of the operating clock signal is greater than the time constant of one cycle of the imaging acquisition signal, and when the inverter chopper drive circuit is in a suspended mode, the high-voltage pulse power supply signal is equal to the operating clock signal; When the inverter chopper drive circuit is in a synchronous mode, the high-voltage pulse power supply signal is equal to the synchronous pulse signal; The single-chip microcomputer includes a voltage setting signal output terminal, a voltage regulation control signal output terminal and an inverter control signal output terminal. The controlled terminal of the power supply circuit is connected to the output terminal of the voltage regulation chopper drive circuit, and the output terminal of the power supply circuit is connected to the input terminal of the high-voltage drive circuit; the input terminal of the synchronization circuit is connected to the imaging device, and the output terminal of the synchronization circuit is connected to the input terminal of the inverter chopper drive circuit; the voltage setting signal output terminal of the single-chip microcomputer is connected to the input terminal of the primary voltage setting circuit, the voltage regulation control signal output terminal of the single-chip microcomputer is connected to the controlled terminal of the voltage regulation chopper drive circuit, and the inverter control signal output terminal of the single-chip microcomputer is connected to the controlled terminal of the inverter chopper drive circuit; the input terminal of the voltage regulation chopper drive circuit is connected to the output terminal of the primary voltage setting circuit; the controlled terminal of the high-voltage drive circuit is connected to the output terminal of the inverter chopper drive circuit, and the output terminal of the high-voltage drive circuit is connected to the interface terminal of the X-ray tube head.

2. The variable frequency pulse X-ray control circuit according to claim 1, characterized in that: The variable frequency pulsed X-ray control circuit also includes a primary voltage sampling circuit, the output end of the power supply circuit includes an anode output end and a cathode output end, the single chip microcomputer also includes a voltage sampling end, the anode output end of the power supply circuit is connected to the first end of the primary voltage sampling circuit, the cathode output end of the power supply circuit is connected to the second end of the primary voltage sampling circuit; the sampling output end of the primary voltage sampling circuit is connected to the voltage sampling end of the single chip microcomputer.

3. The variable frequency pulse X-ray control circuit according to claim 2, characterized in that: The variable frequency pulse X-ray control circuit also includes a tube current collection circuit, and the single chip microcomputer also includes a current collection end. The input end of the tube current collection circuit is connected to the power supply end of the X-ray tube head, and the output end of the tube current collection circuit is connected to the current collection end of the single chip microcomputer.

4. The variable frequency pulse X-ray control circuit according to claim 1, characterized in that: The inverter chopper drive circuit includes a first chip, a second chip, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first diode, a second diode, a first sliding resistor, a first capacitor, a second capacitor and a third capacitor. The first chip includes a reverse input pin, a same-phase input pin, a synchronous control pin, an oscillator output pin, an external capacitor pin, an external resistor pin, a discharge pin, a soft start pin, a chip power pin, an external control pin, an output stage power access pin, a ground pin, an output terminal A pin, an output terminal B pin, a reference voltage pin and a compensation pin. The second chip includes a reference power pin, an input pin, an anode voltage pin, a cathode voltage pin, a voltage detection pin and a control signal The output pin of the first chip is connected to the compensation pin of the first chip, the in-phase input pin of the first chip, the reference voltage pin of the first chip and the first end of the third capacitor are connected, the synchronization control pin of the first chip is the input end of the inverter chopper drive circuit, the external capacitor pin of the first chip, the first end of the first resistor and the first end of the first capacitor are interconnected, the external resistor pin of the first chip is connected to the first end of the second resistor, the discharge pin of the first chip is connected to the second end of the first resistor, the soft start pin of the first chip is connected to the first end of the second capacitor, the external control pin of the first chip and the cathode of the first diode are connected to the first end of the second capacitor, and the first diode is connected to the first end of the second capacitor. and the first end of the third resistor are interconnected, the output terminal A pin of the first chip, the ground of the first chip and the output terminal B pin of the first chip are all grounded, the output stage power supply access pin of the first chip is connected to the first end of the fifth resistor, the reference voltage pin of the first chip, the reference power supply pin of the second chip, the first end of the fourth capacitor and the first end of the seventh resistor are all connected to the second power supply; the input pin of the second chip is connected to the second end of the fifth resistor, the anode voltage pin of the second chip is connected to the first power supply, the cathode voltage pin of the second chip is connected to the fifth power supply, the voltage detection pin of the second chip is connected to the anode of the second diode, and the control pin of the second chip is connected to the anode of the second diode. The control signal output pin is connected to the first end of the sixth resistor; the cathode of the second diode is the reference voltage output end of the inverter chopper drive circuit; the anode of the first diode is connected to the second end of the seventh resistor, and the connection node is the controlled end of the inverter chopper drive circuit; the second end of the sixth resistor is the output end of the inverter chopper drive circuit; the second end of the fourth capacitor and the second end of the third capacitor are grounded; the first end of the first sliding resistor is connected to the second end of the second resistor, and the second end of the first sliding resistor, the sliding end of the first sliding resistor, the second end of the first capacitor, the second end of the second capacitor and the second end of the third resistor are interconnected.

5. The variable frequency pulse X-ray control circuit according to claim 1, characterized in that: The synchronization circuit includes a third chip, a first optocoupler device, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a third diode, a fourth diode, a fifth diode, a sixth diode, a fourth capacitor, a fifth capacitor and a sixth capacitor. The third chip includes a forward input pin, a reverse input pin, a power pin, a ground pin, a first output pin and a second output pin. The forward input pin of the third chip, the first end of the eighth resistor and the first end of the ninth resistor are interconnected. The reverse input pin of the third chip is connected to the second end of the ninth resistor, and the connection node is the reverse input end of the synchronization circuit. The power pin of the third chip, the first end of the fifth capacitor, the cathode of the fourth diode, the first end of the sixth diode, the first end of the eleventh resistor, the fifth diode The cathode and the positive input end of the first optocoupler are interconnected, the output pin of the third chip, the anode of the fourth diode, the cathode of the third diode and the tenth resistor are interconnected, the ground end of the third chip, the second end of the fifth capacitor and the positive electrode of the third diode are grounded; the first end of the twelfth resistor is connected to the second end of the tenth resistor, the second end of the twelfth resistor, the second end of the sixth capacitor, the second end of the eleventh resistor, the anode of the fifth diode and the reverse input end of the first optocoupler are interconnected; the power supply end of the first optocoupler is connected to the first end of the thirteenth resistor, and the output end of the first optocoupler is connected to the anode of the sixth diode; the second end of the thirteenth resistor is connected to the fourth power supply; the cathode of the sixth diode is the output end of the synchronization circuit.

6. The variable frequency pulse X-ray control circuit according to claim 1, characterized in that: The high-voltage drive circuit includes a first transistor, a second transient diode and a twenty-ninth resistor. The base of the first transistor, the first end of the second transient diode and the first end of the twenty-ninth resistor are interconnected, and their connection node is the controlled end of the high-voltage drive circuit. The collector of the first transistor is the input end of the high-voltage drive circuit. The emitter of the first transistor, the second end of the second transient diode and the second end of the twenty-ninth resistor are interconnected, and their connection node is the output end of the high-voltage drive circuit.

7. The variable frequency pulse X-ray control circuit according to claim 5, characterized in that: The third chip is a photoelectric isolation chip.

8. A pulse flaw detection device, characterized in that: The pulse flaw detection device comprises a host computer, an imaging device, an X-ray tube head and a variable frequency pulse X-ray control circuit as claimed in any one of claims 1 to 7; The host computer is used to send an imaging acquisition signal; The imaging device is connected to the variable frequency pulse X-ray control circuit and the host computer; the imaging device is used to receive the imaging acquisition signal sent by the host computer and output the synchronization signal according to the imaging acquisition signal; The X-ray tube head is connected to the variable frequency pulse X-ray control circuit and is used to work according to the high voltage pulse power supply signal output by the variable frequency pulse X-ray control circuit.

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