Devices, systems, and methods for providing inductor structures

Abstract

Techniques and mechanisms for providing inductors with integrated circuit (IC) dies. In an embodiment, an IC die includes an integrated circuit and one or more first metallization layers. The IC die is configured to be coupled to a circuit device that includes one or more second metallization layers, where such coupling results in formation of an inductor that is coupled to the integrated circuit. One or more coil structures of the inductor each span some or all of the one or more first metallization layers and some or all of the one or more second metallization layers. In another embodiment, the IC die or the circuit device includes ferromagnetic material to concentrate magnetic flux provided by the inductor.

Description

Technical Field

[0001] Embodiments of the present invention generally relate to integrated circuit devices, and particularly, but not exclusively, to IC dies arranged in a stacked configuration to form inductors. Background Technology

[0002] Integrated circuit (IC) dies typically contain various circuits that require precise control of voltage and / or current. In some cases, the power supplied to such circuits is controlled by an external voltage regulator. To save space, a portion of the power supply is often integrated into the circuitry within the die. On-die voltage regulation can also be used to throttle the voltage in real time, thus providing active power management.

[0003] Often, some components used in power supplies are not formed on the integrated circuit die. Passive components such as inductors, transformers, and capacitors have traditionally been difficult to form in the same processes used to manufacture transistors or are too large to be placed on the die. Components formed outside the die have more space and can achieve higher quality at a lower cost. For on-die regulators, inductors are sometimes mounted to the package substrate.

[0004] Successive generations of semiconductor manufacturing and packaging have continued to evolve towards smaller dimensions and higher circuit integration, which is expected to place higher demands on the implementation of inductors that operate together with on-die circuitry. Attached Figure Description

[0005] Various embodiments of the invention are illustrated by way of example rather than limitation in the accompanying drawings, and in the drawings:

[0006] Figure 1 Perspective and cross-sectional views of a system including an inductor structure according to an embodiment are shown.

[0007] Figure 2 This is a flowchart illustrating elements of a method for providing an inductor structure having an integrated circuit die according to an embodiment.

[0008] Figure 3 A perspective view of the inductor structure of an integrated circuit die according to an embodiment is shown.

[0009] Figure 4 A system according to an embodiment is shown, including features on a die for providing an inductor structure.

[0010] Figure 5 A system according to an embodiment is shown, including features on a die for providing an inductor structure.

[0011] Figure 6This is a functional block diagram illustrating the elements of a computing device according to one embodiment.

[0012] Figure 7 This is a functional block diagram illustrating the elements of an exemplary computer system according to an embodiment. Detailed Implementation

[0013] The embodiments described herein in various ways provide inductor structures spanning multiple circuit devices comprising at least one IC die. The inductor may include at least one coil spanning both one or more metallization layers of the IC die and one or more metallization layers of the circuit devices coupled to the IC die. The coil structure of this inductor can be larger (e.g., having a larger z-dimensional height) compared to those provided by various conventional techniques.

[0014] The techniques described herein can be implemented in one or more electronic devices. Non-limiting examples of electronic devices from which the techniques described herein can be utilized include any kind of mobile and / or fixed device, such as cameras, cellular phones, computer terminals, desktop computers, e-readers, fax machines, automated service terminals, laptop computers, netbook computers, notebook computers, internet devices, payment terminals, personal digital assistants, media players and / or recorders, servers (e.g., blade servers, rack-mount servers, combinations thereof), set-top boxes, smartphones, tablet PCs, ultra-mobile PCs, wired phones, combinations thereof, etc. More generally, the techniques described herein can be employed in any of a variety of electronic devices comprising an IC die and one or more metallization layers coupled to that IC die.

[0015] Figure 1 Features of a system 100 for providing an inductor that operates with an integrated circuit, according to an embodiment, are illustrated. System 100 is an example of an embodiment in which an integrated circuit (IC) die is coupled to a circuit device, wherein such coupling forms an inductor spanning one or more metallization layers of the IC die and one or more other metallization layers of the circuit device. While some embodiments are not limited in this respect, system 100 may include or be configured to provide some or all of any of a variety of package devices, for example, wherein system 100 also includes a molding compound (not shown) disposed over one or both of the IC die and the circuit device. Other embodiments, for example, provide only the IC die, or alternatively, only the circuit device to be coupled to the IC die.

[0016] like Figure 1As shown, system 100 may include IC die 110 and circuit device 120 coupled to IC die 110. IC die 110 represents any of a variety of devices, including a semiconductor substrate, an integrated circuit disposed in or on the semiconductor substrate in various ways, and one or more layers of patterned conductive material configured to couple the integrated circuit to the outside of IC die 110.

[0017] Circuit device 120 represents any of a variety of devices that includes one or more metallization layers configured to provide one or more coil structures of an inductor. In the exemplary embodiments shown, circuit device 120 is another IC die. For example, circuit device 200 may include interconnect structures formed in or on a semiconductor substrate in various ways. However, for example, in other embodiments, circuit device 120 may include an interposer or a package substrate. IC die 110 and circuit device 120 may be coupled to each other via hardware interface 130, which, for example, includes solder joints and / or other conductive contacts disposed in various ways between corresponding contacts of IC die 110 and circuit device 120. Figure 1 Also shown is a cross-sectional detail diagram 101 of a region of the system 100 (e.g., region 132 shown) that includes a portion of the hardware interface 130.

[0018] As shown in detail Figure 101, contact 116 may be disposed in or on one side of IC die 110, while other contacts 126 may be disposed in or on one side of circuit device 120. Contacts 116, 126 may include any of a variety of conductive structures adapted from conventional techniques for coupling with IC dies (e.g., pads including copper, gold, aluminum, and / or the like). In such an embodiment, hardware interface 130 may include interconnect structures (e.g., including the exemplary microbumps 142, 144 shown) all coupled between a corresponding one of contact 116 and a corresponding one of contact 126. Some or all of microbumps 142, 144 may include solder, including, for example, nickel (Ni), tin (Sn), silver (Ag), and / or the like.

[0019] Coupling IC die 110 and circuit device 120 to each other can result in the formation of an inductor (e.g., the exemplary inductor 140 shown) coupled to IC die 110. In an illustrative and not limiting manner, IC die 110 may include one or more metallization layers 112 and a device layer 114 including integrated circuit 118. For example, integrated circuit 118 may include any component of an active circuit element (e.g., CMOS and / or other transistors) and / or a variety of other components configured to provide the functions of a bridge circuit, power delivery circuit, voltage regulator circuit. However, some embodiments are not limited to the specific circuit functions that can be provided by integrated circuit 118.

[0020] Device layer 114 may be disposed on or integrated with the semiconductor substrate (not shown) of IC die 110, for example, wherein the semiconductor substrate and one or more metallization layers 112 are on opposite corresponding sides of circuit 118. In an embodiment, circuit device 120 further includes one or more metallization layers 122. Some or all of the metallization layers 112, 122 may be provided by, for example, manufacturing processes including masking, etching, deposition (e.g., electroplating, sputtering, etc.) and / or other operations adapted from conventional semiconductor manufacturing techniques.

[0021] In the exemplary embodiment shown in view 101, one or more metallization layers 112 include conductors 141, 145, each coupled between a corresponding one of the integrated circuit 118 and a contact 116, for example, including copper, silver, gold, aluminum, and / or the like. One or more metallization layers 122 may include at least one conductor (e.g., the exemplary conductor 143 shown) extending between and directly coupled to the corresponding two contacts 126. In such an embodiment, the inductor 140 includes at least one coil, a portion of which is at least partially formed by conductors 141, 143, 145.

[0022] While some embodiments are not limited in this respect, inductor 140 may also include one or more additional coils (not shown) that span some or all of the metallization layers 112, 122 in various ways. For example, one or more metallization layers 112 may also include one or more additional conductors (not shown) extending between respective other two contacts 116, wherein one or more metallization layers 122 may also include one or more additional conductors extending between respective other two contacts 126. Such additional conductors may be coupled in various ways to form one or more coils coupled between conductors 141, 145.

[0023] By enabling the formation of coil portions that at least partially extend into circuit device 120, some embodiments provide an increased height of inductor 140 in various ways (e.g., along the z-dimension of the illustrated xyz coordinate system) compared to conventional techniques. While some embodiments are not limited in this respect, circuit device 120 may also include one or more additional layers 114, such as device layers, semiconductor substrate layers, etc., which may facilitate coupling of circuit device 120 to additional circuitry (not shown) included in or to be coupled to system 100. Alternatively or additionally, one or more ferromagnetic materials (not shown) may have been formed in the IC die 110 or circuit device 120 to concentrate magnetic flux and / or otherwise shape the magnetic field generated by inductor 140.

[0024] Figure 2 Features of a method 200 for providing an inductor having an IC die according to an embodiment are shown. Method 200 is an example of an embodiment that provides functionality such as the functionality of system 100, for example, wherein the operation of method 200 manufactures, connects and / or operates (e.g.) the structure of IC die 110 and / or the structure of IC die 120.

[0025] like Figure 2 As shown, method 200 may include, at 210, providing a first integrated circuit (IC) die (e.g., IC die 110) comprising a first integrated circuit and one or more first metallization layers. For example, the first integrated circuit may include any of a bridge circuit, a voltage regulator, or various other power delivery circuits. The one or more first metallization layers may have a plurality of conductors formed therein to at least partially form one or more coil portions of an inductor. For example, the one or more first metallization layers may include at least two conductors (e.g., conductors 141, 145) both coupled between the first integrated circuit and a corresponding conductive contact (e.g., one of contact portions 116) formed in or on one side of the IC die. In some embodiments, the one or more first metallization layers may also include one or more additional conductors both coupled between two other corresponding conductive contacts.

[0026] Method 200 may further include, at 220, providing a second circuit device (e.g., circuit device 120 of system 100) including one or more second metallization layers. The second circuit device may be a second IC die (e.g., including a semiconductor substrate and a device layer). In other embodiments, the second circuit device includes a package substrate or an interposer. The one or more second metallization layers may have one or more conductors formed therein, each conductor serving to at least partially form a corresponding coil portion of an inductor. For example, the one or more second metallization layers may include at least one conductor (e.g., conductor 143) coupled between two corresponding conductive contacts (e.g., two of contacts 126) formed in or on one side of the circuit device.

[0027] In an embodiment, method 200 further includes, at 230, coupling the first IC die to the second circuit device via a first contact disposed on or above one side of the first IC die (e.g., on or above one side of the first metallization layer). The coupling at 230 may form an inductor coupled to the first integrated circuit, for example, wherein one or more coil structures of the inductor each include a corresponding first conductor portion of one or more first metallization layers and a corresponding second conductor portion of one or more second metallization layers of the second circuit device. For example, the inductor may include multiple coils each spanning a corresponding portion of one or more first metallization layers and a corresponding portion of one or more second metallization layers.

[0028] While some embodiments are not limited in this respect, method 200 may include one or more additional manufacturing processes for coupling the first IC device and the second circuit device to other circuitry, or facilitating such coupling. For example, method 200 may also include, at 240, disposing of a molding compound over the first IC die or the second circuit device, for example, wherein such a arrangement is intended to at least partially form a package device including the first IC die and the second circuit device. The arrangement at 240 may include one or more operations adapted from conventional circuit packaging techniques. The package including the first IC die and the second circuit device may also include, for example, one or more other IC dies, one or more discrete circuit components, interposers, package substrates, interface structures (e.g., ball grid arrays), and / or the like.

[0029] In some embodiments, method 200 further or alternatively includes operating circuitry comprising an inductor formed by coupling at 230. For example, method 200 may include providing an input signal to the inductor at 250 using a first integrated circuit. Another signal or voltage (e.g., including a power supply voltage or a reference voltage) may be received by or output from the first IC die, wherein said other signal or voltage is based on or alternatively results in an input signal being provided to the inductor at 250.

[0030] Figure 3 The assembly view illustrates features of a system 300 for providing an inductor according to an embodiment. System 300 is an example of an embodiment in which an IC die and another circuit device coupled to the IC die form a plurality of coils of an inductor, wherein the plurality of coils each span both a corresponding portion of the IC die and a corresponding portion of the other circuit device. System 300 may include features of system 100, for example, wherein the manufacture and / or operation of system 300 includes one or more operations of method 200.

[0031] In the illustrated exemplary embodiment, system 300 includes an IC die 310 and a circuit device 320 coupled to the IC die 310, wherein the circuit device 320 is another IC die, a package substrate, or an interposer. The metallization layer of the IC die 310 may have two conductors 318 formed therein to couple an inductor to an integrated circuit (not shown) of the IC die 310. In some embodiments, the metallization layer of the IC die 310 further forms one or more conductive coil portions 316, each of which at least partially forms a corresponding coil of the inductor. The conductors 318 and conductive coil portions 316 may, in various ways, include or be coupled to corresponding contacts on one side 312 of the IC die 310 (e.g., wherein the conductors 318 and conductive coil portions 316 extend at least partially from one side 312 toward the opposite side 314 of the IC die 310 in various ways).

[0032] The metallization layer of circuit device 320 may have a plurality of conductive coil portions 326 formed therein, each of which at least partially forms a corresponding coil of an inductor. The conductive coil portions 326 may include or be coupled to corresponding contacts on one side 322 of circuit device 320 in various ways (e.g., wherein the conductive coil portions 326 extend at least partially from one side 322 toward the opposite side 324 of circuit device 320 in various ways). The corresponding sides 312, 322 of IC die 310 and circuit device 320 may be coupled to each other to form an inductor including conductive coil portions 326, 328.

[0033] For example, Figure 3Assembly diagram 301 of system 300 is also shown, wherein microbumps 330 couple respective terminals of conductive coil portions 326 to the opposite terminals of a respective one of conductive coil portions 328 in various ways. In the exemplary embodiment shown in view 301, the formed inductor includes at least three coils spanning respective metallization layers of IC die 310 and circuit device 320. However, in various embodiments, the inductor may include more, fewer, and / or different coil configurations. The insulating structure of system 300 is not shown in detail diagram 301 to avoid obscuring the features of the inductor formed using at least partially conductive coil portions 326, 328 and utilizing microbumps 330.

[0034] See now Figure 4 According to an exemplary embodiment, system 400 may provide an inductor for circuitry coupled to an IC die. System 400 may include features of one of systems 100 and 300, for example, wherein the manufacture and / or operation of system 400 includes one or more operations of method 200.

[0035] In the illustrated exemplary embodiment, system 400 includes an IC die 410 and a circuit device 420 coupled to the IC die 410, wherein the circuit device 420 is another IC die (or alternatively, a package substrate or interposer). The IC die 410 may include a semiconductor substrate 412, a device layer 414 comprising an integrated circuit disposed in or on the semiconductor substrate 412, and a metallization layer 416 disposed on the device layer 414. Similarly, the circuit device 420 may include a semiconductor substrate 422 and a metallization layer 426 disposed on the semiconductor substrate 422.

[0036] The hardware interface 430 of system 400 may include microbumps 432 that couple the contact pads of IC die 410 to corresponding contact pads of circuit device 420. An inductor formed by coupling IC die 410 to circuit device 420 may include conductors of metallization layer 416, two or more microbumps 432, and one or more conductors of metallization layer 426. An integrated circuit of device layer 414 may be coupled to provide input signals to the inductor (and / or receive output signals from the inductor). In some embodiments, such an integrated circuit may also be coupled to communicate with other circuitry outside IC die 410 (and in some embodiments, outside system 400). By way of illustration and not limitation, device layer 414 may also be coupled to another device 430 (e.g., a package substrate or printed circuit board) via circuit device 420 and one or more solder bumps 440. Communication between device layer 414 and device 430 may include communication of voltage or signals based on (or alternatively, resulting in) signals provided to an inductor at least partially formed by metallization layers 416, 418.

[0037] Figure 5 A system 500 according to an embodiment is shown, wherein an IC die and another circuit device coupled to the IC die form a plurality of coils of an inductor, wherein the plurality of coils each span both a corresponding portion of the IC die and a corresponding portion of the other circuit device. System 500 may include features of one of systems 100, 300, and 400, for example, wherein the manufacture and / or operation of system 500 includes one or more operations of method 200.

[0038] To avoid obscuring certain features of the various embodiments, system 500 is shown as having some features similar to those of system 300. By way of illustration and not limitation, system 500 may include a conductive coil portion 516 and conductor 518 of an IC die, a conductive coil portion 526 of a circuit device, and microbumps 530 coupled between the IC die and the circuit device. The conductive coil portion 516, conductive coil portion 526, conductor 518, and microbumps 530 may, for example, provide functions corresponding to those of the conductive coil portion 316, conductive coil portion 326, conductor 318, and microbumps 330, respectively.

[0039] To provide improved inductance and / or permeability characteristics for system 500, some embodiments also include a ferromagnetic material disposed in, on, or around one of the IC dies and circuit devices. By way of illustration and not limitation, the iron ring 540 disposed in the metallization layer of system 500 may include a barium ferrite (BaFe) compound, a strontium ferrite compound, a rare earth material (e.g., neodymium iron boron (NdFeB)), or a samarium cobalt compound (e.g., Sm2Co). 17Ferromagnetic materials can be formed into rings, pillars, or any other structure configured to concentrate the flux of a magnetic field formed by an inductor or otherwise shape it.

[0040] Figure 6 A computing device 600 according to one embodiment is shown. The computing device 600 houses a board 602, in which IC dies and circuit devices, all coupled to the board 602, together form an inductor. The board 602 may include several components, including but not limited to a processor 604 and at least one communication chip 606. The processor 604 is physically and electrically coupled to the board 602. In some embodiments, at least one communication chip 606 is also physically and electrically coupled to the board 602. In other embodiments, the communication chip 606 is part of the processor 604.

[0041] Depending on its application, computing device 600 may include other components that may or may not be physically and electrically coupled to board 602. These other components include, but are not limited to, volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, graphics processor, digital signal processor, cryptographic processor, chipset, antenna, display, touch screen display, touch screen controller, battery, audio codec, video codec, power amplifier, global positioning system (GPS) device, compass, accelerometer, gyroscope, speaker, camera, and mass storage devices (e.g., hard disk drive, CD, DVD, etc.).

[0042] The communication chip 606 enables wireless communication for transmitting data to and from the computing device 600. The term "wireless" and its derivatives can be used to describe circuits, apparatuses, systems, methods, techniques, communication channels, etc., that can transmit data through a non-solid medium using modulated electromagnetic radiation. This term does not imply that the associated apparatus does not contain any wiring, although in some embodiments they may not contain any wiring. The communication chip 606 can implement any of a number of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 series), WiMAX (IEEE 802.16 series), IEEE 802.20, LTE, Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, its derivatives, and any other wireless protocols designated as 3G, 4G, 5G, and higher. The computing device 600 may include multiple communication chips 606. For example, the first communication chip 606 can be dedicated to short-range wireless communication, such as Wi-Fi and Bluetooth, and the second communication chip 606 can be dedicated to long-range wireless communication, such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO and others.

[0043] The processor 604 of the computing device 600 includes an integrated circuit die packaged within the processor 604. The term "processor" can refer to any device or part of a device that processes electronic data from registers and / or memory to transform that electronic data into other electronic data that can be stored in registers and / or memory. The communication chip 606 also includes an integrated circuit die packaged within the communication chip 606.

[0044] In various embodiments, computing device 600 may be a laptop computer, netbook, notebook computer, ultrabook, smartphone, tablet computer, personal digital assistant (PDA), ultra-mobile PC, mobile phone, desktop computer, server, printer, scanner, monitor, set-top box, entertainment control unit, digital camera, portable music player, or digital video recorder. In other embodiments, computing device 600 may be any other electronic device that processes data.

[0045] Some embodiments may be provided as computer program products or software, which may include a machine-readable medium having instructions stored thereon, which can be used to program a computer system (or other electronic device) to perform processes according to embodiments. Machine-readable media include any means for storing or transmitting information in a machine-readable (e.g., computer-readable) form. For example, machine-readable (e.g., computer-readable) media include machine-readable (e.g., computer-readable) storage media (e.g., read-only memory (“ROM”), random access memory (“RAM”), disk storage media, optical storage media, flash memory devices, etc.), machine-readable (e.g., computer-readable) transmission media (electrical, optical, acoustic, or other forms of propagated signals (e.g., infrared signals, digital signals, etc.)), etc.

[0046] Figure 7 A schematic diagram of a machine is shown in exemplary form as a computer system 700, within which a set of instructions can be executed to cause the machine to perform any one or more methods described herein. In alternative embodiments, the machine may be connected (e.g., network-connected) to other machines in a local area network (LAN), intranet, extranet, or internet. The machine may operate as a server or client machine in a client-server network environment, or as a peer-to-peer (or distributed) network environment. The machine may be a personal computer (PC), tablet PC, set-top box (STB), personal digital assistant (PDA), cellular phone, network device, server, network router, switch, or bridge, or any machine capable of executing a set of instructions (continuous or otherwise) specifying actions to be taken by the machine. Furthermore, although only a single machine is shown, the term "machine" will also be used to include any collection of machines (e.g., computers) that individually or collectively execute a set (or more) of instructions to perform any one or more methods described herein.

[0047] An exemplary computer system 700 includes a processor 702 that communicates with each other via a bus 730, a main memory 704 (e.g., read-only memory (“ROM”), flash memory, dynamic random access memory (DRAM) (e.g., synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM) etc.), a static memory 706 (e.g., flash memory, static random access memory (SRAM) etc.), and an auxiliary memory 718 (e.g., a data storage device).

[0048] Processor 702 represents one or more general-purpose processing devices, such as microprocessors, central processing units, etc. More specifically, processor 702 may be a Complex Instruction Set Computing (CISC) microprocessor, a Reduced Instruction Set Computing (RISC) microprocessor, a Very Long Instruction Word (VLIW) microprocessor, a processor implementing other instruction sets, or a processor implementing a combination of instruction sets. Processor 702 may also be one or more special-purpose processing devices, such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), network processors, or the like. Processor 702 is configured to execute processing logic 726 to perform the operations described herein.

[0049] The computer system 700 may also include a network interface device 708. The computer system 700 may also include a video display unit 710 (e.g., a liquid crystal display (LCD), a light-emitting diode display (LED), or a cathode ray tube (CRT)), an alphanumeric input device 712 (e.g., a keyboard), a cursor control device 714 (e.g., a mouse), and a signal generation device 716 (e.g., a speaker).

[0050] Auxiliary storage 718 may include machine-accessible storage medium (or more specifically, computer-readable storage medium) 732, on which one or more instruction sets (e.g., software 722) embodying any one or more methods or functions described herein are stored. Software 722 may also reside wholly or at least partially within main memory 704 and / or processor 702 during execution by computer system 700, which also constitute machine-readable storage media. Software 722 may also be transmitted or received via network 720 via network interface device 708.

[0051] Although the machine-accessible storage medium 732 is shown as a single medium in the exemplary embodiment, the term "machine-readable storage medium" should be used to include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) that store one or more sets of instructions. The term "machine-readable storage medium" will also be used to include any medium capable of storing or encoding a set of instructions that is executed by a machine and causes the machine to perform any of the embodiments described in one or more embodiments. Accordingly, the term "machine-readable storage medium" will be used to include, but is not limited to, solid-state memory and optical and magnetic media.

[0052] In one embodiment, a system includes a first integrated circuit (IC) die, the first IC die including a first integrated circuit and one or more first metallization layers coupled between the first IC and a hardware interface. The system also includes a second circuit device coupled to the first IC die, the second circuit device including one or more second metallization layers coupled to the one or more first metallization layers via the hardware interface, wherein the system includes an inductor coupled to the first integrated circuit, wherein one or more coil structures of the inductor each include a corresponding first conductor portion of the one or more first metallization layers and a corresponding second conductor portion of the one or more second metallization layers of the second circuit device, the corresponding second conductor portion being coupled to the first conductor portion.

[0053] In one embodiment, the second circuit device is a second IC die including a semiconductor substrate and a device layer. In another embodiment, the second circuit device is a package substrate. In another embodiment, the second circuit device is an interposer. In another embodiment, the inductor includes a plurality of coil structures, each spanning a corresponding portion of one or more first metallization layers and a corresponding portion of one or more second metallization layers. In another embodiment, the first IC die or the second circuit device further includes a ferromagnetic structure configured to shape a magnetic field generated by the inductor. In another embodiment, the ferromagnetic structure includes a ferromagnetic ring. In another embodiment, the first integrated circuit includes a bridge circuit. In another embodiment, the first integrated circuit includes a voltage regulator circuit.

[0054] In another embodiment, a method includes: providing a first integrated circuit (IC) die, the first integrated circuit (IC) die including a first integrated circuit and one or more first metallization layers; and coupling the first IC die to a second circuit device via a first contact in or on one side of the IC die, wherein the coupling forms an inductor coupled to the first integrated circuit, wherein one or more coil structures of the inductor each include a corresponding first conductor portion of one or more first metallization layers and a corresponding second conductor portion of one or more second metallization layers of the second circuit device, the corresponding second conductor portion being coupled to the first conductor portion.

[0055] In one embodiment, the method further includes distributing a molding compound over the first IC die or the second circuit device. In another embodiment, the method further includes sending a first signal from the first integrated circuit to an inductor, and sending a second signal from the inductor at the first integrated circuit, the second signal being based on the first signal. In another embodiment, the second circuit device is a second IC die including a semiconductor substrate and a device layer. In another embodiment, the second circuit device is a package substrate. In another embodiment, the second circuit device is an interposer. In another embodiment, the inductor includes a plurality of coil structures, each spanning a corresponding portion of one or more first metallization layers and a corresponding portion of one or more second metallization layers. In another embodiment, the first IC die or the second circuit device further includes a ferromagnetic structure configured to shape a magnetic field generated by the inductor. In another embodiment, the ferromagnetic structure includes a ferromagnetic ring. In another embodiment, the first integrated circuit includes a bridge circuit. In another embodiment, the first integrated circuit includes a voltage regulator circuit.

[0056] In another embodiment, an integrated circuit (IC) die includes a first integrated circuit and one or more first metallization layers, wherein the IC die is configured to be coupled to a second circuit device via a first contact on one side of the IC die to form an inductor coupled to the first integrated circuit together with the second circuit device, wherein one or more coil structures of the inductor include a corresponding first conductor portion of one or more first metallization layers and a corresponding second conductor portion of one or more second metallization layers of the second circuit device, the corresponding second conductor portion being coupled to the first conductor portion.

[0057] In one embodiment, the inductor includes a plurality of coil structures, each spanning a corresponding portion of one or more first metallization layers and a corresponding portion of one or more second metallization layers. In another embodiment, the IC die further includes a ferromagnetic structure configured to shape a magnetic field generated by the inductor. In another embodiment, the ferromagnetic structure includes a ferromagnetic ring. In another embodiment, the first integrated circuit includes a bridge circuit. In another embodiment, the first integrated circuit includes a voltage regulator circuit.

[0058] This document describes the techniques and architectures used to provide structures for inductors. In the above description, numerous specific details have been set forth for purposes of explanation in order to provide a thorough understanding of certain embodiments. However, it will be apparent to those skilled in the art that certain embodiments can be practiced without these specific details. In other instances, structures and apparatuses are shown in block diagram form to avoid obscuring this specification.

[0059] In this specification, the reference to "an embodiment" or "embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The phrase "in one embodiment" appearing in various places throughout this specification does not necessarily refer to the same embodiment.

[0060] Certain aspects of the specific implementation described herein are presented according to algorithms and symbolic representations of operations on data bits within computer memory. These algorithmic descriptions and representations are the most effective means used by those skilled in the art of computing to convey the substance of their work to those skilled in other fields. An algorithm here generally refers to a self-consistent sequence of operations that leads to a desired result. Steps are those steps that require physical manipulation of physical quantities. Typically, although not mandatory, these quantities take the form of electrical or magnetic signals that can be stored, transmitted, combined, compared, and otherwise manipulated. It has been shown that it is sometimes convenient to refer to these signals as bits, values, elements, symbols, characters, items, numbers, or the like, primarily for general reasons.

[0061] However, it should be remembered that all these and similar terms are associated with appropriate physical quantities, and all these and similar terms are merely convenient labels applied to these quantities. Unless otherwise specifically stated, it is obvious from the discussion herein that throughout the specification, the use of terms such as “processing” or “operation” or “calculation” or “determining” or “displaying” refers to the actions and processes of a computer system or similar electronic computing device that operate on data represented as physical (electronic) quantities in the registers and memory of the computer system and convert said data into other data similarly represented as physical quantities in the memory or registers of the computer system or other such information storage, transmission or display devices.

[0062] Some embodiments also relate to apparatus for performing the operations described herein. This apparatus may be specifically configured for the desired purpose, or it may comprise a general-purpose computer selectively activated or reconfigured by a computer program stored in a computer. Such a computer program may be stored in a computer-readable storage medium, such as, but not limited to, any type of disk (including floppy disks, optical disks, CD-ROMs, and magneto-optical disks), read-only memory (ROM), random access memory (RAM) such as dynamic RAM (DRAM), EPROM, EEPROM, magnetic cards or optical cards, or any type of medium suitable for storing electronic instructions, and said computer-readable storage medium is coupled to a computer system bus.

[0063] The algorithms and displays presented herein are not inherently related to any particular computer or other device. Various general-purpose systems can be used with programs based on the teachings herein, or can prove convenient for constructing more specialized devices to perform the desired method steps. Based on the description herein, the necessary structures for various such systems will emerge. Furthermore, some embodiments are not described with reference to any particular programming language. It should be understood that various programming languages ​​can be used to implement the teachings of embodiments such as those described herein.

[0064] In addition to those described herein, various modifications may be made to the disclosed embodiments and their implementations without departing from their scope. Therefore, the illustrations and embodiments herein should be understood as exemplary rather than restrictive. The scope of the invention should be measured only with reference to the following claims.

Claims

1. A system comprising: a first integrated circuit (IC) die comprising: a semiconductor substrate; a first integrated circuit on the semiconductor substrate, wherein the first integrated circuit comprises any of a bridge circuit, a voltage regulator, or a power delivery circuit; and one or more first metallization layers coupled between the first integrated circuit and a hardware interface; a second circuit device coupled to the first IC die, the second circuit device comprising one or more second metallization layers coupled to the one or more first metallization layers via the hardware interface; and a third device, the first integrated circuit coupled to the third device via the second circuit device and one or more solder bumps, wherein the first IC die comprises a first side in a stacking direction of the first IC die and the second circuit device, and a second side opposite the first side, wherein the second circuit device comprises a first side in the stacking direction, and a second side opposite the first side; wherein the system comprises an inductor coupled to the first integrated circuit, wherein one or more coil structures of the inductor each comprise: a respective first conductor portion of the one or more first metallization layers, the first conductor portion comprising a conductive coil portion extending in the stacking direction from the first side of the first IC die toward the second side of the first IC die; and a respective second conductor portion of the one or more second metallization layers of the second circuit device, the second conductor portion comprising a conductive coil portion extending in the stacking direction from the first side of the second circuit device toward the second side of the second circuit device, and the respective second conductor portion coupled to the first conductor portion by a micro bump, and wherein communication between the first integrated circuit and the third device comprises communication of a voltage or signal, the voltage or signal based on a signal provided to the inductor.

2. The system of claim 1, wherein, the second circuit device is a second IC die comprising a semiconductor substrate and a device layer.

3. The system of claim 1, wherein, the second circuit device is a package substrate.

4. The system of claim 1, wherein, the second circuit device is an interposer.

5. The system of claim 1, wherein, the first IC die or the second circuit device further comprises a ferromagnetic structure configured to shape a magnetic field generated with the inductor.

6. The system of claim 5, wherein, the ferromagnetic structure comprises a ferromagnetic ring.

7. A method comprising: providing a first integrated circuit (IC) die comprising a semiconductor substrate, a first integrated circuit on the semiconductor substrate, and one or more first metallization layers, wherein the first integrated circuit comprises any of a bridge circuit, a voltage regulator, or a power delivery circuit; coupling the first IC die to a second circuit device via a first contact in or on a side of the first IC die, wherein the coupling forms an inductor coupled to the first integrated circuit, providing a third device, the first integrated circuit coupled to the third device via the second circuit device and one or more solder bumps, The first IC die includes a first side and a second side opposite to the first side in the stacking direction of the first IC die and the second circuit device. The second circuit device includes a first side in the stacking direction and a second side opposite to the first side; The inductor includes one or more coil structures comprising: A corresponding first conductor portion of the one or more first metallization layers, the first conductor portion including a conductive coil portion extending in the stacking direction from a first side of the first IC die toward a second side of the first IC die; and A corresponding second conductor portion of one or more second metallization layers of the second circuit device, the second conductor portion including a conductive coil portion extending in the stacking direction from a first side of the second circuit device toward a second side of the second circuit device, and the corresponding second conductor portion being coupled to the first conductor portion via microbumps, and The communication between the first integrated circuit and the third device includes voltage or signal communication, the voltage or signal being based on a signal provided to the inductor.

8. The method of claim 7 further comprises disposing a molding compound above the first IC die or the second circuit device.

9. The method according to claim 7, further comprising: Send an input signal from the first integrated circuit to the inductor; as well as The first integrated circuit receives an output signal from the inductor, the output signal being based on the input signal.

10. The method of claim 7, wherein, The second circuit device is a second IC die comprising a semiconductor substrate and a device layer.

11. The method of claim 7, wherein, The first IC die or the second circuit device further includes a ferromagnetic structure configured to shape the magnetic field generated by the inductor.

12. The method of claim 11, wherein, The ferromagnetic structure includes a ferromagnetic ring.

13. An integrated circuit (IC) die, comprising: Semiconductor substrate; The first integrated circuit on the semiconductor substrate includes any one or more of a bridge circuit and a voltage regulator circuit; as well as One or more first metallization layers are provided, wherein the IC die is configured to be coupled to a second circuit device via a first contact on one side of the IC die to form an inductor coupled to the first integrated circuit together with the second circuit device, and the first integrated circuit is coupled to a third device via the second circuit device and one or more solder bumps. The IC die includes a first side and a second side opposite to the first side in the stacking direction of the IC die and the second circuit device. The second circuit device includes a first side in the stacking direction and a second side opposite to the first side; The inductor includes one or more coil structures comprising: A corresponding first conductor portion of the one or more first metallization layers, the first conductor portion including a conductive coil portion extending in the stacking direction from a first side of the IC die toward a second side of the IC die; and a respective second conductor portion of one or more second metallization layers of the second circuit device, the second conductor portion including a conductive loop portion extending in the stacking direction from a first side of the second circuit device toward a second side of the second circuit device, and the respective second conductor portion coupled to the first conductor portion by a micro-bump, and wherein the communication between the first integrated circuit and the third device includes communication of a voltage or signal, the voltage or signal based on a signal provided to the inductor.

14. The IC die of claim 13, wherein, the inductor includes a plurality of loop structures each spanning a respective portion of the one or more first metallization layers and a respective portion of the one or more second metallization layers.

15. The IC die of claim 13, further comprising a ferromagnetic structure configured to shape a magnetic field generated with the inductor.

16. The IC die of claim 15, wherein, the ferromagnetic structure includes a ferromagnetic loop. the ferromagnetic structure includes a ferromagnetic loop.

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